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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /arch/frv/lib/cache.S
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'arch/frv/lib/cache.S')
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1 files changed, 98 insertions, 0 deletions
diff --git a/arch/frv/lib/cache.S b/arch/frv/lib/cache.S
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1/* cache.S: cache managment routines
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#include <asm/spr-regs.h>
13#include <asm/cache.h>
14
15 .text
16 .p2align 4
17
18###############################################################################
19#
20# Write back a range of dcache
21# - void frv_dcache_writeback(unsigned long start [GR8], unsigned long size [GR9])
22#
23###############################################################################
24 .globl frv_dcache_writeback
25 .type frv_dcache_writeback,@function
26frv_dcache_writeback:
27 andi gr8,~(L1_CACHE_BYTES-1),gr8
28
292: dcf @(gr8,gr0)
30 addi gr8,#L1_CACHE_BYTES,gr8
31 cmp gr9,gr8,icc0
32 bhi icc0,#2,2b
33
34 membar
35 bralr
36 .size frv_dcache_writeback, .-frv_dcache_writeback
37
38##############################################################################
39#
40# Invalidate a range of dcache and icache
41# - void frv_cache_invalidate(unsigned long start [GR8], unsigned long end [GR9]);
42#
43###############################################################################
44 .globl frv_cache_invalidate
45 .type frv_cache_invalidate,@function
46frv_cache_invalidate:
47 andi gr8,~(L1_CACHE_BYTES-1),gr8
48
492: dci @(gr8,gr0)
50 ici @(gr8,gr0)
51 addi gr8,#L1_CACHE_BYTES,gr8
52 cmp gr9,gr8,icc0
53 bhi icc0,#2,2b
54
55 membar
56 bralr
57 .size frv_cache_invalidate, .-frv_cache_invalidate
58
59##############################################################################
60#
61# Invalidate a range of icache
62# - void frv_icache_invalidate(unsigned long start [GR8], unsigned long end [GR9]);
63#
64###############################################################################
65 .globl frv_icache_invalidate
66 .type frv_icache_invalidate,@function
67frv_icache_invalidate:
68 andi gr8,~(L1_CACHE_BYTES-1),gr8
69
702: ici @(gr8,gr0)
71 addi gr8,#L1_CACHE_BYTES,gr8
72 cmp gr9,gr8,icc0
73 bhi icc0,#2,2b
74
75 membar
76 bralr
77 .size frv_icache_invalidate, .-frv_icache_invalidate
78
79###############################################################################
80#
81# Write back and invalidate a range of dcache and icache
82# - void frv_cache_wback_inv(unsigned long start [GR8], unsigned long end [GR9])
83#
84###############################################################################
85 .globl frv_cache_wback_inv
86 .type frv_cache_wback_inv,@function
87frv_cache_wback_inv:
88 andi gr8,~(L1_CACHE_BYTES-1),gr8
89
902: dcf @(gr8,gr0)
91 ici @(gr8,gr0)
92 addi gr8,#L1_CACHE_BYTES,gr8
93 cmp gr9,gr8,icc0
94 bhi icc0,#2,2b
95
96 membar
97 bralr
98 .size frv_cache_wback_inv, .-frv_cache_wback_inv