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authorDavid Howells <dhowells@redhat.com>2006-02-14 16:53:20 -0500
committerLinus Torvalds <torvalds@g5.osdl.org>2006-02-14 19:09:35 -0500
commit28baebae73c3ea8b75c7cae225a7db817ab825a9 (patch)
tree940476b4d03b96480d451b7b5b6f3df3f0ff18dc /arch/frv/kernel
parent68f624fc8b9fa50de9cc0ebd612ef7b7b9fa32d0 (diff)
[PATCH] FRV: Use virtual interrupt disablement
Make the FRV arch use virtual interrupt disablement because accesses to the processor status register (PSR) are relatively slow and because we will soon have the need to deal with multiple interrupt controls at the same time (separate h/w and inter-core interrupts). The way this is done is to dedicate one of the four integer condition code registers (ICC2) to maintaining a virtual interrupt disablement state whilst inside the kernel. This uses the ICC2.Z flag (Zero) to indicate whether the interrupts are virtually disabled and the ICC2.C flag (Carry) to indicate whether the interrupts are physically disabled. ICC2.Z is set to indicate interrupts are virtually disabled. ICC2.C is set to indicate interrupts are physically enabled. Under normal running conditions Z==0 and C==1. Disabling interrupts with local_irq_disable() doesn't then actually physically disable interrupts - it merely sets ICC2.Z to 1. Should an interrupt then happen, the exception prologue will note ICC2.Z is set and branch out of line using one instruction (an unlikely BEQ). Here it will physically disable interrupts and clear ICC2.C. When it comes time to enable interrupts (local_irq_enable()), this simply clears the ICC2.Z flag and invokes a trap #2 if both Z and C flags are clear (the HI integer condition). This can be done with the TIHI conditional trap instruction. The trap then physically reenables interrupts and sets ICC2.C again. Upon returning the interrupt will be taken as interrupts will then be enabled. Note that whilst processing the trap, the whole exceptions system is disabled, and so an interrupt can't happen till it returns. If no pending interrupt had happened, ICC2.C would still be set, the HI condition would not be fulfilled, and no trap will happen. Saving interrupts (local_irq_save) is simply a matter of pulling the ICC2.Z flag out of the CCR register, shifting it down and masking it off. This gives a result of 0 if interrupts were enabled and 1 if they weren't. Restoring interrupts (local_irq_restore) is then a matter of taking the saved value mentioned previously and XOR'ing it against 1. If it was one, the result will be zero, and if it was zero the result will be non-zero. This result is then used to affect the ICC2.Z flag directly (it is a condition code flag after all). An XOR instruction does not affect the Carry flag, and so that bit of state is unchanged. The two flags can then be sampled to see if they're both zero using the trap (TIHI) as for the unconditional reenablement (local_irq_enable). This patch also: (1) Modifies the debugging stub (break.S) to handle single-stepping crossing into the trap #2 handler and into virtually disabled interrupts. (2) Removes superseded fixup pointers from the second instructions in the trap tables (there's no a separate fixup table for this). (3) Declares the trap #3 vector for use in .org directives in the trap table. (4) Moves irq_enter() and irq_exit() in do_IRQ() to avoid problems with virtual interrupt handling, and removes the duplicate code that has now been folded into irq_exit() (softirq and preemption handling). (5) Tells the compiler in the arch Makefile that ICC2 is now reserved. (6) Documents the in-kernel ABI, including the virtual interrupts. (7) Renames the old irq management functions to different names. Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/frv/kernel')
-rw-r--r--arch/frv/kernel/break.S77
-rw-r--r--arch/frv/kernel/entry-table.S39
-rw-r--r--arch/frv/kernel/entry.S65
-rw-r--r--arch/frv/kernel/head.S3
-rw-r--r--arch/frv/kernel/irq.c41
5 files changed, 171 insertions, 54 deletions
diff --git a/arch/frv/kernel/break.S b/arch/frv/kernel/break.S
index 33233dc23e29..687c48d62dde 100644
--- a/arch/frv/kernel/break.S
+++ b/arch/frv/kernel/break.S
@@ -200,12 +200,20 @@ __break_step:
200 movsg bpcsr,gr2 200 movsg bpcsr,gr2
201 sethi.p %hi(__entry_kernel_external_interrupt),gr3 201 sethi.p %hi(__entry_kernel_external_interrupt),gr3
202 setlo %lo(__entry_kernel_external_interrupt),gr3 202 setlo %lo(__entry_kernel_external_interrupt),gr3
203 subcc gr2,gr3,gr0,icc0 203 subcc.p gr2,gr3,gr0,icc0
204 sethi %hi(__entry_uspace_external_interrupt),gr3
205 setlo.p %lo(__entry_uspace_external_interrupt),gr3
204 beq icc0,#2,__break_step_kernel_external_interrupt 206 beq icc0,#2,__break_step_kernel_external_interrupt
205 sethi.p %hi(__entry_uspace_external_interrupt),gr3 207 subcc.p gr2,gr3,gr0,icc0
206 setlo %lo(__entry_uspace_external_interrupt),gr3 208 sethi %hi(__entry_kernel_external_interrupt_virtually_disabled),gr3
207 subcc gr2,gr3,gr0,icc0 209 setlo.p %lo(__entry_kernel_external_interrupt_virtually_disabled),gr3
208 beq icc0,#2,__break_step_uspace_external_interrupt 210 beq icc0,#2,__break_step_uspace_external_interrupt
211 subcc.p gr2,gr3,gr0,icc0
212 sethi %hi(__entry_kernel_external_interrupt_virtual_reenable),gr3
213 setlo.p %lo(__entry_kernel_external_interrupt_virtual_reenable),gr3
214 beq icc0,#2,__break_step_kernel_external_interrupt_virtually_disabled
215 subcc gr2,gr3,gr0,icc0
216 beq icc0,#2,__break_step_kernel_external_interrupt_virtual_reenable
209 217
210 LEDS 0x2007,gr2 218 LEDS 0x2007,gr2
211 219
@@ -254,6 +262,9 @@ __break_step_kernel_softprog_interrupt:
254# step through an external interrupt from kernel mode 262# step through an external interrupt from kernel mode
255 .globl __break_step_kernel_external_interrupt 263 .globl __break_step_kernel_external_interrupt
256__break_step_kernel_external_interrupt: 264__break_step_kernel_external_interrupt:
265 # deal with virtual interrupt disablement
266 beq icc2,#0,__break_step_kernel_external_interrupt_virtually_disabled
267
257 sethi.p %hi(__entry_kernel_external_interrupt_reentry),gr3 268 sethi.p %hi(__entry_kernel_external_interrupt_reentry),gr3
258 setlo %lo(__entry_kernel_external_interrupt_reentry),gr3 269 setlo %lo(__entry_kernel_external_interrupt_reentry),gr3
259 270
@@ -294,6 +305,64 @@ __break_return_as_kernel_prologue:
294#endif 305#endif
295 rett #1 306 rett #1
296 307
308# we single-stepped into an interrupt handler whilst interrupts were merely virtually disabled
309# need to really disable interrupts, set flag, fix up and return
310__break_step_kernel_external_interrupt_virtually_disabled:
311 movsg psr,gr2
312 andi gr2,#~PSR_PIL,gr2
313 ori gr2,#PSR_PIL_14,gr2 /* debugging interrupts only */
314 movgs gr2,psr
315
316 ldi @(gr31,#REG_CCR),gr3
317 movgs gr3,ccr
318 subcc.p gr0,gr0,gr0,icc2 /* leave Z set, clear C */
319
320 # exceptions must've been enabled and we must've been in supervisor mode
321 setlos BPSR_BET|BPSR_BS,gr3
322 movgs gr3,bpsr
323
324 # return to where the interrupt happened
325 movsg pcsr,gr2
326 movgs gr2,bpcsr
327
328 lddi.p @(gr31,#REG_GR(2)),gr2
329
330 xor gr31,gr31,gr31
331 movgs gr0,brr
332#ifdef CONFIG_MMU
333 movsg scr3,gr31
334#endif
335 rett #1
336
337# we stepped through into the virtual interrupt reenablement trap
338#
339# we also want to single step anyway, but after fixing up so that we get an event on the
340# instruction after the broken-into exception returns
341 .globl __break_step_kernel_external_interrupt_virtual_reenable
342__break_step_kernel_external_interrupt_virtual_reenable:
343 movsg psr,gr2
344 andi gr2,#~PSR_PIL,gr2
345 movgs gr2,psr
346
347 ldi @(gr31,#REG_CCR),gr3
348 movgs gr3,ccr
349 subicc gr0,#1,gr0,icc2 /* clear Z, set C */
350
351 # save the adjusted ICC2
352 movsg ccr,gr3
353 sti gr3,@(gr31,#REG_CCR)
354
355 # exceptions must've been enabled and we must've been in supervisor mode
356 setlos BPSR_BET|BPSR_BS,gr3
357 movgs gr3,bpsr
358
359 # return to where the trap happened
360 movsg pcsr,gr2
361 movgs gr2,bpcsr
362
363 # and then process the single step
364 bra __break_continue
365
297# step through an internal exception from uspace mode 366# step through an internal exception from uspace mode
298 .globl __break_step_uspace_softprog_interrupt 367 .globl __break_step_uspace_softprog_interrupt
299__break_step_uspace_softprog_interrupt: 368__break_step_uspace_softprog_interrupt:
diff --git a/arch/frv/kernel/entry-table.S b/arch/frv/kernel/entry-table.S
index 9b9243e2103c..81568acea9cd 100644
--- a/arch/frv/kernel/entry-table.S
+++ b/arch/frv/kernel/entry-table.S
@@ -116,6 +116,8 @@ __break_kerneltrap_fixup_table:
116 .long __break_step_uspace_external_interrupt 116 .long __break_step_uspace_external_interrupt
117 .section .trap.kernel 117 .section .trap.kernel
118 .org \tbr_tt 118 .org \tbr_tt
119 # deal with virtual interrupt disablement
120 beq icc2,#0,__entry_kernel_external_interrupt_virtually_disabled
119 bra __entry_kernel_external_interrupt 121 bra __entry_kernel_external_interrupt
120 .section .trap.fixup.kernel 122 .section .trap.fixup.kernel
121 .org \tbr_tt >> 2 123 .org \tbr_tt >> 2
@@ -259,25 +261,52 @@ __trap_fixup_kernel_data_tlb_miss:
259 .org TBR_TT_TRAP0 261 .org TBR_TT_TRAP0
260 .rept 127 262 .rept 127
261 bra __entry_uspace_softprog_interrupt 263 bra __entry_uspace_softprog_interrupt
262 bra __break_step_uspace_softprog_interrupt 264 .long 0,0,0
263 .long 0,0
264 .endr 265 .endr
265 .org TBR_TT_BREAK 266 .org TBR_TT_BREAK
266 bra __entry_break 267 bra __entry_break
267 .long 0,0,0 268 .long 0,0,0
268 269
270 .section .trap.fixup.user
271 .org TBR_TT_TRAP0 >> 2
272 .rept 127
273 .long __break_step_uspace_softprog_interrupt
274 .endr
275 .org TBR_TT_BREAK >> 2
276 .long 0
277
269 # miscellaneous kernel mode entry points 278 # miscellaneous kernel mode entry points
270 .section .trap.kernel 279 .section .trap.kernel
271 .org TBR_TT_TRAP0 280 .org TBR_TT_TRAP0
272 .rept 127
273 bra __entry_kernel_softprog_interrupt 281 bra __entry_kernel_softprog_interrupt
274 bra __break_step_kernel_softprog_interrupt 282 .org TBR_TT_TRAP1
275 .long 0,0 283 bra __entry_kernel_softprog_interrupt
284
285 # trap #2 in kernel - reenable interrupts
286 .org TBR_TT_TRAP2
287 bra __entry_kernel_external_interrupt_virtual_reenable
288
289 # miscellaneous kernel traps
290 .org TBR_TT_TRAP3
291 .rept 124
292 bra __entry_kernel_softprog_interrupt
293 .long 0,0,0
276 .endr 294 .endr
277 .org TBR_TT_BREAK 295 .org TBR_TT_BREAK
278 bra __entry_break 296 bra __entry_break
279 .long 0,0,0 297 .long 0,0,0
280 298
299 .section .trap.fixup.kernel
300 .org TBR_TT_TRAP0 >> 2
301 .long __break_step_kernel_softprog_interrupt
302 .long __break_step_kernel_softprog_interrupt
303 .long __break_step_kernel_external_interrupt_virtual_reenable
304 .rept 124
305 .long __break_step_kernel_softprog_interrupt
306 .endr
307 .org TBR_TT_BREAK >> 2
308 .long 0
309
281 # miscellaneous debug mode entry points 310 # miscellaneous debug mode entry points
282 .section .trap.break 311 .section .trap.break
283 .org TBR_TT_BREAK 312 .org TBR_TT_BREAK
diff --git a/arch/frv/kernel/entry.S b/arch/frv/kernel/entry.S
index c69d499d28cf..1d21c8d34d8a 100644
--- a/arch/frv/kernel/entry.S
+++ b/arch/frv/kernel/entry.S
@@ -141,7 +141,10 @@ __entry_uspace_external_interrupt_reentry:
141 141
142 movsg gner0,gr4 142 movsg gner0,gr4
143 movsg gner1,gr5 143 movsg gner1,gr5
144 stdi gr4,@(gr28,#REG_GNER0) 144 stdi.p gr4,@(gr28,#REG_GNER0)
145
146 # interrupts start off fully disabled in the interrupt handler
147 subcc gr0,gr0,gr0,icc2 /* set Z and clear C */
145 148
146 # set up kernel global registers 149 # set up kernel global registers
147 sethi.p %hi(__kernel_current_task),gr5 150 sethi.p %hi(__kernel_current_task),gr5
@@ -193,9 +196,8 @@ __entry_uspace_external_interrupt_reentry:
193 .type __entry_kernel_external_interrupt,@function 196 .type __entry_kernel_external_interrupt,@function
194__entry_kernel_external_interrupt: 197__entry_kernel_external_interrupt:
195 LEDS 0x6210 198 LEDS 0x6210
196 199// sub sp,gr15,gr31
197 sub sp,gr15,gr31 200// LEDS32
198 LEDS32
199 201
200 # set up the stack pointer 202 # set up the stack pointer
201 or.p sp,gr0,gr30 203 or.p sp,gr0,gr30
@@ -231,7 +233,10 @@ __entry_kernel_external_interrupt_reentry:
231 stdi gr24,@(gr28,#REG_GR(24)) 233 stdi gr24,@(gr28,#REG_GR(24))
232 stdi gr26,@(gr28,#REG_GR(26)) 234 stdi gr26,@(gr28,#REG_GR(26))
233 sti gr29,@(gr28,#REG_GR(29)) 235 sti gr29,@(gr28,#REG_GR(29))
234 stdi gr30,@(gr28,#REG_GR(30)) 236 stdi.p gr30,@(gr28,#REG_GR(30))
237
238 # note virtual interrupts will be fully enabled upon return
239 subicc gr0,#1,gr0,icc2 /* clear Z, set C */
235 240
236 movsg tbr ,gr20 241 movsg tbr ,gr20
237 movsg psr ,gr22 242 movsg psr ,gr22
@@ -267,7 +272,10 @@ __entry_kernel_external_interrupt_reentry:
267 272
268 movsg gner0,gr4 273 movsg gner0,gr4
269 movsg gner1,gr5 274 movsg gner1,gr5
270 stdi gr4,@(gr28,#REG_GNER0) 275 stdi.p gr4,@(gr28,#REG_GNER0)
276
277 # interrupts start off fully disabled in the interrupt handler
278 subcc gr0,gr0,gr0,icc2 /* set Z and clear C */
271 279
272 # set the return address 280 # set the return address
273 sethi.p %hi(__entry_return_from_kernel_interrupt),gr4 281 sethi.p %hi(__entry_return_from_kernel_interrupt),gr4
@@ -291,6 +299,45 @@ __entry_kernel_external_interrupt_reentry:
291 299
292 .size __entry_kernel_external_interrupt,.-__entry_kernel_external_interrupt 300 .size __entry_kernel_external_interrupt,.-__entry_kernel_external_interrupt
293 301
302###############################################################################
303#
304# deal with interrupts that were actually virtually disabled
305# - we need to really disable them, flag the fact and return immediately
306# - if you change this, you must alter break.S also
307#
308###############################################################################
309 .balign L1_CACHE_BYTES
310 .globl __entry_kernel_external_interrupt_virtually_disabled
311 .type __entry_kernel_external_interrupt_virtually_disabled,@function
312__entry_kernel_external_interrupt_virtually_disabled:
313 movsg psr,gr30
314 andi gr30,#~PSR_PIL,gr30
315 ori gr30,#PSR_PIL_14,gr30 ; debugging interrupts only
316 movgs gr30,psr
317 subcc gr0,gr0,gr0,icc2 ; leave Z set, clear C
318 rett #0
319
320 .size __entry_kernel_external_interrupt_virtually_disabled,.-__entry_kernel_external_interrupt_virtually_disabled
321
322###############################################################################
323#
324# deal with re-enablement of interrupts that were pending when virtually re-enabled
325# - set ICC2.C, re-enable the real interrupts and return
326# - we can clear ICC2.Z because we shouldn't be here if it's not 0 [due to TIHI]
327# - if you change this, you must alter break.S also
328#
329###############################################################################
330 .balign L1_CACHE_BYTES
331 .globl __entry_kernel_external_interrupt_virtual_reenable
332 .type __entry_kernel_external_interrupt_virtual_reenable,@function
333__entry_kernel_external_interrupt_virtual_reenable:
334 movsg psr,gr30
335 andi gr30,#~PSR_PIL,gr30 ; re-enable interrupts
336 movgs gr30,psr
337 subicc gr0,#1,gr0,icc2 ; clear Z, set C
338 rett #0
339
340 .size __entry_kernel_external_interrupt_virtual_reenable,.-__entry_kernel_external_interrupt_virtual_reenable
294 341
295############################################################################### 342###############################################################################
296# 343#
@@ -335,6 +382,7 @@ __entry_uspace_softprog_interrupt_reentry:
335 382
336 sethi.p %hi(__entry_return_from_user_exception),gr23 383 sethi.p %hi(__entry_return_from_user_exception),gr23
337 setlo %lo(__entry_return_from_user_exception),gr23 384 setlo %lo(__entry_return_from_user_exception),gr23
385
338 bra __entry_common 386 bra __entry_common
339 387
340 .size __entry_uspace_softprog_interrupt,.-__entry_uspace_softprog_interrupt 388 .size __entry_uspace_softprog_interrupt,.-__entry_uspace_softprog_interrupt
@@ -495,7 +543,10 @@ __entry_common:
495 543
496 movsg gner0,gr4 544 movsg gner0,gr4
497 movsg gner1,gr5 545 movsg gner1,gr5
498 stdi gr4,@(gr28,#REG_GNER0) 546 stdi.p gr4,@(gr28,#REG_GNER0)
547
548 # set up virtual interrupt disablement
549 subicc gr0,#1,gr0,icc2 /* clear Z flag, set C flag */
499 550
500 # set up kernel global registers 551 # set up kernel global registers
501 sethi.p %hi(__kernel_current_task),gr5 552 sethi.p %hi(__kernel_current_task),gr5
diff --git a/arch/frv/kernel/head.S b/arch/frv/kernel/head.S
index c73b4fe9f6ca..29a5265489b7 100644
--- a/arch/frv/kernel/head.S
+++ b/arch/frv/kernel/head.S
@@ -513,6 +513,9 @@ __head_mmu_enabled:
513 movgs gr0,ccr 513 movgs gr0,ccr
514 movgs gr0,cccr 514 movgs gr0,cccr
515 515
516 # initialise the virtual interrupt handling
517 subcc gr0,gr0,gr0,icc2 /* set Z, clear C */
518
516#ifdef CONFIG_MMU 519#ifdef CONFIG_MMU
517 movgs gr3,scr2 520 movgs gr3,scr2
518 movgs gr3,scr3 521 movgs gr3,scr3
diff --git a/arch/frv/kernel/irq.c b/arch/frv/kernel/irq.c
index 59580c59c62c..27ab4c30aac6 100644
--- a/arch/frv/kernel/irq.c
+++ b/arch/frv/kernel/irq.c
@@ -287,18 +287,11 @@ asmlinkage void do_IRQ(void)
287 struct irq_source *source; 287 struct irq_source *source;
288 int level, cpu; 288 int level, cpu;
289 289
290 irq_enter();
291
290 level = (__frame->tbr >> 4) & 0xf; 292 level = (__frame->tbr >> 4) & 0xf;
291 cpu = smp_processor_id(); 293 cpu = smp_processor_id();
292 294
293#if 0
294 {
295 static u32 irqcount;
296 *(volatile u32 *) 0xe1200004 = ~((irqcount++ << 8) | level);
297 *(volatile u16 *) 0xffc00100 = (u16) ~0x9999;
298 mb();
299 }
300#endif
301
302 if ((unsigned long) __frame - (unsigned long) (current + 1) < 512) 295 if ((unsigned long) __frame - (unsigned long) (current + 1) < 512)
303 BUG(); 296 BUG();
304 297
@@ -308,40 +301,12 @@ asmlinkage void do_IRQ(void)
308 301
309 kstat_this_cpu.irqs[level]++; 302 kstat_this_cpu.irqs[level]++;
310 303
311 irq_enter();
312
313 for (source = frv_irq_levels[level].sources; source; source = source->next) 304 for (source = frv_irq_levels[level].sources; source; source = source->next)
314 source->doirq(source); 305 source->doirq(source);
315 306
316 irq_exit();
317
318 __clr_MASK(level); 307 __clr_MASK(level);
319 308
320 /* only process softirqs if we didn't interrupt another interrupt handler */ 309 irq_exit();
321 if ((__frame->psr & PSR_PIL) == PSR_PIL_0)
322 if (local_softirq_pending())
323 do_softirq();
324
325#ifdef CONFIG_PREEMPT
326 local_irq_disable();
327 while (--current->preempt_count == 0) {
328 if (!(__frame->psr & PSR_S) ||
329 current->need_resched == 0 ||
330 in_interrupt())
331 break;
332 current->preempt_count++;
333 local_irq_enable();
334 preempt_schedule();
335 local_irq_disable();
336 }
337#endif
338
339#if 0
340 {
341 *(volatile u16 *) 0xffc00100 = (u16) ~0x6666;
342 mb();
343 }
344#endif
345 310
346} /* end do_IRQ() */ 311} /* end do_IRQ() */
347 312