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authorDavid Howells <dhowells@redhat.com>2006-02-14 16:53:20 -0500
committerLinus Torvalds <torvalds@g5.osdl.org>2006-02-14 19:09:35 -0500
commit28baebae73c3ea8b75c7cae225a7db817ab825a9 (patch)
tree940476b4d03b96480d451b7b5b6f3df3f0ff18dc /arch/frv/kernel/irq.c
parent68f624fc8b9fa50de9cc0ebd612ef7b7b9fa32d0 (diff)
[PATCH] FRV: Use virtual interrupt disablement
Make the FRV arch use virtual interrupt disablement because accesses to the processor status register (PSR) are relatively slow and because we will soon have the need to deal with multiple interrupt controls at the same time (separate h/w and inter-core interrupts). The way this is done is to dedicate one of the four integer condition code registers (ICC2) to maintaining a virtual interrupt disablement state whilst inside the kernel. This uses the ICC2.Z flag (Zero) to indicate whether the interrupts are virtually disabled and the ICC2.C flag (Carry) to indicate whether the interrupts are physically disabled. ICC2.Z is set to indicate interrupts are virtually disabled. ICC2.C is set to indicate interrupts are physically enabled. Under normal running conditions Z==0 and C==1. Disabling interrupts with local_irq_disable() doesn't then actually physically disable interrupts - it merely sets ICC2.Z to 1. Should an interrupt then happen, the exception prologue will note ICC2.Z is set and branch out of line using one instruction (an unlikely BEQ). Here it will physically disable interrupts and clear ICC2.C. When it comes time to enable interrupts (local_irq_enable()), this simply clears the ICC2.Z flag and invokes a trap #2 if both Z and C flags are clear (the HI integer condition). This can be done with the TIHI conditional trap instruction. The trap then physically reenables interrupts and sets ICC2.C again. Upon returning the interrupt will be taken as interrupts will then be enabled. Note that whilst processing the trap, the whole exceptions system is disabled, and so an interrupt can't happen till it returns. If no pending interrupt had happened, ICC2.C would still be set, the HI condition would not be fulfilled, and no trap will happen. Saving interrupts (local_irq_save) is simply a matter of pulling the ICC2.Z flag out of the CCR register, shifting it down and masking it off. This gives a result of 0 if interrupts were enabled and 1 if they weren't. Restoring interrupts (local_irq_restore) is then a matter of taking the saved value mentioned previously and XOR'ing it against 1. If it was one, the result will be zero, and if it was zero the result will be non-zero. This result is then used to affect the ICC2.Z flag directly (it is a condition code flag after all). An XOR instruction does not affect the Carry flag, and so that bit of state is unchanged. The two flags can then be sampled to see if they're both zero using the trap (TIHI) as for the unconditional reenablement (local_irq_enable). This patch also: (1) Modifies the debugging stub (break.S) to handle single-stepping crossing into the trap #2 handler and into virtually disabled interrupts. (2) Removes superseded fixup pointers from the second instructions in the trap tables (there's no a separate fixup table for this). (3) Declares the trap #3 vector for use in .org directives in the trap table. (4) Moves irq_enter() and irq_exit() in do_IRQ() to avoid problems with virtual interrupt handling, and removes the duplicate code that has now been folded into irq_exit() (softirq and preemption handling). (5) Tells the compiler in the arch Makefile that ICC2 is now reserved. (6) Documents the in-kernel ABI, including the virtual interrupts. (7) Renames the old irq management functions to different names. Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/frv/kernel/irq.c')
-rw-r--r--arch/frv/kernel/irq.c41
1 files changed, 3 insertions, 38 deletions
diff --git a/arch/frv/kernel/irq.c b/arch/frv/kernel/irq.c
index 59580c59c62c..27ab4c30aac6 100644
--- a/arch/frv/kernel/irq.c
+++ b/arch/frv/kernel/irq.c
@@ -287,18 +287,11 @@ asmlinkage void do_IRQ(void)
287 struct irq_source *source; 287 struct irq_source *source;
288 int level, cpu; 288 int level, cpu;
289 289
290 irq_enter();
291
290 level = (__frame->tbr >> 4) & 0xf; 292 level = (__frame->tbr >> 4) & 0xf;
291 cpu = smp_processor_id(); 293 cpu = smp_processor_id();
292 294
293#if 0
294 {
295 static u32 irqcount;
296 *(volatile u32 *) 0xe1200004 = ~((irqcount++ << 8) | level);
297 *(volatile u16 *) 0xffc00100 = (u16) ~0x9999;
298 mb();
299 }
300#endif
301
302 if ((unsigned long) __frame - (unsigned long) (current + 1) < 512) 295 if ((unsigned long) __frame - (unsigned long) (current + 1) < 512)
303 BUG(); 296 BUG();
304 297
@@ -308,40 +301,12 @@ asmlinkage void do_IRQ(void)
308 301
309 kstat_this_cpu.irqs[level]++; 302 kstat_this_cpu.irqs[level]++;
310 303
311 irq_enter();
312
313 for (source = frv_irq_levels[level].sources; source; source = source->next) 304 for (source = frv_irq_levels[level].sources; source; source = source->next)
314 source->doirq(source); 305 source->doirq(source);
315 306
316 irq_exit();
317
318 __clr_MASK(level); 307 __clr_MASK(level);
319 308
320 /* only process softirqs if we didn't interrupt another interrupt handler */ 309 irq_exit();
321 if ((__frame->psr & PSR_PIL) == PSR_PIL_0)
322 if (local_softirq_pending())
323 do_softirq();
324
325#ifdef CONFIG_PREEMPT
326 local_irq_disable();
327 while (--current->preempt_count == 0) {
328 if (!(__frame->psr & PSR_S) ||
329 current->need_resched == 0 ||
330 in_interrupt())
331 break;
332 current->preempt_count++;
333 local_irq_enable();
334 preempt_schedule();
335 local_irq_disable();
336 }
337#endif
338
339#if 0
340 {
341 *(volatile u16 *) 0xffc00100 = (u16) ~0x6666;
342 mb();
343 }
344#endif
345 310
346} /* end do_IRQ() */ 311} /* end do_IRQ() */
347 312