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authorDavid Howells <dhowells@redhat.com>2006-02-14 16:53:20 -0500
committerLinus Torvalds <torvalds@g5.osdl.org>2006-02-14 19:09:35 -0500
commit28baebae73c3ea8b75c7cae225a7db817ab825a9 (patch)
tree940476b4d03b96480d451b7b5b6f3df3f0ff18dc /arch/frv/kernel/entry-table.S
parent68f624fc8b9fa50de9cc0ebd612ef7b7b9fa32d0 (diff)
[PATCH] FRV: Use virtual interrupt disablement
Make the FRV arch use virtual interrupt disablement because accesses to the processor status register (PSR) are relatively slow and because we will soon have the need to deal with multiple interrupt controls at the same time (separate h/w and inter-core interrupts). The way this is done is to dedicate one of the four integer condition code registers (ICC2) to maintaining a virtual interrupt disablement state whilst inside the kernel. This uses the ICC2.Z flag (Zero) to indicate whether the interrupts are virtually disabled and the ICC2.C flag (Carry) to indicate whether the interrupts are physically disabled. ICC2.Z is set to indicate interrupts are virtually disabled. ICC2.C is set to indicate interrupts are physically enabled. Under normal running conditions Z==0 and C==1. Disabling interrupts with local_irq_disable() doesn't then actually physically disable interrupts - it merely sets ICC2.Z to 1. Should an interrupt then happen, the exception prologue will note ICC2.Z is set and branch out of line using one instruction (an unlikely BEQ). Here it will physically disable interrupts and clear ICC2.C. When it comes time to enable interrupts (local_irq_enable()), this simply clears the ICC2.Z flag and invokes a trap #2 if both Z and C flags are clear (the HI integer condition). This can be done with the TIHI conditional trap instruction. The trap then physically reenables interrupts and sets ICC2.C again. Upon returning the interrupt will be taken as interrupts will then be enabled. Note that whilst processing the trap, the whole exceptions system is disabled, and so an interrupt can't happen till it returns. If no pending interrupt had happened, ICC2.C would still be set, the HI condition would not be fulfilled, and no trap will happen. Saving interrupts (local_irq_save) is simply a matter of pulling the ICC2.Z flag out of the CCR register, shifting it down and masking it off. This gives a result of 0 if interrupts were enabled and 1 if they weren't. Restoring interrupts (local_irq_restore) is then a matter of taking the saved value mentioned previously and XOR'ing it against 1. If it was one, the result will be zero, and if it was zero the result will be non-zero. This result is then used to affect the ICC2.Z flag directly (it is a condition code flag after all). An XOR instruction does not affect the Carry flag, and so that bit of state is unchanged. The two flags can then be sampled to see if they're both zero using the trap (TIHI) as for the unconditional reenablement (local_irq_enable). This patch also: (1) Modifies the debugging stub (break.S) to handle single-stepping crossing into the trap #2 handler and into virtually disabled interrupts. (2) Removes superseded fixup pointers from the second instructions in the trap tables (there's no a separate fixup table for this). (3) Declares the trap #3 vector for use in .org directives in the trap table. (4) Moves irq_enter() and irq_exit() in do_IRQ() to avoid problems with virtual interrupt handling, and removes the duplicate code that has now been folded into irq_exit() (softirq and preemption handling). (5) Tells the compiler in the arch Makefile that ICC2 is now reserved. (6) Documents the in-kernel ABI, including the virtual interrupts. (7) Renames the old irq management functions to different names. Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/frv/kernel/entry-table.S')
-rw-r--r--arch/frv/kernel/entry-table.S39
1 files changed, 34 insertions, 5 deletions
diff --git a/arch/frv/kernel/entry-table.S b/arch/frv/kernel/entry-table.S
index 9b9243e2103c..81568acea9cd 100644
--- a/arch/frv/kernel/entry-table.S
+++ b/arch/frv/kernel/entry-table.S
@@ -116,6 +116,8 @@ __break_kerneltrap_fixup_table:
116 .long __break_step_uspace_external_interrupt 116 .long __break_step_uspace_external_interrupt
117 .section .trap.kernel 117 .section .trap.kernel
118 .org \tbr_tt 118 .org \tbr_tt
119 # deal with virtual interrupt disablement
120 beq icc2,#0,__entry_kernel_external_interrupt_virtually_disabled
119 bra __entry_kernel_external_interrupt 121 bra __entry_kernel_external_interrupt
120 .section .trap.fixup.kernel 122 .section .trap.fixup.kernel
121 .org \tbr_tt >> 2 123 .org \tbr_tt >> 2
@@ -259,25 +261,52 @@ __trap_fixup_kernel_data_tlb_miss:
259 .org TBR_TT_TRAP0 261 .org TBR_TT_TRAP0
260 .rept 127 262 .rept 127
261 bra __entry_uspace_softprog_interrupt 263 bra __entry_uspace_softprog_interrupt
262 bra __break_step_uspace_softprog_interrupt 264 .long 0,0,0
263 .long 0,0
264 .endr 265 .endr
265 .org TBR_TT_BREAK 266 .org TBR_TT_BREAK
266 bra __entry_break 267 bra __entry_break
267 .long 0,0,0 268 .long 0,0,0
268 269
270 .section .trap.fixup.user
271 .org TBR_TT_TRAP0 >> 2
272 .rept 127
273 .long __break_step_uspace_softprog_interrupt
274 .endr
275 .org TBR_TT_BREAK >> 2
276 .long 0
277
269 # miscellaneous kernel mode entry points 278 # miscellaneous kernel mode entry points
270 .section .trap.kernel 279 .section .trap.kernel
271 .org TBR_TT_TRAP0 280 .org TBR_TT_TRAP0
272 .rept 127
273 bra __entry_kernel_softprog_interrupt 281 bra __entry_kernel_softprog_interrupt
274 bra __break_step_kernel_softprog_interrupt 282 .org TBR_TT_TRAP1
275 .long 0,0 283 bra __entry_kernel_softprog_interrupt
284
285 # trap #2 in kernel - reenable interrupts
286 .org TBR_TT_TRAP2
287 bra __entry_kernel_external_interrupt_virtual_reenable
288
289 # miscellaneous kernel traps
290 .org TBR_TT_TRAP3
291 .rept 124
292 bra __entry_kernel_softprog_interrupt
293 .long 0,0,0
276 .endr 294 .endr
277 .org TBR_TT_BREAK 295 .org TBR_TT_BREAK
278 bra __entry_break 296 bra __entry_break
279 .long 0,0,0 297 .long 0,0,0
280 298
299 .section .trap.fixup.kernel
300 .org TBR_TT_TRAP0 >> 2
301 .long __break_step_kernel_softprog_interrupt
302 .long __break_step_kernel_softprog_interrupt
303 .long __break_step_kernel_external_interrupt_virtual_reenable
304 .rept 124
305 .long __break_step_kernel_softprog_interrupt
306 .endr
307 .org TBR_TT_BREAK >> 2
308 .long 0
309
281 # miscellaneous debug mode entry points 310 # miscellaneous debug mode entry points
282 .section .trap.break 311 .section .trap.break
283 .org TBR_TT_BREAK 312 .org TBR_TT_BREAK