diff options
author | David Howells <dhowells@redhat.com> | 2009-04-09 20:48:06 -0400 |
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committer | David Howells <dhowells@redhat.com> | 2009-04-09 20:48:06 -0400 |
commit | e69cc9278831139660cb99bde52908f145338d77 (patch) | |
tree | fdc1f002b6036a2220d73c86a253886fa76015dc /arch/frv/include/asm/mb86943a.h | |
parent | 187934655fa0637d4ef3967d4543c6dcccf33058 (diff) |
FRV: Move to arch/frv/include/asm/
Move arch headers from include/asm-frv/ to arch/frv/include/asm/.
Signed-off-by: David Howells <dhowells@redhat.com>
Diffstat (limited to 'arch/frv/include/asm/mb86943a.h')
-rw-r--r-- | arch/frv/include/asm/mb86943a.h | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/arch/frv/include/asm/mb86943a.h b/arch/frv/include/asm/mb86943a.h new file mode 100644 index 000000000000..e87ef924bfb4 --- /dev/null +++ b/arch/frv/include/asm/mb86943a.h | |||
@@ -0,0 +1,42 @@ | |||
1 | /* mb86943a.h: MB86943 SPARClite <-> PCI bridge registers | ||
2 | * | ||
3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_MB86943A_H | ||
13 | #define _ASM_MB86943A_H | ||
14 | |||
15 | #include <asm/mb-regs.h> | ||
16 | |||
17 | #define __reg_MB86943_sl_ctl *(volatile uint32_t *) (__region_CS1 + 0x00) | ||
18 | |||
19 | #define MB86943_SL_CTL_BUS_WIDTH_64 0x00000001 | ||
20 | #define MB86943_SL_CTL_AS_HOST 0x00000002 | ||
21 | #define MB86943_SL_CTL_DRCT_MASTER_SWAP 0x00000004 | ||
22 | #define MB86943_SL_CTL_DRCT_SLAVE_SWAP 0x00000008 | ||
23 | #define MB86943_SL_CTL_PCI_CONFIG_SWAP 0x00000010 | ||
24 | #define MB86943_SL_CTL_ECS0_ENABLE 0x00000020 | ||
25 | #define MB86943_SL_CTL_ECS1_ENABLE 0x00000040 | ||
26 | #define MB86943_SL_CTL_ECS2_ENABLE 0x00000080 | ||
27 | |||
28 | #define __reg_MB86943_ecs_ctl(N) *(volatile uint32_t *) (__region_CS1 + 0x08 + (0x08*(N))) | ||
29 | #define __reg_MB86943_ecs_range(N) *(volatile uint32_t *) (__region_CS1 + 0x20 + (0x10*(N))) | ||
30 | #define __reg_MB86943_ecs_base(N) *(volatile uint32_t *) (__region_CS1 + 0x28 + (0x10*(N))) | ||
31 | |||
32 | #define __reg_MB86943_sl_pci_io_range *(volatile uint32_t *) (__region_CS1 + 0x50) | ||
33 | #define __reg_MB86943_sl_pci_io_base *(volatile uint32_t *) (__region_CS1 + 0x58) | ||
34 | #define __reg_MB86943_sl_pci_mem_range *(volatile uint32_t *) (__region_CS1 + 0x60) | ||
35 | #define __reg_MB86943_sl_pci_mem_base *(volatile uint32_t *) (__region_CS1 + 0x68) | ||
36 | #define __reg_MB86943_pci_sl_io_base *(volatile uint32_t *) (__region_CS1 + 0x70) | ||
37 | #define __reg_MB86943_pci_sl_mem_base *(volatile uint32_t *) (__region_CS1 + 0x78) | ||
38 | |||
39 | #define __reg_MB86943_pci_arbiter *(volatile uint32_t *) (__region_CS2 + 0x01300014) | ||
40 | #define MB86943_PCIARB_EN 0x00000001 | ||
41 | |||
42 | #endif /* _ASM_MB86943A_H */ | ||