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authorJesper Nilsson <jesper.nilsson@axis.com>2008-01-24 08:10:27 -0500
committerJesper Nilsson <jesper.nilsson@axis.com>2008-02-08 05:06:33 -0500
commit635c45c195d95d9e65587b3cd18af9df4d102f52 (patch)
tree08d76c4783c0f61e2280c99447353d7645dc70dc /arch/cris
parenta77dba6a4dd0e18ae57018a99e4068c34125632c (diff)
CRIS v32: Rewrite of stream co-processor driver for ETRAX FS and ARTPEC-3
- Workaround for cachebug (Guinness TR 106). - Add ARTPEC-3 support.
Diffstat (limited to 'arch/cris')
-rw-r--r--arch/cris/arch-v32/drivers/cryptocop.c104
1 files changed, 54 insertions, 50 deletions
diff --git a/arch/cris/arch-v32/drivers/cryptocop.c b/arch/cris/arch-v32/drivers/cryptocop.c
index e8914d401696..9fb58202be99 100644
--- a/arch/cris/arch-v32/drivers/cryptocop.c
+++ b/arch/cris/arch-v32/drivers/cryptocop.c
@@ -1,8 +1,7 @@
1/* $Id: cryptocop.c,v 1.13 2005/04/21 17:27:55 henriken Exp $ 1/*
2 *
3 * Stream co-processor driver for the ETRAX FS 2 * Stream co-processor driver for the ETRAX FS
4 * 3 *
5 * Copyright (C) 2003-2005 Axis Communications AB 4 * Copyright (C) 2003-2007 Axis Communications AB
6 */ 5 */
7 6
8#include <linux/init.h> 7#include <linux/init.h>
@@ -25,17 +24,29 @@
25#include <asm/signal.h> 24#include <asm/signal.h>
26#include <asm/irq.h> 25#include <asm/irq.h>
27 26
28#include <asm/arch/dma.h> 27#include <dma.h>
29#include <asm/arch/hwregs/dma.h> 28#include <hwregs/dma.h>
30#include <asm/arch/hwregs/reg_map.h> 29#include <hwregs/reg_map.h>
31#include <asm/arch/hwregs/reg_rdwr.h> 30#include <hwregs/reg_rdwr.h>
32#include <asm/arch/hwregs/intr_vect_defs.h> 31#include <hwregs/intr_vect_defs.h>
33 32
34#include <asm/arch/hwregs/strcop.h> 33#include <hwregs/strcop.h>
35#include <asm/arch/hwregs/strcop_defs.h> 34#include <hwregs/strcop_defs.h>
36#include <asm/arch/cryptocop.h> 35#include <cryptocop.h>
37 36
38 37#ifdef CONFIG_ETRAXFS
38#define IN_DMA 9
39#define OUT_DMA 8
40#define IN_DMA_INST regi_dma9
41#define OUT_DMA_INST regi_dma8
42#define DMA_IRQ DMA9_INTR_VECT
43#else
44#define IN_DMA 3
45#define OUT_DMA 2
46#define IN_DMA_INST regi_dma3
47#define OUT_DMA_INST regi_dma2
48#define DMA_IRQ DMA3_INTR_VECT
49#endif
39 50
40#define DESCR_ALLOC_PAD (31) 51#define DESCR_ALLOC_PAD (31)
41 52
@@ -1886,14 +1897,14 @@ static void cryptocop_do_tasklet(unsigned long unused)
1886} 1897}
1887 1898
1888static irqreturn_t 1899static irqreturn_t
1889dma_done_interrupt(int irq, void *dev_id, struct pt_regs * regs) 1900dma_done_interrupt(int irq, void *dev_id)
1890{ 1901{
1891 struct cryptocop_prio_job *done_job; 1902 struct cryptocop_prio_job *done_job;
1892 reg_dma_rw_ack_intr ack_intr = { 1903 reg_dma_rw_ack_intr ack_intr = {
1893 .data = 1, 1904 .data = 1,
1894 }; 1905 };
1895 1906
1896 REG_WR (dma, regi_dma9, rw_ack_intr, ack_intr); 1907 REG_WR(dma, IN_DMA_INST, rw_ack_intr, ack_intr);
1897 1908
1898 DEBUG(printk("cryptocop DMA done\n")); 1909 DEBUG(printk("cryptocop DMA done\n"));
1899 1910
@@ -1937,7 +1948,6 @@ dma_done_interrupt(int irq, void *dev_id, struct pt_regs * regs)
1937static int init_cryptocop(void) 1948static int init_cryptocop(void)
1938{ 1949{
1939 unsigned long flags; 1950 unsigned long flags;
1940 reg_intr_vect_rw_mask intr_mask;
1941 reg_dma_rw_cfg dma_cfg = {.en = 1}; 1951 reg_dma_rw_cfg dma_cfg = {.en = 1};
1942 reg_dma_rw_intr_mask intr_mask_in = {.data = regk_dma_yes}; /* Only want descriptor interrupts from the DMA in channel. */ 1952 reg_dma_rw_intr_mask intr_mask_in = {.data = regk_dma_yes}; /* Only want descriptor interrupts from the DMA in channel. */
1943 reg_dma_rw_ack_intr ack_intr = {.data = 1,.in_eop = 1 }; 1953 reg_dma_rw_ack_intr ack_intr = {.data = 1,.in_eop = 1 };
@@ -1950,10 +1960,14 @@ static int init_cryptocop(void)
1950 .en = 1 1960 .en = 1
1951 }; 1961 };
1952 1962
1953 if (request_irq(DMA9_INTR_VECT, dma_done_interrupt, 0, "stream co-processor DMA", NULL)) panic("request_irq stream co-processor irq dma9"); 1963 if (request_irq(DMA_IRQ, dma_done_interrupt, 0,
1964 "stream co-processor DMA", NULL))
1965 panic("request_irq stream co-processor irq dma9");
1954 1966
1955 (void)crisv32_request_dma(8, "strcop", DMA_PANIC_ON_ERROR, 0, dma_strp); 1967 (void)crisv32_request_dma(OUT_DMA, "strcop", DMA_PANIC_ON_ERROR,
1956 (void)crisv32_request_dma(9, "strcop", DMA_PANIC_ON_ERROR, 0, dma_strp); 1968 0, dma_strp);
1969 (void)crisv32_request_dma(IN_DMA, "strcop", DMA_PANIC_ON_ERROR,
1970 0, dma_strp);
1957 1971
1958 local_irq_save(flags); 1972 local_irq_save(flags);
1959 1973
@@ -1963,24 +1977,19 @@ static int init_cryptocop(void)
1963 strcop_cfg.en = 1; 1977 strcop_cfg.en = 1;
1964 REG_WR(strcop, regi_strcop, rw_cfg, strcop_cfg); 1978 REG_WR(strcop, regi_strcop, rw_cfg, strcop_cfg);
1965 1979
1966 /* Enable DMA9 interrupt */
1967 intr_mask = REG_RD(intr_vect, regi_irq, rw_mask);
1968 intr_mask.dma9 = 1;
1969 REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
1970
1971 /* Enable DMAs. */ 1980 /* Enable DMAs. */
1972 REG_WR(dma, regi_dma9, rw_cfg, dma_cfg); /* input DMA */ 1981 REG_WR(dma, IN_DMA_INST, rw_cfg, dma_cfg); /* input DMA */
1973 REG_WR(dma, regi_dma8, rw_cfg, dma_cfg); /* output DMA */ 1982 REG_WR(dma, OUT_DMA_INST, rw_cfg, dma_cfg); /* output DMA */
1974 1983
1975 /* Set up wordsize = 4 for DMAs. */ 1984 /* Set up wordsize = 4 for DMAs. */
1976 DMA_WR_CMD (regi_dma8, regk_dma_set_w_size4); 1985 DMA_WR_CMD(OUT_DMA_INST, regk_dma_set_w_size4);
1977 DMA_WR_CMD (regi_dma9, regk_dma_set_w_size4); 1986 DMA_WR_CMD(IN_DMA_INST, regk_dma_set_w_size4);
1978 1987
1979 /* Enable interrupts. */ 1988 /* Enable interrupts. */
1980 REG_WR(dma, regi_dma9, rw_intr_mask, intr_mask_in); 1989 REG_WR(dma, IN_DMA_INST, rw_intr_mask, intr_mask_in);
1981 1990
1982 /* Clear intr ack. */ 1991 /* Clear intr ack. */
1983 REG_WR(dma, regi_dma9, rw_ack_intr, ack_intr); 1992 REG_WR(dma, IN_DMA_INST, rw_ack_intr, ack_intr);
1984 1993
1985 local_irq_restore(flags); 1994 local_irq_restore(flags);
1986 1995
@@ -1991,7 +2000,6 @@ static int init_cryptocop(void)
1991static void release_cryptocop(void) 2000static void release_cryptocop(void)
1992{ 2001{
1993 unsigned long flags; 2002 unsigned long flags;
1994 reg_intr_vect_rw_mask intr_mask;
1995 reg_dma_rw_cfg dma_cfg = {.en = 0}; 2003 reg_dma_rw_cfg dma_cfg = {.en = 0};
1996 reg_dma_rw_intr_mask intr_mask_in = {0}; 2004 reg_dma_rw_intr_mask intr_mask_in = {0};
1997 reg_dma_rw_ack_intr ack_intr = {.data = 1,.in_eop = 1 }; 2005 reg_dma_rw_ack_intr ack_intr = {.data = 1,.in_eop = 1 };
@@ -1999,26 +2007,21 @@ static void release_cryptocop(void)
1999 local_irq_save(flags); 2007 local_irq_save(flags);
2000 2008
2001 /* Clear intr ack. */ 2009 /* Clear intr ack. */
2002 REG_WR(dma, regi_dma9, rw_ack_intr, ack_intr); 2010 REG_WR(dma, IN_DMA_INST, rw_ack_intr, ack_intr);
2003
2004 /* Disable DMA9 interrupt */
2005 intr_mask = REG_RD(intr_vect, regi_irq, rw_mask);
2006 intr_mask.dma9 = 0;
2007 REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
2008 2011
2009 /* Disable DMAs. */ 2012 /* Disable DMAs. */
2010 REG_WR(dma, regi_dma9, rw_cfg, dma_cfg); /* input DMA */ 2013 REG_WR(dma, IN_DMA_INST, rw_cfg, dma_cfg); /* input DMA */
2011 REG_WR(dma, regi_dma8, rw_cfg, dma_cfg); /* output DMA */ 2014 REG_WR(dma, OUT_DMA_INST, rw_cfg, dma_cfg); /* output DMA */
2012 2015
2013 /* Disable interrupts. */ 2016 /* Disable interrupts. */
2014 REG_WR(dma, regi_dma9, rw_intr_mask, intr_mask_in); 2017 REG_WR(dma, IN_DMA_INST, rw_intr_mask, intr_mask_in);
2015 2018
2016 local_irq_restore(flags); 2019 local_irq_restore(flags);
2017 2020
2018 free_irq(DMA9_INTR_VECT, NULL); 2021 free_irq(DMA_IRQ, NULL);
2019 2022
2020 (void)crisv32_free_dma(8); 2023 (void)crisv32_free_dma(OUT_DMA);
2021 (void)crisv32_free_dma(9); 2024 (void)crisv32_free_dma(IN_DMA);
2022} 2025}
2023 2026
2024 2027
@@ -2076,13 +2079,13 @@ static void cryptocop_job_queue_close(void)
2076 reg_dma_rw_cfg dma_out_cfg, dma_in_cfg; 2079 reg_dma_rw_cfg dma_out_cfg, dma_in_cfg;
2077 2080
2078 /* Stop DMA. */ 2081 /* Stop DMA. */
2079 dma_out_cfg = REG_RD(dma, regi_dma8, rw_cfg); 2082 dma_out_cfg = REG_RD(dma, OUT_DMA_INST, rw_cfg);
2080 dma_out_cfg.en = regk_dma_no; 2083 dma_out_cfg.en = regk_dma_no;
2081 REG_WR(dma, regi_dma8, rw_cfg, dma_out_cfg); 2084 REG_WR(dma, OUT_DMA_INST, rw_cfg, dma_out_cfg);
2082 2085
2083 dma_in_cfg = REG_RD(dma, regi_dma9, rw_cfg); 2086 dma_in_cfg = REG_RD(dma, IN_DMA_INST, rw_cfg);
2084 dma_in_cfg.en = regk_dma_no; 2087 dma_in_cfg.en = regk_dma_no;
2085 REG_WR(dma, regi_dma9, rw_cfg, dma_in_cfg); 2088 REG_WR(dma, IN_DMA_INST, rw_cfg, dma_in_cfg);
2086 2089
2087 /* Disble the cryptocop. */ 2090 /* Disble the cryptocop. */
2088 rw_cfg = REG_RD(strcop, regi_strcop, rw_cfg); 2091 rw_cfg = REG_RD(strcop, regi_strcop, rw_cfg);
@@ -2226,10 +2229,11 @@ static void cryptocop_start_job(void)
2226 &pj->iop->ctx_out, (char*)virt_to_phys(&pj->iop->ctx_out))); 2229 &pj->iop->ctx_out, (char*)virt_to_phys(&pj->iop->ctx_out)));
2227 2230
2228 /* Start input DMA. */ 2231 /* Start input DMA. */
2229 DMA_START_CONTEXT(regi_dma9, virt_to_phys(&pj->iop->ctx_in)); 2232 flush_dma_context(&pj->iop->ctx_in);
2233 DMA_START_CONTEXT(IN_DMA_INST, virt_to_phys(&pj->iop->ctx_in));
2230 2234
2231 /* Start output DMA. */ 2235 /* Start output DMA. */
2232 DMA_START_CONTEXT(regi_dma8, virt_to_phys(&pj->iop->ctx_out)); 2236 DMA_START_CONTEXT(OUT_DMA_INST, virt_to_phys(&pj->iop->ctx_out));
2233 2237
2234 spin_unlock_irqrestore(&running_job_lock, running_job_flags); 2238 spin_unlock_irqrestore(&running_job_lock, running_job_flags);
2235 DEBUG(printk("cryptocop_start_job: exiting\n")); 2239 DEBUG(printk("cryptocop_start_job: exiting\n"));