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authorViresh Kumar <viresh.kumar@linaro.org>2013-04-04 08:54:19 -0400
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2013-04-10 07:19:25 -0400
commit8e8aa95a2b0b2b0184b3b72b324a6145362720bd (patch)
tree9942aa6142ccf9e08ed1d0c37a92afdae72a23a0 /arch/cris
parentd5cc9901ca05a816bd05b69699a1ba5358871ad5 (diff)
cpufreq: cris: move cpufreq driver to drivers/cpufreq
This patch moves cpufreq drivers of CRIS architecture to drivers/cpufreq. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'arch/cris')
-rw-r--r--arch/cris/arch-v32/mach-a3/Makefile1
-rw-r--r--arch/cris/arch-v32/mach-a3/cpufreq.c146
-rw-r--r--arch/cris/arch-v32/mach-fs/Makefile1
-rw-r--r--arch/cris/arch-v32/mach-fs/cpufreq.c142
4 files changed, 0 insertions, 290 deletions
diff --git a/arch/cris/arch-v32/mach-a3/Makefile b/arch/cris/arch-v32/mach-a3/Makefile
index d366e0891988..18a227196a41 100644
--- a/arch/cris/arch-v32/mach-a3/Makefile
+++ b/arch/cris/arch-v32/mach-a3/Makefile
@@ -3,7 +3,6 @@
3# 3#
4 4
5obj-y := dma.o pinmux.o io.o arbiter.o 5obj-y := dma.o pinmux.o io.o arbiter.o
6obj-$(CONFIG_CPU_FREQ) += cpufreq.o
7 6
8clean: 7clean:
9 8
diff --git a/arch/cris/arch-v32/mach-a3/cpufreq.c b/arch/cris/arch-v32/mach-a3/cpufreq.c
deleted file mode 100644
index ee142c490575..000000000000
--- a/arch/cris/arch-v32/mach-a3/cpufreq.c
+++ /dev/null
@@ -1,146 +0,0 @@
1#include <linux/init.h>
2#include <linux/module.h>
3#include <linux/cpufreq.h>
4#include <hwregs/reg_map.h>
5#include <hwregs/reg_rdwr.h>
6#include <hwregs/clkgen_defs.h>
7#include <hwregs/ddr2_defs.h>
8
9static int
10cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val,
11 void *data);
12
13static struct notifier_block cris_sdram_freq_notifier_block = {
14 .notifier_call = cris_sdram_freq_notifier
15};
16
17static struct cpufreq_frequency_table cris_freq_table[] = {
18 {0x01, 6000},
19 {0x02, 200000},
20 {0, CPUFREQ_TABLE_END},
21};
22
23static unsigned int cris_freq_get_cpu_frequency(unsigned int cpu)
24{
25 reg_clkgen_rw_clk_ctrl clk_ctrl;
26 clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl);
27 return clk_ctrl.pll ? 200000 : 6000;
28}
29
30static void cris_freq_set_cpu_state(struct cpufreq_policy *policy,
31 unsigned int state)
32{
33 struct cpufreq_freqs freqs;
34 reg_clkgen_rw_clk_ctrl clk_ctrl;
35 clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl);
36
37 freqs.old = cris_freq_get_cpu_frequency(policy->cpu);
38 freqs.new = cris_freq_table[state].frequency;
39
40 cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
41
42 local_irq_disable();
43
44 /* Even though we may be SMP they will share the same clock
45 * so all settings are made on CPU0. */
46 if (cris_freq_table[state].frequency == 200000)
47 clk_ctrl.pll = 1;
48 else
49 clk_ctrl.pll = 0;
50 REG_WR(clkgen, regi_clkgen, rw_clk_ctrl, clk_ctrl);
51
52 local_irq_enable();
53
54 cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
55};
56
57static int cris_freq_verify(struct cpufreq_policy *policy)
58{
59 return cpufreq_frequency_table_verify(policy, &cris_freq_table[0]);
60}
61
62static int cris_freq_target(struct cpufreq_policy *policy,
63 unsigned int target_freq,
64 unsigned int relation)
65{
66 unsigned int newstate = 0;
67
68 if (cpufreq_frequency_table_target(policy, cris_freq_table,
69 target_freq, relation, &newstate))
70 return -EINVAL;
71
72 cris_freq_set_cpu_state(policy, newstate);
73
74 return 0;
75}
76
77static int cris_freq_cpu_init(struct cpufreq_policy *policy)
78{
79 int result;
80
81 /* cpuinfo and default policy values */
82 policy->cpuinfo.transition_latency = 1000000; /* 1ms */
83 policy->cur = cris_freq_get_cpu_frequency(0);
84
85 result = cpufreq_frequency_table_cpuinfo(policy, cris_freq_table);
86 if (result)
87 return (result);
88
89 cpufreq_frequency_table_get_attr(cris_freq_table, policy->cpu);
90
91 return 0;
92}
93
94
95static int cris_freq_cpu_exit(struct cpufreq_policy *policy)
96{
97 cpufreq_frequency_table_put_attr(policy->cpu);
98 return 0;
99}
100
101
102static struct freq_attr *cris_freq_attr[] = {
103 &cpufreq_freq_attr_scaling_available_freqs,
104 NULL,
105};
106
107static struct cpufreq_driver cris_freq_driver = {
108 .get = cris_freq_get_cpu_frequency,
109 .verify = cris_freq_verify,
110 .target = cris_freq_target,
111 .init = cris_freq_cpu_init,
112 .exit = cris_freq_cpu_exit,
113 .name = "cris_freq",
114 .owner = THIS_MODULE,
115 .attr = cris_freq_attr,
116};
117
118static int __init cris_freq_init(void)
119{
120 int ret;
121 ret = cpufreq_register_driver(&cris_freq_driver);
122 cpufreq_register_notifier(&cris_sdram_freq_notifier_block,
123 CPUFREQ_TRANSITION_NOTIFIER);
124 return ret;
125}
126
127static int
128cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val,
129 void *data)
130{
131 int i;
132 struct cpufreq_freqs *freqs = data;
133 if (val == CPUFREQ_PRECHANGE) {
134 reg_ddr2_rw_cfg cfg =
135 REG_RD(ddr2, regi_ddr2_ctrl, rw_cfg);
136 cfg.ref_interval = (freqs->new == 200000 ? 1560 : 46);
137
138 if (freqs->new == 200000)
139 for (i = 0; i < 50000; i++);
140 REG_WR(bif_core, regi_bif_core, rw_sdram_timing, timing);
141 }
142 return 0;
143}
144
145
146module_init(cris_freq_init);
diff --git a/arch/cris/arch-v32/mach-fs/Makefile b/arch/cris/arch-v32/mach-fs/Makefile
index d366e0891988..18a227196a41 100644
--- a/arch/cris/arch-v32/mach-fs/Makefile
+++ b/arch/cris/arch-v32/mach-fs/Makefile
@@ -3,7 +3,6 @@
3# 3#
4 4
5obj-y := dma.o pinmux.o io.o arbiter.o 5obj-y := dma.o pinmux.o io.o arbiter.o
6obj-$(CONFIG_CPU_FREQ) += cpufreq.o
7 6
8clean: 7clean:
9 8
diff --git a/arch/cris/arch-v32/mach-fs/cpufreq.c b/arch/cris/arch-v32/mach-fs/cpufreq.c
deleted file mode 100644
index 12952235d5db..000000000000
--- a/arch/cris/arch-v32/mach-fs/cpufreq.c
+++ /dev/null
@@ -1,142 +0,0 @@
1#include <linux/init.h>
2#include <linux/module.h>
3#include <linux/cpufreq.h>
4#include <hwregs/reg_map.h>
5#include <arch/hwregs/reg_rdwr.h>
6#include <arch/hwregs/config_defs.h>
7#include <arch/hwregs/bif_core_defs.h>
8
9static int
10cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val,
11 void *data);
12
13static struct notifier_block cris_sdram_freq_notifier_block = {
14 .notifier_call = cris_sdram_freq_notifier
15};
16
17static struct cpufreq_frequency_table cris_freq_table[] = {
18 {0x01, 6000},
19 {0x02, 200000},
20 {0, CPUFREQ_TABLE_END},
21};
22
23static unsigned int cris_freq_get_cpu_frequency(unsigned int cpu)
24{
25 reg_config_rw_clk_ctrl clk_ctrl;
26 clk_ctrl = REG_RD(config, regi_config, rw_clk_ctrl);
27 return clk_ctrl.pll ? 200000 : 6000;
28}
29
30static void cris_freq_set_cpu_state(struct cpufreq_policy *policy,
31 unsigned int state)
32{
33 struct cpufreq_freqs freqs;
34 reg_config_rw_clk_ctrl clk_ctrl;
35 clk_ctrl = REG_RD(config, regi_config, rw_clk_ctrl);
36
37 freqs.old = cris_freq_get_cpu_frequency(policy->cpu);
38 freqs.new = cris_freq_table[state].frequency;
39
40 cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
41
42 local_irq_disable();
43
44 /* Even though we may be SMP they will share the same clock
45 * so all settings are made on CPU0. */
46 if (cris_freq_table[state].frequency == 200000)
47 clk_ctrl.pll = 1;
48 else
49 clk_ctrl.pll = 0;
50 REG_WR(config, regi_config, rw_clk_ctrl, clk_ctrl);
51
52 local_irq_enable();
53
54 cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
55};
56
57static int cris_freq_verify(struct cpufreq_policy *policy)
58{
59 return cpufreq_frequency_table_verify(policy, &cris_freq_table[0]);
60}
61
62static int cris_freq_target(struct cpufreq_policy *policy,
63 unsigned int target_freq, unsigned int relation)
64{
65 unsigned int newstate = 0;
66
67 if (cpufreq_frequency_table_target
68 (policy, cris_freq_table, target_freq, relation, &newstate))
69 return -EINVAL;
70
71 cris_freq_set_cpu_state(policy, newstate);
72
73 return 0;
74}
75
76static int cris_freq_cpu_init(struct cpufreq_policy *policy)
77{
78 int result;
79
80 /* cpuinfo and default policy values */
81 policy->cpuinfo.transition_latency = 1000000; /* 1ms */
82 policy->cur = cris_freq_get_cpu_frequency(0);
83
84 result = cpufreq_frequency_table_cpuinfo(policy, cris_freq_table);
85 if (result)
86 return (result);
87
88 cpufreq_frequency_table_get_attr(cris_freq_table, policy->cpu);
89
90 return 0;
91}
92
93static int cris_freq_cpu_exit(struct cpufreq_policy *policy)
94{
95 cpufreq_frequency_table_put_attr(policy->cpu);
96 return 0;
97}
98
99static struct freq_attr *cris_freq_attr[] = {
100 &cpufreq_freq_attr_scaling_available_freqs,
101 NULL,
102};
103
104static struct cpufreq_driver cris_freq_driver = {
105 .get = cris_freq_get_cpu_frequency,
106 .verify = cris_freq_verify,
107 .target = cris_freq_target,
108 .init = cris_freq_cpu_init,
109 .exit = cris_freq_cpu_exit,
110 .name = "cris_freq",
111 .owner = THIS_MODULE,
112 .attr = cris_freq_attr,
113};
114
115static int __init cris_freq_init(void)
116{
117 int ret;
118 ret = cpufreq_register_driver(&cris_freq_driver);
119 cpufreq_register_notifier(&cris_sdram_freq_notifier_block,
120 CPUFREQ_TRANSITION_NOTIFIER);
121 return ret;
122}
123
124static int
125cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val,
126 void *data)
127{
128 int i;
129 struct cpufreq_freqs *freqs = data;
130 if (val == CPUFREQ_PRECHANGE) {
131 reg_bif_core_rw_sdram_timing timing =
132 REG_RD(bif_core, regi_bif_core, rw_sdram_timing);
133 timing.cpd = (freqs->new == 200000 ? 0 : 1);
134
135 if (freqs->new == 200000)
136 for (i = 0; i < 50000; i++) ;
137 REG_WR(bif_core, regi_bif_core, rw_sdram_timing, timing);
138 }
139 return 0;
140}
141
142module_init(cris_freq_init);
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