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authorRobert P. J. Day <rpjday@mindspring.com>2007-10-19 17:10:43 -0400
committerAdrian Bunk <bunk@kernel.org>2007-10-19 17:10:43 -0400
commit3a4fa0a25da81600ea0bcd75692ae8ca6050d165 (patch)
treea4de1662e645c029cf3cf58f0646cbb1959861dc /arch/cris
parent18735dd8d2d37031b97f9e9e106acbaed01eb896 (diff)
Fix misspellings of "system", "controller", "interrupt" and "necessary".
Fix the various misspellings of "system", controller", "interrupt" and "[un]necessary". Signed-off-by: Robert P. J. Day <rpjday@mindspring.com> Signed-off-by: Adrian Bunk <bunk@kernel.org>
Diffstat (limited to 'arch/cris')
-rw-r--r--arch/cris/arch-v10/drivers/pcf8563.c2
-rw-r--r--arch/cris/arch-v32/drivers/pcf8563.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/cris/arch-v10/drivers/pcf8563.c b/arch/cris/arch-v10/drivers/pcf8563.c
index 1de0026bb94e..c263b8232dbc 100644
--- a/arch/cris/arch-v10/drivers/pcf8563.c
+++ b/arch/cris/arch-v10/drivers/pcf8563.c
@@ -4,7 +4,7 @@
4 * From Phillips' datasheet: 4 * From Phillips' datasheet:
5 * 5 *
6 * The PCF8563 is a CMOS real-time clock/calendar optimized for low power 6 * The PCF8563 is a CMOS real-time clock/calendar optimized for low power
7 * consumption. A programmable clock output, interupt output and voltage 7 * consumption. A programmable clock output, interrupt output and voltage
8 * low detector are also provided. All address and data are transferred 8 * low detector are also provided. All address and data are transferred
9 * serially via two-line bidirectional I2C-bus. Maximum bus speed is 9 * serially via two-line bidirectional I2C-bus. Maximum bus speed is
10 * 400 kbits/s. The built-in word address register is incremented 10 * 400 kbits/s. The built-in word address register is incremented
diff --git a/arch/cris/arch-v32/drivers/pcf8563.c b/arch/cris/arch-v32/drivers/pcf8563.c
index da479a14f836..6dbd700d3d66 100644
--- a/arch/cris/arch-v32/drivers/pcf8563.c
+++ b/arch/cris/arch-v32/drivers/pcf8563.c
@@ -4,7 +4,7 @@
4 * From Phillips' datasheet: 4 * From Phillips' datasheet:
5 * 5 *
6 * The PCF8563 is a CMOS real-time clock/calendar optimized for low power 6 * The PCF8563 is a CMOS real-time clock/calendar optimized for low power
7 * consumption. A programmable clock output, interupt output and voltage 7 * consumption. A programmable clock output, interrupt output and voltage
8 * low detector are also provided. All address and data are transferred 8 * low detector are also provided. All address and data are transferred
9 * serially via two-line bidirectional I2C-bus. Maximum bus speed is 9 * serially via two-line bidirectional I2C-bus. Maximum bus speed is
10 * 400 kbits/s. The built-in word address register is incremented 10 * 400 kbits/s. The built-in word address register is incremented