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authorJesper Nilsson <jespern@stork.se.axis.com>2007-11-29 11:24:10 -0500
committerJesper Nilsson <jesper.nilsson@axis.com>2008-02-08 05:06:23 -0500
commitf74c31d50c3c568abf315f9b8b206a4ec7b9c9f6 (patch)
tree337ab18553fb782797cc354c6c46f4090fbac4d0 /arch/cris/arch-v32/mm
parent58d083192825c5fbd46fa0b1ff4d1ecc9118b692 (diff)
CRIS v32: Add L2 cache initialization code.
Diffstat (limited to 'arch/cris/arch-v32/mm')
-rw-r--r--arch/cris/arch-v32/mm/l2cache.c29
1 files changed, 29 insertions, 0 deletions
diff --git a/arch/cris/arch-v32/mm/l2cache.c b/arch/cris/arch-v32/mm/l2cache.c
new file mode 100644
index 000000000000..332ff10dcc6b
--- /dev/null
+++ b/arch/cris/arch-v32/mm/l2cache.c
@@ -0,0 +1,29 @@
1#include <linux/init.h>
2#include <linux/kernel.h>
3#include <linux/string.h>
4#include <memmap.h>
5#include <hwregs/reg_map.h>
6#include <hwregs/reg_rdwr.h>
7#include <hwregs/l2cache_defs.h>
8#include <asm/io.h>
9
10#define L2CACHE_SIZE 64
11
12int __init l2cache_init(void)
13{
14 reg_l2cache_rw_ctrl ctrl = {0};
15 reg_l2cache_rw_cfg cfg = {.en = regk_l2cache_yes};
16
17 ctrl.csize = L2CACHE_SIZE;
18 ctrl.cbase = L2CACHE_SIZE / 4 + (L2CACHE_SIZE % 4 ? 1 : 0);
19 REG_WR(l2cache, regi_l2cache, rw_ctrl, ctrl);
20
21 /* Flush the tag memory */
22 memset((void *)(MEM_INTMEM_START | MEM_NON_CACHEABLE), 0, 2*1024);
23
24 /* Enable the cache */
25 REG_WR(l2cache, regi_l2cache, rw_cfg, cfg);
26
27 return 0;
28}
29