diff options
author | Jesper Nilsson <jesper.nilsson@axis.com> | 2008-01-25 11:55:31 -0500 |
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committer | Jesper Nilsson <jesper.nilsson@axis.com> | 2008-02-08 05:06:35 -0500 |
commit | ea402db97f8f9e2cfe646faf1c9d473d9f9044d1 (patch) | |
tree | b190ffb00e44054d95ecbdba2ff4b661b04b7cc0 /arch/cris/arch-v32/lib | |
parent | 41f9412b206985a36145b423f58bf8b46085358e (diff) |
CRIS v32: Move hw_settings.S to machine specific directories for ETRAX FS and ARTPEC-3
Diffstat (limited to 'arch/cris/arch-v32/lib')
-rw-r--r-- | arch/cris/arch-v32/lib/hw_settings.S | 72 |
1 files changed, 0 insertions, 72 deletions
diff --git a/arch/cris/arch-v32/lib/hw_settings.S b/arch/cris/arch-v32/lib/hw_settings.S deleted file mode 100644 index fff9443513d1..000000000000 --- a/arch/cris/arch-v32/lib/hw_settings.S +++ /dev/null | |||
@@ -1,72 +0,0 @@ | |||
1 | /* | ||
2 | * $Id: hw_settings.S,v 1.3 2005/04/24 18:36:57 starvik Exp $ | ||
3 | * | ||
4 | * This table is used by some tools to extract hardware parameters. | ||
5 | * The table should be included in the kernel and the decompressor. | ||
6 | * Don't forget to update the tools if you change this table. | ||
7 | * | ||
8 | * Copyright (C) 2001 Axis Communications AB | ||
9 | * | ||
10 | * Authors: Mikael Starvik (starvik@axis.com) | ||
11 | */ | ||
12 | |||
13 | #include <asm/arch/hwregs/asm/reg_map_asm.h> | ||
14 | #include <asm/arch/hwregs/asm/bif_core_defs_asm.h> | ||
15 | #include <asm/arch/hwregs/asm/gio_defs_asm.h> | ||
16 | |||
17 | .ascii "HW_PARAM_MAGIC" ; Magic number | ||
18 | .dword 0xc0004000 ; Kernel start address | ||
19 | |||
20 | ; Debug port | ||
21 | #ifdef CONFIG_ETRAX_DEBUG_PORT0 | ||
22 | .dword 0 | ||
23 | #elif defined(CONFIG_ETRAX_DEBUG_PORT1) | ||
24 | .dword 1 | ||
25 | #elif defined(CONFIG_ETRAX_DEBUG_PORT2) | ||
26 | .dword 2 | ||
27 | #elif defined(CONFIG_ETRAX_DEBUG_PORT3) | ||
28 | .dword 3 | ||
29 | #else | ||
30 | .dword 4 ; No debug | ||
31 | #endif | ||
32 | |||
33 | ; Register values | ||
34 | .dword REG_ADDR(bif_core, regi_bif_core, rw_grp1_cfg) | ||
35 | .dword CONFIG_ETRAX_MEM_GRP1_CONFIG | ||
36 | .dword REG_ADDR(bif_core, regi_bif_core, rw_grp2_cfg) | ||
37 | .dword CONFIG_ETRAX_MEM_GRP2_CONFIG | ||
38 | .dword REG_ADDR(bif_core, regi_bif_core, rw_grp3_cfg) | ||
39 | .dword CONFIG_ETRAX_MEM_GRP3_CONFIG | ||
40 | .dword REG_ADDR(bif_core, regi_bif_core, rw_grp4_cfg) | ||
41 | .dword CONFIG_ETRAX_MEM_GRP4_CONFIG | ||
42 | .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_cfg_grp0) | ||
43 | .dword CONFIG_ETRAX_SDRAM_GRP0_CONFIG | ||
44 | .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_cfg_grp1) | ||
45 | .dword CONFIG_ETRAX_SDRAM_GRP1_CONFIG | ||
46 | .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_timing) | ||
47 | .dword CONFIG_ETRAX_SDRAM_TIMING | ||
48 | .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_cmd) | ||
49 | .dword CONFIG_ETRAX_SDRAM_COMMAND | ||
50 | |||
51 | .dword REG_ADDR(gio, regi_gio, rw_pa_dout) | ||
52 | .dword CONFIG_ETRAX_DEF_GIO_PA_OUT | ||
53 | .dword REG_ADDR(gio, regi_gio, rw_pa_oe) | ||
54 | .dword CONFIG_ETRAX_DEF_GIO_PA_OE | ||
55 | .dword REG_ADDR(gio, regi_gio, rw_pb_dout) | ||
56 | .dword CONFIG_ETRAX_DEF_GIO_PB_OUT | ||
57 | .dword REG_ADDR(gio, regi_gio, rw_pb_oe) | ||
58 | .dword CONFIG_ETRAX_DEF_GIO_PB_OE | ||
59 | .dword REG_ADDR(gio, regi_gio, rw_pc_dout) | ||
60 | .dword CONFIG_ETRAX_DEF_GIO_PC_OUT | ||
61 | .dword REG_ADDR(gio, regi_gio, rw_pc_oe) | ||
62 | .dword CONFIG_ETRAX_DEF_GIO_PC_OE | ||
63 | .dword REG_ADDR(gio, regi_gio, rw_pd_dout) | ||
64 | .dword CONFIG_ETRAX_DEF_GIO_PD_OUT | ||
65 | .dword REG_ADDR(gio, regi_gio, rw_pd_oe) | ||
66 | .dword CONFIG_ETRAX_DEF_GIO_PD_OE | ||
67 | .dword REG_ADDR(gio, regi_gio, rw_pe_dout) | ||
68 | .dword CONFIG_ETRAX_DEF_GIO_PE_OUT | ||
69 | .dword REG_ADDR(gio, regi_gio, rw_pe_oe) | ||
70 | .dword CONFIG_ETRAX_DEF_GIO_PE_OE | ||
71 | |||
72 | .dword 0 ; No more register values | ||