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authorMikael Starvik <mikael.starvik@axis.com>2005-07-27 14:44:44 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2005-07-27 19:26:01 -0400
commit51533b615e605d86154ec1b4e585c8ca1b0b15b7 (patch)
tree4a6d7d8494d2017632d83624fb71b36031e0e7e5 /arch/cris/arch-v32/kernel
parent5d01e6ce785884a5db5792cd2e5bb36fa82fe23c (diff)
[PATCH] CRIS update: new subarchitecture v32
New CRIS sub architecture named v32. From: Dave Jones <davej@redhat.com> Fix swapped kmalloc args Signed-off-by: Mikael Starvik <starvik@axis.com> Signed-off-by: Dave Jones <davej@redhat.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/cris/arch-v32/kernel')
-rw-r--r--arch/cris/arch-v32/kernel/Makefile21
-rw-r--r--arch/cris/arch-v32/kernel/arbiter.c297
-rw-r--r--arch/cris/arch-v32/kernel/asm-offsets.c49
-rw-r--r--arch/cris/arch-v32/kernel/crisksyms.c24
-rw-r--r--arch/cris/arch-v32/kernel/debugport.c461
-rw-r--r--arch/cris/arch-v32/kernel/dma.c224
-rw-r--r--arch/cris/arch-v32/kernel/entry.S820
-rw-r--r--arch/cris/arch-v32/kernel/fasttimer.c996
-rw-r--r--arch/cris/arch-v32/kernel/head.S448
-rw-r--r--arch/cris/arch-v32/kernel/io.c154
-rw-r--r--arch/cris/arch-v32/kernel/irq.c413
-rw-r--r--arch/cris/arch-v32/kernel/kgdb.c1660
-rw-r--r--arch/cris/arch-v32/kernel/kgdb_asm.S552
-rw-r--r--arch/cris/arch-v32/kernel/pinmux.c229
-rw-r--r--arch/cris/arch-v32/kernel/process.c270
-rw-r--r--arch/cris/arch-v32/kernel/ptrace.c597
-rw-r--r--arch/cris/arch-v32/kernel/setup.c118
-rw-r--r--arch/cris/arch-v32/kernel/signal.c708
-rw-r--r--arch/cris/arch-v32/kernel/smp.c348
-rw-r--r--arch/cris/arch-v32/kernel/time.c341
-rw-r--r--arch/cris/arch-v32/kernel/traps.c160
-rw-r--r--arch/cris/arch-v32/kernel/vcs_hook.c96
-rw-r--r--arch/cris/arch-v32/kernel/vcs_hook.h42
23 files changed, 9028 insertions, 0 deletions
diff --git a/arch/cris/arch-v32/kernel/Makefile b/arch/cris/arch-v32/kernel/Makefile
new file mode 100644
index 000000000000..5d5b613cde8c
--- /dev/null
+++ b/arch/cris/arch-v32/kernel/Makefile
@@ -0,0 +1,21 @@
1# $Id: Makefile,v 1.11 2004/12/17 10:16:13 starvik Exp $
2#
3# Makefile for the linux kernel.
4#
5
6extra-y := head.o
7
8
9obj-y := entry.o traps.o irq.o debugport.o dma.o pinmux.o \
10 process.o ptrace.o setup.o signal.o traps.o time.o \
11 arbiter.o io.o
12
13obj-$(CONFIG_ETRAXFS_SIM) += vcs_hook.o
14
15obj-$(CONFIG_SMP) += smp.o
16obj-$(CONFIG_ETRAX_KGDB) += kgdb.o kgdb_asm.o
17obj-$(CONFIG_ETRAX_FAST_TIMER) += fasttimer.o
18obj-$(CONFIG_MODULES) += crisksyms.o
19
20clean:
21
diff --git a/arch/cris/arch-v32/kernel/arbiter.c b/arch/cris/arch-v32/kernel/arbiter.c
new file mode 100644
index 000000000000..3870d2fd5160
--- /dev/null
+++ b/arch/cris/arch-v32/kernel/arbiter.c
@@ -0,0 +1,297 @@
1/*
2 * Memory arbiter functions. Allocates bandwith through the
3 * arbiter and sets up arbiter breakpoints.
4 *
5 * The algorithm first assigns slots to the clients that has specified
6 * bandwith (e.g. ethernet) and then the remaining slots are divided
7 * on all the active clients.
8 *
9 * Copyright (c) 2004, 2005 Axis Communications AB.
10 */
11
12#include <linux/config.h>
13#include <asm/arch/hwregs/reg_map.h>
14#include <asm/arch/hwregs/reg_rdwr.h>
15#include <asm/arch/hwregs/marb_defs.h>
16#include <asm/arch/arbiter.h>
17#include <asm/arch/hwregs/intr_vect.h>
18#include <linux/interrupt.h>
19#include <linux/signal.h>
20#include <linux/errno.h>
21#include <linux/spinlock.h>
22#include <asm/io.h>
23
24struct crisv32_watch_entry
25{
26 unsigned long instance;
27 watch_callback* cb;
28 unsigned long start;
29 unsigned long end;
30 int used;
31};
32
33#define NUMBER_OF_BP 4
34#define NBR_OF_CLIENTS 14
35#define NBR_OF_SLOTS 64
36#define SDRAM_BANDWIDTH 100000000 /* Some kind of expected value */
37#define INTMEM_BANDWIDTH 400000000
38#define NBR_OF_REGIONS 2
39
40static struct crisv32_watch_entry watches[NUMBER_OF_BP] =
41{
42 {regi_marb_bp0},
43 {regi_marb_bp1},
44 {regi_marb_bp2},
45 {regi_marb_bp3}
46};
47
48static int requested_slots[NBR_OF_REGIONS][NBR_OF_CLIENTS];
49static int active_clients[NBR_OF_REGIONS][NBR_OF_CLIENTS];
50static int max_bandwidth[NBR_OF_REGIONS] = {SDRAM_BANDWIDTH, INTMEM_BANDWIDTH};
51
52DEFINE_SPINLOCK(arbiter_lock);
53
54static irqreturn_t
55crisv32_arbiter_irq(int irq, void* dev_id, struct pt_regs* regs);
56
57static void crisv32_arbiter_config(int region)
58{
59 int slot;
60 int client;
61 int interval = 0;
62 int val[NBR_OF_SLOTS];
63
64 for (slot = 0; slot < NBR_OF_SLOTS; slot++)
65 val[slot] = NBR_OF_CLIENTS + 1;
66
67 for (client = 0; client < NBR_OF_CLIENTS; client++)
68 {
69 int pos;
70 if (!requested_slots[region][client])
71 continue;
72 interval = NBR_OF_SLOTS / requested_slots[region][client];
73 pos = 0;
74 while (pos < NBR_OF_SLOTS)
75 {
76 if (val[pos] != NBR_OF_CLIENTS + 1)
77 pos++;
78 else
79 {
80 val[pos] = client;
81 pos += interval;
82 }
83 }
84 }
85
86 client = 0;
87 for (slot = 0; slot < NBR_OF_SLOTS; slot++)
88 {
89 if (val[slot] == NBR_OF_CLIENTS + 1)
90 {
91 int first = client;
92 while(!active_clients[region][client]) {
93 client = (client + 1) % NBR_OF_CLIENTS;
94 if (client == first)
95 break;
96 }
97 val[slot] = client;
98 client = (client + 1) % NBR_OF_CLIENTS;
99 }
100 if (region == EXT_REGION)
101 REG_WR_INT_VECT(marb, regi_marb, rw_ext_slots, slot, val[slot]);
102 else if (region == INT_REGION)
103 REG_WR_INT_VECT(marb, regi_marb, rw_int_slots, slot, val[slot]);
104 }
105}
106
107extern char _stext, _etext;
108
109static void crisv32_arbiter_init(void)
110{
111 static int initialized = 0;
112
113 if (initialized)
114 return;
115
116 initialized = 1;
117
118 /* CPU caches are active. */
119 active_clients[EXT_REGION][10] = active_clients[EXT_REGION][11] = 1;
120 crisv32_arbiter_config(EXT_REGION);
121 crisv32_arbiter_config(INT_REGION);
122
123 if (request_irq(MEMARB_INTR_VECT, crisv32_arbiter_irq, SA_INTERRUPT,
124 "arbiter", NULL))
125 printk(KERN_ERR "Couldn't allocate arbiter IRQ\n");
126
127#ifndef CONFIG_ETRAX_KGDB
128 /* Global watch for writes to kernel text segment. */
129 crisv32_arbiter_watch(virt_to_phys(&_stext), &_etext - &_stext,
130 arbiter_all_clients, arbiter_all_write, NULL);
131#endif
132}
133
134
135
136int crisv32_arbiter_allocate_bandwith(int client, int region,
137 unsigned long bandwidth)
138{
139 int i;
140 int total_assigned = 0;
141 int total_clients = 0;
142 int req;
143
144 crisv32_arbiter_init();
145
146 for (i = 0; i < NBR_OF_CLIENTS; i++)
147 {
148 total_assigned += requested_slots[region][i];
149 total_clients += active_clients[region][i];
150 }
151 req = NBR_OF_SLOTS / (max_bandwidth[region] / bandwidth);
152
153 if (total_assigned + total_clients + req + 1 > NBR_OF_SLOTS)
154 return -ENOMEM;
155
156 active_clients[region][client] = 1;
157 requested_slots[region][client] = req;
158 crisv32_arbiter_config(region);
159
160 return 0;
161}
162
163int crisv32_arbiter_watch(unsigned long start, unsigned long size,
164 unsigned long clients, unsigned long accesses,
165 watch_callback* cb)
166{
167 int i;
168
169 crisv32_arbiter_init();
170
171 if (start > 0x80000000) {
172 printk("Arbiter: %lX doesn't look like a physical address", start);
173 return -EFAULT;
174 }
175
176 spin_lock(&arbiter_lock);
177
178 for (i = 0; i < NUMBER_OF_BP; i++) {
179 if (!watches[i].used) {
180 reg_marb_rw_intr_mask intr_mask = REG_RD(marb, regi_marb, rw_intr_mask);
181
182 watches[i].used = 1;
183 watches[i].start = start;
184 watches[i].end = start + size;
185 watches[i].cb = cb;
186
187 REG_WR_INT(marb_bp, watches[i].instance, rw_first_addr, watches[i].start);
188 REG_WR_INT(marb_bp, watches[i].instance, rw_last_addr, watches[i].end);
189 REG_WR_INT(marb_bp, watches[i].instance, rw_op, accesses);
190 REG_WR_INT(marb_bp, watches[i].instance, rw_clients, clients);
191
192 if (i == 0)
193 intr_mask.bp0 = regk_marb_yes;
194 else if (i == 1)
195 intr_mask.bp1 = regk_marb_yes;
196 else if (i == 2)
197 intr_mask.bp2 = regk_marb_yes;
198 else if (i == 3)
199 intr_mask.bp3 = regk_marb_yes;
200
201 REG_WR(marb, regi_marb, rw_intr_mask, intr_mask);
202 spin_unlock(&arbiter_lock);
203
204 return i;
205 }
206 }
207 spin_unlock(&arbiter_lock);
208 return -ENOMEM;
209}
210
211int crisv32_arbiter_unwatch(int id)
212{
213 reg_marb_rw_intr_mask intr_mask = REG_RD(marb, regi_marb, rw_intr_mask);
214
215 crisv32_arbiter_init();
216
217 spin_lock(&arbiter_lock);
218
219 if ((id < 0) || (id >= NUMBER_OF_BP) || (!watches[id].used)) {
220 spin_unlock(&arbiter_lock);
221 return -EINVAL;
222 }
223
224 memset(&watches[id], 0, sizeof(struct crisv32_watch_entry));
225
226 if (id == 0)
227 intr_mask.bp0 = regk_marb_no;
228 else if (id == 1)
229 intr_mask.bp2 = regk_marb_no;
230 else if (id == 2)
231 intr_mask.bp2 = regk_marb_no;
232 else if (id == 3)
233 intr_mask.bp3 = regk_marb_no;
234
235 REG_WR(marb, regi_marb, rw_intr_mask, intr_mask);
236
237 spin_unlock(&arbiter_lock);
238 return 0;
239}
240
241extern void show_registers(struct pt_regs *regs);
242
243static irqreturn_t
244crisv32_arbiter_irq(int irq, void* dev_id, struct pt_regs* regs)
245{
246 reg_marb_r_masked_intr masked_intr = REG_RD(marb, regi_marb, r_masked_intr);
247 reg_marb_bp_r_brk_clients r_clients;
248 reg_marb_bp_r_brk_addr r_addr;
249 reg_marb_bp_r_brk_op r_op;
250 reg_marb_bp_r_brk_first_client r_first;
251 reg_marb_bp_r_brk_size r_size;
252 reg_marb_bp_rw_ack ack = {0};
253 reg_marb_rw_ack_intr ack_intr = {.bp0=1,.bp1=1,.bp2=1,.bp3=1};
254 struct crisv32_watch_entry* watch;
255
256 if (masked_intr.bp0) {
257 watch = &watches[0];
258 ack_intr.bp0 = regk_marb_yes;
259 } else if (masked_intr.bp1) {
260 watch = &watches[1];
261 ack_intr.bp1 = regk_marb_yes;
262 } else if (masked_intr.bp2) {
263 watch = &watches[2];
264 ack_intr.bp2 = regk_marb_yes;
265 } else if (masked_intr.bp3) {
266 watch = &watches[3];
267 ack_intr.bp3 = regk_marb_yes;
268 } else {
269 return IRQ_NONE;
270 }
271
272 /* Retrieve all useful information and print it. */
273 r_clients = REG_RD(marb_bp, watch->instance, r_brk_clients);
274 r_addr = REG_RD(marb_bp, watch->instance, r_brk_addr);
275 r_op = REG_RD(marb_bp, watch->instance, r_brk_op);
276 r_first = REG_RD(marb_bp, watch->instance, r_brk_first_client);
277 r_size = REG_RD(marb_bp, watch->instance, r_brk_size);
278
279 printk("Arbiter IRQ\n");
280 printk("Clients %X addr %X op %X first %X size %X\n",
281 REG_TYPE_CONV(int, reg_marb_bp_r_brk_clients, r_clients),
282 REG_TYPE_CONV(int, reg_marb_bp_r_brk_addr, r_addr),
283 REG_TYPE_CONV(int, reg_marb_bp_r_brk_op, r_op),
284 REG_TYPE_CONV(int, reg_marb_bp_r_brk_first_client, r_first),
285 REG_TYPE_CONV(int, reg_marb_bp_r_brk_size, r_size));
286
287 REG_WR(marb_bp, watch->instance, rw_ack, ack);
288 REG_WR(marb, regi_marb, rw_ack_intr, ack_intr);
289
290 printk("IRQ occured at %lX\n", regs->erp);
291
292 if (watch->cb)
293 watch->cb();
294
295
296 return IRQ_HANDLED;
297}
diff --git a/arch/cris/arch-v32/kernel/asm-offsets.c b/arch/cris/arch-v32/kernel/asm-offsets.c
new file mode 100644
index 000000000000..15b3d93a0496
--- /dev/null
+++ b/arch/cris/arch-v32/kernel/asm-offsets.c
@@ -0,0 +1,49 @@
1#include <linux/sched.h>
2#include <asm/thread_info.h>
3
4/*
5 * Generate definitions needed by assembly language modules.
6 * This code generates raw asm output which is post-processed to extract
7 * and format the required data.
8 */
9
10#define DEFINE(sym, val) \
11 asm volatile("\n->" #sym " %0 " #val : : "i" (val))
12
13#define BLANK() asm volatile("\n->" : : )
14
15int main(void)
16{
17#define ENTRY(entry) DEFINE(PT_ ## entry, offsetof(struct pt_regs, entry))
18 ENTRY(orig_r10);
19 ENTRY(r13);
20 ENTRY(r12);
21 ENTRY(r11);
22 ENTRY(r10);
23 ENTRY(r9);
24 ENTRY(acr);
25 ENTRY(srs);
26 ENTRY(mof);
27 ENTRY(ccs);
28 ENTRY(srp);
29 BLANK();
30#undef ENTRY
31#define ENTRY(entry) DEFINE(TI_ ## entry, offsetof(struct thread_info, entry))
32 ENTRY(task);
33 ENTRY(flags);
34 ENTRY(preempt_count);
35 BLANK();
36#undef ENTRY
37#define ENTRY(entry) DEFINE(THREAD_ ## entry, offsetof(struct thread_struct, entry))
38 ENTRY(ksp);
39 ENTRY(usp);
40 ENTRY(ccs);
41 BLANK();
42#undef ENTRY
43#define ENTRY(entry) DEFINE(TASK_ ## entry, offsetof(struct task_struct, entry))
44 ENTRY(pid);
45 BLANK();
46 DEFINE(LCLONE_VM, CLONE_VM);
47 DEFINE(LCLONE_UNTRACED, CLONE_UNTRACED);
48 return 0;
49}
diff --git a/arch/cris/arch-v32/kernel/crisksyms.c b/arch/cris/arch-v32/kernel/crisksyms.c
new file mode 100644
index 000000000000..2c3bb9a0afe2
--- /dev/null
+++ b/arch/cris/arch-v32/kernel/crisksyms.c
@@ -0,0 +1,24 @@
1#include <linux/config.h>
2#include <linux/module.h>
3#include <linux/irq.h>
4#include <asm/arch/dma.h>
5#include <asm/arch/intmem.h>
6#include <asm/arch/pinmux.h>
7
8/* Functions for allocating DMA channels */
9EXPORT_SYMBOL(crisv32_request_dma);
10EXPORT_SYMBOL(crisv32_free_dma);
11
12/* Functions for handling internal RAM */
13EXPORT_SYMBOL(crisv32_intmem_alloc);
14EXPORT_SYMBOL(crisv32_intmem_free);
15EXPORT_SYMBOL(crisv32_intmem_phys_to_virt);
16EXPORT_SYMBOL(crisv32_intmem_virt_to_phys);
17
18/* Functions for handling pinmux */
19EXPORT_SYMBOL(crisv32_pinmux_alloc);
20EXPORT_SYMBOL(crisv32_pinmux_dealloc);
21
22/* Functions masking/unmasking interrupts */
23EXPORT_SYMBOL(mask_irq);
24EXPORT_SYMBOL(unmask_irq);
diff --git a/arch/cris/arch-v32/kernel/debugport.c b/arch/cris/arch-v32/kernel/debugport.c
new file mode 100644
index 000000000000..ffc1ebf2dfee
--- /dev/null
+++ b/arch/cris/arch-v32/kernel/debugport.c
@@ -0,0 +1,461 @@
1/*
2 * Copyright (C) 2003, Axis Communications AB.
3 */
4
5#include <linux/config.h>
6#include <linux/console.h>
7#include <linux/init.h>
8#include <linux/major.h>
9#include <linux/delay.h>
10#include <linux/tty.h>
11#include <asm/system.h>
12#include <asm/io.h>
13#include <asm/arch/hwregs/ser_defs.h>
14#include <asm/arch/hwregs/dma_defs.h>
15#include <asm/arch/pinmux.h>
16
17#include <asm/irq.h>
18#include <asm/arch/hwregs/intr_vect_defs.h>
19
20struct dbg_port
21{
22 unsigned char nbr;
23 unsigned long instance;
24 unsigned int started;
25 unsigned long baudrate;
26 unsigned char parity;
27 unsigned int bits;
28};
29
30struct dbg_port ports[] =
31{
32 {
33 0,
34 regi_ser0,
35 0,
36 115200,
37 'N',
38 8
39 },
40 {
41 1,
42 regi_ser1,
43 0,
44 115200,
45 'N',
46 8
47 },
48 {
49 2,
50 regi_ser2,
51 0,
52 115200,
53 'N',
54 8
55 },
56 {
57 3,
58 regi_ser3,
59 0,
60 115200,
61 'N',
62 8
63 }
64};
65static struct dbg_port *port =
66#if defined(CONFIG_ETRAX_DEBUG_PORT0)
67&ports[0];
68#elif defined(CONFIG_ETRAX_DEBUG_PORT1)
69&ports[1];
70#elif defined(CONFIG_ETRAX_DEBUG_PORT2)
71&ports[2];
72#elif defined(CONFIG_ETRAX_DEBUG_PORT3)
73&ports[3];
74#else
75NULL;
76#endif
77
78#ifdef CONFIG_ETRAX_KGDB
79static struct dbg_port *kgdb_port =
80#if defined(CONFIG_ETRAX_KGDB_PORT0)
81&ports[0];
82#elif defined(CONFIG_ETRAX_KGDB_PORT1)
83&ports[1];
84#elif defined(CONFIG_ETRAX_KGDB_PORT2)
85&ports[2];
86#elif defined(CONFIG_ETRAX_KGDB_PORT3)
87&ports[3];
88#else
89NULL;
90#endif
91#endif
92
93#ifdef CONFIG_ETRAXFS_SIM
94extern void print_str( const char *str );
95static char buffer[1024];
96static char msg[] = "Debug: ";
97static int buffer_pos = sizeof(msg) - 1;
98#endif
99
100extern struct tty_driver *serial_driver;
101
102static void
103start_port(struct dbg_port* p)
104{
105 if (!p)
106 return;
107
108 if (p->started)
109 return;
110 p->started = 1;
111
112 if (p->nbr == 1)
113 crisv32_pinmux_alloc_fixed(pinmux_ser1);
114 else if (p->nbr == 2)
115 crisv32_pinmux_alloc_fixed(pinmux_ser2);
116 else if (p->nbr == 3)
117 crisv32_pinmux_alloc_fixed(pinmux_ser3);
118
119 /* Set up serial port registers */
120 reg_ser_rw_tr_ctrl tr_ctrl = {0};
121 reg_ser_rw_tr_dma_en tr_dma_en = {0};
122
123 reg_ser_rw_rec_ctrl rec_ctrl = {0};
124 reg_ser_rw_tr_baud_div tr_baud_div = {0};
125 reg_ser_rw_rec_baud_div rec_baud_div = {0};
126
127 tr_ctrl.base_freq = rec_ctrl.base_freq = regk_ser_f29_493;
128 tr_dma_en.en = rec_ctrl.dma_mode = regk_ser_no;
129 tr_baud_div.div = rec_baud_div.div = 29493000 / p->baudrate / 8;
130 tr_ctrl.en = rec_ctrl.en = 1;
131
132 if (p->parity == 'O')
133 {
134 tr_ctrl.par_en = regk_ser_yes;
135 tr_ctrl.par = regk_ser_odd;
136 rec_ctrl.par_en = regk_ser_yes;
137 rec_ctrl.par = regk_ser_odd;
138 }
139 else if (p->parity == 'E')
140 {
141 tr_ctrl.par_en = regk_ser_yes;
142 tr_ctrl.par = regk_ser_even;
143 rec_ctrl.par_en = regk_ser_yes;
144 rec_ctrl.par = regk_ser_odd;
145 }
146
147 if (p->bits == 7)
148 {
149 tr_ctrl.data_bits = regk_ser_bits7;
150 rec_ctrl.data_bits = regk_ser_bits7;
151 }
152
153 REG_WR (ser, p->instance, rw_tr_baud_div, tr_baud_div);
154 REG_WR (ser, p->instance, rw_rec_baud_div, rec_baud_div);
155 REG_WR (ser, p->instance, rw_tr_dma_en, tr_dma_en);
156 REG_WR (ser, p->instance, rw_tr_ctrl, tr_ctrl);
157 REG_WR (ser, p->instance, rw_rec_ctrl, rec_ctrl);
158}
159
160/* No debug */
161#ifdef CONFIG_ETRAX_DEBUG_PORT_NULL
162
163static void
164console_write(struct console *co, const char *buf, unsigned int len)
165{
166 return;
167}
168
169/* Target debug */
170#elif !defined(CONFIG_ETRAXFS_SIM)
171
172static void
173console_write_direct(struct console *co, const char *buf, unsigned int len)
174{
175 int i;
176 reg_ser_r_stat_din stat;
177 reg_ser_rw_tr_dma_en tr_dma_en, old;
178
179 /* Switch to manual mode */
180 tr_dma_en = old = REG_RD (ser, port->instance, rw_tr_dma_en);
181 if (tr_dma_en.en == regk_ser_yes) {
182 tr_dma_en.en = regk_ser_no;
183 REG_WR(ser, port->instance, rw_tr_dma_en, tr_dma_en);
184 }
185
186 /* Send data */
187 for (i = 0; i < len; i++) {
188 /* LF -> CRLF */
189 if (buf[i] == '\n') {
190 do {
191 stat = REG_RD (ser, port->instance, r_stat_din);
192 } while (!stat.tr_rdy);
193 REG_WR_INT (ser, port->instance, rw_dout, '\r');
194 }
195 /* Wait until transmitter is ready and send.*/
196 do {
197 stat = REG_RD (ser, port->instance, r_stat_din);
198 } while (!stat.tr_rdy);
199 REG_WR_INT (ser, port->instance, rw_dout, buf[i]);
200 }
201
202 /* Restore mode */
203 if (tr_dma_en.en != old.en)
204 REG_WR(ser, port->instance, rw_tr_dma_en, old);
205}
206
207static void
208console_write(struct console *co, const char *buf, unsigned int len)
209{
210 if (!port)
211 return;
212 console_write_direct(co, buf, len);
213}
214
215
216
217#else
218
219/* VCS debug */
220
221static void
222console_write(struct console *co, const char *buf, unsigned int len)
223{
224 char* pos;
225 pos = memchr(buf, '\n', len);
226 if (pos) {
227 int l = ++pos - buf;
228 memcpy(buffer + buffer_pos, buf, l);
229 memcpy(buffer, msg, sizeof(msg) - 1);
230 buffer[buffer_pos + l] = '\0';
231 print_str(buffer);
232 buffer_pos = sizeof(msg) - 1;
233 if (pos - buf != len) {
234 memcpy(buffer + buffer_pos, pos, len - l);
235 buffer_pos += len - l;
236 }
237 } else {
238 memcpy(buffer + buffer_pos, buf, len);
239 buffer_pos += len;
240 }
241}
242
243#endif
244
245int raw_printk(const char *fmt, ...)
246{
247 static char buf[1024];
248 int printed_len;
249 va_list args;
250 va_start(args, fmt);
251 printed_len = vsnprintf(buf, sizeof(buf), fmt, args);
252 va_end(args);
253 console_write(NULL, buf, strlen(buf));
254 return printed_len;
255}
256
257void
258stupid_debug(char* buf)
259{
260 console_write(NULL, buf, strlen(buf));
261}
262
263#ifdef CONFIG_ETRAX_KGDB
264/* Use polling to get a single character from the kernel debug port */
265int
266getDebugChar(void)
267{
268 reg_ser_rs_status_data stat;
269 reg_ser_rw_ack_intr ack_intr = { 0 };
270
271 do {
272 stat = REG_RD(ser, kgdb_instance, rs_status_data);
273 } while (!stat.data_avail);
274
275 /* Ack the data_avail interrupt. */
276 ack_intr.data_avail = 1;
277 REG_WR(ser, kgdb_instance, rw_ack_intr, ack_intr);
278
279 return stat.data;
280}
281
282/* Use polling to put a single character to the kernel debug port */
283void
284putDebugChar(int val)
285{
286 reg_ser_r_status_data stat;
287 do {
288 stat = REG_RD (ser, kgdb_instance, r_status_data);
289 } while (!stat.tr_ready);
290 REG_WR (ser, kgdb_instance, rw_data_out, REG_TYPE_CONV(reg_ser_rw_data_out, int, val));
291}
292#endif /* CONFIG_ETRAX_KGDB */
293
294static int __init
295console_setup(struct console *co, char *options)
296{
297 char* s;
298
299 if (options) {
300 port = &ports[co->index];
301 port->baudrate = 115200;
302 port->parity = 'N';
303 port->bits = 8;
304 port->baudrate = simple_strtoul(options, NULL, 10);
305 s = options;
306 while(*s >= '0' && *s <= '9')
307 s++;
308 if (*s) port->parity = *s++;
309 if (*s) port->bits = *s++ - '0';
310 port->started = 0;
311 start_port(port);
312 }
313 return 0;
314}
315
316/* This is a dummy serial device that throws away anything written to it.
317 * This is used when no debug output is wanted.
318 */
319static struct tty_driver dummy_driver;
320
321static int dummy_open(struct tty_struct *tty, struct file * filp)
322{
323 return 0;
324}
325
326static void dummy_close(struct tty_struct *tty, struct file * filp)
327{
328}
329
330static int dummy_write(struct tty_struct * tty,
331 const unsigned char *buf, int count)
332{
333 return count;
334}
335
336static int
337dummy_write_room(struct tty_struct *tty)
338{
339 return 8192;
340}
341
342void __init
343init_dummy_console(void)
344{
345 memset(&dummy_driver, 0, sizeof(struct tty_driver));
346 dummy_driver.driver_name = "serial";
347 dummy_driver.name = "ttyS";
348 dummy_driver.major = TTY_MAJOR;
349 dummy_driver.minor_start = 68;
350 dummy_driver.num = 1; /* etrax100 has 4 serial ports */
351 dummy_driver.type = TTY_DRIVER_TYPE_SERIAL;
352 dummy_driver.subtype = SERIAL_TYPE_NORMAL;
353 dummy_driver.init_termios = tty_std_termios;
354 dummy_driver.init_termios.c_cflag =
355 B115200 | CS8 | CREAD | HUPCL | CLOCAL; /* is normally B9600 default... */
356 dummy_driver.flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_NO_DEVFS;
357
358 dummy_driver.open = dummy_open;
359 dummy_driver.close = dummy_close;
360 dummy_driver.write = dummy_write;
361 dummy_driver.write_room = dummy_write_room;
362 if (tty_register_driver(&dummy_driver))
363 panic("Couldn't register dummy serial driver\n");
364}
365
366static struct tty_driver*
367crisv32_console_device(struct console* co, int *index)
368{
369 if (port)
370 *index = port->nbr;
371 return port ? serial_driver : &dummy_driver;
372}
373
374static struct console sercons = {
375 name : "ttyS",
376 write: console_write,
377 read : NULL,
378 device : crisv32_console_device,
379 unblank : NULL,
380 setup : console_setup,
381 flags : CON_PRINTBUFFER,
382 index : -1,
383 cflag : 0,
384 next : NULL
385};
386static struct console sercons0 = {
387 name : "ttyS",
388 write: console_write,
389 read : NULL,
390 device : crisv32_console_device,
391 unblank : NULL,
392 setup : console_setup,
393 flags : CON_PRINTBUFFER,
394 index : 0,
395 cflag : 0,
396 next : NULL
397};
398
399static struct console sercons1 = {
400 name : "ttyS",
401 write: console_write,
402 read : NULL,
403 device : crisv32_console_device,
404 unblank : NULL,
405 setup : console_setup,
406 flags : CON_PRINTBUFFER,
407 index : 1,
408 cflag : 0,
409 next : NULL
410};
411static struct console sercons2 = {
412 name : "ttyS",
413 write: console_write,
414 read : NULL,
415 device : crisv32_console_device,
416 unblank : NULL,
417 setup : console_setup,
418 flags : CON_PRINTBUFFER,
419 index : 2,
420 cflag : 0,
421 next : NULL
422};
423static struct console sercons3 = {
424 name : "ttyS",
425 write: console_write,
426 read : NULL,
427 device : crisv32_console_device,
428 unblank : NULL,
429 setup : console_setup,
430 flags : CON_PRINTBUFFER,
431 index : 3,
432 cflag : 0,
433 next : NULL
434};
435
436/* Register console for printk's, etc. */
437int __init
438init_etrax_debug(void)
439{
440 static int first = 1;
441
442 if (!first) {
443 unregister_console(&sercons);
444 register_console(&sercons0);
445 register_console(&sercons1);
446 register_console(&sercons2);
447 register_console(&sercons3);
448 init_dummy_console();
449 return 0;
450 }
451 first = 0;
452 register_console(&sercons);
453 start_port(port);
454
455#ifdef CONFIG_ETRAX_KGDB
456 start_port(kgdb_port);
457#endif /* CONFIG_ETRAX_KGDB */
458 return 0;
459}
460
461__initcall(init_etrax_debug);
diff --git a/arch/cris/arch-v32/kernel/dma.c b/arch/cris/arch-v32/kernel/dma.c
new file mode 100644
index 000000000000..b92e85799b44
--- /dev/null
+++ b/arch/cris/arch-v32/kernel/dma.c
@@ -0,0 +1,224 @@
1/* Wrapper for DMA channel allocator that starts clocks etc */
2
3#include <linux/kernel.h>
4#include <linux/spinlock.h>
5#include <asm/dma.h>
6#include <asm/arch/hwregs/reg_map.h>
7#include <asm/arch/hwregs/reg_rdwr.h>
8#include <asm/arch/hwregs/marb_defs.h>
9#include <asm/arch/hwregs/config_defs.h>
10#include <asm/arch/hwregs/strmux_defs.h>
11#include <linux/errno.h>
12#include <asm/system.h>
13#include <asm/arch/arbiter.h>
14
15static char used_dma_channels[MAX_DMA_CHANNELS];
16static const char * used_dma_channels_users[MAX_DMA_CHANNELS];
17
18static DEFINE_SPINLOCK(dma_lock);
19
20int crisv32_request_dma(unsigned int dmanr, const char * device_id,
21 unsigned options, unsigned int bandwidth,
22 enum dma_owner owner)
23{
24 unsigned long flags;
25 reg_config_rw_clk_ctrl clk_ctrl;
26 reg_strmux_rw_cfg strmux_cfg;
27
28 if (crisv32_arbiter_allocate_bandwith(dmanr,
29 options & DMA_INT_MEM ? INT_REGION : EXT_REGION,
30 bandwidth))
31 return -ENOMEM;
32
33 spin_lock_irqsave(&dma_lock, flags);
34
35 if (used_dma_channels[dmanr]) {
36 spin_unlock_irqrestore(&dma_lock, flags);
37 if (options & DMA_VERBOSE_ON_ERROR) {
38 printk("Failed to request DMA %i for %s, already allocated by %s\n", dmanr, device_id, used_dma_channels_users[dmanr]);
39 }
40 if (options & DMA_PANIC_ON_ERROR)
41 panic("request_dma error!");
42 return -EBUSY;
43 }
44 clk_ctrl = REG_RD(config, regi_config, rw_clk_ctrl);
45 strmux_cfg = REG_RD(strmux, regi_strmux, rw_cfg);
46
47 switch(dmanr)
48 {
49 case 0:
50 case 1:
51 clk_ctrl.dma01_eth0 = 1;
52 break;
53 case 2:
54 case 3:
55 clk_ctrl.dma23 = 1;
56 break;
57 case 4:
58 case 5:
59 clk_ctrl.dma45 = 1;
60 break;
61 case 6:
62 case 7:
63 clk_ctrl.dma67 = 1;
64 break;
65 case 8:
66 case 9:
67 clk_ctrl.dma89_strcop = 1;
68 break;
69#if MAX_DMA_CHANNELS-1 != 9
70#error Check dma.c
71#endif
72 default:
73 spin_unlock_irqrestore(&dma_lock, flags);
74 if (options & DMA_VERBOSE_ON_ERROR) {
75 printk("Failed to request DMA %i for %s, only 0-%i valid)\n", dmanr, device_id, MAX_DMA_CHANNELS-1);
76 }
77
78 if (options & DMA_PANIC_ON_ERROR)
79 panic("request_dma error!");
80 return -EINVAL;
81 }
82
83 switch(owner)
84 {
85 case dma_eth0:
86 if (dmanr == 0)
87 strmux_cfg.dma0 = regk_strmux_eth0;
88 else if (dmanr == 1)
89 strmux_cfg.dma1 = regk_strmux_eth0;
90 else
91 panic("Invalid DMA channel for eth0\n");
92 break;
93 case dma_eth1:
94 if (dmanr == 6)
95 strmux_cfg.dma6 = regk_strmux_eth1;
96 else if (dmanr == 7)
97 strmux_cfg.dma7 = regk_strmux_eth1;
98 else
99 panic("Invalid DMA channel for eth1\n");
100 break;
101 case dma_iop0:
102 if (dmanr == 2)
103 strmux_cfg.dma2 = regk_strmux_iop0;
104 else if (dmanr == 3)
105 strmux_cfg.dma3 = regk_strmux_iop0;
106 else
107 panic("Invalid DMA channel for iop0\n");
108 break;
109 case dma_iop1:
110 if (dmanr == 4)
111 strmux_cfg.dma4 = regk_strmux_iop1;
112 else if (dmanr == 5)
113 strmux_cfg.dma5 = regk_strmux_iop1;
114 else
115 panic("Invalid DMA channel for iop1\n");
116 break;
117 case dma_ser0:
118 if (dmanr == 6)
119 strmux_cfg.dma6 = regk_strmux_ser0;
120 else if (dmanr == 7)
121 strmux_cfg.dma7 = regk_strmux_ser0;
122 else
123 panic("Invalid DMA channel for ser0\n");
124 break;
125 case dma_ser1:
126 if (dmanr == 4)
127 strmux_cfg.dma4 = regk_strmux_ser1;
128 else if (dmanr == 5)
129 strmux_cfg.dma5 = regk_strmux_ser1;
130 else
131 panic("Invalid DMA channel for ser1\n");
132 break;
133 case dma_ser2:
134 if (dmanr == 2)
135 strmux_cfg.dma2 = regk_strmux_ser2;
136 else if (dmanr == 3)
137 strmux_cfg.dma3 = regk_strmux_ser2;
138 else
139 panic("Invalid DMA channel for ser2\n");
140 break;
141 case dma_ser3:
142 if (dmanr == 8)
143 strmux_cfg.dma8 = regk_strmux_ser3;
144 else if (dmanr == 9)
145 strmux_cfg.dma9 = regk_strmux_ser3;
146 else
147 panic("Invalid DMA channel for ser3\n");
148 break;
149 case dma_sser0:
150 if (dmanr == 4)
151 strmux_cfg.dma4 = regk_strmux_sser0;
152 else if (dmanr == 5)
153 strmux_cfg.dma5 = regk_strmux_sser0;
154 else
155 panic("Invalid DMA channel for sser0\n");
156 break;
157 case dma_sser1:
158 if (dmanr == 6)
159 strmux_cfg.dma6 = regk_strmux_sser1;
160 else if (dmanr == 7)
161 strmux_cfg.dma7 = regk_strmux_sser1;
162 else
163 panic("Invalid DMA channel for sser1\n");
164 break;
165 case dma_ata:
166 if (dmanr == 2)
167 strmux_cfg.dma2 = regk_strmux_ata;
168 else if (dmanr == 3)
169 strmux_cfg.dma3 = regk_strmux_ata;
170 else
171 panic("Invalid DMA channel for ata\n");
172 break;
173 case dma_strp:
174 if (dmanr == 8)
175 strmux_cfg.dma8 = regk_strmux_strcop;
176 else if (dmanr == 9)
177 strmux_cfg.dma9 = regk_strmux_strcop;
178 else
179 panic("Invalid DMA channel for strp\n");
180 break;
181 case dma_ext0:
182 if (dmanr == 6)
183 strmux_cfg.dma6 = regk_strmux_ext0;
184 else
185 panic("Invalid DMA channel for ext0\n");
186 break;
187 case dma_ext1:
188 if (dmanr == 7)
189 strmux_cfg.dma7 = regk_strmux_ext1;
190 else
191 panic("Invalid DMA channel for ext1\n");
192 break;
193 case dma_ext2:
194 if (dmanr == 2)
195 strmux_cfg.dma2 = regk_strmux_ext2;
196 else if (dmanr == 8)
197 strmux_cfg.dma8 = regk_strmux_ext2;
198 else
199 panic("Invalid DMA channel for ext2\n");
200 break;
201 case dma_ext3:
202 if (dmanr == 3)
203 strmux_cfg.dma3 = regk_strmux_ext3;
204 else if (dmanr == 9)
205 strmux_cfg.dma9 = regk_strmux_ext2;
206 else
207 panic("Invalid DMA channel for ext2\n");
208 break;
209 }
210
211 used_dma_channels[dmanr] = 1;
212 used_dma_channels_users[dmanr] = device_id;
213 REG_WR(config, regi_config, rw_clk_ctrl, clk_ctrl);
214 REG_WR(strmux, regi_strmux, rw_cfg, strmux_cfg);
215 spin_unlock_irqrestore(&dma_lock,flags);
216 return 0;
217}
218
219void crisv32_free_dma(unsigned int dmanr)
220{
221 spin_lock(&dma_lock);
222 used_dma_channels[dmanr] = 0;
223 spin_unlock(&dma_lock);
224}
diff --git a/arch/cris/arch-v32/kernel/entry.S b/arch/cris/arch-v32/kernel/entry.S
new file mode 100644
index 000000000000..a8ed55e5b403
--- /dev/null
+++ b/arch/cris/arch-v32/kernel/entry.S
@@ -0,0 +1,820 @@
1/*
2 * Copyright (C) 2000-2003 Axis Communications AB
3 *
4 * Authors: Bjorn Wesen (bjornw@axis.com)
5 * Tobias Anderberg (tobiasa@axis.com), CRISv32 port.
6 *
7 * Code for the system-call and fault low-level handling routines.
8 *
9 * NOTE: This code handles signal-recognition, which happens every time
10 * after a timer-interrupt and after each system call.
11 *
12 * Stack layout in 'ret_from_system_call':
13 * ptrace needs to have all regs on the stack.
14 * if the order here is changed, it needs to be
15 * updated in fork.c:copy_process, signal.c:do_signal,
16 * ptrace.c and ptrace.h
17 *
18 */
19
20#include <linux/config.h>
21#include <linux/linkage.h>
22#include <linux/sys.h>
23#include <asm/unistd.h>
24#include <asm/errno.h>
25#include <asm/thread_info.h>
26#include <asm/arch/offset.h>
27
28#include <asm/arch/hwregs/asm/reg_map_asm.h>
29#include <asm/arch/hwregs/asm/intr_vect_defs_asm.h>
30
31 ;; Exported functions.
32 .globl system_call
33 .globl ret_from_intr
34 .globl ret_from_fork
35 .globl resume
36 .globl multiple_interrupt
37 .globl nmi_interrupt
38 .globl spurious_interrupt
39 .globl do_sigtrap
40 .globl gdb_handle_exception
41 .globl sys_call_table
42
43 ; Check if preemptive kernel scheduling should be done.
44#ifdef CONFIG_PREEMPT
45_resume_kernel:
46 di
47 ; Load current task struct.
48 movs.w -8192, $r0 ; THREAD_SIZE = 8192
49 and.d $sp, $r0
50
51 addoq +TI_preempt_count, $r0, $acr
52 move.d [$acr], $r10 ; Preemption disabled?
53 bne _Rexit
54 nop
55
56_need_resched:
57 addoq +TI_flags, $r0, $acr
58 move.d [$acr], $r10
59 btstq TIF_NEED_RESCHED, $r10 ; Check if need_resched is set.
60 bpl _Rexit
61 nop
62
63 ; Do preemptive kernel scheduling.
64 jsr preempt_schedule_irq
65 nop
66
67 ; Load new task struct.
68 movs.w -8192, $r0 ; THREAD_SIZE = 8192.
69 and.d $sp, $r0
70
71 ; One more time with new task.
72 ba _need_resched
73 nop
74#else
75#define _resume_kernel _Rexit
76#endif
77
78 ; Called at exit from fork. schedule_tail must be called to drop
79 ; spinlock if CONFIG_PREEMPT.
80ret_from_fork:
81 jsr schedule_tail
82 nop
83 ba ret_from_sys_call
84 nop
85
86ret_from_intr:
87 ;; Check for resched if preemptive kernel, or if we're going back to
88 ;; user-mode. This test matches the user_regs(regs) macro. Don't simply
89 ;; test CCS since that doesn't necessarily reflect what mode we'll
90 ;; return into.
91 addoq +PT_ccs, $sp, $acr
92 move.d [$acr], $r0
93 btstq 16, $r0 ; User-mode flag.
94 bpl _resume_kernel
95
96 ; Note that di below is in delay slot.
97
98_resume_userspace:
99 di ; So need_resched and sigpending don't change.
100
101 movs.w -8192, $r0 ; THREAD_SIZE == 8192
102 and.d $sp, $r0
103
104 addoq +TI_flags, $r0, $acr ; current->work
105 move.d [$acr], $r10
106 and.d _TIF_WORK_MASK, $r10 ; Work to be done on return?
107 bne _work_pending
108 nop
109 ba _Rexit
110 nop
111
112 ;; The system_call is called by a BREAK instruction, which looks pretty
113 ;; much like any other exception.
114 ;;
115 ;; System calls can't be made from interrupts but we still stack ERP
116 ;; to have a complete stack frame.
117 ;;
118 ;; In r9 we have the wanted syscall number. Arguments come in r10,r11,r12,
119 ;; r13,mof,srp
120 ;;
121 ;; This function looks on the _surface_ like spaghetti programming, but it's
122 ;; really designed so that the fast-path does not force cache-loading of
123 ;; non-used instructions. Only the non-common cases cause the outlined code
124 ;; to run..
125
126system_call:
127 ;; Stack-frame similar to the irq heads, which is reversed in
128 ;; ret_from_sys_call.
129 subq 12, $sp ; Skip EXS, EDA.
130 move $erp, [$sp]
131 subq 4, $sp
132 move $srp, [$sp]
133 subq 4, $sp
134 move $ccs, [$sp]
135 subq 4, $sp
136 ei ; Allow IRQs while handling system call
137 move $spc, [$sp]
138 subq 4, $sp
139 move $mof, [$sp]
140 subq 4, $sp
141 move $srs, [$sp]
142 subq 4, $sp
143 move.d $acr, [$sp]
144 subq 14*4, $sp ; Make room for R0-R13.
145 movem $r13, [$sp] ; Push R0-R13
146 subq 4, $sp
147 move.d $r10, [$sp] ; Push orig_r10.
148
149; Set S-bit when kernel debugging to keep hardware breakpoints active.
150#ifdef CONFIG_ETRAX_KGDB
151 move $ccs, $r0
152 or.d (1<<9), $r0
153 move $r0, $ccs
154#endif
155
156 movs.w -ENOSYS, $r0
157 addoq +PT_r10, $sp, $acr
158 move.d $r0, [$acr]
159
160 ;; Check if this process is syscall-traced.
161 movs.w -8192, $r0 ; THREAD_SIZE == 8192
162 and.d $sp, $r0
163
164 addoq +TI_flags, $r0, $acr
165 move.d [$acr], $r0
166 btstq TIF_SYSCALL_TRACE, $r0
167 bmi _syscall_trace_entry
168 nop
169
170_syscall_traced:
171 ;; Check for sanity in the requested syscall number.
172 cmpu.w NR_syscalls, $r9
173 bhs ret_from_sys_call
174 lslq 2, $r9 ; Multiply by 4, in the delay slot.
175
176 ;; The location on the stack for the register structure is passed as a
177 ;; seventh argument. Some system calls need this.
178 move.d $sp, $r0
179 subq 4, $sp
180 move.d $r0, [$sp]
181
182 ;; The registers carrying parameters (R10-R13) are intact. The optional
183 ;; fifth and sixth parameters is in MOF and SRP respectivly. Put them
184 ;; back on the stack.
185 subq 4, $sp
186 move $srp, [$sp]
187 subq 4, $sp
188 move $mof, [$sp]
189
190 ;; Actually to the system call.
191 addo.d +sys_call_table, $r9, $acr
192 move.d [$acr], $acr
193 jsr $acr
194 nop
195
196 addq 3*4, $sp ; Pop the mof, srp and regs parameters.
197 addoq +PT_r10, $sp, $acr
198 move.d $r10, [$acr] ; Save the return value.
199
200 moveq 1, $r9 ; "Parameter" to ret_from_sys_call to
201 ; show it was a sys call.
202
203 ;; Fall through into ret_from_sys_call to return.
204
205ret_from_sys_call:
206 ;; R9 is a parameter:
207 ;; >= 1 from syscall
208 ;; 0 from irq
209
210 ;; Get the current task-struct pointer.
211 movs.w -8192, $r0 ; THREAD_SIZE == 8192
212 and.d $sp, $r0
213
214 di ; Make sure need_resched and sigpending don't change.
215
216 addoq +TI_flags, $r0, $acr
217 move.d [$acr], $r1
218 and.d _TIF_ALLWORK_MASK, $r1
219 bne _syscall_exit_work
220 nop
221
222_Rexit:
223 ;; This epilogue MUST match the prologues in multiple_interrupt, irq.h
224 ;; and ptregs.h.
225 addq 4, $sp ; Skip orig_r10.
226 movem [$sp+], $r13 ; Registers R0-R13.
227 move.d [$sp+], $acr
228 move [$sp], $srs
229 addq 4, $sp
230 move [$sp+], $mof
231 move [$sp+], $spc
232 move [$sp+], $ccs
233 move [$sp+], $srp
234 move [$sp+], $erp
235 addq 8, $sp ; Skip EXS, EDA.
236 jump $erp
237 rfe ; Restore condition code stack in delay-slot.
238
239 ;; We get here after doing a syscall if extra work might need to be done
240 ;; perform syscall exit tracing if needed.
241
242_syscall_exit_work:
243 ;; R0 contains current at this point and irq's are disabled.
244
245 addoq +TI_flags, $r0, $acr
246 move.d [$acr], $r1
247 btstq TIF_SYSCALL_TRACE, $r1
248 bpl _work_pending
249 nop
250 ei
251 move.d $r9, $r1 ; Preserve R9.
252 jsr do_syscall_trace
253 nop
254 move.d $r1, $r9
255 ba _resume_userspace
256 nop
257
258_work_pending:
259 addoq +TI_flags, $r0, $acr
260 move.d [$acr], $r10
261 btstq TIF_NEED_RESCHED, $r10 ; Need resched?
262 bpl _work_notifysig ; No, must be signal/notify.
263 nop
264
265_work_resched:
266 move.d $r9, $r1 ; Preserve R9.
267 jsr schedule
268 nop
269 move.d $r1, $r9
270 di
271
272 addoq +TI_flags, $r0, $acr
273 move.d [$acr], $r1
274 and.d _TIF_WORK_MASK, $r1 ; Ignore sycall trace counter.
275 beq _Rexit
276 nop
277 btstq TIF_NEED_RESCHED, $r1
278 bmi _work_resched ; current->work.need_resched.
279 nop
280
281_work_notifysig:
282 ;; Deal with pending signals and notify-resume requests.
283
284 addoq +TI_flags, $r0, $acr
285 move.d [$acr], $r13 ; The thread_info_flags parameter.
286 move.d $r9, $r10 ; do_notify_resume syscall/irq param.
287 moveq 0, $r11 ; oldset param - 0 in this case.
288 move.d $sp, $r12 ; The regs param.
289 jsr do_notify_resume
290 nop
291
292 ba _Rexit
293 nop
294
295 ;; We get here as a sidetrack when we've entered a syscall with the
296 ;; trace-bit set. We need to call do_syscall_trace and then continue
297 ;; with the call.
298
299_syscall_trace_entry:
300 ;; PT_r10 in the frame contains -ENOSYS as required, at this point.
301
302 jsr do_syscall_trace
303 nop
304
305 ;; Now re-enter the syscall code to do the syscall itself. We need to
306 ;; restore R9 here to contain the wanted syscall, and the other
307 ;; parameter-bearing registers.
308 addoq +PT_r9, $sp, $acr
309 move.d [$acr], $r9
310 addoq +PT_orig_r10, $sp, $acr
311 move.d [$acr], $r10 ; PT_r10 is already -ENOSYS.
312 addoq +PT_r11, $sp, $acr
313 move.d [$acr], $r11
314 addoq +PT_r12, $sp, $acr
315 move.d [$acr], $r12
316 addoq +PT_r13, $sp, $acr
317 move.d [$acr], $r13
318 addoq +PT_mof, $sp, $acr
319 move [$acr], $mof
320 addoq +PT_srp, $sp, $acr
321 move [$acr], $srp
322
323 ba _syscall_traced
324 nop
325
326 ;; Resume performs the actual task-switching, by switching stack
327 ;; pointers. Input arguments are:
328 ;;
329 ;; R10 = prev
330 ;; R11 = next
331 ;; R12 = thread offset in task struct.
332 ;;
333 ;; Returns old current in R10.
334
335resume:
336 subq 4, $sp
337 move $srp, [$sp] ; Keep old/new PC on the stack.
338 add.d $r12, $r10 ; R10 = current tasks tss.
339 addoq +THREAD_ccs, $r10, $acr
340 move $ccs, [$acr] ; Save IRQ enable state.
341 di
342
343 addoq +THREAD_usp, $r10, $acr
344 move $usp, [$acr] ; Save user-mode stackpointer.
345
346 ;; See copy_thread for the reason why register R9 is saved.
347 subq 10*4, $sp
348 movem $r9, [$sp] ; Save non-scratch registers and R9.
349
350 addoq +THREAD_ksp, $r10, $acr
351 move.d $sp, [$acr] ; Save kernel SP for old task.
352
353 move.d $sp, $r10 ; Return last running task in R10.
354 and.d -8192, $r10 ; Get thread_info from stackpointer.
355 addoq +TI_task, $r10, $acr
356 move.d [$acr], $r10 ; Get task.
357 add.d $r12, $r11 ; Find the new tasks tss.
358 addoq +THREAD_ksp, $r11, $acr
359 move.d [$acr], $sp ; Switch to new stackframe.
360 movem [$sp+], $r9 ; Restore non-scratch registers and R9.
361
362 addoq +THREAD_usp, $r11, $acr
363 move [$acr], $usp ; Restore user-mode stackpointer.
364
365 addoq +THREAD_ccs, $r11, $acr
366 move [$acr], $ccs ; Restore IRQ enable status.
367 move.d [$sp+], $acr
368 jump $acr ; Restore PC.
369 nop
370
371nmi_interrupt:
372
373;; If we receive a watchdog interrupt while it is not expected, then set
374;; up a canonical frame and dump register contents before dying.
375
376 ;; This prologue MUST match the one in irq.h and the struct in ptregs.h!
377 subq 12, $sp ; Skip EXS, EDA.
378 move $nrp, [$sp]
379 subq 4, $sp
380 move $srp, [$sp]
381 subq 4, $sp
382 move $ccs, [$sp]
383 subq 4, $sp
384 move $spc, [$sp]
385 subq 4, $sp
386 move $mof, [$sp]
387 subq 4, $sp
388 move $srs, [$sp]
389 subq 4, $sp
390 move.d $acr, [$sp]
391 subq 14*4, $sp ; Make room for R0-R13.
392 movem $r13, [$sp] ; Push R0-R13.
393 subq 4, $sp
394 move.d $r10, [$sp] ; Push orig_r10.
395 move.d REG_ADDR(intr_vect, regi_irq, r_nmi), $r0
396 move.d [$r0], $r0
397 btstq REG_BIT(intr_vect, r_nmi, watchdog), $r0
398 bpl 1f
399 nop
400 jsr handle_watchdog_bite ; In time.c.
401 move.d $sp, $r10 ; Pointer to registers
4021: btstq REG_BIT(intr_vect, r_nmi, ext), $r0
403 bpl 1f
404 nop
405 jsr handle_nmi
406 move.d $sp, $r10 ; Pointer to registers
4071: addq 4, $sp ; Skip orig_r10
408 movem [$sp+], $r13
409 move.d [$sp+], $acr
410 move [$sp], $srs
411 addq 4, $sp
412 move [$sp+], $mof
413 move [$sp+], $spc
414 move [$sp+], $ccs
415 move [$sp+], $srp
416 move [$sp+], $nrp
417 addq 8, $sp ; Skip EXS, EDA.
418 jump $nrp
419 rfn
420
421 .comm cause_of_death, 4 ;; Don't declare this anywhere.
422
423spurious_interrupt:
424 di
425 jump hard_reset_now
426 nop
427
428 ;; This handles the case when multiple interrupts arrive at the same
429 ;; time. Jump to the first set interrupt bit in a priotiry fashion. The
430 ;; hardware will call the unserved interrupts after the handler
431 ;; finishes.
432multiple_interrupt:
433 ;; This prologue MUST match the one in irq.h and the struct in ptregs.h!
434 subq 12, $sp ; Skip EXS, EDA.
435 move $erp, [$sp]
436 subq 4, $sp
437 move $srp, [$sp]
438 subq 4, $sp
439 move $ccs, [$sp]
440 subq 4, $sp
441 move $spc, [$sp]
442 subq 4, $sp
443 move $mof, [$sp]
444 subq 4, $sp
445 move $srs, [$sp]
446 subq 4, $sp
447 move.d $acr, [$sp]
448 subq 14*4, $sp ; Make room for R0-R13.
449 movem $r13, [$sp] ; Push R0-R13.
450 subq 4, $sp
451 move.d $r10, [$sp] ; Push orig_r10.
452
453; Set S-bit when kernel debugging to keep hardware breakpoints active.
454#ifdef CONFIG_ETRAX_KGDB
455 move $ccs, $r0
456 or.d (1<<9), $r0
457 move $r0, $ccs
458#endif
459
460 jsr crisv32_do_multiple
461 move.d $sp, $r10
462 jump ret_from_intr
463 nop
464
465do_sigtrap:
466 ;; Sigtraps the process that executed the BREAK instruction. Creates a
467 ;; frame that Rexit expects.
468 subq 4, $sp
469 move $eda, [$sp]
470 subq 4, $sp
471 move $exs, [$sp]
472 subq 4, $sp
473 move $erp, [$sp]
474 subq 4, $sp
475 move $srp, [$sp]
476 subq 4, $sp
477 move $ccs, [$sp]
478 subq 4, $sp
479 move $spc, [$sp]
480 subq 4, $sp
481 move $mof, [$sp]
482 subq 4, $sp
483 move $srs, [$sp]
484 subq 4, $sp
485 move.d $acr, [$sp]
486 di ; Need to disable irq's at this point.
487 subq 14*4, $sp ; Make room for r0-r13.
488 movem $r13, [$sp] ; Push the r0-r13 registers.
489 subq 4, $sp
490 move.d $r10, [$sp] ; Push orig_r10.
491
492 movs.w -8192, $r9 ; THREAD_SIZE == 8192
493 and.d $sp, $r9
494
495 ;; thread_info as first parameter
496 move.d $r9, $r10
497 moveq 5, $r11 ; SIGTRAP as second argument.
498 jsr ugdb_trap_user
499 nop
500 jump ret_from_intr ; Use the return routine for interrupts.
501 nop
502
503gdb_handle_exception:
504 subq 4, $sp
505 move.d $r0, [$sp]
506#ifdef CONFIG_ETRAX_KGDB
507 move $ccs, $r0 ; U-flag not affected by previous insns.
508 btstq 16, $r0 ; Test the U-flag.
509 bmi _ugdb_handle_exception ; Go to user mode debugging.
510 nop ; Empty delay-slot (cannot pop R0 here).
511 ba kgdb_handle_exception ; Go to kernel debugging.
512 move.d [$sp+], $r0 ; Restore R0 in delay slot.
513#endif
514
515_ugdb_handle_exception:
516 ba do_sigtrap ; SIGTRAP the offending process.
517 move.d [$sp+], $r0 ; Restore R0 in delay slot.
518
519 .data
520
521 .section .rodata,"a"
522sys_call_table:
523 .long sys_restart_syscall ; 0 - old "setup()" system call, used
524 ; for restarting.
525 .long sys_exit
526 .long sys_fork
527 .long sys_read
528 .long sys_write
529 .long sys_open /* 5 */
530 .long sys_close
531 .long sys_waitpid
532 .long sys_creat
533 .long sys_link
534 .long sys_unlink /* 10 */
535 .long sys_execve
536 .long sys_chdir
537 .long sys_time
538 .long sys_mknod
539 .long sys_chmod /* 15 */
540 .long sys_lchown16
541 .long sys_ni_syscall /* old break syscall holder */
542 .long sys_stat
543 .long sys_lseek
544 .long sys_getpid /* 20 */
545 .long sys_mount
546 .long sys_oldumount
547 .long sys_setuid16
548 .long sys_getuid16
549 .long sys_stime /* 25 */
550 .long sys_ptrace
551 .long sys_alarm
552 .long sys_fstat
553 .long sys_pause
554 .long sys_utime /* 30 */
555 .long sys_ni_syscall /* old stty syscall holder */
556 .long sys_ni_syscall /* old gtty syscall holder */
557 .long sys_access
558 .long sys_nice
559 .long sys_ni_syscall /* 35 old ftime syscall holder */
560 .long sys_sync
561 .long sys_kill
562 .long sys_rename
563 .long sys_mkdir
564 .long sys_rmdir /* 40 */
565 .long sys_dup
566 .long sys_pipe
567 .long sys_times
568 .long sys_ni_syscall /* old prof syscall holder */
569 .long sys_brk /* 45 */
570 .long sys_setgid16
571 .long sys_getgid16
572 .long sys_signal
573 .long sys_geteuid16
574 .long sys_getegid16 /* 50 */
575 .long sys_acct
576 .long sys_umount /* recycled never used phys( */
577 .long sys_ni_syscall /* old lock syscall holder */
578 .long sys_ioctl
579 .long sys_fcntl /* 55 */
580 .long sys_ni_syscall /* old mpx syscall holder */
581 .long sys_setpgid
582 .long sys_ni_syscall /* old ulimit syscall holder */
583 .long sys_ni_syscall /* old sys_olduname holder */
584 .long sys_umask /* 60 */
585 .long sys_chroot
586 .long sys_ustat
587 .long sys_dup2
588 .long sys_getppid
589 .long sys_getpgrp /* 65 */
590 .long sys_setsid
591 .long sys_sigaction
592 .long sys_sgetmask
593 .long sys_ssetmask
594 .long sys_setreuid16 /* 70 */
595 .long sys_setregid16
596 .long sys_sigsuspend
597 .long sys_sigpending
598 .long sys_sethostname
599 .long sys_setrlimit /* 75 */
600 .long sys_old_getrlimit
601 .long sys_getrusage
602 .long sys_gettimeofday
603 .long sys_settimeofday
604 .long sys_getgroups16 /* 80 */
605 .long sys_setgroups16
606 .long sys_select /* was old_select in Linux/E100 */
607 .long sys_symlink
608 .long sys_lstat
609 .long sys_readlink /* 85 */
610 .long sys_uselib
611 .long sys_swapon
612 .long sys_reboot
613 .long old_readdir
614 .long old_mmap /* 90 */
615 .long sys_munmap
616 .long sys_truncate
617 .long sys_ftruncate
618 .long sys_fchmod
619 .long sys_fchown16 /* 95 */
620 .long sys_getpriority
621 .long sys_setpriority
622 .long sys_ni_syscall /* old profil syscall holder */
623 .long sys_statfs
624 .long sys_fstatfs /* 100 */
625 .long sys_ni_syscall /* sys_ioperm in i386 */
626 .long sys_socketcall
627 .long sys_syslog
628 .long sys_setitimer
629 .long sys_getitimer /* 105 */
630 .long sys_newstat
631 .long sys_newlstat
632 .long sys_newfstat
633 .long sys_ni_syscall /* old sys_uname holder */
634 .long sys_ni_syscall /* sys_iopl in i386 */
635 .long sys_vhangup
636 .long sys_ni_syscall /* old "idle" system call */
637 .long sys_ni_syscall /* vm86old in i386 */
638 .long sys_wait4
639 .long sys_swapoff /* 115 */
640 .long sys_sysinfo
641 .long sys_ipc
642 .long sys_fsync
643 .long sys_sigreturn
644 .long sys_clone /* 120 */
645 .long sys_setdomainname
646 .long sys_newuname
647 .long sys_ni_syscall /* sys_modify_ldt */
648 .long sys_adjtimex
649 .long sys_mprotect /* 125 */
650 .long sys_sigprocmask
651 .long sys_ni_syscall /* old "create_module" */
652 .long sys_init_module
653 .long sys_delete_module
654 .long sys_ni_syscall /* 130: old "get_kernel_syms" */
655 .long sys_quotactl
656 .long sys_getpgid
657 .long sys_fchdir
658 .long sys_bdflush
659 .long sys_sysfs /* 135 */
660 .long sys_personality
661 .long sys_ni_syscall /* for afs_syscall */
662 .long sys_setfsuid16
663 .long sys_setfsgid16
664 .long sys_llseek /* 140 */
665 .long sys_getdents
666 .long sys_select
667 .long sys_flock
668 .long sys_msync
669 .long sys_readv /* 145 */
670 .long sys_writev
671 .long sys_getsid
672 .long sys_fdatasync
673 .long sys_sysctl
674 .long sys_mlock /* 150 */
675 .long sys_munlock
676 .long sys_mlockall
677 .long sys_munlockall
678 .long sys_sched_setparam
679 .long sys_sched_getparam /* 155 */
680 .long sys_sched_setscheduler
681 .long sys_sched_getscheduler
682 .long sys_sched_yield
683 .long sys_sched_get_priority_max
684 .long sys_sched_get_priority_min /* 160 */
685 .long sys_sched_rr_get_interval
686 .long sys_nanosleep
687 .long sys_mremap
688 .long sys_setresuid16
689 .long sys_getresuid16 /* 165 */
690 .long sys_ni_syscall /* sys_vm86 */
691 .long sys_ni_syscall /* Old sys_query_module */
692 .long sys_poll
693 .long sys_nfsservctl
694 .long sys_setresgid16 /* 170 */
695 .long sys_getresgid16
696 .long sys_prctl
697 .long sys_rt_sigreturn
698 .long sys_rt_sigaction
699 .long sys_rt_sigprocmask /* 175 */
700 .long sys_rt_sigpending
701 .long sys_rt_sigtimedwait
702 .long sys_rt_sigqueueinfo
703 .long sys_rt_sigsuspend
704 .long sys_pread64 /* 180 */
705 .long sys_pwrite64
706 .long sys_chown16
707 .long sys_getcwd
708 .long sys_capget
709 .long sys_capset /* 185 */
710 .long sys_sigaltstack
711 .long sys_sendfile
712 .long sys_ni_syscall /* streams1 */
713 .long sys_ni_syscall /* streams2 */
714 .long sys_vfork /* 190 */
715 .long sys_getrlimit
716 .long sys_mmap2
717 .long sys_truncate64
718 .long sys_ftruncate64
719 .long sys_stat64 /* 195 */
720 .long sys_lstat64
721 .long sys_fstat64
722 .long sys_lchown
723 .long sys_getuid
724 .long sys_getgid /* 200 */
725 .long sys_geteuid
726 .long sys_getegid
727 .long sys_setreuid
728 .long sys_setregid
729 .long sys_getgroups /* 205 */
730 .long sys_setgroups
731 .long sys_fchown
732 .long sys_setresuid
733 .long sys_getresuid
734 .long sys_setresgid /* 210 */
735 .long sys_getresgid
736 .long sys_chown
737 .long sys_setuid
738 .long sys_setgid
739 .long sys_setfsuid /* 215 */
740 .long sys_setfsgid
741 .long sys_pivot_root
742 .long sys_mincore
743 .long sys_madvise
744 .long sys_getdents64 /* 220 */
745 .long sys_fcntl64
746 .long sys_ni_syscall /* reserved for TUX */
747 .long sys_ni_syscall
748 .long sys_gettid
749 .long sys_readahead /* 225 */
750 .long sys_setxattr
751 .long sys_lsetxattr
752 .long sys_fsetxattr
753 .long sys_getxattr
754 .long sys_lgetxattr /* 230 */
755 .long sys_fgetxattr
756 .long sys_listxattr
757 .long sys_llistxattr
758 .long sys_flistxattr
759 .long sys_removexattr /* 235 */
760 .long sys_lremovexattr
761 .long sys_fremovexattr
762 .long sys_tkill
763 .long sys_sendfile64
764 .long sys_futex /* 240 */
765 .long sys_sched_setaffinity
766 .long sys_sched_getaffinity
767 .long sys_ni_syscall /* sys_set_thread_area */
768 .long sys_ni_syscall /* sys_get_thread_area */
769 .long sys_io_setup /* 245 */
770 .long sys_io_destroy
771 .long sys_io_getevents
772 .long sys_io_submit
773 .long sys_io_cancel
774 .long sys_fadvise64 /* 250 */
775 .long sys_ni_syscall
776 .long sys_exit_group
777 .long sys_lookup_dcookie
778 .long sys_epoll_create
779 .long sys_epoll_ctl /* 255 */
780 .long sys_epoll_wait
781 .long sys_remap_file_pages
782 .long sys_set_tid_address
783 .long sys_timer_create
784 .long sys_timer_settime /* 260 */
785 .long sys_timer_gettime
786 .long sys_timer_getoverrun
787 .long sys_timer_delete
788 .long sys_clock_settime
789 .long sys_clock_gettime /* 265 */
790 .long sys_clock_getres
791 .long sys_clock_nanosleep
792 .long sys_statfs64
793 .long sys_fstatfs64
794 .long sys_tgkill /* 270 */
795 .long sys_utimes
796 .long sys_fadvise64_64
797 .long sys_ni_syscall /* sys_vserver */
798 .long sys_ni_syscall /* sys_mbind */
799 .long sys_ni_syscall /* 275 sys_get_mempolicy */
800 .long sys_ni_syscall /* sys_set_mempolicy */
801 .long sys_mq_open
802 .long sys_mq_unlink
803 .long sys_mq_timedsend
804 .long sys_mq_timedreceive /* 280 */
805 .long sys_mq_notify
806 .long sys_mq_getsetattr
807 .long sys_ni_syscall /* reserved for kexec */
808 .long sys_waitid
809
810 /*
811 * NOTE!! This doesn't have to be exact - we just have
812 * to make sure we have _enough_ of the "sys_ni_syscall"
813 * entries. Don't panic if you notice that this hasn't
814 * been shrunk every time we add a new system call.
815 */
816
817 .rept NR_syscalls - (.-sys_call_table) / 4
818 .long sys_ni_syscall
819 .endr
820
diff --git a/arch/cris/arch-v32/kernel/fasttimer.c b/arch/cris/arch-v32/kernel/fasttimer.c
new file mode 100644
index 000000000000..ea2b4a97c8c7
--- /dev/null
+++ b/arch/cris/arch-v32/kernel/fasttimer.c
@@ -0,0 +1,996 @@
1/* $Id: fasttimer.c,v 1.11 2005/01/04 11:15:46 starvik Exp $
2 * linux/arch/cris/kernel/fasttimer.c
3 *
4 * Fast timers for ETRAX FS
5 * This may be useful in other OS than Linux so use 2 space indentation...
6 *
7 * $Log: fasttimer.c,v $
8 * Revision 1.11 2005/01/04 11:15:46 starvik
9 * Don't share timer IRQ.
10 *
11 * Revision 1.10 2004/12/07 09:19:38 starvik
12 * Corrected includes.
13 * Use correct interrupt macros.
14 *
15 * Revision 1.9 2004/05/14 10:18:58 starvik
16 * Export fast_timer_list
17 *
18 * Revision 1.8 2004/05/14 07:58:03 starvik
19 * Merge of changes from 2.4
20 *
21 * Revision 1.7 2003/07/10 12:06:14 starvik
22 * Return IRQ_NONE if irq wasn't handled
23 *
24 * Revision 1.6 2003/07/04 08:27:49 starvik
25 * Merge of Linux 2.5.74
26 *
27 * Revision 1.5 2003/06/05 10:16:22 johana
28 * New INTR_VECT macros.
29 *
30 * Revision 1.4 2003/06/03 08:49:45 johana
31 * Fixed typo.
32 *
33 * Revision 1.3 2003/06/02 12:51:27 johana
34 * Now compiles.
35 * Commented some include files that probably can be removed.
36 *
37 * Revision 1.2 2003/06/02 12:09:41 johana
38 * Ported to ETRAX FS using the trig interrupt instead of timer1.
39 *
40 * Revision 1.3 2002/12/12 08:26:32 starvik
41 * Don't use C-comments inside CVS comments
42 *
43 * Revision 1.2 2002/12/11 15:42:02 starvik
44 * Extracted v10 (ETRAX 100LX) specific stuff from arch/cris/kernel/
45 *
46 * Revision 1.1 2002/11/18 07:58:06 starvik
47 * Fast timers (from Linux 2.4)
48 *
49 * Revision 1.5 2002/10/15 06:21:39 starvik
50 * Added call to init_waitqueue_head
51 *
52 * Revision 1.4 2002/05/28 17:47:59 johana
53 * Added del_fast_timer()
54 *
55 * Revision 1.3 2002/05/28 16:16:07 johana
56 * Handle empty fast_timer_list
57 *
58 * Revision 1.2 2002/05/27 15:38:42 johana
59 * Made it compile without warnings on Linux 2.4.
60 * (includes, wait_queue, PROC_FS and snprintf)
61 *
62 * Revision 1.1 2002/05/27 15:32:25 johana
63 * arch/etrax100/kernel/fasttimer.c v1.8 from the elinux tree.
64 *
65 * Revision 1.8 2001/11/27 13:50:40 pkj
66 * Disable interrupts while stopping the timer and while modifying the
67 * list of active timers in timer1_handler() as it may be interrupted
68 * by other interrupts (e.g., the serial interrupt) which may add fast
69 * timers.
70 *
71 * Revision 1.7 2001/11/22 11:50:32 pkj
72 * * Only store information about the last 16 timers.
73 * * proc_fasttimer_read() now uses an allocated buffer, since it
74 * requires more space than just a page even for only writing the
75 * last 16 timers. The buffer is only allocated on request, so
76 * unless /proc/fasttimer is read, it is never allocated.
77 * * Renamed fast_timer_started to fast_timers_started to match
78 * fast_timers_added and fast_timers_expired.
79 * * Some clean-up.
80 *
81 * Revision 1.6 2000/12/13 14:02:08 johana
82 * Removed volatile for fast_timer_list
83 *
84 * Revision 1.5 2000/12/13 13:55:35 johana
85 * Added DEBUG_LOG, added som cli() and cleanup
86 *
87 * Revision 1.4 2000/12/05 13:48:50 johana
88 * Added range check when writing proc file, modified timer int handling
89 *
90 * Revision 1.3 2000/11/23 10:10:20 johana
91 * More debug/logging possibilities.
92 * Moved GET_JIFFIES_USEC() to timex.h and time.c
93 *
94 * Revision 1.2 2000/11/01 13:41:04 johana
95 * Clean up and bugfixes.
96 * Created new do_gettimeofday_fast() that gets a timeval struct
97 * with time based on jiffies and *R_TIMER0_DATA, uses a table
98 * for fast conversion of timer value to microseconds.
99 * (Much faster the standard do_gettimeofday() and we don't really
100 * wan't to use the true time - we wan't the "uptime" so timers don't screw up
101 * when we change the time.
102 * TODO: Add efficient support for continuous timers as well.
103 *
104 * Revision 1.1 2000/10/26 15:49:16 johana
105 * Added fasttimer, highresolution timers.
106 *
107 * Copyright (C) 2000,2001 2002, 2003 Axis Communications AB, Lund, Sweden
108 */
109
110#include <linux/errno.h>
111#include <linux/sched.h>
112#include <linux/kernel.h>
113#include <linux/param.h>
114#include <linux/string.h>
115#include <linux/vmalloc.h>
116#include <linux/interrupt.h>
117#include <linux/time.h>
118#include <linux/delay.h>
119
120#include <asm/irq.h>
121#include <asm/system.h>
122
123#include <linux/config.h>
124#include <linux/version.h>
125
126#include <asm/arch/hwregs/reg_map.h>
127#include <asm/arch/hwregs/reg_rdwr.h>
128#include <asm/arch/hwregs/timer_defs.h>
129#include <asm/fasttimer.h>
130#include <linux/proc_fs.h>
131
132/*
133 * timer0 is running at 100MHz and generating jiffies timer ticks
134 * at 100 or 1000 HZ.
135 * fasttimer gives an API that gives timers that expire "between" the jiffies
136 * giving microsecond resolution (10 ns).
137 * fasttimer uses reg_timer_rw_trig register to get interrupt when
138 * r_time reaches a certain value.
139 */
140
141
142#define DEBUG_LOG_INCLUDED
143#define FAST_TIMER_LOG
144//#define FAST_TIMER_TEST
145
146#define FAST_TIMER_SANITY_CHECKS
147
148#ifdef FAST_TIMER_SANITY_CHECKS
149#define SANITYCHECK(x) x
150static int sanity_failed = 0;
151#else
152#define SANITYCHECK(x)
153#endif
154
155#define D1(x)
156#define D2(x)
157#define DP(x)
158
159#define __INLINE__ inline
160
161static int fast_timer_running = 0;
162static int fast_timers_added = 0;
163static int fast_timers_started = 0;
164static int fast_timers_expired = 0;
165static int fast_timers_deleted = 0;
166static int fast_timer_is_init = 0;
167static int fast_timer_ints = 0;
168
169struct fast_timer *fast_timer_list = NULL;
170
171#ifdef DEBUG_LOG_INCLUDED
172#define DEBUG_LOG_MAX 128
173static const char * debug_log_string[DEBUG_LOG_MAX];
174static unsigned long debug_log_value[DEBUG_LOG_MAX];
175static int debug_log_cnt = 0;
176static int debug_log_cnt_wrapped = 0;
177
178#define DEBUG_LOG(string, value) \
179{ \
180 unsigned long log_flags; \
181 local_irq_save(log_flags); \
182 debug_log_string[debug_log_cnt] = (string); \
183 debug_log_value[debug_log_cnt] = (unsigned long)(value); \
184 if (++debug_log_cnt >= DEBUG_LOG_MAX) \
185 { \
186 debug_log_cnt = debug_log_cnt % DEBUG_LOG_MAX; \
187 debug_log_cnt_wrapped = 1; \
188 } \
189 local_irq_restore(log_flags); \
190}
191#else
192#define DEBUG_LOG(string, value)
193#endif
194
195
196#define NUM_TIMER_STATS 16
197#ifdef FAST_TIMER_LOG
198struct fast_timer timer_added_log[NUM_TIMER_STATS];
199struct fast_timer timer_started_log[NUM_TIMER_STATS];
200struct fast_timer timer_expired_log[NUM_TIMER_STATS];
201#endif
202
203int timer_div_settings[NUM_TIMER_STATS];
204int timer_delay_settings[NUM_TIMER_STATS];
205
206
207static void
208timer_trig_handler(void);
209
210
211
212/* Not true gettimeofday, only checks the jiffies (uptime) + useconds */
213void __INLINE__ do_gettimeofday_fast(struct timeval *tv)
214{
215 unsigned long sec = jiffies;
216 unsigned long usec = GET_JIFFIES_USEC();
217
218 usec += (sec % HZ) * (1000000 / HZ);
219 sec = sec / HZ;
220
221 if (usec > 1000000)
222 {
223 usec -= 1000000;
224 sec++;
225 }
226 tv->tv_sec = sec;
227 tv->tv_usec = usec;
228}
229
230int __INLINE__ timeval_cmp(struct timeval *t0, struct timeval *t1)
231{
232 if (t0->tv_sec < t1->tv_sec)
233 {
234 return -1;
235 }
236 else if (t0->tv_sec > t1->tv_sec)
237 {
238 return 1;
239 }
240 if (t0->tv_usec < t1->tv_usec)
241 {
242 return -1;
243 }
244 else if (t0->tv_usec > t1->tv_usec)
245 {
246 return 1;
247 }
248 return 0;
249}
250
251/* Called with ints off */
252void __INLINE__ start_timer_trig(unsigned long delay_us)
253{
254 reg_timer_rw_ack_intr ack_intr = { 0 };
255 reg_timer_rw_intr_mask intr_mask;
256 reg_timer_rw_trig trig;
257 reg_timer_rw_trig_cfg trig_cfg = { 0 };
258 reg_timer_r_time r_time;
259
260 r_time = REG_RD(timer, regi_timer, r_time);
261
262 D1(printk("start_timer_trig : %d us freq: %i div: %i\n",
263 delay_us, freq_index, div));
264 /* Clear trig irq */
265 intr_mask = REG_RD(timer, regi_timer, rw_intr_mask);
266 intr_mask.trig = 0;
267 REG_WR(timer, regi_timer, rw_intr_mask, intr_mask);
268
269 /* Set timer values */
270 /* r_time is 100MHz (10 ns resolution) */
271 trig = r_time + delay_us*(1000/10);
272
273 timer_div_settings[fast_timers_started % NUM_TIMER_STATS] = trig;
274 timer_delay_settings[fast_timers_started % NUM_TIMER_STATS] = delay_us;
275
276 /* Ack interrupt */
277 ack_intr.trig = 1;
278 REG_WR(timer, regi_timer, rw_ack_intr, ack_intr);
279
280 /* Start timer */
281 REG_WR(timer, regi_timer, rw_trig, trig);
282 trig_cfg.tmr = regk_timer_time;
283 REG_WR(timer, regi_timer, rw_trig_cfg, trig_cfg);
284
285 /* Check if we have already passed the trig time */
286 r_time = REG_RD(timer, regi_timer, r_time);
287 if (r_time < trig) {
288 /* No, Enable trig irq */
289 intr_mask = REG_RD(timer, regi_timer, rw_intr_mask);
290 intr_mask.trig = 1;
291 REG_WR(timer, regi_timer, rw_intr_mask, intr_mask);
292 fast_timers_started++;
293 fast_timer_running = 1;
294 }
295 else
296 {
297 /* We have passed the time, disable trig point, ack intr */
298 trig_cfg.tmr = regk_timer_off;
299 REG_WR(timer, regi_timer, rw_trig_cfg, trig_cfg);
300 REG_WR(timer, regi_timer, rw_ack_intr, ack_intr);
301 /* call the int routine directly */
302 timer_trig_handler();
303 }
304
305}
306
307/* In version 1.4 this function takes 27 - 50 us */
308void start_one_shot_timer(struct fast_timer *t,
309 fast_timer_function_type *function,
310 unsigned long data,
311 unsigned long delay_us,
312 const char *name)
313{
314 unsigned long flags;
315 struct fast_timer *tmp;
316
317 D1(printk("sft %s %d us\n", name, delay_us));
318
319 local_irq_save(flags);
320
321 do_gettimeofday_fast(&t->tv_set);
322 tmp = fast_timer_list;
323
324 SANITYCHECK({ /* Check so this is not in the list already... */
325 while (tmp != NULL)
326 {
327 if (tmp == t)
328 {
329 printk("timer name: %s data: 0x%08lX already in list!\n", name, data);
330 sanity_failed++;
331 return;
332 }
333 else
334 {
335 tmp = tmp->next;
336 }
337 }
338 tmp = fast_timer_list;
339 });
340
341 t->delay_us = delay_us;
342 t->function = function;
343 t->data = data;
344 t->name = name;
345
346 t->tv_expires.tv_usec = t->tv_set.tv_usec + delay_us % 1000000;
347 t->tv_expires.tv_sec = t->tv_set.tv_sec + delay_us / 1000000;
348 if (t->tv_expires.tv_usec > 1000000)
349 {
350 t->tv_expires.tv_usec -= 1000000;
351 t->tv_expires.tv_sec++;
352 }
353#ifdef FAST_TIMER_LOG
354 timer_added_log[fast_timers_added % NUM_TIMER_STATS] = *t;
355#endif
356 fast_timers_added++;
357
358 /* Check if this should timeout before anything else */
359 if (tmp == NULL || timeval_cmp(&t->tv_expires, &tmp->tv_expires) < 0)
360 {
361 /* Put first in list and modify the timer value */
362 t->prev = NULL;
363 t->next = fast_timer_list;
364 if (fast_timer_list)
365 {
366 fast_timer_list->prev = t;
367 }
368 fast_timer_list = t;
369#ifdef FAST_TIMER_LOG
370 timer_started_log[fast_timers_started % NUM_TIMER_STATS] = *t;
371#endif
372 start_timer_trig(delay_us);
373 } else {
374 /* Put in correct place in list */
375 while (tmp->next &&
376 timeval_cmp(&t->tv_expires, &tmp->next->tv_expires) > 0)
377 {
378 tmp = tmp->next;
379 }
380 /* Insert t after tmp */
381 t->prev = tmp;
382 t->next = tmp->next;
383 if (tmp->next)
384 {
385 tmp->next->prev = t;
386 }
387 tmp->next = t;
388 }
389
390 D2(printk("start_one_shot_timer: %d us done\n", delay_us));
391
392 local_irq_restore(flags);
393} /* start_one_shot_timer */
394
395static inline int fast_timer_pending (const struct fast_timer * t)
396{
397 return (t->next != NULL) || (t->prev != NULL) || (t == fast_timer_list);
398}
399
400static inline int detach_fast_timer (struct fast_timer *t)
401{
402 struct fast_timer *next, *prev;
403 if (!fast_timer_pending(t))
404 return 0;
405 next = t->next;
406 prev = t->prev;
407 if (next)
408 next->prev = prev;
409 if (prev)
410 prev->next = next;
411 else
412 fast_timer_list = next;
413 fast_timers_deleted++;
414 return 1;
415}
416
417int del_fast_timer(struct fast_timer * t)
418{
419 unsigned long flags;
420 int ret;
421
422 local_irq_save(flags);
423 ret = detach_fast_timer(t);
424 t->next = t->prev = NULL;
425 local_irq_restore(flags);
426 return ret;
427} /* del_fast_timer */
428
429
430/* Interrupt routines or functions called in interrupt context */
431
432/* Timer interrupt handler for trig interrupts */
433
434static irqreturn_t
435timer_trig_interrupt(int irq, void *dev_id, struct pt_regs *regs)
436{
437 reg_timer_r_masked_intr masked_intr;
438
439 /* Check if the timer interrupt is for us (a trig int) */
440 masked_intr = REG_RD(timer, regi_timer, r_masked_intr);
441 if (!masked_intr.trig)
442 return IRQ_NONE;
443 timer_trig_handler();
444 return IRQ_HANDLED;
445}
446
447static void timer_trig_handler(void)
448{
449 reg_timer_rw_ack_intr ack_intr = { 0 };
450 reg_timer_rw_intr_mask intr_mask;
451 reg_timer_rw_trig_cfg trig_cfg = { 0 };
452 struct fast_timer *t;
453 unsigned long flags;
454
455 local_irq_save(flags);
456
457 /* Clear timer trig interrupt */
458 intr_mask = REG_RD(timer, regi_timer, rw_intr_mask);
459 intr_mask.trig = 0;
460 REG_WR(timer, regi_timer, rw_intr_mask, intr_mask);
461
462 /* First stop timer, then ack interrupt */
463 /* Stop timer */
464 trig_cfg.tmr = regk_timer_off;
465 REG_WR(timer, regi_timer, rw_trig_cfg, trig_cfg);
466
467 /* Ack interrupt */
468 ack_intr.trig = 1;
469 REG_WR(timer, regi_timer, rw_ack_intr, ack_intr);
470
471 fast_timer_running = 0;
472 fast_timer_ints++;
473
474 local_irq_restore(flags);
475
476 t = fast_timer_list;
477 while (t)
478 {
479 struct timeval tv;
480
481 /* Has it really expired? */
482 do_gettimeofday_fast(&tv);
483 D1(printk("t: %is %06ius\n", tv.tv_sec, tv.tv_usec));
484
485 if (timeval_cmp(&t->tv_expires, &tv) <= 0)
486 {
487 /* Yes it has expired */
488#ifdef FAST_TIMER_LOG
489 timer_expired_log[fast_timers_expired % NUM_TIMER_STATS] = *t;
490#endif
491 fast_timers_expired++;
492
493 /* Remove this timer before call, since it may reuse the timer */
494 local_irq_save(flags);
495 if (t->prev)
496 {
497 t->prev->next = t->next;
498 }
499 else
500 {
501 fast_timer_list = t->next;
502 }
503 if (t->next)
504 {
505 t->next->prev = t->prev;
506 }
507 t->prev = NULL;
508 t->next = NULL;
509 local_irq_restore(flags);
510
511 if (t->function != NULL)
512 {
513 t->function(t->data);
514 }
515 else
516 {
517 DEBUG_LOG("!trimertrig %i function==NULL!\n", fast_timer_ints);
518 }
519 }
520 else
521 {
522 /* Timer is to early, let's set it again using the normal routines */
523 D1(printk(".\n"));
524 }
525
526 local_irq_save(flags);
527 if ((t = fast_timer_list) != NULL)
528 {
529 /* Start next timer.. */
530 long us;
531 struct timeval tv;
532
533 do_gettimeofday_fast(&tv);
534 us = ((t->tv_expires.tv_sec - tv.tv_sec) * 1000000 +
535 t->tv_expires.tv_usec - tv.tv_usec);
536 if (us > 0)
537 {
538 if (!fast_timer_running)
539 {
540#ifdef FAST_TIMER_LOG
541 timer_started_log[fast_timers_started % NUM_TIMER_STATS] = *t;
542#endif
543 start_timer_trig(us);
544 }
545 local_irq_restore(flags);
546 break;
547 }
548 else
549 {
550 /* Timer already expired, let's handle it better late than never.
551 * The normal loop handles it
552 */
553 D1(printk("e! %d\n", us));
554 }
555 }
556 local_irq_restore(flags);
557 }
558
559 if (!t)
560 {
561 D1(printk("ttrig stop!\n"));
562 }
563}
564
565static void wake_up_func(unsigned long data)
566{
567#ifdef DECLARE_WAITQUEUE
568 wait_queue_head_t *sleep_wait_p = (wait_queue_head_t*)data;
569#else
570 struct wait_queue **sleep_wait_p = (struct wait_queue **)data;
571#endif
572 wake_up(sleep_wait_p);
573}
574
575
576/* Useful API */
577
578void schedule_usleep(unsigned long us)
579{
580 struct fast_timer t;
581#ifdef DECLARE_WAITQUEUE
582 wait_queue_head_t sleep_wait;
583 init_waitqueue_head(&sleep_wait);
584 {
585 DECLARE_WAITQUEUE(wait, current);
586#else
587 struct wait_queue *sleep_wait = NULL;
588 struct wait_queue wait = { current, NULL };
589#endif
590
591 D1(printk("schedule_usleep(%d)\n", us));
592 add_wait_queue(&sleep_wait, &wait);
593 set_current_state(TASK_INTERRUPTIBLE);
594 start_one_shot_timer(&t, wake_up_func, (unsigned long)&sleep_wait, us,
595 "usleep");
596 schedule();
597 set_current_state(TASK_RUNNING);
598 remove_wait_queue(&sleep_wait, &wait);
599 D1(printk("done schedule_usleep(%d)\n", us));
600#ifdef DECLARE_WAITQUEUE
601 }
602#endif
603}
604
605#ifdef CONFIG_PROC_FS
606static int proc_fasttimer_read(char *buf, char **start, off_t offset, int len
607#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,2,0)
608 ,int *eof, void *data_unused
609#else
610 ,int unused
611#endif
612 );
613#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,2,0)
614static struct proc_dir_entry *fasttimer_proc_entry;
615#else
616static struct proc_dir_entry fasttimer_proc_entry =
617{
618 0, 9, "fasttimer",
619 S_IFREG | S_IRUGO, 1, 0, 0,
620 0, NULL /* ops -- default to array */,
621 &proc_fasttimer_read /* get_info */,
622};
623#endif
624#endif /* CONFIG_PROC_FS */
625
626#ifdef CONFIG_PROC_FS
627
628/* This value is very much based on testing */
629#define BIG_BUF_SIZE (500 + NUM_TIMER_STATS * 300)
630
631static int proc_fasttimer_read(char *buf, char **start, off_t offset, int len
632#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,2,0)
633 ,int *eof, void *data_unused
634#else
635 ,int unused
636#endif
637 )
638{
639 unsigned long flags;
640 int i = 0;
641 int num_to_show;
642 struct timeval tv;
643 struct fast_timer *t, *nextt;
644 static char *bigbuf = NULL;
645 static unsigned long used;
646
647 if (!bigbuf && !(bigbuf = vmalloc(BIG_BUF_SIZE)))
648 {
649 used = 0;
650 bigbuf[0] = '\0';
651 return 0;
652 }
653
654 if (!offset || !used)
655 {
656 do_gettimeofday_fast(&tv);
657
658 used = 0;
659 used += sprintf(bigbuf + used, "Fast timers added: %i\n",
660 fast_timers_added);
661 used += sprintf(bigbuf + used, "Fast timers started: %i\n",
662 fast_timers_started);
663 used += sprintf(bigbuf + used, "Fast timer interrupts: %i\n",
664 fast_timer_ints);
665 used += sprintf(bigbuf + used, "Fast timers expired: %i\n",
666 fast_timers_expired);
667 used += sprintf(bigbuf + used, "Fast timers deleted: %i\n",
668 fast_timers_deleted);
669 used += sprintf(bigbuf + used, "Fast timer running: %s\n",
670 fast_timer_running ? "yes" : "no");
671 used += sprintf(bigbuf + used, "Current time: %lu.%06lu\n",
672 (unsigned long)tv.tv_sec,
673 (unsigned long)tv.tv_usec);
674#ifdef FAST_TIMER_SANITY_CHECKS
675 used += sprintf(bigbuf + used, "Sanity failed: %i\n",
676 sanity_failed);
677#endif
678 used += sprintf(bigbuf + used, "\n");
679
680#ifdef DEBUG_LOG_INCLUDED
681 {
682 int end_i = debug_log_cnt;
683 i = 0;
684
685 if (debug_log_cnt_wrapped)
686 {
687 i = debug_log_cnt;
688 }
689
690 while ((i != end_i || (debug_log_cnt_wrapped && !used)) &&
691 used+100 < BIG_BUF_SIZE)
692 {
693 used += sprintf(bigbuf + used, debug_log_string[i],
694 debug_log_value[i]);
695 i = (i+1) % DEBUG_LOG_MAX;
696 }
697 }
698 used += sprintf(bigbuf + used, "\n");
699#endif
700
701 num_to_show = (fast_timers_started < NUM_TIMER_STATS ? fast_timers_started:
702 NUM_TIMER_STATS);
703 used += sprintf(bigbuf + used, "Timers started: %i\n", fast_timers_started);
704 for (i = 0; i < num_to_show && (used+100 < BIG_BUF_SIZE) ; i++)
705 {
706 int cur = (fast_timers_started - i - 1) % NUM_TIMER_STATS;
707
708#if 1 //ndef FAST_TIMER_LOG
709 used += sprintf(bigbuf + used, "div: %i delay: %i"
710 "\n",
711 timer_div_settings[cur],
712 timer_delay_settings[cur]
713 );
714#endif
715#ifdef FAST_TIMER_LOG
716 t = &timer_started_log[cur];
717 used += sprintf(bigbuf + used, "%-14s s: %6lu.%06lu e: %6lu.%06lu "
718 "d: %6li us data: 0x%08lX"
719 "\n",
720 t->name,
721 (unsigned long)t->tv_set.tv_sec,
722 (unsigned long)t->tv_set.tv_usec,
723 (unsigned long)t->tv_expires.tv_sec,
724 (unsigned long)t->tv_expires.tv_usec,
725 t->delay_us,
726 t->data
727 );
728#endif
729 }
730 used += sprintf(bigbuf + used, "\n");
731
732#ifdef FAST_TIMER_LOG
733 num_to_show = (fast_timers_added < NUM_TIMER_STATS ? fast_timers_added:
734 NUM_TIMER_STATS);
735 used += sprintf(bigbuf + used, "Timers added: %i\n", fast_timers_added);
736 for (i = 0; i < num_to_show && (used+100 < BIG_BUF_SIZE); i++)
737 {
738 t = &timer_added_log[(fast_timers_added - i - 1) % NUM_TIMER_STATS];
739 used += sprintf(bigbuf + used, "%-14s s: %6lu.%06lu e: %6lu.%06lu "
740 "d: %6li us data: 0x%08lX"
741 "\n",
742 t->name,
743 (unsigned long)t->tv_set.tv_sec,
744 (unsigned long)t->tv_set.tv_usec,
745 (unsigned long)t->tv_expires.tv_sec,
746 (unsigned long)t->tv_expires.tv_usec,
747 t->delay_us,
748 t->data
749 );
750 }
751 used += sprintf(bigbuf + used, "\n");
752
753 num_to_show = (fast_timers_expired < NUM_TIMER_STATS ? fast_timers_expired:
754 NUM_TIMER_STATS);
755 used += sprintf(bigbuf + used, "Timers expired: %i\n", fast_timers_expired);
756 for (i = 0; i < num_to_show && (used+100 < BIG_BUF_SIZE); i++)
757 {
758 t = &timer_expired_log[(fast_timers_expired - i - 1) % NUM_TIMER_STATS];
759 used += sprintf(bigbuf + used, "%-14s s: %6lu.%06lu e: %6lu.%06lu "
760 "d: %6li us data: 0x%08lX"
761 "\n",
762 t->name,
763 (unsigned long)t->tv_set.tv_sec,
764 (unsigned long)t->tv_set.tv_usec,
765 (unsigned long)t->tv_expires.tv_sec,
766 (unsigned long)t->tv_expires.tv_usec,
767 t->delay_us,
768 t->data
769 );
770 }
771 used += sprintf(bigbuf + used, "\n");
772#endif
773
774 used += sprintf(bigbuf + used, "Active timers:\n");
775 local_irq_save(flags);
776 local_irq_save(flags);
777 t = fast_timer_list;
778 while (t != NULL && (used+100 < BIG_BUF_SIZE))
779 {
780 nextt = t->next;
781 local_irq_restore(flags);
782 used += sprintf(bigbuf + used, "%-14s s: %6lu.%06lu e: %6lu.%06lu "
783 "d: %6li us data: 0x%08lX"
784/* " func: 0x%08lX" */
785 "\n",
786 t->name,
787 (unsigned long)t->tv_set.tv_sec,
788 (unsigned long)t->tv_set.tv_usec,
789 (unsigned long)t->tv_expires.tv_sec,
790 (unsigned long)t->tv_expires.tv_usec,
791 t->delay_us,
792 t->data
793/* , t->function */
794 );
795 local_irq_disable();
796 if (t->next != nextt)
797 {
798 printk("timer removed!\n");
799 }
800 t = nextt;
801 }
802 local_irq_restore(flags);
803 }
804
805 if (used - offset < len)
806 {
807 len = used - offset;
808 }
809
810 memcpy(buf, bigbuf + offset, len);
811 *start = buf;
812#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,2,0)
813 *eof = 1;
814#endif
815
816 return len;
817}
818#endif /* PROC_FS */
819
820#ifdef FAST_TIMER_TEST
821static volatile unsigned long i = 0;
822static volatile int num_test_timeout = 0;
823static struct fast_timer tr[10];
824static int exp_num[10];
825
826static struct timeval tv_exp[100];
827
828static void test_timeout(unsigned long data)
829{
830 do_gettimeofday_fast(&tv_exp[data]);
831 exp_num[data] = num_test_timeout;
832
833 num_test_timeout++;
834}
835
836static void test_timeout1(unsigned long data)
837{
838 do_gettimeofday_fast(&tv_exp[data]);
839 exp_num[data] = num_test_timeout;
840 if (data < 7)
841 {
842 start_one_shot_timer(&tr[i], test_timeout1, i, 1000, "timeout1");
843 i++;
844 }
845 num_test_timeout++;
846}
847
848DP(
849static char buf0[2000];
850static char buf1[2000];
851static char buf2[2000];
852static char buf3[2000];
853static char buf4[2000];
854);
855
856static char buf5[6000];
857static int j_u[1000];
858
859static void fast_timer_test(void)
860{
861 int prev_num;
862 int j;
863
864 struct timeval tv, tv0, tv1, tv2;
865
866 printk("fast_timer_test() start\n");
867 do_gettimeofday_fast(&tv);
868
869 for (j = 0; j < 1000; j++)
870 {
871 j_u[j] = GET_JIFFIES_USEC();
872 }
873 for (j = 0; j < 100; j++)
874 {
875 do_gettimeofday_fast(&tv_exp[j]);
876 }
877 printk("fast_timer_test() %is %06i\n", tv.tv_sec, tv.tv_usec);
878
879 for (j = 0; j < 1000; j++)
880 {
881 printk("%i %i %i %i %i\n",j_u[j], j_u[j+1], j_u[j+2], j_u[j+3], j_u[j+4]);
882 j += 4;
883 }
884 for (j = 0; j < 100; j++)
885 {
886 printk("%i.%i %i.%i %i.%i %i.%i %i.%i\n",
887 tv_exp[j].tv_sec,tv_exp[j].tv_usec,
888 tv_exp[j+1].tv_sec,tv_exp[j+1].tv_usec,
889 tv_exp[j+2].tv_sec,tv_exp[j+2].tv_usec,
890 tv_exp[j+3].tv_sec,tv_exp[j+3].tv_usec,
891 tv_exp[j+4].tv_sec,tv_exp[j+4].tv_usec);
892 j += 4;
893 }
894 do_gettimeofday_fast(&tv0);
895 start_one_shot_timer(&tr[i], test_timeout, i, 50000, "test0");
896 DP(proc_fasttimer_read(buf0, NULL, 0, 0, 0));
897 i++;
898 start_one_shot_timer(&tr[i], test_timeout, i, 70000, "test1");
899 DP(proc_fasttimer_read(buf1, NULL, 0, 0, 0));
900 i++;
901 start_one_shot_timer(&tr[i], test_timeout, i, 40000, "test2");
902 DP(proc_fasttimer_read(buf2, NULL, 0, 0, 0));
903 i++;
904 start_one_shot_timer(&tr[i], test_timeout, i, 60000, "test3");
905 DP(proc_fasttimer_read(buf3, NULL, 0, 0, 0));
906 i++;
907 start_one_shot_timer(&tr[i], test_timeout1, i, 55000, "test4xx");
908 DP(proc_fasttimer_read(buf4, NULL, 0, 0, 0));
909 i++;
910 do_gettimeofday_fast(&tv1);
911
912 proc_fasttimer_read(buf5, NULL, 0, 0, 0);
913
914 prev_num = num_test_timeout;
915 while (num_test_timeout < i)
916 {
917 if (num_test_timeout != prev_num)
918 {
919 prev_num = num_test_timeout;
920 }
921 }
922 do_gettimeofday_fast(&tv2);
923 printk("Timers started %is %06i\n", tv0.tv_sec, tv0.tv_usec);
924 printk("Timers started at %is %06i\n", tv1.tv_sec, tv1.tv_usec);
925 printk("Timers done %is %06i\n", tv2.tv_sec, tv2.tv_usec);
926 DP(printk("buf0:\n");
927 printk(buf0);
928 printk("buf1:\n");
929 printk(buf1);
930 printk("buf2:\n");
931 printk(buf2);
932 printk("buf3:\n");
933 printk(buf3);
934 printk("buf4:\n");
935 printk(buf4);
936 );
937 printk("buf5:\n");
938 printk(buf5);
939
940 printk("timers set:\n");
941 for(j = 0; j<i; j++)
942 {
943 struct fast_timer *t = &tr[j];
944 printk("%-10s set: %6is %06ius exp: %6is %06ius "
945 "data: 0x%08X func: 0x%08X\n",
946 t->name,
947 t->tv_set.tv_sec,
948 t->tv_set.tv_usec,
949 t->tv_expires.tv_sec,
950 t->tv_expires.tv_usec,
951 t->data,
952 t->function
953 );
954
955 printk(" del: %6ius did exp: %6is %06ius as #%i error: %6li\n",
956 t->delay_us,
957 tv_exp[j].tv_sec,
958 tv_exp[j].tv_usec,
959 exp_num[j],
960 (tv_exp[j].tv_sec - t->tv_expires.tv_sec)*1000000 + tv_exp[j].tv_usec - t->tv_expires.tv_usec);
961 }
962 proc_fasttimer_read(buf5, NULL, 0, 0, 0);
963 printk("buf5 after all done:\n");
964 printk(buf5);
965 printk("fast_timer_test() done\n");
966}
967#endif
968
969
970void fast_timer_init(void)
971{
972 /* For some reason, request_irq() hangs when called froom time_init() */
973 if (!fast_timer_is_init)
974 {
975 printk("fast_timer_init()\n");
976
977#ifdef CONFIG_PROC_FS
978#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,2,0)
979 if ((fasttimer_proc_entry = create_proc_entry( "fasttimer", 0, 0 )))
980 fasttimer_proc_entry->read_proc = proc_fasttimer_read;
981#else
982 proc_register_dynamic(&proc_root, &fasttimer_proc_entry);
983#endif
984#endif /* PROC_FS */
985 if(request_irq(TIMER_INTR_VECT, timer_trig_interrupt, SA_INTERRUPT,
986 "fast timer int", NULL))
987 {
988 printk("err: timer1 irq\n");
989 }
990 fast_timer_is_init = 1;
991#ifdef FAST_TIMER_TEST
992 printk("do test\n");
993 fast_timer_test();
994#endif
995 }
996}
diff --git a/arch/cris/arch-v32/kernel/head.S b/arch/cris/arch-v32/kernel/head.S
new file mode 100644
index 000000000000..3cfe57dc391d
--- /dev/null
+++ b/arch/cris/arch-v32/kernel/head.S
@@ -0,0 +1,448 @@
1/*
2 * CRISv32 kernel startup code.
3 *
4 * Copyright (C) 2003, Axis Communications AB
5 */
6
7#include <linux/config.h>
8
9#define ASSEMBLER_MACROS_ONLY
10
11/*
12 * The macros found in mmu_defs_asm.h uses the ## concatenation operator, so
13 * -traditional must not be used when assembling this file.
14 */
15#include <asm/arch/hwregs/reg_rdwr.h>
16#include <asm/arch/hwregs/asm/mmu_defs_asm.h>
17#include <asm/arch/hwregs/asm/reg_map_asm.h>
18#include <asm/arch/hwregs/asm/config_defs_asm.h>
19#include <asm/arch/hwregs/asm/bif_core_defs_asm.h>
20
21#define CRAMFS_MAGIC 0x28cd3d45
22#define RAM_INIT_MAGIC 0x56902387
23#define COMMAND_LINE_MAGIC 0x87109563
24
25 ;; NOTE: R8 and R9 carry information from the decompressor (if the
26 ;; kernel was compressed). They must not be used in the code below
27 ;; until they are read!
28
29 ;; Exported symbols.
30 .global etrax_irv
31 .global romfs_start
32 .global romfs_length
33 .global romfs_in_flash
34 .global swapper_pg_dir
35 .global crisv32_nand_boot
36 .global crisv32_nand_cramfs_offset
37
38 ;; Dummy section to make it bootable with current VCS simulator
39#ifdef CONFIG_ETRAXFS_SIM
40 .section ".boot", "ax"
41 ba tstart
42 nop
43#endif
44
45 .text
46tstart:
47 ;; This is the entry point of the kernel. The CPU is currently in
48 ;; supervisor mode.
49 ;;
50 ;; 0x00000000 if flash.
51 ;; 0x40004000 if DRAM.
52 ;;
53 di
54
55 ;; Start clocks for used blocks.
56 move.d REG_ADDR(config, regi_config, rw_clk_ctrl), $r1
57 move.d [$r1], $r0
58 or.d REG_STATE(config, rw_clk_ctrl, cpu, yes) | \
59 REG_STATE(config, rw_clk_ctrl, bif, yes) | \
60 REG_STATE(config, rw_clk_ctrl, fix_io, yes), $r0
61 move.d $r0, [$r1]
62
63 ;; Set up waitstates etc
64 move.d REG_ADDR(bif_core, regi_bif_core, rw_grp1_cfg), $r0
65 move.d CONFIG_ETRAX_MEM_GRP1_CONFIG, $r1
66 move.d $r1, [$r0]
67 move.d REG_ADDR(bif_core, regi_bif_core, rw_grp2_cfg), $r0
68 move.d CONFIG_ETRAX_MEM_GRP2_CONFIG, $r1
69 move.d $r1, [$r0]
70 move.d REG_ADDR(bif_core, regi_bif_core, rw_grp3_cfg), $r0
71 move.d CONFIG_ETRAX_MEM_GRP3_CONFIG, $r1
72 move.d $r1, [$r0]
73 move.d REG_ADDR(bif_core, regi_bif_core, rw_grp4_cfg), $r0
74 move.d CONFIG_ETRAX_MEM_GRP4_CONFIG, $r1
75 move.d $r1, [$r0]
76
77#ifdef CONFIG_ETRAXFS_SIM
78 ;; Set up minimal flash waitstates
79 move.d 0, $r10
80 move.d REG_ADDR(bif_core, regi_bif_core, rw_grp1_cfg), $r11
81 move.d $r10, [$r11]
82#endif
83
84 ;; Setup and enable the MMU. Use same configuration for both the data
85 ;; and the instruction MMU.
86 ;;
87 ;; Note; 3 cycles is needed for a bank-select to take effect. Further;
88 ;; bank 1 is the instruction MMU, bank 2 is the data MMU.
89#ifndef CONFIG_ETRAXFS_SIM
90 move.d REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 8) \
91 | REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 4) \
92 | REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb), $r0
93#else
94 ;; Map the virtual DRAM to the RW eprom area at address 0.
95 ;; Also map 0xa for the hook calls,
96 move.d REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 8) \
97 | REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 0) \
98 | REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb) \
99 | REG_FIELD(mmu, rw_mm_kbase_hi, base_a, 0xa), $r0
100#endif
101
102 ;; Temporary map of 0x40 -> 0x40 and 0x00 -> 0x00.
103 move.d REG_FIELD(mmu, rw_mm_kbase_lo, base_4, 4) \
104 | REG_FIELD(mmu, rw_mm_kbase_lo, base_0, 0), $r1
105
106 ;; Enable certain page protections and setup linear mapping
107 ;; for f,e,c,b,4,0.
108#ifndef CONFIG_ETRAXFS_SIM
109 move.d REG_STATE(mmu, rw_mm_cfg, we, on) \
110 | REG_STATE(mmu, rw_mm_cfg, acc, on) \
111 | REG_STATE(mmu, rw_mm_cfg, ex, on) \
112 | REG_STATE(mmu, rw_mm_cfg, inv, on) \
113 | REG_STATE(mmu, rw_mm_cfg, seg_f, linear) \
114 | REG_STATE(mmu, rw_mm_cfg, seg_e, linear) \
115 | REG_STATE(mmu, rw_mm_cfg, seg_d, page) \
116 | REG_STATE(mmu, rw_mm_cfg, seg_c, linear) \
117 | REG_STATE(mmu, rw_mm_cfg, seg_b, linear) \
118 | REG_STATE(mmu, rw_mm_cfg, seg_a, page) \
119 | REG_STATE(mmu, rw_mm_cfg, seg_9, page) \
120 | REG_STATE(mmu, rw_mm_cfg, seg_8, page) \
121 | REG_STATE(mmu, rw_mm_cfg, seg_7, page) \
122 | REG_STATE(mmu, rw_mm_cfg, seg_6, page) \
123 | REG_STATE(mmu, rw_mm_cfg, seg_5, page) \
124 | REG_STATE(mmu, rw_mm_cfg, seg_4, linear) \
125 | REG_STATE(mmu, rw_mm_cfg, seg_3, page) \
126 | REG_STATE(mmu, rw_mm_cfg, seg_2, page) \
127 | REG_STATE(mmu, rw_mm_cfg, seg_1, page) \
128 | REG_STATE(mmu, rw_mm_cfg, seg_0, linear), $r2
129#else
130 move.d REG_STATE(mmu, rw_mm_cfg, we, on) \
131 | REG_STATE(mmu, rw_mm_cfg, acc, on) \
132 | REG_STATE(mmu, rw_mm_cfg, ex, on) \
133 | REG_STATE(mmu, rw_mm_cfg, inv, on) \
134 | REG_STATE(mmu, rw_mm_cfg, seg_f, linear) \
135 | REG_STATE(mmu, rw_mm_cfg, seg_e, linear) \
136 | REG_STATE(mmu, rw_mm_cfg, seg_d, page) \
137 | REG_STATE(mmu, rw_mm_cfg, seg_c, linear) \
138 | REG_STATE(mmu, rw_mm_cfg, seg_b, linear) \
139 | REG_STATE(mmu, rw_mm_cfg, seg_a, linear) \
140 | REG_STATE(mmu, rw_mm_cfg, seg_9, page) \
141 | REG_STATE(mmu, rw_mm_cfg, seg_8, page) \
142 | REG_STATE(mmu, rw_mm_cfg, seg_7, page) \
143 | REG_STATE(mmu, rw_mm_cfg, seg_6, page) \
144 | REG_STATE(mmu, rw_mm_cfg, seg_5, page) \
145 | REG_STATE(mmu, rw_mm_cfg, seg_4, linear) \
146 | REG_STATE(mmu, rw_mm_cfg, seg_3, page) \
147 | REG_STATE(mmu, rw_mm_cfg, seg_2, page) \
148 | REG_STATE(mmu, rw_mm_cfg, seg_1, page) \
149 | REG_STATE(mmu, rw_mm_cfg, seg_0, linear), $r2
150#endif
151
152 ;; Update instruction MMU.
153 move 1, $srs
154 nop
155 nop
156 nop
157 move $r0, $s2 ; kbase_hi.
158 move $r1, $s1 ; kbase_lo.
159 move $r2, $s0 ; mm_cfg, virtual memory configuration.
160
161 ;; Update data MMU.
162 move 2, $srs
163 nop
164 nop
165 nop
166 move $r0, $s2 ; kbase_hi.
167 move $r1, $s1 ; kbase_lo
168 move $r2, $s0 ; mm_cfg, virtual memory configuration.
169
170 ;; Enable data and instruction MMU.
171 move 0, $srs
172 moveq 0xf, $r0 ; IMMU, DMMU, DCache, Icache on
173 nop
174 nop
175 nop
176 move $r0, $s0
177 nop
178 nop
179 nop
180
181#ifdef CONFIG_SMP
182 ;; Read CPU ID
183 move 0, $srs
184 nop
185 nop
186 nop
187 move $s10, $r0
188 cmpq 0, $r0
189 beq master_cpu
190 nop
191slave_cpu:
192 ; A slave waits for cpu_now_booting to be equal to CPU ID.
193 move.d cpu_now_booting, $r1
194slave_wait:
195 cmp.d [$r1], $r0
196 bne slave_wait
197 nop
198 ; Time to boot-up. Get stack location provided by master CPU.
199 move.d smp_init_current_idle_thread, $r1
200 move.d [$r1], $sp
201 add.d 8192, $sp
202 move.d ebp_start, $r0 ; Defined in linker-script.
203 move $r0, $ebp
204 jsr smp_callin
205 nop
206master_cpu:
207#endif
208#ifndef CONFIG_ETRAXFS_SIM
209 ;; Check if starting from DRAM or flash.
210 lapcq ., $r0
211 and.d 0x7fffffff, $r0 ; Mask off the non-cache bit.
212 cmp.d 0x10000, $r0 ; Arbitrary, something above this code.
213 blo _inflash0
214 nop
215#endif
216
217 jump _inram ; Jump to cached RAM.
218 nop
219
220 ;; Jumpgate.
221_inflash0:
222 jump _inflash
223 nop
224
225 ;; Put the following in a section so that storage for it can be
226 ;; reclaimed after init is finished.
227 .section ".init.text", "ax"
228
229_inflash:
230
231 ;; Initialize DRAM.
232 cmp.d RAM_INIT_MAGIC, $r8 ; Already initialized?
233 beq _dram_initialized
234 nop
235
236#include "../lib/dram_init.S"
237
238_dram_initialized:
239 ;; Copy the text and data section to DRAM. This depends on that the
240 ;; variables used below are correctly set up by the linker script.
241 ;; The calculated value stored in R4 is used below.
242 moveq 0, $r0 ; Source.
243 move.d text_start, $r1 ; Destination.
244 move.d __vmlinux_end, $r2
245 move.d $r2, $r4
246 sub.d $r1, $r4
2471: move.w [$r0+], $r3
248 move.w $r3, [$r1+]
249 cmp.d $r2, $r1
250 blo 1b
251 nop
252
253 ;; Keep CRAMFS in flash.
254 moveq 0, $r0
255 move.d romfs_length, $r1
256 move.d $r0, [$r1]
257 move.d [$r4], $r0 ; cramfs_super.magic
258 cmp.d CRAMFS_MAGIC, $r0
259 bne 1f
260 nop
261
262 addoq +4, $r4, $acr
263 move.d [$acr], $r0
264 move.d romfs_length, $r1
265 move.d $r0, [$r1]
266 add.d 0xf0000000, $r4 ; Add cached flash start in virtual memory.
267 move.d romfs_start, $r1
268 move.d $r4, [$r1]
2691: moveq 1, $r0
270 move.d romfs_in_flash, $r1
271 move.d $r0, [$r1]
272
273 jump _start_it ; Jump to cached code.
274 nop
275
276_inram:
277 ;; Check if booting from NAND flash (in that case we just remember the offset
278 ;; into the flash where cramfs should be).
279 move.d REG_ADDR(config, regi_config, r_bootsel), $r0
280 move.d [$r0], $r0
281 and.d REG_MASK(config, r_bootsel, boot_mode), $r0
282 cmp.d REG_STATE(config, r_bootsel, boot_mode, nand), $r0
283 bne move_cramfs
284 moveq 1,$r0
285 move.d crisv32_nand_boot, $r1
286 move.d $r0, [$r1]
287 move.d crisv32_nand_cramfs_offset, $r1
288 move.d $r9, [$r1]
289 moveq 1, $r0
290 move.d romfs_in_flash, $r1
291 move.d $r0, [$r1]
292 jump _start_it
293 nop
294
295move_cramfs:
296 ;; Move the cramfs after BSS.
297 moveq 0, $r0
298 move.d romfs_length, $r1
299 move.d $r0, [$r1]
300
301#ifndef CONFIG_ETRAXFS_SIM
302 ;; The kernel could have been unpacked to DRAM by the loader, but
303 ;; the cramfs image could still be inte the flash immediately
304 ;; following the compressed kernel image. The loaded passes the address
305 ;; of the bute succeeding the last compressed byte in the flash in
306 ;; register R9 when starting the kernel.
307 cmp.d 0x0ffffff8, $r9
308 bhs _no_romfs_in_flash ; R9 points outside the flash area.
309 nop
310#else
311 ba _no_romfs_in_flash
312 nop
313#endif
314 move.d [$r9], $r0 ; cramfs_super.magic
315 cmp.d CRAMFS_MAGIC, $r0
316 bne _no_romfs_in_flash
317 nop
318
319 addoq +4, $r9, $acr
320 move.d [$acr], $r0
321 move.d romfs_length, $r1
322 move.d $r0, [$r1]
323 add.d 0xf0000000, $r9 ; Add cached flash start in virtual memory.
324 move.d romfs_start, $r1
325 move.d $r9, [$r1]
326 moveq 1, $r0
327 move.d romfs_in_flash, $r1
328 move.d $r0, [$r1]
329
330 jump _start_it ; Jump to cached code.
331 nop
332
333_no_romfs_in_flash:
334 ;; Look for cramfs.
335#ifndef CONFIG_ETRAXFS_SIM
336 move.d __vmlinux_end, $r0
337#else
338 move.d __end, $r0
339#endif
340 move.d [$r0], $r1
341 cmp.d CRAMFS_MAGIC, $r1
342 bne 2f
343 nop
344
345 addoq +4, $r0, $acr
346 move.d [$acr], $r2
347 move.d _end, $r1
348 move.d romfs_start, $r3
349 move.d $r1, [$r3]
350 move.d romfs_length, $r3
351 move.d $r2, [$r3]
352
353#ifndef CONFIG_ETRAXFS_SIM
354 add.d $r2, $r0
355 add.d $r2, $r1
356
357 lsrq 1, $r2 ; Size is in bytes, we copy words.
358 addq 1, $r2
3591:
360 move.w [$r0], $r3
361 move.w $r3, [$r1]
362 subq 2, $r0
363 subq 2, $r1
364 subq 1, $r2
365 bne 1b
366 nop
367#endif
368
3692:
370 moveq 0, $r0
371 move.d romfs_in_flash, $r1
372 move.d $r0, [$r1]
373
374 jump _start_it ; Jump to cached code.
375 nop
376
377_start_it:
378
379 ;; Check if kernel command line is supplied
380 cmp.d COMMAND_LINE_MAGIC, $r10
381 bne no_command_line
382 nop
383
384 move.d 256, $r13
385 move.d cris_command_line, $r10
386 or.d 0x80000000, $r11 ; Make it virtual
3871:
388 move.b [$r11+], $r12
389 move.b $r12, [$r10+]
390 subq 1, $r13
391 bne 1b
392 nop
393
394no_command_line:
395
396 ;; The kernel stack contains a task structure for each task. This
397 ;; the initial kernel stack is in the same page as the init_task,
398 ;; but starts at the top of the page, i.e. + 8192 bytes.
399 move.d init_thread_union + 8192, $sp
400 move.d ebp_start, $r0 ; Defined in linker-script.
401 move $r0, $ebp
402 move.d etrax_irv, $r1 ; Set the exception base register and pointer.
403 move.d $r0, [$r1]
404
405#ifndef CONFIG_ETRAXFS_SIM
406 ;; Clear the BSS region from _bss_start to _end.
407 move.d __bss_start, $r0
408 move.d _end, $r1
4091: clear.d [$r0+]
410 cmp.d $r1, $r0
411 blo 1b
412 nop
413#endif
414
415#ifdef CONFIG_ETRAXFS_SIM
416 /* Set the watchdog timeout to something big. Will be removed when */
417 /* watchdog can be disabled with command line option */
418 move.d 0x7fffffff, $r10
419 jsr CPU_WATCHDOG_TIMEOUT
420 nop
421#endif
422
423 ; Initialize registers to increase determinism
424 move.d __bss_start, $r0
425 movem [$r0], $r13
426
427 jump start_kernel ; Jump to start_kernel() in init/main.c.
428 nop
429
430 .data
431etrax_irv:
432 .dword 0
433romfs_start:
434 .dword 0
435romfs_length:
436 .dword 0
437romfs_in_flash:
438 .dword 0
439crisv32_nand_boot:
440 .dword 0
441crisv32_nand_cramfs_offset:
442 .dword 0
443
444swapper_pg_dir = 0xc0002000
445
446 .section ".init.data", "aw"
447
448#include "../lib/hw_settings.S"
diff --git a/arch/cris/arch-v32/kernel/io.c b/arch/cris/arch-v32/kernel/io.c
new file mode 100644
index 000000000000..6bc9f263c3d6
--- /dev/null
+++ b/arch/cris/arch-v32/kernel/io.c
@@ -0,0 +1,154 @@
1/*
2 * Helper functions for I/O pins.
3 *
4 * Copyright (c) 2004 Axis Communications AB.
5 */
6
7#include <linux/config.h>
8#include <linux/types.h>
9#include <linux/errno.h>
10#include <linux/init.h>
11#include <linux/string.h>
12#include <linux/ctype.h>
13#include <linux/kernel.h>
14#include <linux/module.h>
15#include <asm/io.h>
16#include <asm/arch/pinmux.h>
17#include <asm/arch/hwregs/gio_defs.h>
18
19struct crisv32_ioport crisv32_ioports[] =
20{
21 {
22 (unsigned long*)REG_ADDR(gio, regi_gio, rw_pa_oe),
23 (unsigned long*)REG_ADDR(gio, regi_gio, rw_pa_dout),
24 (unsigned long*)REG_ADDR(gio, regi_gio, r_pa_din),
25 8
26 },
27 {
28 (unsigned long*)REG_ADDR(gio, regi_gio, rw_pb_oe),
29 (unsigned long*)REG_ADDR(gio, regi_gio, rw_pb_dout),
30 (unsigned long*)REG_ADDR(gio, regi_gio, r_pb_din),
31 18
32 },
33 {
34 (unsigned long*)REG_ADDR(gio, regi_gio, rw_pc_oe),
35 (unsigned long*)REG_ADDR(gio, regi_gio, rw_pc_dout),
36 (unsigned long*)REG_ADDR(gio, regi_gio, r_pc_din),
37 18
38 },
39 {
40 (unsigned long*)REG_ADDR(gio, regi_gio, rw_pd_oe),
41 (unsigned long*)REG_ADDR(gio, regi_gio, rw_pd_dout),
42 (unsigned long*)REG_ADDR(gio, regi_gio, r_pd_din),
43 18
44 },
45 {
46 (unsigned long*)REG_ADDR(gio, regi_gio, rw_pe_oe),
47 (unsigned long*)REG_ADDR(gio, regi_gio, rw_pe_dout),
48 (unsigned long*)REG_ADDR(gio, regi_gio, r_pe_din),
49 18
50 }
51};
52
53#define NBR_OF_PORTS sizeof(crisv32_ioports)/sizeof(struct crisv32_ioport)
54
55struct crisv32_iopin crisv32_led1_green;
56struct crisv32_iopin crisv32_led1_red;
57struct crisv32_iopin crisv32_led2_green;
58struct crisv32_iopin crisv32_led2_red;
59struct crisv32_iopin crisv32_led3_green;
60struct crisv32_iopin crisv32_led3_red;
61
62/* Dummy port used when green LED and red LED is on the same bit */
63static unsigned long io_dummy;
64static struct crisv32_ioport dummy_port =
65{
66 &io_dummy,
67 &io_dummy,
68 &io_dummy,
69 18
70};
71static struct crisv32_iopin dummy_led =
72{
73 &dummy_port,
74 0
75};
76
77static int __init crisv32_io_init(void)
78{
79 int ret = 0;
80 /* Initialize LEDs */
81 ret += crisv32_io_get_name(&crisv32_led1_green, CONFIG_ETRAX_LED1G);
82 ret += crisv32_io_get_name(&crisv32_led1_red, CONFIG_ETRAX_LED1R);
83 ret += crisv32_io_get_name(&crisv32_led2_green, CONFIG_ETRAX_LED2G);
84 ret += crisv32_io_get_name(&crisv32_led2_red, CONFIG_ETRAX_LED2R);
85 ret += crisv32_io_get_name(&crisv32_led3_green, CONFIG_ETRAX_LED3G);
86 ret += crisv32_io_get_name(&crisv32_led3_red, CONFIG_ETRAX_LED3R);
87 crisv32_io_set_dir(&crisv32_led1_green, crisv32_io_dir_out);
88 crisv32_io_set_dir(&crisv32_led1_red, crisv32_io_dir_out);
89 crisv32_io_set_dir(&crisv32_led2_green, crisv32_io_dir_out);
90 crisv32_io_set_dir(&crisv32_led2_red, crisv32_io_dir_out);
91 crisv32_io_set_dir(&crisv32_led3_green, crisv32_io_dir_out);
92 crisv32_io_set_dir(&crisv32_led3_red, crisv32_io_dir_out);
93
94 if (!strcmp(CONFIG_ETRAX_LED1G, CONFIG_ETRAX_LED1R))
95 crisv32_led1_red = dummy_led;
96 if (!strcmp(CONFIG_ETRAX_LED2G, CONFIG_ETRAX_LED2R))
97 crisv32_led2_red = dummy_led;
98
99 return ret;
100}
101
102__initcall(crisv32_io_init);
103
104int crisv32_io_get(struct crisv32_iopin* iopin,
105 unsigned int port, unsigned int pin)
106{
107 if (port > NBR_OF_PORTS)
108 return -EINVAL;
109 if (port > crisv32_ioports[port].pin_count)
110 return -EINVAL;
111
112 iopin->bit = 1 << pin;
113 iopin->port = &crisv32_ioports[port];
114
115 if (crisv32_pinmux_alloc(port, pin, pin, pinmux_gpio))
116 return -EIO;
117
118 return 0;
119}
120
121int crisv32_io_get_name(struct crisv32_iopin* iopin,
122 char* name)
123{
124 int port;
125 int pin;
126
127 if (toupper(*name) == 'P')
128 name++;
129
130 if (toupper(*name) < 'A' || toupper(*name) > 'E')
131 return -EINVAL;
132
133 port = toupper(*name) - 'A';
134 name++;
135 pin = simple_strtoul(name, NULL, 10);
136
137 if (pin < 0 || pin > crisv32_ioports[port].pin_count)
138 return -EINVAL;
139
140 iopin->bit = 1 << pin;
141 iopin->port = &crisv32_ioports[port];
142
143 if (crisv32_pinmux_alloc(port, pin, pin, pinmux_gpio))
144 return -EIO;
145
146 return 0;
147}
148
149#ifdef CONFIG_PCI
150/* PCI I/O access stuff */
151struct cris_io_operations* cris_iops = NULL;
152EXPORT_SYMBOL(cris_iops);
153#endif
154
diff --git a/arch/cris/arch-v32/kernel/irq.c b/arch/cris/arch-v32/kernel/irq.c
new file mode 100644
index 000000000000..c78cc2685133
--- /dev/null
+++ b/arch/cris/arch-v32/kernel/irq.c
@@ -0,0 +1,413 @@
1/*
2 * Copyright (C) 2003, Axis Communications AB.
3 */
4
5#include <asm/irq.h>
6#include <linux/irq.h>
7#include <linux/interrupt.h>
8#include <linux/smp.h>
9#include <linux/config.h>
10#include <linux/kernel.h>
11#include <linux/errno.h>
12#include <linux/init.h>
13#include <linux/profile.h>
14#include <linux/proc_fs.h>
15#include <linux/seq_file.h>
16#include <linux/threads.h>
17#include <linux/spinlock.h>
18#include <linux/kernel_stat.h>
19#include <asm/arch/hwregs/reg_map.h>
20#include <asm/arch/hwregs/reg_rdwr.h>
21#include <asm/arch/hwregs/intr_vect.h>
22#include <asm/arch/hwregs/intr_vect_defs.h>
23
24#define CPU_FIXED -1
25
26/* IRQ masks (refer to comment for crisv32_do_multiple) */
27#define TIMER_MASK (1 << (TIMER_INTR_VECT - FIRST_IRQ))
28#ifdef CONFIG_ETRAX_KGDB
29#if defined(CONFIG_ETRAX_KGDB_PORT0)
30#define IGNOREMASK (1 << (SER0_INTR_VECT - FIRST_IRQ))
31#elif defined(CONFIG_ETRAX_KGDB_PORT1)
32#define IGNOREMASK (1 << (SER1_INTR_VECT - FIRST_IRQ))
33#elif defined(CONFIG_ETRAX_KGB_PORT2)
34#define IGNOREMASK (1 << (SER2_INTR_VECT - FIRST_IRQ))
35#elif defined(CONFIG_ETRAX_KGDB_PORT3)
36#define IGNOREMASK (1 << (SER3_INTR_VECT - FIRST_IRQ))
37#endif
38#endif
39
40DEFINE_SPINLOCK(irq_lock);
41
42struct cris_irq_allocation
43{
44 int cpu; /* The CPU to which the IRQ is currently allocated. */
45 cpumask_t mask; /* The CPUs to which the IRQ may be allocated. */
46};
47
48struct cris_irq_allocation irq_allocations[NR_IRQS] =
49 {[0 ... NR_IRQS - 1] = {0, CPU_MASK_ALL}};
50
51static unsigned long irq_regs[NR_CPUS] =
52{
53 regi_irq,
54#ifdef CONFIG_SMP
55 regi_irq2,
56#endif
57};
58
59unsigned long cpu_irq_counters[NR_CPUS];
60unsigned long irq_counters[NR_REAL_IRQS];
61
62/* From irq.c. */
63extern void weird_irq(void);
64
65/* From entry.S. */
66extern void system_call(void);
67extern void nmi_interrupt(void);
68extern void multiple_interrupt(void);
69extern void gdb_handle_exception(void);
70extern void i_mmu_refill(void);
71extern void i_mmu_invalid(void);
72extern void i_mmu_access(void);
73extern void i_mmu_execute(void);
74extern void d_mmu_refill(void);
75extern void d_mmu_invalid(void);
76extern void d_mmu_access(void);
77extern void d_mmu_write(void);
78
79/* From kgdb.c. */
80extern void kgdb_init(void);
81extern void breakpoint(void);
82
83/*
84 * Build the IRQ handler stubs using macros from irq.h. First argument is the
85 * IRQ number, the second argument is the corresponding bit in
86 * intr_rw_vect_mask found in asm/arch/hwregs/intr_vect_defs.h.
87 */
88BUILD_IRQ(0x31, (1 << 0)) /* memarb */
89BUILD_IRQ(0x32, (1 << 1)) /* gen_io */
90BUILD_IRQ(0x33, (1 << 2)) /* iop0 */
91BUILD_IRQ(0x34, (1 << 3)) /* iop1 */
92BUILD_IRQ(0x35, (1 << 4)) /* iop2 */
93BUILD_IRQ(0x36, (1 << 5)) /* iop3 */
94BUILD_IRQ(0x37, (1 << 6)) /* dma0 */
95BUILD_IRQ(0x38, (1 << 7)) /* dma1 */
96BUILD_IRQ(0x39, (1 << 8)) /* dma2 */
97BUILD_IRQ(0x3a, (1 << 9)) /* dma3 */
98BUILD_IRQ(0x3b, (1 << 10)) /* dma4 */
99BUILD_IRQ(0x3c, (1 << 11)) /* dma5 */
100BUILD_IRQ(0x3d, (1 << 12)) /* dma6 */
101BUILD_IRQ(0x3e, (1 << 13)) /* dma7 */
102BUILD_IRQ(0x3f, (1 << 14)) /* dma8 */
103BUILD_IRQ(0x40, (1 << 15)) /* dma9 */
104BUILD_IRQ(0x41, (1 << 16)) /* ata */
105BUILD_IRQ(0x42, (1 << 17)) /* sser0 */
106BUILD_IRQ(0x43, (1 << 18)) /* sser1 */
107BUILD_IRQ(0x44, (1 << 19)) /* ser0 */
108BUILD_IRQ(0x45, (1 << 20)) /* ser1 */
109BUILD_IRQ(0x46, (1 << 21)) /* ser2 */
110BUILD_IRQ(0x47, (1 << 22)) /* ser3 */
111BUILD_IRQ(0x48, (1 << 23))
112BUILD_IRQ(0x49, (1 << 24)) /* eth0 */
113BUILD_IRQ(0x4a, (1 << 25)) /* eth1 */
114BUILD_TIMER_IRQ(0x4b, (1 << 26))/* timer */
115BUILD_IRQ(0x4c, (1 << 27)) /* bif_arb */
116BUILD_IRQ(0x4d, (1 << 28)) /* bif_dma */
117BUILD_IRQ(0x4e, (1 << 29)) /* ext */
118BUILD_IRQ(0x4f, (1 << 29)) /* ipi */
119
120/* Pointers to the low-level handlers. */
121static void (*interrupt[NR_IRQS])(void) = {
122 IRQ0x31_interrupt, IRQ0x32_interrupt, IRQ0x33_interrupt,
123 IRQ0x34_interrupt, IRQ0x35_interrupt, IRQ0x36_interrupt,
124 IRQ0x37_interrupt, IRQ0x38_interrupt, IRQ0x39_interrupt,
125 IRQ0x3a_interrupt, IRQ0x3b_interrupt, IRQ0x3c_interrupt,
126 IRQ0x3d_interrupt, IRQ0x3e_interrupt, IRQ0x3f_interrupt,
127 IRQ0x40_interrupt, IRQ0x41_interrupt, IRQ0x42_interrupt,
128 IRQ0x43_interrupt, IRQ0x44_interrupt, IRQ0x45_interrupt,
129 IRQ0x46_interrupt, IRQ0x47_interrupt, IRQ0x48_interrupt,
130 IRQ0x49_interrupt, IRQ0x4a_interrupt, IRQ0x4b_interrupt,
131 IRQ0x4c_interrupt, IRQ0x4d_interrupt, IRQ0x4e_interrupt,
132 IRQ0x4f_interrupt
133};
134
135void
136block_irq(int irq, int cpu)
137{
138 int intr_mask;
139 unsigned long flags;
140
141 spin_lock_irqsave(&irq_lock, flags);
142 intr_mask = REG_RD_INT(intr_vect, irq_regs[cpu], rw_mask);
143
144 /* Remember; 1 let thru, 0 block. */
145 intr_mask &= ~(1 << (irq - FIRST_IRQ));
146
147 REG_WR_INT(intr_vect, irq_regs[cpu], rw_mask, intr_mask);
148 spin_unlock_irqrestore(&irq_lock, flags);
149}
150
151void
152unblock_irq(int irq, int cpu)
153{
154 int intr_mask;
155 unsigned long flags;
156
157 spin_lock_irqsave(&irq_lock, flags);
158 intr_mask = REG_RD_INT(intr_vect, irq_regs[cpu], rw_mask);
159
160 /* Remember; 1 let thru, 0 block. */
161 intr_mask |= (1 << (irq - FIRST_IRQ));
162
163 REG_WR_INT(intr_vect, irq_regs[cpu], rw_mask, intr_mask);
164 spin_unlock_irqrestore(&irq_lock, flags);
165}
166
167/* Find out which CPU the irq should be allocated to. */
168static int irq_cpu(int irq)
169{
170 int cpu;
171 unsigned long flags;
172
173 spin_lock_irqsave(&irq_lock, flags);
174 cpu = irq_allocations[irq - FIRST_IRQ].cpu;
175
176 /* Fixed interrupts stay on the local CPU. */
177 if (cpu == CPU_FIXED)
178 {
179 spin_unlock_irqrestore(&irq_lock, flags);
180 return smp_processor_id();
181 }
182
183
184 /* Let the interrupt stay if possible */
185 if (cpu_isset(cpu, irq_allocations[irq - FIRST_IRQ].mask))
186 goto out;
187
188 /* IRQ must be moved to another CPU. */
189 cpu = first_cpu(irq_allocations[irq - FIRST_IRQ].mask);
190 irq_allocations[irq - FIRST_IRQ].cpu = cpu;
191out:
192 spin_unlock_irqrestore(&irq_lock, flags);
193 return cpu;
194}
195
196void
197mask_irq(int irq)
198{
199 int cpu;
200
201 for (cpu = 0; cpu < NR_CPUS; cpu++)
202 block_irq(irq, cpu);
203}
204
205void
206unmask_irq(int irq)
207{
208 unblock_irq(irq, irq_cpu(irq));
209}
210
211
212static unsigned int startup_crisv32_irq(unsigned int irq)
213{
214 unmask_irq(irq);
215 return 0;
216}
217
218static void shutdown_crisv32_irq(unsigned int irq)
219{
220 mask_irq(irq);
221}
222
223static void enable_crisv32_irq(unsigned int irq)
224{
225 unmask_irq(irq);
226}
227
228static void disable_crisv32_irq(unsigned int irq)
229{
230 mask_irq(irq);
231}
232
233static void ack_crisv32_irq(unsigned int irq)
234{
235}
236
237static void end_crisv32_irq(unsigned int irq)
238{
239}
240
241void set_affinity_crisv32_irq(unsigned int irq, cpumask_t dest)
242{
243 unsigned long flags;
244 spin_lock_irqsave(&irq_lock, flags);
245 irq_allocations[irq - FIRST_IRQ].mask = dest;
246 spin_unlock_irqrestore(&irq_lock, flags);
247}
248
249static struct hw_interrupt_type crisv32_irq_type = {
250 .typename = "CRISv32",
251 .startup = startup_crisv32_irq,
252 .shutdown = shutdown_crisv32_irq,
253 .enable = enable_crisv32_irq,
254 .disable = disable_crisv32_irq,
255 .ack = ack_crisv32_irq,
256 .end = end_crisv32_irq,
257 .set_affinity = set_affinity_crisv32_irq
258};
259
260void
261set_exception_vector(int n, irqvectptr addr)
262{
263 etrax_irv->v[n] = (irqvectptr) addr;
264}
265
266extern void do_IRQ(int irq, struct pt_regs * regs);
267
268void
269crisv32_do_IRQ(int irq, int block, struct pt_regs* regs)
270{
271 /* Interrupts that may not be moved to another CPU and
272 * are SA_INTERRUPT may skip blocking. This is currently
273 * only valid for the timer IRQ and the IPI and is used
274 * for the timer interrupt to avoid watchdog starvation.
275 */
276 if (!block) {
277 do_IRQ(irq, regs);
278 return;
279 }
280
281 block_irq(irq, smp_processor_id());
282 do_IRQ(irq, regs);
283
284 unblock_irq(irq, irq_cpu(irq));
285}
286
287/* If multiple interrupts occur simultaneously we get a multiple
288 * interrupt from the CPU and software has to sort out which
289 * interrupts that happened. There are two special cases here:
290 *
291 * 1. Timer interrupts may never be blocked because of the
292 * watchdog (refer to comment in include/asr/arch/irq.h)
293 * 2. GDB serial port IRQs are unhandled here and will be handled
294 * as a single IRQ when it strikes again because the GDB
295 * stubb wants to save the registers in its own fashion.
296 */
297void
298crisv32_do_multiple(struct pt_regs* regs)
299{
300 int cpu;
301 int mask;
302 int masked;
303 int bit;
304
305 cpu = smp_processor_id();
306
307 /* An extra irq_enter here to prevent softIRQs to run after
308 * each do_IRQ. This will decrease the interrupt latency.
309 */
310 irq_enter();
311
312 /* Get which IRQs that happend. */
313 masked = REG_RD_INT(intr_vect, irq_regs[cpu], r_masked_vect);
314
315 /* Calculate new IRQ mask with these IRQs disabled. */
316 mask = REG_RD_INT(intr_vect, irq_regs[cpu], rw_mask);
317 mask &= ~masked;
318
319 /* Timer IRQ is never masked */
320 if (masked & TIMER_MASK)
321 mask |= TIMER_MASK;
322
323 /* Block all the IRQs */
324 REG_WR_INT(intr_vect, irq_regs[cpu], rw_mask, mask);
325
326 /* Check for timer IRQ and handle it special. */
327 if (masked & TIMER_MASK) {
328 masked &= ~TIMER_MASK;
329 do_IRQ(TIMER_INTR_VECT, regs);
330 }
331
332#ifdef IGNORE_MASK
333 /* Remove IRQs that can't be handled as multiple. */
334 masked &= ~IGNORE_MASK;
335#endif
336
337 /* Handle the rest of the IRQs. */
338 for (bit = 0; bit < 32; bit++)
339 {
340 if (masked & (1 << bit))
341 do_IRQ(bit + FIRST_IRQ, regs);
342 }
343
344 /* Unblock all the IRQs. */
345 mask = REG_RD_INT(intr_vect, irq_regs[cpu], rw_mask);
346 mask |= masked;
347 REG_WR_INT(intr_vect, irq_regs[cpu], rw_mask, mask);
348
349 /* This irq_exit() will trigger the soft IRQs. */
350 irq_exit();
351}
352
353/*
354 * This is called by start_kernel. It fixes the IRQ masks and setup the
355 * interrupt vector table to point to bad_interrupt pointers.
356 */
357void __init
358init_IRQ(void)
359{
360 int i;
361 int j;
362 reg_intr_vect_rw_mask vect_mask = {0};
363
364 /* Clear all interrupts masks. */
365 REG_WR(intr_vect, regi_irq, rw_mask, vect_mask);
366
367 for (i = 0; i < 256; i++)
368 etrax_irv->v[i] = weird_irq;
369
370 /* Point all IRQ's to bad handlers. */
371 for (i = FIRST_IRQ, j = 0; j < NR_IRQS; i++, j++) {
372 irq_desc[j].handler = &crisv32_irq_type;
373 set_exception_vector(i, interrupt[j]);
374 }
375
376 /* Mark Timer and IPI IRQs as CPU local */
377 irq_allocations[TIMER_INTR_VECT - FIRST_IRQ].cpu = CPU_FIXED;
378 irq_desc[TIMER_INTR_VECT].status |= IRQ_PER_CPU;
379 irq_allocations[IPI_INTR_VECT - FIRST_IRQ].cpu = CPU_FIXED;
380 irq_desc[IPI_INTR_VECT].status |= IRQ_PER_CPU;
381
382 set_exception_vector(0x00, nmi_interrupt);
383 set_exception_vector(0x30, multiple_interrupt);
384
385 /* Set up handler for various MMU bus faults. */
386 set_exception_vector(0x04, i_mmu_refill);
387 set_exception_vector(0x05, i_mmu_invalid);
388 set_exception_vector(0x06, i_mmu_access);
389 set_exception_vector(0x07, i_mmu_execute);
390 set_exception_vector(0x08, d_mmu_refill);
391 set_exception_vector(0x09, d_mmu_invalid);
392 set_exception_vector(0x0a, d_mmu_access);
393 set_exception_vector(0x0b, d_mmu_write);
394
395 /* The system-call trap is reached by "break 13". */
396 set_exception_vector(0x1d, system_call);
397
398 /* Exception handlers for debugging, both user-mode and kernel-mode. */
399
400 /* Break 8. */
401 set_exception_vector(0x18, gdb_handle_exception);
402 /* Hardware single step. */
403 set_exception_vector(0x3, gdb_handle_exception);
404 /* Hardware breakpoint. */
405 set_exception_vector(0xc, gdb_handle_exception);
406
407#ifdef CONFIG_ETRAX_KGDB
408 kgdb_init();
409 /* Everything is set up; now trap the kernel. */
410 breakpoint();
411#endif
412}
413
diff --git a/arch/cris/arch-v32/kernel/kgdb.c b/arch/cris/arch-v32/kernel/kgdb.c
new file mode 100644
index 000000000000..480e56348be2
--- /dev/null
+++ b/arch/cris/arch-v32/kernel/kgdb.c
@@ -0,0 +1,1660 @@
1/*
2 * arch/cris/arch-v32/kernel/kgdb.c
3 *
4 * CRIS v32 version by Orjan Friberg, Axis Communications AB.
5 *
6 * S390 version
7 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
8 * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 *
10 * Originally written by Glenn Engel, Lake Stevens Instrument Division
11 *
12 * Contributed by HP Systems
13 *
14 * Modified for SPARC by Stu Grossman, Cygnus Support.
15 *
16 * Modified for Linux/MIPS (and MIPS in general) by Andreas Busse
17 * Send complaints, suggestions etc. to <andy@waldorf-gmbh.de>
18 *
19 * Copyright (C) 1995 Andreas Busse
20 */
21
22/* FIXME: Check the documentation. */
23
24/*
25 * kgdb usage notes:
26 * -----------------
27 *
28 * If you select CONFIG_ETRAX_KGDB in the configuration, the kernel will be
29 * built with different gcc flags: "-g" is added to get debug infos, and
30 * "-fomit-frame-pointer" is omitted to make debugging easier. Since the
31 * resulting kernel will be quite big (approx. > 7 MB), it will be stripped
32 * before compresion. Such a kernel will behave just as usually, except if
33 * given a "debug=<device>" command line option. (Only serial devices are
34 * allowed for <device>, i.e. no printers or the like; possible values are
35 * machine depedend and are the same as for the usual debug device, the one
36 * for logging kernel messages.) If that option is given and the device can be
37 * initialized, the kernel will connect to the remote gdb in trap_init(). The
38 * serial parameters are fixed to 8N1 and 115200 bps, for easyness of
39 * implementation.
40 *
41 * To start a debugging session, start that gdb with the debugging kernel
42 * image (the one with the symbols, vmlinux.debug) named on the command line.
43 * This file will be used by gdb to get symbol and debugging infos about the
44 * kernel. Next, select remote debug mode by
45 * target remote <device>
46 * where <device> is the name of the serial device over which the debugged
47 * machine is connected. Maybe you have to adjust the baud rate by
48 * set remotebaud <rate>
49 * or also other parameters with stty:
50 * shell stty ... </dev/...
51 * If the kernel to debug has already booted, it waited for gdb and now
52 * connects, and you'll see a breakpoint being reported. If the kernel isn't
53 * running yet, start it now. The order of gdb and the kernel doesn't matter.
54 * Another thing worth knowing about in the getting-started phase is how to
55 * debug the remote protocol itself. This is activated with
56 * set remotedebug 1
57 * gdb will then print out each packet sent or received. You'll also get some
58 * messages about the gdb stub on the console of the debugged machine.
59 *
60 * If all that works, you can use lots of the usual debugging techniques on
61 * the kernel, e.g. inspecting and changing variables/memory, setting
62 * breakpoints, single stepping and so on. It's also possible to interrupt the
63 * debugged kernel by pressing C-c in gdb. Have fun! :-)
64 *
65 * The gdb stub is entered (and thus the remote gdb gets control) in the
66 * following situations:
67 *
68 * - If breakpoint() is called. This is just after kgdb initialization, or if
69 * a breakpoint() call has been put somewhere into the kernel source.
70 * (Breakpoints can of course also be set the usual way in gdb.)
71 * In eLinux, we call breakpoint() in init/main.c after IRQ initialization.
72 *
73 * - If there is a kernel exception, i.e. bad_super_trap() or die_if_kernel()
74 * are entered. All the CPU exceptions are mapped to (more or less..., see
75 * the hard_trap_info array below) appropriate signal, which are reported
76 * to gdb. die_if_kernel() is usually called after some kind of access
77 * error and thus is reported as SIGSEGV.
78 *
79 * - When panic() is called. This is reported as SIGABRT.
80 *
81 * - If C-c is received over the serial line, which is treated as
82 * SIGINT.
83 *
84 * Of course, all these signals are just faked for gdb, since there is no
85 * signal concept as such for the kernel. It also isn't possible --obviously--
86 * to set signal handlers from inside gdb, or restart the kernel with a
87 * signal.
88 *
89 * Current limitations:
90 *
91 * - While the kernel is stopped, interrupts are disabled for safety reasons
92 * (i.e., variables not changing magically or the like). But this also
93 * means that the clock isn't running anymore, and that interrupts from the
94 * hardware may get lost/not be served in time. This can cause some device
95 * errors...
96 *
97 * - When single-stepping, only one instruction of the current thread is
98 * executed, but interrupts are allowed for that time and will be serviced
99 * if pending. Be prepared for that.
100 *
101 * - All debugging happens in kernel virtual address space. There's no way to
102 * access physical memory not mapped in kernel space, or to access user
103 * space. A way to work around this is using get_user_long & Co. in gdb
104 * expressions, but only for the current process.
105 *
106 * - Interrupting the kernel only works if interrupts are currently allowed,
107 * and the interrupt of the serial line isn't blocked by some other means
108 * (IPL too high, disabled, ...)
109 *
110 * - The gdb stub is currently not reentrant, i.e. errors that happen therein
111 * (e.g. accessing invalid memory) may not be caught correctly. This could
112 * be removed in future by introducing a stack of struct registers.
113 *
114 */
115
116/*
117 * To enable debugger support, two things need to happen. One, a
118 * call to kgdb_init() is necessary in order to allow any breakpoints
119 * or error conditions to be properly intercepted and reported to gdb.
120 * Two, a breakpoint needs to be generated to begin communication. This
121 * is most easily accomplished by a call to breakpoint().
122 *
123 * The following gdb commands are supported:
124 *
125 * command function Return value
126 *
127 * g return the value of the CPU registers hex data or ENN
128 * G set the value of the CPU registers OK or ENN
129 *
130 * mAA..AA,LLLL Read LLLL bytes at address AA..AA hex data or ENN
131 * MAA..AA,LLLL: Write LLLL bytes at address AA.AA OK or ENN
132 *
133 * c Resume at current address SNN ( signal NN)
134 * cAA..AA Continue at address AA..AA SNN
135 *
136 * s Step one instruction SNN
137 * sAA..AA Step one instruction from AA..AA SNN
138 *
139 * k kill
140 *
141 * ? What was the last sigval ? SNN (signal NN)
142 *
143 * bBB..BB Set baud rate to BB..BB OK or BNN, then sets
144 * baud rate
145 *
146 * All commands and responses are sent with a packet which includes a
147 * checksum. A packet consists of
148 *
149 * $<packet info>#<checksum>.
150 *
151 * where
152 * <packet info> :: <characters representing the command or response>
153 * <checksum> :: < two hex digits computed as modulo 256 sum of <packetinfo>>
154 *
155 * When a packet is received, it is first acknowledged with either '+' or '-'.
156 * '+' indicates a successful transfer. '-' indicates a failed transfer.
157 *
158 * Example:
159 *
160 * Host: Reply:
161 * $m0,10#2a +$00010203040506070809101112131415#42
162 *
163 */
164
165
166#include <linux/string.h>
167#include <linux/signal.h>
168#include <linux/kernel.h>
169#include <linux/delay.h>
170#include <linux/linkage.h>
171#include <linux/reboot.h>
172
173#include <asm/setup.h>
174#include <asm/ptrace.h>
175
176#include <asm/irq.h>
177#include <asm/arch/hwregs/reg_map.h>
178#include <asm/arch/hwregs/reg_rdwr.h>
179#include <asm/arch/hwregs/intr_vect_defs.h>
180#include <asm/arch/hwregs/ser_defs.h>
181
182/* From entry.S. */
183extern void gdb_handle_exception(void);
184/* From kgdb_asm.S. */
185extern void kgdb_handle_exception(void);
186
187static int kgdb_started = 0;
188
189/********************************* Register image ****************************/
190
191typedef
192struct register_image
193{
194 /* Offset */
195 unsigned int r0; /* 0x00 */
196 unsigned int r1; /* 0x04 */
197 unsigned int r2; /* 0x08 */
198 unsigned int r3; /* 0x0C */
199 unsigned int r4; /* 0x10 */
200 unsigned int r5; /* 0x14 */
201 unsigned int r6; /* 0x18 */
202 unsigned int r7; /* 0x1C */
203 unsigned int r8; /* 0x20; Frame pointer (if any) */
204 unsigned int r9; /* 0x24 */
205 unsigned int r10; /* 0x28 */
206 unsigned int r11; /* 0x2C */
207 unsigned int r12; /* 0x30 */
208 unsigned int r13; /* 0x34 */
209 unsigned int sp; /* 0x38; R14, Stack pointer */
210 unsigned int acr; /* 0x3C; R15, Address calculation register. */
211
212 unsigned char bz; /* 0x40; P0, 8-bit zero register */
213 unsigned char vr; /* 0x41; P1, Version register (8-bit) */
214 unsigned int pid; /* 0x42; P2, Process ID */
215 unsigned char srs; /* 0x46; P3, Support register select (8-bit) */
216 unsigned short wz; /* 0x47; P4, 16-bit zero register */
217 unsigned int exs; /* 0x49; P5, Exception status */
218 unsigned int eda; /* 0x4D; P6, Exception data address */
219 unsigned int mof; /* 0x51; P7, Multiply overflow register */
220 unsigned int dz; /* 0x55; P8, 32-bit zero register */
221 unsigned int ebp; /* 0x59; P9, Exception base pointer */
222 unsigned int erp; /* 0x5D; P10, Exception return pointer. Contains the PC we are interested in. */
223 unsigned int srp; /* 0x61; P11, Subroutine return pointer */
224 unsigned int nrp; /* 0x65; P12, NMI return pointer */
225 unsigned int ccs; /* 0x69; P13, Condition code stack */
226 unsigned int usp; /* 0x6D; P14, User mode stack pointer */
227 unsigned int spc; /* 0x71; P15, Single step PC */
228 unsigned int pc; /* 0x75; Pseudo register (for the most part set to ERP). */
229
230} registers;
231
232typedef
233struct bp_register_image
234{
235 /* Support register bank 0. */
236 unsigned int s0_0;
237 unsigned int s1_0;
238 unsigned int s2_0;
239 unsigned int s3_0;
240 unsigned int s4_0;
241 unsigned int s5_0;
242 unsigned int s6_0;
243 unsigned int s7_0;
244 unsigned int s8_0;
245 unsigned int s9_0;
246 unsigned int s10_0;
247 unsigned int s11_0;
248 unsigned int s12_0;
249 unsigned int s13_0;
250 unsigned int s14_0;
251 unsigned int s15_0;
252
253 /* Support register bank 1. */
254 unsigned int s0_1;
255 unsigned int s1_1;
256 unsigned int s2_1;
257 unsigned int s3_1;
258 unsigned int s4_1;
259 unsigned int s5_1;
260 unsigned int s6_1;
261 unsigned int s7_1;
262 unsigned int s8_1;
263 unsigned int s9_1;
264 unsigned int s10_1;
265 unsigned int s11_1;
266 unsigned int s12_1;
267 unsigned int s13_1;
268 unsigned int s14_1;
269 unsigned int s15_1;
270
271 /* Support register bank 2. */
272 unsigned int s0_2;
273 unsigned int s1_2;
274 unsigned int s2_2;
275 unsigned int s3_2;
276 unsigned int s4_2;
277 unsigned int s5_2;
278 unsigned int s6_2;
279 unsigned int s7_2;
280 unsigned int s8_2;
281 unsigned int s9_2;
282 unsigned int s10_2;
283 unsigned int s11_2;
284 unsigned int s12_2;
285 unsigned int s13_2;
286 unsigned int s14_2;
287 unsigned int s15_2;
288
289 /* Support register bank 3. */
290 unsigned int s0_3; /* BP_CTRL */
291 unsigned int s1_3; /* BP_I0_START */
292 unsigned int s2_3; /* BP_I0_END */
293 unsigned int s3_3; /* BP_D0_START */
294 unsigned int s4_3; /* BP_D0_END */
295 unsigned int s5_3; /* BP_D1_START */
296 unsigned int s6_3; /* BP_D1_END */
297 unsigned int s7_3; /* BP_D2_START */
298 unsigned int s8_3; /* BP_D2_END */
299 unsigned int s9_3; /* BP_D3_START */
300 unsigned int s10_3; /* BP_D3_END */
301 unsigned int s11_3; /* BP_D4_START */
302 unsigned int s12_3; /* BP_D4_END */
303 unsigned int s13_3; /* BP_D5_START */
304 unsigned int s14_3; /* BP_D5_END */
305 unsigned int s15_3; /* BP_RESERVED */
306
307} support_registers;
308
309enum register_name
310{
311 R0, R1, R2, R3,
312 R4, R5, R6, R7,
313 R8, R9, R10, R11,
314 R12, R13, SP, ACR,
315
316 BZ, VR, PID, SRS,
317 WZ, EXS, EDA, MOF,
318 DZ, EBP, ERP, SRP,
319 NRP, CCS, USP, SPC,
320 PC,
321
322 S0, S1, S2, S3,
323 S4, S5, S6, S7,
324 S8, S9, S10, S11,
325 S12, S13, S14, S15
326
327};
328
329/* The register sizes of the registers in register_name. An unimplemented register
330 is designated by size 0 in this array. */
331static int register_size[] =
332{
333 4, 4, 4, 4,
334 4, 4, 4, 4,
335 4, 4, 4, 4,
336 4, 4, 4, 4,
337
338 1, 1, 4, 1,
339 2, 4, 4, 4,
340 4, 4, 4, 4,
341 4, 4, 4, 4,
342
343 4,
344
345 4, 4, 4, 4,
346 4, 4, 4, 4,
347 4, 4, 4, 4,
348 4, 4, 4
349
350};
351
352/* Contains the register image of the kernel.
353 (Global so that they can be reached from assembler code.) */
354registers reg;
355support_registers sreg;
356
357/************** Prototypes for local library functions ***********************/
358
359/* Copy of strcpy from libc. */
360static char *gdb_cris_strcpy(char *s1, const char *s2);
361
362/* Copy of strlen from libc. */
363static int gdb_cris_strlen(const char *s);
364
365/* Copy of memchr from libc. */
366static void *gdb_cris_memchr(const void *s, int c, int n);
367
368/* Copy of strtol from libc. Does only support base 16. */
369static int gdb_cris_strtol(const char *s, char **endptr, int base);
370
371/********************** Prototypes for local functions. **********************/
372
373/* Write a value to a specified register regno in the register image
374 of the current thread. */
375static int write_register(int regno, char *val);
376
377/* Read a value from a specified register in the register image. Returns the
378 status of the read operation. The register value is returned in valptr. */
379static int read_register(char regno, unsigned int *valptr);
380
381/* Serial port, reads one character. ETRAX 100 specific. from debugport.c */
382int getDebugChar(void);
383
384#ifdef CONFIG_ETRAXFS_SIM
385int getDebugChar(void)
386{
387 return socketread();
388}
389#endif
390
391/* Serial port, writes one character. ETRAX 100 specific. from debugport.c */
392void putDebugChar(int val);
393
394#ifdef CONFIG_ETRAXFS_SIM
395void putDebugChar(int val)
396{
397 socketwrite((char *)&val, 1);
398}
399#endif
400
401/* Returns the character equivalent of a nibble, bit 7, 6, 5, and 4 of a byte,
402 represented by int x. */
403static char highhex(int x);
404
405/* Returns the character equivalent of a nibble, bit 3, 2, 1, and 0 of a byte,
406 represented by int x. */
407static char lowhex(int x);
408
409/* Returns the integer equivalent of a hexadecimal character. */
410static int hex(char ch);
411
412/* Convert the memory, pointed to by mem into hexadecimal representation.
413 Put the result in buf, and return a pointer to the last character
414 in buf (null). */
415static char *mem2hex(char *buf, unsigned char *mem, int count);
416
417/* Convert the array, in hexadecimal representation, pointed to by buf into
418 binary representation. Put the result in mem, and return a pointer to
419 the character after the last byte written. */
420static unsigned char *hex2mem(unsigned char *mem, char *buf, int count);
421
422/* Put the content of the array, in binary representation, pointed to by buf
423 into memory pointed to by mem, and return a pointer to
424 the character after the last byte written. */
425static unsigned char *bin2mem(unsigned char *mem, unsigned char *buf, int count);
426
427/* Await the sequence $<data>#<checksum> and store <data> in the array buffer
428 returned. */
429static void getpacket(char *buffer);
430
431/* Send $<data>#<checksum> from the <data> in the array buffer. */
432static void putpacket(char *buffer);
433
434/* Build and send a response packet in order to inform the host the
435 stub is stopped. */
436static void stub_is_stopped(int sigval);
437
438/* All expected commands are sent from remote.c. Send a response according
439 to the description in remote.c. Not static since it needs to be reached
440 from assembler code. */
441void handle_exception(int sigval);
442
443/* Performs a complete re-start from scratch. ETRAX specific. */
444static void kill_restart(void);
445
446/******************** Prototypes for global functions. ***********************/
447
448/* The string str is prepended with the GDB printout token and sent. */
449void putDebugString(const unsigned char *str, int len);
450
451/* A static breakpoint to be used at startup. */
452void breakpoint(void);
453
454/* Avoid warning as the internal_stack is not used in the C-code. */
455#define USEDVAR(name) { if (name) { ; } }
456#define USEDFUN(name) { void (*pf)(void) = (void *)name; USEDVAR(pf) }
457
458/********************************** Packet I/O ******************************/
459/* BUFMAX defines the maximum number of characters in
460 inbound/outbound buffers */
461/* FIXME: How do we know it's enough? */
462#define BUFMAX 512
463
464/* Run-length encoding maximum length. Send 64 at most. */
465#define RUNLENMAX 64
466
467/* Definition of all valid hexadecimal characters */
468static const char hexchars[] = "0123456789abcdef";
469
470/* The inbound/outbound buffers used in packet I/O */
471static char input_buffer[BUFMAX];
472static char output_buffer[BUFMAX];
473
474/* Error and warning messages. */
475enum error_type
476{
477 SUCCESS, E01, E02, E03, E04, E05, E06,
478};
479
480static char *error_message[] =
481{
482 "",
483 "E01 Set current or general thread - H[c,g] - internal error.",
484 "E02 Change register content - P - cannot change read-only register.",
485 "E03 Thread is not alive.", /* T, not used. */
486 "E04 The command is not supported - [s,C,S,!,R,d,r] - internal error.",
487 "E05 Change register content - P - the register is not implemented..",
488 "E06 Change memory content - M - internal error.",
489};
490
491/********************************** Breakpoint *******************************/
492/* Use an internal stack in the breakpoint and interrupt response routines.
493 FIXME: How do we know the size of this stack is enough?
494 Global so it can be reached from assembler code. */
495#define INTERNAL_STACK_SIZE 1024
496char internal_stack[INTERNAL_STACK_SIZE];
497
498/* Due to the breakpoint return pointer, a state variable is needed to keep
499 track of whether it is a static (compiled) or dynamic (gdb-invoked)
500 breakpoint to be handled. A static breakpoint uses the content of register
501 ERP as it is whereas a dynamic breakpoint requires subtraction with 2
502 in order to execute the instruction. The first breakpoint is static; all
503 following are assumed to be dynamic. */
504static int dynamic_bp = 0;
505
506/********************************* String library ****************************/
507/* Single-step over library functions creates trap loops. */
508
509/* Copy char s2[] to s1[]. */
510static char*
511gdb_cris_strcpy(char *s1, const char *s2)
512{
513 char *s = s1;
514
515 for (s = s1; (*s++ = *s2++) != '\0'; )
516 ;
517 return s1;
518}
519
520/* Find length of s[]. */
521static int
522gdb_cris_strlen(const char *s)
523{
524 const char *sc;
525
526 for (sc = s; *sc != '\0'; sc++)
527 ;
528 return (sc - s);
529}
530
531/* Find first occurrence of c in s[n]. */
532static void*
533gdb_cris_memchr(const void *s, int c, int n)
534{
535 const unsigned char uc = c;
536 const unsigned char *su;
537
538 for (su = s; 0 < n; ++su, --n)
539 if (*su == uc)
540 return (void *)su;
541 return NULL;
542}
543/******************************* Standard library ****************************/
544/* Single-step over library functions creates trap loops. */
545/* Convert string to long. */
546static int
547gdb_cris_strtol(const char *s, char **endptr, int base)
548{
549 char *s1;
550 char *sd;
551 int x = 0;
552
553 for (s1 = (char*)s; (sd = gdb_cris_memchr(hexchars, *s1, base)) != NULL; ++s1)
554 x = x * base + (sd - hexchars);
555
556 if (endptr) {
557 /* Unconverted suffix is stored in endptr unless endptr is NULL. */
558 *endptr = s1;
559 }
560
561 return x;
562}
563
564/********************************* Register image ****************************/
565
566/* Write a value to a specified register in the register image of the current
567 thread. Returns status code SUCCESS, E02 or E05. */
568static int
569write_register(int regno, char *val)
570{
571 int status = SUCCESS;
572
573 if (regno >= R0 && regno <= ACR) {
574 /* Consecutive 32-bit registers. */
575 hex2mem((unsigned char *)&reg.r0 + (regno - R0) * sizeof(unsigned int),
576 val, sizeof(unsigned int));
577
578 } else if (regno == BZ || regno == VR || regno == WZ || regno == DZ) {
579 /* Read-only registers. */
580 status = E02;
581
582 } else if (regno == PID) {
583 /* 32-bit register. (Even though we already checked SRS and WZ, we cannot
584 combine this with the EXS - SPC write since SRS and WZ have different size.) */
585 hex2mem((unsigned char *)&reg.pid, val, sizeof(unsigned int));
586
587 } else if (regno == SRS) {
588 /* 8-bit register. */
589 hex2mem((unsigned char *)&reg.srs, val, sizeof(unsigned char));
590
591 } else if (regno >= EXS && regno <= SPC) {
592 /* Consecutive 32-bit registers. */
593 hex2mem((unsigned char *)&reg.exs + (regno - EXS) * sizeof(unsigned int),
594 val, sizeof(unsigned int));
595
596 } else if (regno == PC) {
597 /* Pseudo-register. Treat as read-only. */
598 status = E02;
599
600 } else if (regno >= S0 && regno <= S15) {
601 /* 32-bit registers. */
602 hex2mem((unsigned char *)&sreg.s0_0 + (reg.srs * 16 * sizeof(unsigned int)) + (regno - S0) * sizeof(unsigned int), val, sizeof(unsigned int));
603 } else {
604 /* Non-existing register. */
605 status = E05;
606 }
607 return status;
608}
609
610/* Read a value from a specified register in the register image. Returns the
611 value in the register or -1 for non-implemented registers. */
612static int
613read_register(char regno, unsigned int *valptr)
614{
615 int status = SUCCESS;
616
617 /* We read the zero registers from the register struct (instead of just returning 0)
618 to catch errors. */
619
620 if (regno >= R0 && regno <= ACR) {
621 /* Consecutive 32-bit registers. */
622 *valptr = *(unsigned int *)((char *)&reg.r0 + (regno - R0) * sizeof(unsigned int));
623
624 } else if (regno == BZ || regno == VR) {
625 /* Consecutive 8-bit registers. */
626 *valptr = (unsigned int)(*(unsigned char *)
627 ((char *)&reg.bz + (regno - BZ) * sizeof(char)));
628
629 } else if (regno == PID) {
630 /* 32-bit register. */
631 *valptr = *(unsigned int *)((char *)&reg.pid);
632
633 } else if (regno == SRS) {
634 /* 8-bit register. */
635 *valptr = (unsigned int)(*(unsigned char *)((char *)&reg.srs));
636
637 } else if (regno == WZ) {
638 /* 16-bit register. */
639 *valptr = (unsigned int)(*(unsigned short *)(char *)&reg.wz);
640
641 } else if (regno >= EXS && regno <= PC) {
642 /* Consecutive 32-bit registers. */
643 *valptr = *(unsigned int *)((char *)&reg.exs + (regno - EXS) * sizeof(unsigned int));
644
645 } else if (regno >= S0 && regno <= S15) {
646 /* Consecutive 32-bit registers, located elsewhere. */
647 *valptr = *(unsigned int *)((char *)&sreg.s0_0 + (reg.srs * 16 * sizeof(unsigned int)) + (regno - S0) * sizeof(unsigned int));
648
649 } else {
650 /* Non-existing register. */
651 status = E05;
652 }
653 return status;
654
655}
656
657/********************************** Packet I/O ******************************/
658/* Returns the character equivalent of a nibble, bit 7, 6, 5, and 4 of a byte,
659 represented by int x. */
660static inline char
661highhex(int x)
662{
663 return hexchars[(x >> 4) & 0xf];
664}
665
666/* Returns the character equivalent of a nibble, bit 3, 2, 1, and 0 of a byte,
667 represented by int x. */
668static inline char
669lowhex(int x)
670{
671 return hexchars[x & 0xf];
672}
673
674/* Returns the integer equivalent of a hexadecimal character. */
675static int
676hex(char ch)
677{
678 if ((ch >= 'a') && (ch <= 'f'))
679 return (ch - 'a' + 10);
680 if ((ch >= '0') && (ch <= '9'))
681 return (ch - '0');
682 if ((ch >= 'A') && (ch <= 'F'))
683 return (ch - 'A' + 10);
684 return -1;
685}
686
687/* Convert the memory, pointed to by mem into hexadecimal representation.
688 Put the result in buf, and return a pointer to the last character
689 in buf (null). */
690
691static char *
692mem2hex(char *buf, unsigned char *mem, int count)
693{
694 int i;
695 int ch;
696
697 if (mem == NULL) {
698 /* Invalid address, caught by 'm' packet handler. */
699 for (i = 0; i < count; i++) {
700 *buf++ = '0';
701 *buf++ = '0';
702 }
703 } else {
704 /* Valid mem address. */
705 for (i = 0; i < count; i++) {
706 ch = *mem++;
707 *buf++ = highhex (ch);
708 *buf++ = lowhex (ch);
709 }
710 }
711 /* Terminate properly. */
712 *buf = '\0';
713 return buf;
714}
715
716/* Same as mem2hex, but puts it in network byte order. */
717static char *
718mem2hex_nbo(char *buf, unsigned char *mem, int count)
719{
720 int i;
721 int ch;
722
723 mem += count - 1;
724 for (i = 0; i < count; i++) {
725 ch = *mem--;
726 *buf++ = highhex (ch);
727 *buf++ = lowhex (ch);
728 }
729
730 /* Terminate properly. */
731 *buf = '\0';
732 return buf;
733}
734
735/* Convert the array, in hexadecimal representation, pointed to by buf into
736 binary representation. Put the result in mem, and return a pointer to
737 the character after the last byte written. */
738static unsigned char*
739hex2mem(unsigned char *mem, char *buf, int count)
740{
741 int i;
742 unsigned char ch;
743 for (i = 0; i < count; i++) {
744 ch = hex (*buf++) << 4;
745 ch = ch + hex (*buf++);
746 *mem++ = ch;
747 }
748 return mem;
749}
750
751/* Put the content of the array, in binary representation, pointed to by buf
752 into memory pointed to by mem, and return a pointer to the character after
753 the last byte written.
754 Gdb will escape $, #, and the escape char (0x7d). */
755static unsigned char*
756bin2mem(unsigned char *mem, unsigned char *buf, int count)
757{
758 int i;
759 unsigned char *next;
760 for (i = 0; i < count; i++) {
761 /* Check for any escaped characters. Be paranoid and
762 only unescape chars that should be escaped. */
763 if (*buf == 0x7d) {
764 next = buf + 1;
765 if (*next == 0x3 || *next == 0x4 || *next == 0x5D) {
766 /* #, $, ESC */
767 buf++;
768 *buf += 0x20;
769 }
770 }
771 *mem++ = *buf++;
772 }
773 return mem;
774}
775
776/* Await the sequence $<data>#<checksum> and store <data> in the array buffer
777 returned. */
778static void
779getpacket(char *buffer)
780{
781 unsigned char checksum;
782 unsigned char xmitcsum;
783 int i;
784 int count;
785 char ch;
786
787 do {
788 while((ch = getDebugChar ()) != '$')
789 /* Wait for the start character $ and ignore all other characters */;
790 checksum = 0;
791 xmitcsum = -1;
792 count = 0;
793 /* Read until a # or the end of the buffer is reached */
794 while (count < BUFMAX) {
795 ch = getDebugChar();
796 if (ch == '#')
797 break;
798 checksum = checksum + ch;
799 buffer[count] = ch;
800 count = count + 1;
801 }
802
803 if (count >= BUFMAX)
804 continue;
805
806 buffer[count] = 0;
807
808 if (ch == '#') {
809 xmitcsum = hex(getDebugChar()) << 4;
810 xmitcsum += hex(getDebugChar());
811 if (checksum != xmitcsum) {
812 /* Wrong checksum */
813 putDebugChar('-');
814 } else {
815 /* Correct checksum */
816 putDebugChar('+');
817 /* If sequence characters are received, reply with them */
818 if (buffer[2] == ':') {
819 putDebugChar(buffer[0]);
820 putDebugChar(buffer[1]);
821 /* Remove the sequence characters from the buffer */
822 count = gdb_cris_strlen(buffer);
823 for (i = 3; i <= count; i++)
824 buffer[i - 3] = buffer[i];
825 }
826 }
827 }
828 } while (checksum != xmitcsum);
829}
830
831/* Send $<data>#<checksum> from the <data> in the array buffer. */
832
833static void
834putpacket(char *buffer)
835{
836 int checksum;
837 int runlen;
838 int encode;
839
840 do {
841 char *src = buffer;
842 putDebugChar('$');
843 checksum = 0;
844 while (*src) {
845 /* Do run length encoding */
846 putDebugChar(*src);
847 checksum += *src;
848 runlen = 0;
849 while (runlen < RUNLENMAX && *src == src[runlen]) {
850 runlen++;
851 }
852 if (runlen > 3) {
853 /* Got a useful amount */
854 putDebugChar ('*');
855 checksum += '*';
856 encode = runlen + ' ' - 4;
857 putDebugChar(encode);
858 checksum += encode;
859 src += runlen;
860 } else {
861 src++;
862 }
863 }
864 putDebugChar('#');
865 putDebugChar(highhex (checksum));
866 putDebugChar(lowhex (checksum));
867 } while(kgdb_started && (getDebugChar() != '+'));
868}
869
870/* The string str is prepended with the GDB printout token and sent. Required
871 in traditional implementations. */
872void
873putDebugString(const unsigned char *str, int len)
874{
875 /* Move SPC forward if we are single-stepping. */
876 asm("spchere:");
877 asm("move $spc, $r10");
878 asm("cmp.d spchere, $r10");
879 asm("bne nosstep");
880 asm("nop");
881 asm("move.d spccont, $r10");
882 asm("move $r10, $spc");
883 asm("nosstep:");
884
885 output_buffer[0] = 'O';
886 mem2hex(&output_buffer[1], (unsigned char *)str, len);
887 putpacket(output_buffer);
888
889 asm("spccont:");
890}
891
892/********************************** Handle exceptions ************************/
893/* Build and send a response packet in order to inform the host the
894 stub is stopped. TAAn...:r...;n...:r...;n...:r...;
895 AA = signal number
896 n... = register number (hex)
897 r... = register contents
898 n... = `thread'
899 r... = thread process ID. This is a hex integer.
900 n... = other string not starting with valid hex digit.
901 gdb should ignore this n,r pair and go on to the next.
902 This way we can extend the protocol. */
903static void
904stub_is_stopped(int sigval)
905{
906 char *ptr = output_buffer;
907 unsigned int reg_cont;
908
909 /* Send trap type (converted to signal) */
910
911 *ptr++ = 'T';
912 *ptr++ = highhex(sigval);
913 *ptr++ = lowhex(sigval);
914
915 if (((reg.exs & 0xff00) >> 8) == 0xc) {
916
917 /* Some kind of hardware watchpoint triggered. Find which one
918 and determine its type (read/write/access). */
919 int S, bp, trig_bits = 0, rw_bits = 0;
920 int trig_mask = 0;
921 unsigned int *bp_d_regs = &sreg.s3_3;
922 /* In a lot of cases, the stopped data address will simply be EDA.
923 In some cases, we adjust it to match the watched data range.
924 (We don't want to change the actual EDA though). */
925 unsigned int stopped_data_address;
926 /* The S field of EXS. */
927 S = (reg.exs & 0xffff0000) >> 16;
928
929 if (S & 1) {
930 /* Instruction watchpoint. */
931 /* FIXME: Check against, and possibly adjust reported EDA. */
932 } else {
933 /* Data watchpoint. Find the one that triggered. */
934 for (bp = 0; bp < 6; bp++) {
935
936 /* Dx_RD, Dx_WR in the S field of EXS for this BP. */
937 int bitpos_trig = 1 + bp * 2;
938 /* Dx_BPRD, Dx_BPWR in BP_CTRL for this BP. */
939 int bitpos_config = 2 + bp * 4;
940
941 /* Get read/write trig bits for this BP. */
942 trig_bits = (S & (3 << bitpos_trig)) >> bitpos_trig;
943
944 /* Read/write config bits for this BP. */
945 rw_bits = (sreg.s0_3 & (3 << bitpos_config)) >> bitpos_config;
946 if (trig_bits) {
947 /* Sanity check: the BP shouldn't trigger for accesses
948 that it isn't configured for. */
949 if ((rw_bits == 0x1 && trig_bits != 0x1) ||
950 (rw_bits == 0x2 && trig_bits != 0x2))
951 panic("Invalid r/w trigging for this BP");
952
953 /* Mark this BP as trigged for future reference. */
954 trig_mask |= (1 << bp);
955
956 if (reg.eda >= bp_d_regs[bp * 2] &&
957 reg.eda <= bp_d_regs[bp * 2 + 1]) {
958 /* EDA withing range for this BP; it must be the one
959 we're looking for. */
960 stopped_data_address = reg.eda;
961 break;
962 }
963 }
964 }
965 if (bp < 6) {
966 /* Found a trigged BP with EDA within its configured data range. */
967 } else if (trig_mask) {
968 /* Something triggered, but EDA doesn't match any BP's range. */
969 for (bp = 0; bp < 6; bp++) {
970 /* Dx_BPRD, Dx_BPWR in BP_CTRL for this BP. */
971 int bitpos_config = 2 + bp * 4;
972
973 /* Read/write config bits for this BP (needed later). */
974 rw_bits = (sreg.s0_3 & (3 << bitpos_config)) >> bitpos_config;
975
976 if (trig_mask & (1 << bp)) {
977 /* EDA within 31 bytes of the configured start address? */
978 if (reg.eda + 31 >= bp_d_regs[bp * 2]) {
979 /* Changing the reported address to match
980 the start address of the first applicable BP. */
981 stopped_data_address = bp_d_regs[bp * 2];
982 break;
983 } else {
984 /* We continue since we might find another useful BP. */
985 printk("EDA doesn't match trigged BP's range");
986 }
987 }
988 }
989 }
990
991 /* No match yet? */
992 BUG_ON(bp >= 6);
993 /* Note that we report the type according to what the BP is configured
994 for (otherwise we'd never report an 'awatch'), not according to how
995 it trigged. We did check that the trigged bits match what the BP is
996 configured for though. */
997 if (rw_bits == 0x1) {
998 /* read */
999 strncpy(ptr, "rwatch", 6);
1000 ptr += 6;
1001 } else if (rw_bits == 0x2) {
1002 /* write */
1003 strncpy(ptr, "watch", 5);
1004 ptr += 5;
1005 } else if (rw_bits == 0x3) {
1006 /* access */
1007 strncpy(ptr, "awatch", 6);
1008 ptr += 6;
1009 } else {
1010 panic("Invalid r/w bits for this BP.");
1011 }
1012
1013 *ptr++ = ':';
1014 /* Note that we don't read_register(EDA, ...) */
1015 ptr = mem2hex_nbo(ptr, (unsigned char *)&stopped_data_address, register_size[EDA]);
1016 *ptr++ = ';';
1017 }
1018 }
1019 /* Only send PC, frame and stack pointer. */
1020 read_register(PC, &reg_cont);
1021 *ptr++ = highhex(PC);
1022 *ptr++ = lowhex(PC);
1023 *ptr++ = ':';
1024 ptr = mem2hex(ptr, (unsigned char *)&reg_cont, register_size[PC]);
1025 *ptr++ = ';';
1026
1027 read_register(R8, &reg_cont);
1028 *ptr++ = highhex(R8);
1029 *ptr++ = lowhex(R8);
1030 *ptr++ = ':';
1031 ptr = mem2hex(ptr, (unsigned char *)&reg_cont, register_size[R8]);
1032 *ptr++ = ';';
1033
1034 read_register(SP, &reg_cont);
1035 *ptr++ = highhex(SP);
1036 *ptr++ = lowhex(SP);
1037 *ptr++ = ':';
1038 ptr = mem2hex(ptr, (unsigned char *)&reg_cont, register_size[SP]);
1039 *ptr++ = ';';
1040
1041 /* Send ERP as well; this will save us an entire register fetch in some cases. */
1042 read_register(ERP, &reg_cont);
1043 *ptr++ = highhex(ERP);
1044 *ptr++ = lowhex(ERP);
1045 *ptr++ = ':';
1046 ptr = mem2hex(ptr, (unsigned char *)&reg_cont, register_size[ERP]);
1047 *ptr++ = ';';
1048
1049 /* null-terminate and send it off */
1050 *ptr = 0;
1051 putpacket(output_buffer);
1052}
1053
1054/* Returns the size of an instruction that has a delay slot. */
1055
1056int insn_size(unsigned long pc)
1057{
1058 unsigned short opcode = *(unsigned short *)pc;
1059 int size = 0;
1060
1061 switch ((opcode & 0x0f00) >> 8) {
1062 case 0x0:
1063 case 0x9:
1064 case 0xb:
1065 size = 2;
1066 break;
1067 case 0xe:
1068 case 0xf:
1069 size = 6;
1070 break;
1071 case 0xd:
1072 /* Could be 4 or 6; check more bits. */
1073 if ((opcode & 0xff) == 0xff)
1074 size = 4;
1075 else
1076 size = 6;
1077 break;
1078 default:
1079 panic("Couldn't find size of opcode 0x%x at 0x%lx\n", opcode, pc);
1080 }
1081
1082 return size;
1083}
1084
1085void register_fixup(int sigval)
1086{
1087 /* Compensate for ACR push at the beginning of exception handler. */
1088 reg.sp += 4;
1089
1090 /* Standard case. */
1091 reg.pc = reg.erp;
1092 if (reg.erp & 0x1) {
1093 /* Delay slot bit set. Report as stopped on proper instruction. */
1094 if (reg.spc) {
1095 /* Rely on SPC if set. */
1096 reg.pc = reg.spc;
1097 } else {
1098 /* Calculate the PC from the size of the instruction
1099 that the delay slot we're in belongs to. */
1100 reg.pc += insn_size(reg.erp & ~1) - 1 ;
1101 }
1102 }
1103
1104 if ((reg.exs & 0x3) == 0x0) {
1105 /* Bits 1 - 0 indicate the type of memory operation performed
1106 by the interrupted instruction. 0 means no memory operation,
1107 and EDA is undefined in that case. We zero it to avoid confusion. */
1108 reg.eda = 0;
1109 }
1110
1111 if (sigval == SIGTRAP) {
1112 /* Break 8, single step or hardware breakpoint exception. */
1113
1114 /* Check IDX field of EXS. */
1115 if (((reg.exs & 0xff00) >> 8) == 0x18) {
1116
1117 /* Break 8. */
1118
1119 /* Static (compiled) breakpoints must return to the next instruction
1120 in order to avoid infinite loops (default value of ERP). Dynamic
1121 (gdb-invoked) must subtract the size of the break instruction from
1122 the ERP so that the instruction that was originally in the break
1123 instruction's place will be run when we return from the exception. */
1124 if (!dynamic_bp) {
1125 /* Assuming that all breakpoints are dynamic from now on. */
1126 dynamic_bp = 1;
1127 } else {
1128
1129 /* Only if not in a delay slot. */
1130 if (!(reg.erp & 0x1)) {
1131 reg.erp -= 2;
1132 reg.pc -= 2;
1133 }
1134 }
1135
1136 } else if (((reg.exs & 0xff00) >> 8) == 0x3) {
1137 /* Single step. */
1138 /* Don't fiddle with S1. */
1139
1140 } else if (((reg.exs & 0xff00) >> 8) == 0xc) {
1141
1142 /* Hardware watchpoint exception. */
1143
1144 /* SPC has been updated so that we will get a single step exception
1145 when we return, but we don't want that. */
1146 reg.spc = 0;
1147
1148 /* Don't fiddle with S1. */
1149 }
1150
1151 } else if (sigval == SIGINT) {
1152 /* Nothing special. */
1153 }
1154}
1155
1156static void insert_watchpoint(char type, int addr, int len)
1157{
1158 /* Breakpoint/watchpoint types (GDB terminology):
1159 0 = memory breakpoint for instructions
1160 (not supported; done via memory write instead)
1161 1 = hardware breakpoint for instructions (supported)
1162 2 = write watchpoint (supported)
1163 3 = read watchpoint (supported)
1164 4 = access watchpoint (supported) */
1165
1166 if (type < '1' || type > '4') {
1167 output_buffer[0] = 0;
1168 return;
1169 }
1170
1171 /* Read watchpoints are set as access watchpoints, because of GDB's
1172 inability to deal with pure read watchpoints. */
1173 if (type == '3')
1174 type = '4';
1175
1176 if (type == '1') {
1177 /* Hardware (instruction) breakpoint. */
1178 /* Bit 0 in BP_CTRL holds the configuration for I0. */
1179 if (sreg.s0_3 & 0x1) {
1180 /* Already in use. */
1181 gdb_cris_strcpy(output_buffer, error_message[E04]);
1182 return;
1183 }
1184 /* Configure. */
1185 sreg.s1_3 = addr;
1186 sreg.s2_3 = (addr + len - 1);
1187 sreg.s0_3 |= 1;
1188 } else {
1189 int bp;
1190 unsigned int *bp_d_regs = &sreg.s3_3;
1191
1192 /* The watchpoint allocation scheme is the simplest possible.
1193 For example, if a region is watched for read and
1194 a write watch is requested, a new watchpoint will
1195 be used. Also, if a watch for a region that is already
1196 covered by one or more existing watchpoints, a new
1197 watchpoint will be used. */
1198
1199 /* First, find a free data watchpoint. */
1200 for (bp = 0; bp < 6; bp++) {
1201 /* Each data watchpoint's control registers occupy 2 bits
1202 (hence the 3), starting at bit 2 for D0 (hence the 2)
1203 with 4 bits between for each watchpoint (yes, the 4). */
1204 if (!(sreg.s0_3 & (0x3 << (2 + (bp * 4))))) {
1205 break;
1206 }
1207 }
1208
1209 if (bp > 5) {
1210 /* We're out of watchpoints. */
1211 gdb_cris_strcpy(output_buffer, error_message[E04]);
1212 return;
1213 }
1214
1215 /* Configure the control register first. */
1216 if (type == '3' || type == '4') {
1217 /* Trigger on read. */
1218 sreg.s0_3 |= (1 << (2 + bp * 4));
1219 }
1220 if (type == '2' || type == '4') {
1221 /* Trigger on write. */
1222 sreg.s0_3 |= (2 << (2 + bp * 4));
1223 }
1224
1225 /* Ugly pointer arithmetics to configure the watched range. */
1226 bp_d_regs[bp * 2] = addr;
1227 bp_d_regs[bp * 2 + 1] = (addr + len - 1);
1228 }
1229
1230 /* Set the S1 flag to enable watchpoints. */
1231 reg.ccs |= (1 << (S_CCS_BITNR + CCS_SHIFT));
1232 gdb_cris_strcpy(output_buffer, "OK");
1233}
1234
1235static void remove_watchpoint(char type, int addr, int len)
1236{
1237 /* Breakpoint/watchpoint types:
1238 0 = memory breakpoint for instructions
1239 (not supported; done via memory write instead)
1240 1 = hardware breakpoint for instructions (supported)
1241 2 = write watchpoint (supported)
1242 3 = read watchpoint (supported)
1243 4 = access watchpoint (supported) */
1244 if (type < '1' || type > '4') {
1245 output_buffer[0] = 0;
1246 return;
1247 }
1248
1249 /* Read watchpoints are set as access watchpoints, because of GDB's
1250 inability to deal with pure read watchpoints. */
1251 if (type == '3')
1252 type = '4';
1253
1254 if (type == '1') {
1255 /* Hardware breakpoint. */
1256 /* Bit 0 in BP_CTRL holds the configuration for I0. */
1257 if (!(sreg.s0_3 & 0x1)) {
1258 /* Not in use. */
1259 gdb_cris_strcpy(output_buffer, error_message[E04]);
1260 return;
1261 }
1262 /* Deconfigure. */
1263 sreg.s1_3 = 0;
1264 sreg.s2_3 = 0;
1265 sreg.s0_3 &= ~1;
1266 } else {
1267 int bp;
1268 unsigned int *bp_d_regs = &sreg.s3_3;
1269 /* Try to find a watchpoint that is configured for the
1270 specified range, then check that read/write also matches. */
1271
1272 /* Ugly pointer arithmetic, since I cannot rely on a
1273 single switch (addr) as there may be several watchpoints with
1274 the same start address for example. */
1275
1276 for (bp = 0; bp < 6; bp++) {
1277 if (bp_d_regs[bp * 2] == addr &&
1278 bp_d_regs[bp * 2 + 1] == (addr + len - 1)) {
1279 /* Matching range. */
1280 int bitpos = 2 + bp * 4;
1281 int rw_bits;
1282
1283 /* Read/write bits for this BP. */
1284 rw_bits = (sreg.s0_3 & (0x3 << bitpos)) >> bitpos;
1285
1286 if ((type == '3' && rw_bits == 0x1) ||
1287 (type == '2' && rw_bits == 0x2) ||
1288 (type == '4' && rw_bits == 0x3)) {
1289 /* Read/write matched. */
1290 break;
1291 }
1292 }
1293 }
1294
1295 if (bp > 5) {
1296 /* No watchpoint matched. */
1297 gdb_cris_strcpy(output_buffer, error_message[E04]);
1298 return;
1299 }
1300
1301 /* Found a matching watchpoint. Now, deconfigure it by
1302 both disabling read/write in bp_ctrl and zeroing its
1303 start/end addresses. */
1304 sreg.s0_3 &= ~(3 << (2 + (bp * 4)));
1305 bp_d_regs[bp * 2] = 0;
1306 bp_d_regs[bp * 2 + 1] = 0;
1307 }
1308
1309 /* Note that we don't clear the S1 flag here. It's done when continuing. */
1310 gdb_cris_strcpy(output_buffer, "OK");
1311}
1312
1313
1314
1315/* All expected commands are sent from remote.c. Send a response according
1316 to the description in remote.c. */
1317void
1318handle_exception(int sigval)
1319{
1320 /* Avoid warning of not used. */
1321
1322 USEDFUN(handle_exception);
1323 USEDVAR(internal_stack[0]);
1324
1325 register_fixup(sigval);
1326
1327 /* Send response. */
1328 stub_is_stopped(sigval);
1329
1330 for (;;) {
1331 output_buffer[0] = '\0';
1332 getpacket(input_buffer);
1333 switch (input_buffer[0]) {
1334 case 'g':
1335 /* Read registers: g
1336 Success: Each byte of register data is described by two hex digits.
1337 Registers are in the internal order for GDB, and the bytes
1338 in a register are in the same order the machine uses.
1339 Failure: void. */
1340 {
1341 char *buf;
1342 /* General and special registers. */
1343 buf = mem2hex(output_buffer, (char *)&reg, sizeof(registers));
1344 /* Support registers. */
1345 /* -1 because of the null termination that mem2hex adds. */
1346 mem2hex(buf,
1347 (char *)&sreg + (reg.srs * 16 * sizeof(unsigned int)),
1348 16 * sizeof(unsigned int));
1349 break;
1350 }
1351 case 'G':
1352 /* Write registers. GXX..XX
1353 Each byte of register data is described by two hex digits.
1354 Success: OK
1355 Failure: void. */
1356 /* General and special registers. */
1357 hex2mem((char *)&reg, &input_buffer[1], sizeof(registers));
1358 /* Support registers. */
1359 hex2mem((char *)&sreg + (reg.srs * 16 * sizeof(unsigned int)),
1360 &input_buffer[1] + sizeof(registers),
1361 16 * sizeof(unsigned int));
1362 gdb_cris_strcpy(output_buffer, "OK");
1363 break;
1364
1365 case 'P':
1366 /* Write register. Pn...=r...
1367 Write register n..., hex value without 0x, with value r...,
1368 which contains a hex value without 0x and two hex digits
1369 for each byte in the register (target byte order). P1f=11223344 means
1370 set register 31 to 44332211.
1371 Success: OK
1372 Failure: E02, E05 */
1373 {
1374 char *suffix;
1375 int regno = gdb_cris_strtol(&input_buffer[1], &suffix, 16);
1376 int status;
1377
1378 status = write_register(regno, suffix+1);
1379
1380 switch (status) {
1381 case E02:
1382 /* Do not support read-only registers. */
1383 gdb_cris_strcpy(output_buffer, error_message[E02]);
1384 break;
1385 case E05:
1386 /* Do not support non-existing registers. */
1387 gdb_cris_strcpy(output_buffer, error_message[E05]);
1388 break;
1389 default:
1390 /* Valid register number. */
1391 gdb_cris_strcpy(output_buffer, "OK");
1392 break;
1393 }
1394 }
1395 break;
1396
1397 case 'm':
1398 /* Read from memory. mAA..AA,LLLL
1399 AA..AA is the address and LLLL is the length.
1400 Success: XX..XX is the memory content. Can be fewer bytes than
1401 requested if only part of the data may be read. m6000120a,6c means
1402 retrieve 108 byte from base address 6000120a.
1403 Failure: void. */
1404 {
1405 char *suffix;
1406 unsigned char *addr = (unsigned char *)gdb_cris_strtol(&input_buffer[1],
1407 &suffix, 16);
1408 int len = gdb_cris_strtol(suffix+1, 0, 16);
1409
1410 /* Bogus read (i.e. outside the kernel's
1411 segment)? . */
1412 if (!((unsigned int)addr >= 0xc0000000 &&
1413 (unsigned int)addr < 0xd0000000))
1414 addr = NULL;
1415
1416 mem2hex(output_buffer, addr, len);
1417 }
1418 break;
1419
1420 case 'X':
1421 /* Write to memory. XAA..AA,LLLL:XX..XX
1422 AA..AA is the start address, LLLL is the number of bytes, and
1423 XX..XX is the binary data.
1424 Success: OK
1425 Failure: void. */
1426 case 'M':
1427 /* Write to memory. MAA..AA,LLLL:XX..XX
1428 AA..AA is the start address, LLLL is the number of bytes, and
1429 XX..XX is the hexadecimal data.
1430 Success: OK
1431 Failure: void. */
1432 {
1433 char *lenptr;
1434 char *dataptr;
1435 unsigned char *addr = (unsigned char *)gdb_cris_strtol(&input_buffer[1],
1436 &lenptr, 16);
1437 int len = gdb_cris_strtol(lenptr+1, &dataptr, 16);
1438 if (*lenptr == ',' && *dataptr == ':') {
1439 if (input_buffer[0] == 'M') {
1440 hex2mem(addr, dataptr + 1, len);
1441 } else /* X */ {
1442 bin2mem(addr, dataptr + 1, len);
1443 }
1444 gdb_cris_strcpy(output_buffer, "OK");
1445 }
1446 else {
1447 gdb_cris_strcpy(output_buffer, error_message[E06]);
1448 }
1449 }
1450 break;
1451
1452 case 'c':
1453 /* Continue execution. cAA..AA
1454 AA..AA is the address where execution is resumed. If AA..AA is
1455 omitted, resume at the present address.
1456 Success: return to the executing thread.
1457 Failure: will never know. */
1458
1459 if (input_buffer[1] != '\0') {
1460 /* FIXME: Doesn't handle address argument. */
1461 gdb_cris_strcpy(output_buffer, error_message[E04]);
1462 break;
1463 }
1464
1465 /* Before continuing, make sure everything is set up correctly. */
1466
1467 /* Set the SPC to some unlikely value. */
1468 reg.spc = 0;
1469 /* Set the S1 flag to 0 unless some watchpoint is enabled (since setting
1470 S1 to 0 would also disable watchpoints). (Note that bits 26-31 in BP_CTRL
1471 are reserved, so don't check against those). */
1472 if ((sreg.s0_3 & 0x3fff) == 0) {
1473 reg.ccs &= ~(1 << (S_CCS_BITNR + CCS_SHIFT));
1474 }
1475
1476 return;
1477
1478 case 's':
1479 /* Step. sAA..AA
1480 AA..AA is the address where execution is resumed. If AA..AA is
1481 omitted, resume at the present address. Success: return to the
1482 executing thread. Failure: will never know. */
1483
1484 if (input_buffer[1] != '\0') {
1485 /* FIXME: Doesn't handle address argument. */
1486 gdb_cris_strcpy(output_buffer, error_message[E04]);
1487 break;
1488 }
1489
1490 /* Set the SPC to PC, which is where we'll return
1491 (deduced previously). */
1492 reg.spc = reg.pc;
1493
1494 /* Set the S1 (first stacked, not current) flag, which will
1495 kick into action when we rfe. */
1496 reg.ccs |= (1 << (S_CCS_BITNR + CCS_SHIFT));
1497 return;
1498
1499 case 'Z':
1500
1501 /* Insert breakpoint or watchpoint, Ztype,addr,length.
1502 Remote protocol says: A remote target shall return an empty string
1503 for an unrecognized breakpoint or watchpoint packet type. */
1504 {
1505 char *lenptr;
1506 char *dataptr;
1507 int addr = gdb_cris_strtol(&input_buffer[3], &lenptr, 16);
1508 int len = gdb_cris_strtol(lenptr + 1, &dataptr, 16);
1509 char type = input_buffer[1];
1510
1511 insert_watchpoint(type, addr, len);
1512 break;
1513 }
1514
1515 case 'z':
1516 /* Remove breakpoint or watchpoint, Ztype,addr,length.
1517 Remote protocol says: A remote target shall return an empty string
1518 for an unrecognized breakpoint or watchpoint packet type. */
1519 {
1520 char *lenptr;
1521 char *dataptr;
1522 int addr = gdb_cris_strtol(&input_buffer[3], &lenptr, 16);
1523 int len = gdb_cris_strtol(lenptr + 1, &dataptr, 16);
1524 char type = input_buffer[1];
1525
1526 remove_watchpoint(type, addr, len);
1527 break;
1528 }
1529
1530
1531 case '?':
1532 /* The last signal which caused a stop. ?
1533 Success: SAA, where AA is the signal number.
1534 Failure: void. */
1535 output_buffer[0] = 'S';
1536 output_buffer[1] = highhex(sigval);
1537 output_buffer[2] = lowhex(sigval);
1538 output_buffer[3] = 0;
1539 break;
1540
1541 case 'D':
1542 /* Detach from host. D
1543 Success: OK, and return to the executing thread.
1544 Failure: will never know */
1545 putpacket("OK");
1546 return;
1547
1548 case 'k':
1549 case 'r':
1550 /* kill request or reset request.
1551 Success: restart of target.
1552 Failure: will never know. */
1553 kill_restart();
1554 break;
1555
1556 case 'C':
1557 case 'S':
1558 case '!':
1559 case 'R':
1560 case 'd':
1561 /* Continue with signal sig. Csig;AA..AA
1562 Step with signal sig. Ssig;AA..AA
1563 Use the extended remote protocol. !
1564 Restart the target system. R0
1565 Toggle debug flag. d
1566 Search backwards. tAA:PP,MM
1567 Not supported: E04 */
1568
1569 /* FIXME: What's the difference between not supported
1570 and ignored (below)? */
1571 gdb_cris_strcpy(output_buffer, error_message[E04]);
1572 break;
1573
1574 default:
1575 /* The stub should ignore other request and send an empty
1576 response ($#<checksum>). This way we can extend the protocol and GDB
1577 can tell whether the stub it is talking to uses the old or the new. */
1578 output_buffer[0] = 0;
1579 break;
1580 }
1581 putpacket(output_buffer);
1582 }
1583}
1584
1585void
1586kgdb_init(void)
1587{
1588 reg_intr_vect_rw_mask intr_mask;
1589 reg_ser_rw_intr_mask ser_intr_mask;
1590
1591 /* Configure the kgdb serial port. */
1592#if defined(CONFIG_ETRAX_KGDB_PORT0)
1593 /* Note: no shortcut registered (not handled by multiple_interrupt).
1594 See entry.S. */
1595 set_exception_vector(SER0_INTR_VECT, kgdb_handle_exception);
1596 /* Enable the ser irq in the global config. */
1597 intr_mask = REG_RD(intr_vect, regi_irq, rw_mask);
1598 intr_mask.ser0 = 1;
1599 REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
1600
1601 ser_intr_mask = REG_RD(ser, regi_ser0, rw_intr_mask);
1602 ser_intr_mask.data_avail = regk_ser_yes;
1603 REG_WR(ser, regi_ser0, rw_intr_mask, ser_intr_mask);
1604#elif defined(CONFIG_ETRAX_KGDB_PORT1)
1605 /* Note: no shortcut registered (not handled by multiple_interrupt).
1606 See entry.S. */
1607 set_exception_vector(SER1_INTR_VECT, kgdb_handle_exception);
1608 /* Enable the ser irq in the global config. */
1609 intr_mask = REG_RD(intr_vect, regi_irq, rw_mask);
1610 intr_mask.ser1 = 1;
1611 REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
1612
1613 ser_intr_mask = REG_RD(ser, regi_ser1, rw_intr_mask);
1614 ser_intr_mask.data_avail = regk_ser_yes;
1615 REG_WR(ser, regi_ser1, rw_intr_mask, ser_intr_mask);
1616#elif defined(CONFIG_ETRAX_KGDB_PORT2)
1617 /* Note: no shortcut registered (not handled by multiple_interrupt).
1618 See entry.S. */
1619 set_exception_vector(SER2_INTR_VECT, kgdb_handle_exception);
1620 /* Enable the ser irq in the global config. */
1621 intr_mask = REG_RD(intr_vect, regi_irq, rw_mask);
1622 intr_mask.ser2 = 1;
1623 REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
1624
1625 ser_intr_mask = REG_RD(ser, regi_ser2, rw_intr_mask);
1626 ser_intr_mask.data_avail = regk_ser_yes;
1627 REG_WR(ser, regi_ser2, rw_intr_mask, ser_intr_mask);
1628#elif defined(CONFIG_ETRAX_KGDB_PORT3)
1629 /* Note: no shortcut registered (not handled by multiple_interrupt).
1630 See entry.S. */
1631 set_exception_vector(SER3_INTR_VECT, kgdb_handle_exception);
1632 /* Enable the ser irq in the global config. */
1633 intr_mask = REG_RD(intr_vect, regi_irq, rw_mask);
1634 intr_mask.ser3 = 1;
1635 REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
1636
1637 ser_intr_mask = REG_RD(ser, regi_ser3, rw_intr_mask);
1638 ser_intr_mask.data_avail = regk_ser_yes;
1639 REG_WR(ser, regi_ser3, rw_intr_mask, ser_intr_mask);
1640#endif
1641
1642}
1643/* Performs a complete re-start from scratch. */
1644static void
1645kill_restart(void)
1646{
1647 machine_restart("");
1648}
1649
1650/* Use this static breakpoint in the start-up only. */
1651
1652void
1653breakpoint(void)
1654{
1655 kgdb_started = 1;
1656 dynamic_bp = 0; /* This is a static, not a dynamic breakpoint. */
1657 __asm__ volatile ("break 8"); /* Jump to kgdb_handle_breakpoint. */
1658}
1659
1660/****************************** End of file **********************************/
diff --git a/arch/cris/arch-v32/kernel/kgdb_asm.S b/arch/cris/arch-v32/kernel/kgdb_asm.S
new file mode 100644
index 000000000000..b350dd279ed2
--- /dev/null
+++ b/arch/cris/arch-v32/kernel/kgdb_asm.S
@@ -0,0 +1,552 @@
1/*
2 * Copyright (C) 2004 Axis Communications AB
3 *
4 * Code for handling break 8, hardware breakpoint, single step, and serial
5 * port exceptions for kernel debugging purposes.
6 */
7
8#include <linux/config.h>
9#include <asm/arch/hwregs/intr_vect.h>
10
11 ;; Exported functions.
12 .globl kgdb_handle_exception
13
14kgdb_handle_exception:
15
16;; Create a register image of the caller.
17;;
18;; First of all, save the ACR on the stack since we need it for address calculations.
19;; We put it into the register struct later.
20
21 subq 4, $sp
22 move.d $acr, [$sp]
23
24;; Now we are free to use ACR all we want.
25;; If we were running this handler with interrupts on, we would have to be careful
26;; to save and restore CCS manually, but since we aren't we treat it like every other
27;; register.
28
29 move.d reg, $acr
30 move.d $r0, [$acr] ; Save R0 (start of register struct)
31 addq 4, $acr
32 move.d $r1, [$acr] ; Save R1
33 addq 4, $acr
34 move.d $r2, [$acr] ; Save R2
35 addq 4, $acr
36 move.d $r3, [$acr] ; Save R3
37 addq 4, $acr
38 move.d $r4, [$acr] ; Save R4
39 addq 4, $acr
40 move.d $r5, [$acr] ; Save R5
41 addq 4, $acr
42 move.d $r6, [$acr] ; Save R6
43 addq 4, $acr
44 move.d $r7, [$acr] ; Save R7
45 addq 4, $acr
46 move.d $r8, [$acr] ; Save R8
47 addq 4, $acr
48 move.d $r9, [$acr] ; Save R9
49 addq 4, $acr
50 move.d $r10, [$acr] ; Save R10
51 addq 4, $acr
52 move.d $r11, [$acr] ; Save R11
53 addq 4, $acr
54 move.d $r12, [$acr] ; Save R12
55 addq 4, $acr
56 move.d $r13, [$acr] ; Save R13
57 addq 4, $acr
58 move.d $sp, [$acr] ; Save SP (R14)
59 addq 4, $acr
60
61 ;; The ACR register is already saved on the stack, so pop it from there.
62 move.d [$sp],$r0
63 move.d $r0, [$acr]
64 addq 4, $acr
65
66 move $bz, [$acr]
67 addq 1, $acr
68 move $vr, [$acr]
69 addq 1, $acr
70 move $pid, [$acr]
71 addq 4, $acr
72 move $srs, [$acr]
73 addq 1, $acr
74 move $wz, [$acr]
75 addq 2, $acr
76 move $exs, [$acr]
77 addq 4, $acr
78 move $eda, [$acr]
79 addq 4, $acr
80 move $mof, [$acr]
81 addq 4, $acr
82 move $dz, [$acr]
83 addq 4, $acr
84 move $ebp, [$acr]
85 addq 4, $acr
86 move $erp, [$acr]
87 addq 4, $acr
88 move $srp, [$acr]
89 addq 4, $acr
90 move $nrp, [$acr]
91 addq 4, $acr
92 move $ccs, [$acr]
93 addq 4, $acr
94 move $usp, [$acr]
95 addq 4, $acr
96 move $spc, [$acr]
97 addq 4, $acr
98
99;; Skip the pseudo-PC.
100 addq 4, $acr
101
102;; Save the support registers in bank 0 - 3.
103 clear.d $r1 ; Bank counter
104 move.d sreg, $acr
105
106;; Bank 0
107 move $r1, $srs
108 nop
109 nop
110 nop
111 move $s0, $r0
112 move.d $r0, [$acr]
113 addq 4, $acr
114 move $s1, $r0
115 move.d $r0, [$acr]
116 addq 4, $acr
117 move $s2, $r0
118 move.d $r0, [$acr]
119 addq 4, $acr
120 move $s3, $r0
121 move.d $r0, [$acr]
122 addq 4, $acr
123 move $s4, $r0
124 move.d $r0, [$acr]
125 addq 4, $acr
126 move $s5, $r0
127 move.d $r0, [$acr]
128 addq 4, $acr
129 move $s6, $r0
130 move.d $r0, [$acr]
131 addq 4, $acr
132 move $s7, $r0
133 move.d $r0, [$acr]
134 addq 4, $acr
135 move $s8, $r0
136 move.d $r0, [$acr]
137 addq 4, $acr
138 move $s9, $r0
139 move.d $r0, [$acr]
140 addq 4, $acr
141 move $s10, $r0
142 move.d $r0, [$acr]
143 addq 4, $acr
144 move $s11, $r0
145 move.d $r0, [$acr]
146 addq 4, $acr
147 move $s12, $r0
148 move.d $r0, [$acr]
149 addq 4, $acr
150
151 ;; Nothing in S13 - S15, bank 0
152 clear.d [$acr]
153 addq 4, $acr
154 clear.d [$acr]
155 addq 4, $acr
156 clear.d [$acr]
157 addq 4, $acr
158
159;; Bank 1 and bank 2 have the same layout, hence the loop.
160 addq 1, $r1
1611:
162 move $r1, $srs
163 nop
164 nop
165 nop
166 move $s0, $r0
167 move.d $r0, [$acr]
168 addq 4, $acr
169 move $s1, $r0
170 move.d $r0, [$acr]
171 addq 4, $acr
172 move $s2, $r0
173 move.d $r0, [$acr]
174 addq 4, $acr
175 move $s3, $r0
176 move.d $r0, [$acr]
177 addq 4, $acr
178 move $s4, $r0
179 move.d $r0, [$acr]
180 addq 4, $acr
181 move $s5, $r0
182 move.d $r0, [$acr]
183 addq 4, $acr
184 move $s6, $r0
185 move.d $r0, [$acr]
186 addq 4, $acr
187
188 ;; Nothing in S7 - S15, bank 1 and 2
189 clear.d [$acr]
190 addq 4, $acr
191 clear.d [$acr]
192 addq 4, $acr
193 clear.d [$acr]
194 addq 4, $acr
195 clear.d [$acr]
196 addq 4, $acr
197 clear.d [$acr]
198 addq 4, $acr
199 clear.d [$acr]
200 addq 4, $acr
201 clear.d [$acr]
202 addq 4, $acr
203 clear.d [$acr]
204 addq 4, $acr
205 clear.d [$acr]
206 addq 4, $acr
207
208 addq 1, $r1
209 cmpq 3, $r1
210 bne 1b
211 nop
212
213;; Bank 3
214 move $r1, $srs
215 nop
216 nop
217 nop
218 move $s0, $r0
219 move.d $r0, [$acr]
220 addq 4, $acr
221 move $s1, $r0
222 move.d $r0, [$acr]
223 addq 4, $acr
224 move $s2, $r0
225 move.d $r0, [$acr]
226 addq 4, $acr
227 move $s3, $r0
228 move.d $r0, [$acr]
229 addq 4, $acr
230 move $s4, $r0
231 move.d $r0, [$acr]
232 addq 4, $acr
233 move $s5, $r0
234 move.d $r0, [$acr]
235 addq 4, $acr
236 move $s6, $r0
237 move.d $r0, [$acr]
238 addq 4, $acr
239 move $s7, $r0
240 move.d $r0, [$acr]
241 addq 4, $acr
242 move $s8, $r0
243 move.d $r0, [$acr]
244 addq 4, $acr
245 move $s9, $r0
246 move.d $r0, [$acr]
247 addq 4, $acr
248 move $s10, $r0
249 move.d $r0, [$acr]
250 addq 4, $acr
251 move $s11, $r0
252 move.d $r0, [$acr]
253 addq 4, $acr
254 move $s12, $r0
255 move.d $r0, [$acr]
256 addq 4, $acr
257 move $s13, $r0
258 move.d $r0, [$acr]
259 addq 4, $acr
260 move $s14, $r0
261 move.d $r0, [$acr]
262 addq 4, $acr
263;; Nothing in S15, bank 3
264 clear.d [$acr]
265 addq 4, $acr
266
267;; Check what got us here: get IDX field of EXS.
268 move $exs, $r10
269 and.d 0xff00, $r10
270 lsrq 8, $r10
271#if defined(CONFIG_ETRAX_KGDB_PORT0)
272 cmp.d SER0_INTR_VECT, $r10 ; IRQ for serial port 0
273 beq sigint
274 nop
275#elif defined(CONFIG_ETRAX_KGDB_PORT1)
276 cmp.d SER1_INTR_VECT, $r10 ; IRQ for serial port 1
277 beq sigint
278 nop
279#elif defined(CONFIG_ETRAX_KGDB_PORT2)
280 cmp.d SER2_INTR_VECT, $r10 ; IRQ for serial port 2
281 beq sigint
282 nop
283#elif defined(CONFIG_ETRAX_KGDB_PORT3)
284 cmp.d SER3_INTR_VECT, $r10 ; IRQ for serial port 3
285 beq sigint
286 nop
287#endif
288;; Multiple interrupt must be due to serial break.
289 cmp.d 0x30, $r10 ; Multiple interrupt
290 beq sigint
291 nop
292;; Neither of those? Then it's a sigtrap.
293 ba handle_comm
294 moveq 5, $r10 ; Set SIGTRAP (delay slot)
295
296sigint:
297 ;; Serial interrupt; get character
298 jsr getDebugChar
299 nop ; Delay slot
300 cmp.b 3, $r10 ; \003 (Ctrl-C)?
301 bne return ; No, get out of here
302 nop
303 moveq 2, $r10 ; Set SIGINT
304
305;;
306;; Handle the communication
307;;
308handle_comm:
309 move.d internal_stack+1020, $sp ; Use the internal stack which grows upwards
310 jsr handle_exception ; Interactive routine
311 nop
312
313;;
314;; Return to the caller
315;;
316return:
317
318;; First of all, write the support registers.
319 clear.d $r1 ; Bank counter
320 move.d sreg, $acr
321
322;; Bank 0
323 move $r1, $srs
324 nop
325 nop
326 nop
327 move.d [$acr], $r0
328 move $r0, $s0
329 addq 4, $acr
330 move.d [$acr], $r0
331 move $r0, $s1
332 addq 4, $acr
333 move.d [$acr], $r0
334 move $r0, $s2
335 addq 4, $acr
336 move.d [$acr], $r0
337 move $r0, $s3
338 addq 4, $acr
339 move.d [$acr], $r0
340 move $r0, $s4
341 addq 4, $acr
342 move.d [$acr], $r0
343 move $r0, $s5
344 addq 4, $acr
345
346;; Nothing in S6 - S7, bank 0.
347 addq 4, $acr
348 addq 4, $acr
349
350 move.d [$acr], $r0
351 move $r0, $s8
352 addq 4, $acr
353 move.d [$acr], $r0
354 move $r0, $s9
355 addq 4, $acr
356 move.d [$acr], $r0
357 move $r0, $s10
358 addq 4, $acr
359 move.d [$acr], $r0
360 move $r0, $s11
361 addq 4, $acr
362 move.d [$acr], $r0
363 move $r0, $s12
364 addq 4, $acr
365
366;; Nothing in S13 - S15, bank 0
367 addq 4, $acr
368 addq 4, $acr
369 addq 4, $acr
370
371;; Bank 1 and bank 2 have the same layout, hence the loop.
372 addq 1, $r1
3732:
374 move $r1, $srs
375 nop
376 nop
377 nop
378 move.d [$acr], $r0
379 move $r0, $s0
380 addq 4, $acr
381 move.d [$acr], $r0
382 move $r0, $s1
383 addq 4, $acr
384 move.d [$acr], $r0
385 move $r0, $s2
386 addq 4, $acr
387
388;; S3 (MM_CAUSE) is read-only.
389 addq 4, $acr
390
391 move.d [$acr], $r0
392 move $r0, $s4
393 addq 4, $acr
394
395;; FIXME: Actually write S5/S6? (Affects MM_CAUSE.)
396 addq 4, $acr
397 addq 4, $acr
398
399;; Nothing in S7 - S15, bank 1 and 2
400 addq 4, $acr
401 addq 4, $acr
402 addq 4, $acr
403 addq 4, $acr
404 addq 4, $acr
405 addq 4, $acr
406 addq 4, $acr
407 addq 4, $acr
408 addq 4, $acr
409
410 addq 1, $r1
411 cmpq 3, $r1
412 bne 2b
413 nop
414
415;; Bank 3
416 move $r1, $srs
417 nop
418 nop
419 nop
420 move.d [$acr], $r0
421 move $r0, $s0
422 addq 4, $acr
423 move.d [$acr], $r0
424 move $r0, $s1
425 addq 4, $acr
426 move.d [$acr], $r0
427 move $r0, $s2
428 addq 4, $acr
429 move.d [$acr], $r0
430 move $r0, $s3
431 addq 4, $acr
432 move.d [$acr], $r0
433 move $r0, $s4
434 addq 4, $acr
435 move.d [$acr], $r0
436 move $r0, $s5
437 addq 4, $acr
438 move.d [$acr], $r0
439 move $r0, $s6
440 addq 4, $acr
441 move.d [$acr], $r0
442 move $r0, $s7
443 addq 4, $acr
444 move.d [$acr], $r0
445 move $r0, $s8
446 addq 4, $acr
447 move.d [$acr], $r0
448 move $r0, $s9
449 addq 4, $acr
450 move.d [$acr], $r0
451 move $r0, $s10
452 addq 4, $acr
453 move.d [$acr], $r0
454 move $r0, $s11
455 addq 4, $acr
456 move.d [$acr], $r0
457 move $r0, $s12
458 addq 4, $acr
459 move.d [$acr], $r0
460 move $r0, $s13
461 addq 4, $acr
462 move.d [$acr], $r0
463 move $r0, $s14
464 addq 4, $acr
465
466;; Nothing in S15, bank 3
467 addq 4, $acr
468
469;; Now, move on to the regular register restoration process.
470
471 move.d reg, $acr ; Reset ACR to point at the beginning of the register image
472 move.d [$acr], $r0 ; Restore R0
473 addq 4, $acr
474 move.d [$acr], $r1 ; Restore R1
475 addq 4, $acr
476 move.d [$acr], $r2 ; Restore R2
477 addq 4, $acr
478 move.d [$acr], $r3 ; Restore R3
479 addq 4, $acr
480 move.d [$acr], $r4 ; Restore R4
481 addq 4, $acr
482 move.d [$acr], $r5 ; Restore R5
483 addq 4, $acr
484 move.d [$acr], $r6 ; Restore R6
485 addq 4, $acr
486 move.d [$acr], $r7 ; Restore R7
487 addq 4, $acr
488 move.d [$acr], $r8 ; Restore R8
489 addq 4, $acr
490 move.d [$acr], $r9 ; Restore R9
491 addq 4, $acr
492 move.d [$acr], $r10 ; Restore R10
493 addq 4, $acr
494 move.d [$acr], $r11 ; Restore R11
495 addq 4, $acr
496 move.d [$acr], $r12 ; Restore R12
497 addq 4, $acr
498 move.d [$acr], $r13 ; Restore R13
499
500;;
501;; We restore all registers, even though some of them probably haven't changed.
502;;
503
504 addq 4, $acr
505 move.d [$acr], $sp ; Restore SP (R14)
506
507 ;; ACR cannot be restored just yet.
508 addq 8, $acr
509
510 ;; Skip BZ, VR.
511 addq 2, $acr
512
513 move [$acr], $pid ; Restore PID
514 addq 4, $acr
515 move [$acr], $srs ; Restore SRS
516 nop
517 nop
518 nop
519 addq 1, $acr
520
521 ;; Skip WZ.
522 addq 2, $acr
523
524 move [$acr], $exs ; Restore EXS.
525 addq 4, $acr
526 move [$acr], $eda ; Restore EDA.
527 addq 4, $acr
528 move [$acr], $mof ; Restore MOF.
529
530 ;; Skip DZ.
531 addq 8, $acr
532
533 move [$acr], $ebp ; Restore EBP.
534 addq 4, $acr
535 move [$acr], $erp ; Restore ERP.
536 addq 4, $acr
537 move [$acr], $srp ; Restore SRP.
538 addq 4, $acr
539 move [$acr], $nrp ; Restore NRP.
540 addq 4, $acr
541 move [$acr], $ccs ; Restore CCS like an ordinary register.
542 addq 4, $acr
543 move [$acr], $usp ; Restore USP
544 addq 4, $acr
545 move [$acr], $spc ; Restore SPC
546 ; No restoration of pseudo-PC of course.
547
548 move.d reg, $acr ; Reset ACR to point at the beginning of the register image
549 add.d 15*4, $acr
550 move.d [$acr], $acr ; Finally, restore ACR.
551 rete ; Same as jump ERP
552 rfe ; Shifts CCS
diff --git a/arch/cris/arch-v32/kernel/pinmux.c b/arch/cris/arch-v32/kernel/pinmux.c
new file mode 100644
index 000000000000..a2b8aa37c1bf
--- /dev/null
+++ b/arch/cris/arch-v32/kernel/pinmux.c
@@ -0,0 +1,229 @@
1/*
2 * Allocator for I/O pins. All pins are allocated to GPIO at bootup.
3 * Unassigned pins and GPIO pins can be allocated to a fixed interface
4 * or the I/O processor instead.
5 *
6 * Copyright (c) 2004 Axis Communications AB.
7 */
8
9#include <linux/init.h>
10#include <linux/errno.h>
11#include <linux/kernel.h>
12#include <linux/string.h>
13#include <linux/spinlock.h>
14#include <asm/arch/hwregs/reg_map.h>
15#include <asm/arch/hwregs/reg_rdwr.h>
16#include <asm/arch/pinmux.h>
17#include <asm/arch/hwregs/pinmux_defs.h>
18
19#undef DEBUG
20
21#define PORT_PINS 18
22#define PORTS 4
23
24static char pins[PORTS][PORT_PINS];
25static DEFINE_SPINLOCK(pinmux_lock);
26
27static void crisv32_pinmux_set(int port);
28
29int
30crisv32_pinmux_init(void)
31{
32 static int initialized = 0;
33
34 if (!initialized) {
35 reg_pinmux_rw_pa pa = REG_RD(pinmux, regi_pinmux, rw_pa);
36 initialized = 1;
37 pa.pa0 = pa.pa1 = pa.pa2 = pa.pa3 =
38 pa.pa4 = pa.pa5 = pa.pa6 = pa.pa7 = regk_pinmux_yes;
39 REG_WR(pinmux, regi_pinmux, rw_pa, pa);
40 crisv32_pinmux_alloc(PORT_B, 0, PORT_PINS - 1, pinmux_gpio);
41 crisv32_pinmux_alloc(PORT_C, 0, PORT_PINS - 1, pinmux_gpio);
42 crisv32_pinmux_alloc(PORT_D, 0, PORT_PINS - 1, pinmux_gpio);
43 crisv32_pinmux_alloc(PORT_E, 0, PORT_PINS - 1, pinmux_gpio);
44 }
45
46 return 0;
47}
48
49int
50crisv32_pinmux_alloc(int port, int first_pin, int last_pin, enum pin_mode mode)
51{
52 int i;
53 unsigned long flags;
54
55 crisv32_pinmux_init();
56
57 if (port > PORTS)
58 return -EINVAL;
59
60 spin_lock_irqsave(&pinmux_lock, flags);
61
62 for (i = first_pin; i <= last_pin; i++)
63 {
64 if ((pins[port][i] != pinmux_none) && (pins[port][i] != pinmux_gpio) &&
65 (pins[port][i] != mode))
66 {
67 spin_unlock_irqrestore(&pinmux_lock, flags);
68#ifdef DEBUG
69 panic("Pinmux alloc failed!\n");
70#endif
71 return -EPERM;
72 }
73 }
74
75 for (i = first_pin; i <= last_pin; i++)
76 pins[port][i] = mode;
77
78 crisv32_pinmux_set(port);
79
80 spin_unlock_irqrestore(&pinmux_lock, flags);
81
82 return 0;
83}
84
85int
86crisv32_pinmux_alloc_fixed(enum fixed_function function)
87{
88 int ret = -EINVAL;
89 char saved[sizeof pins];
90 unsigned long flags;
91
92 spin_lock_irqsave(&pinmux_lock, flags);
93
94 /* Save internal data for recovery */
95 memcpy(saved, pins, sizeof pins);
96
97 reg_pinmux_rw_hwprot hwprot = REG_RD(pinmux, regi_pinmux, rw_hwprot);
98
99 switch(function)
100 {
101 case pinmux_ser1:
102 ret = crisv32_pinmux_alloc(PORT_C, 4, 7, pinmux_fixed);
103 hwprot.ser1 = regk_pinmux_yes;
104 break;
105 case pinmux_ser2:
106 ret = crisv32_pinmux_alloc(PORT_C, 8, 11, pinmux_fixed);
107 hwprot.ser2 = regk_pinmux_yes;
108 break;
109 case pinmux_ser3:
110 ret = crisv32_pinmux_alloc(PORT_C, 12, 15, pinmux_fixed);
111 hwprot.ser3 = regk_pinmux_yes;
112 break;
113 case pinmux_sser0:
114 ret = crisv32_pinmux_alloc(PORT_C, 0, 3, pinmux_fixed);
115 ret |= crisv32_pinmux_alloc(PORT_C, 16, 16, pinmux_fixed);
116 hwprot.sser0 = regk_pinmux_yes;
117 break;
118 case pinmux_sser1:
119 ret = crisv32_pinmux_alloc(PORT_D, 0, 4, pinmux_fixed);
120 hwprot.sser1 = regk_pinmux_yes;
121 break;
122 case pinmux_ata0:
123 ret = crisv32_pinmux_alloc(PORT_D, 5, 7, pinmux_fixed);
124 ret |= crisv32_pinmux_alloc(PORT_D, 15, 17, pinmux_fixed);
125 hwprot.ata0 = regk_pinmux_yes;
126 break;
127 case pinmux_ata1:
128 ret = crisv32_pinmux_alloc(PORT_D, 0, 4, pinmux_fixed);
129 ret |= crisv32_pinmux_alloc(PORT_E, 17, 17, pinmux_fixed);
130 hwprot.ata1 = regk_pinmux_yes;
131 break;
132 case pinmux_ata2:
133 ret = crisv32_pinmux_alloc(PORT_C, 11, 15, pinmux_fixed);
134 ret |= crisv32_pinmux_alloc(PORT_E, 3, 3, pinmux_fixed);
135 hwprot.ata2 = regk_pinmux_yes;
136 break;
137 case pinmux_ata3:
138 ret = crisv32_pinmux_alloc(PORT_C, 8, 10, pinmux_fixed);
139 ret |= crisv32_pinmux_alloc(PORT_C, 0, 2, pinmux_fixed);
140 hwprot.ata2 = regk_pinmux_yes;
141 break;
142 case pinmux_ata:
143 ret = crisv32_pinmux_alloc(PORT_B, 0, 15, pinmux_fixed);
144 ret |= crisv32_pinmux_alloc(PORT_D, 8, 15, pinmux_fixed);
145 hwprot.ata = regk_pinmux_yes;
146 break;
147 case pinmux_eth1:
148 ret = crisv32_pinmux_alloc(PORT_E, 0, 17, pinmux_fixed);
149 hwprot.eth1 = regk_pinmux_yes;
150 hwprot.eth1_mgm = regk_pinmux_yes;
151 break;
152 case pinmux_timer:
153 ret = crisv32_pinmux_alloc(PORT_C, 16, 16, pinmux_fixed);
154 hwprot.timer = regk_pinmux_yes;
155 spin_unlock_irqrestore(&pinmux_lock, flags);
156 return ret;
157 }
158
159 if (!ret)
160 REG_WR(pinmux, regi_pinmux, rw_hwprot, hwprot);
161 else
162 memcpy(pins, saved, sizeof pins);
163
164 spin_unlock_irqrestore(&pinmux_lock, flags);
165
166 return ret;
167}
168
169void
170crisv32_pinmux_set(int port)
171{
172 int i;
173 int gpio_val = 0;
174 int iop_val = 0;
175
176 for (i = 0; i < PORT_PINS; i++)
177 {
178 if (pins[port][i] == pinmux_gpio)
179 gpio_val |= (1 << i);
180 else if (pins[port][i] == pinmux_iop)
181 iop_val |= (1 << i);
182 }
183
184 REG_WRITE(int, regi_pinmux + REG_RD_ADDR_pinmux_rw_pb_gio + 8*port, gpio_val);
185 REG_WRITE(int, regi_pinmux + REG_RD_ADDR_pinmux_rw_pb_iop + 8*port, iop_val);
186
187#ifdef DEBUG
188 crisv32_pinmux_dump();
189#endif
190}
191
192int
193crisv32_pinmux_dealloc(int port, int first_pin, int last_pin)
194{
195 int i;
196 unsigned long flags;
197
198 crisv32_pinmux_init();
199
200 if (port > PORTS)
201 return -EINVAL;
202
203 spin_lock_irqsave(&pinmux_lock, flags);
204
205 for (i = first_pin; i <= last_pin; i++)
206 pins[port][i] = pinmux_none;
207
208 crisv32_pinmux_set(port);
209 spin_unlock_irqrestore(&pinmux_lock, flags);
210
211 return 0;
212}
213
214void
215crisv32_pinmux_dump(void)
216{
217 int i, j;
218
219 crisv32_pinmux_init();
220
221 for (i = 0; i < PORTS; i++)
222 {
223 printk("Port %c\n", 'B'+i);
224 for (j = 0; j < PORT_PINS; j++)
225 printk(" Pin %d = %d\n", j, pins[i][j]);
226 }
227}
228
229__initcall(crisv32_pinmux_init);
diff --git a/arch/cris/arch-v32/kernel/process.c b/arch/cris/arch-v32/kernel/process.c
new file mode 100644
index 000000000000..882be42114f7
--- /dev/null
+++ b/arch/cris/arch-v32/kernel/process.c
@@ -0,0 +1,270 @@
1/*
2 * Copyright (C) 2000-2003 Axis Communications AB
3 *
4 * Authors: Bjorn Wesen (bjornw@axis.com)
5 * Mikael Starvik (starvik@axis.com)
6 * Tobias Anderberg (tobiasa@axis.com), CRISv32 port.
7 *
8 * This file handles the architecture-dependent parts of process handling..
9 */
10
11#include <linux/config.h>
12#include <linux/sched.h>
13#include <linux/err.h>
14#include <linux/fs.h>
15#include <linux/slab.h>
16#include <asm/arch/hwregs/reg_rdwr.h>
17#include <asm/arch/hwregs/reg_map.h>
18#include <asm/arch/hwregs/timer_defs.h>
19#include <asm/arch/hwregs/intr_vect_defs.h>
20
21extern void stop_watchdog(void);
22
23#ifdef CONFIG_ETRAX_GPIO
24extern void etrax_gpio_wake_up_check(void); /* Defined in drivers/gpio.c. */
25#endif
26
27extern int cris_hlt_counter;
28
29/* We use this if we don't have any better idle routine. */
30void default_idle(void)
31{
32 local_irq_disable();
33 if (!need_resched() && !cris_hlt_counter) {
34 /* Halt until exception. */
35 __asm__ volatile("ei \n\t"
36 "halt ");
37 }
38 local_irq_enable();
39}
40
41/*
42 * Free current thread data structures etc..
43 */
44
45extern void deconfigure_bp(long pid);
46void exit_thread(void)
47{
48 deconfigure_bp(current->pid);
49}
50
51/*
52 * If the watchdog is enabled, disable interrupts and enter an infinite loop.
53 * The watchdog will reset the CPU after 0.1s. If the watchdog isn't enabled
54 * then enable it and wait.
55 */
56extern void arch_enable_nmi(void);
57
58void
59hard_reset_now(void)
60{
61 /*
62 * Don't declare this variable elsewhere. We don't want any other
63 * code to know about it than the watchdog handler in entry.S and
64 * this code, implementing hard reset through the watchdog.
65 */
66#if defined(CONFIG_ETRAX_WATCHDOG)
67 extern int cause_of_death;
68#endif
69
70 printk("*** HARD RESET ***\n");
71 local_irq_disable();
72
73#if defined(CONFIG_ETRAX_WATCHDOG)
74 cause_of_death = 0xbedead;
75#else
76{
77 reg_timer_rw_wd_ctrl wd_ctrl = {0};
78
79 stop_watchdog();
80
81 wd_ctrl.key = 16; /* Arbitrary key. */
82 wd_ctrl.cnt = 1; /* Minimum time. */
83 wd_ctrl.cmd = regk_timer_start;
84
85 arch_enable_nmi();
86 REG_WR(timer, regi_timer, rw_wd_ctrl, wd_ctrl);
87}
88#endif
89
90 while (1)
91 ; /* Wait for reset. */
92}
93
94/*
95 * Return saved PC of a blocked thread.
96 */
97unsigned long thread_saved_pc(struct task_struct *t)
98{
99 return (unsigned long)user_regs(t->thread_info)->erp;
100}
101
102static void
103kernel_thread_helper(void* dummy, int (*fn)(void *), void * arg)
104{
105 fn(arg);
106 do_exit(-1); /* Should never be called, return bad exit value. */
107}
108
109/* Create a kernel thread. */
110int
111kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
112{
113 struct pt_regs regs;
114
115 memset(&regs, 0, sizeof(regs));
116
117 /* Don't use r10 since that is set to 0 in copy_thread. */
118 regs.r11 = (unsigned long) fn;
119 regs.r12 = (unsigned long) arg;
120 regs.erp = (unsigned long) kernel_thread_helper;
121 regs.ccs = 1 << (I_CCS_BITNR + CCS_SHIFT);
122
123 /* Create the new process. */
124 return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, &regs, 0, NULL, NULL);
125}
126
127/*
128 * Setup the child's kernel stack with a pt_regs and call switch_stack() on it.
129 * It will be unnested during _resume and _ret_from_sys_call when the new thread
130 * is scheduled.
131 *
132 * Also setup the thread switching structure which is used to keep
133 * thread-specific data during _resumes.
134 */
135
136extern asmlinkage void ret_from_fork(void);
137
138int
139copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
140 unsigned long unused,
141 struct task_struct *p, struct pt_regs *regs)
142{
143 struct pt_regs *childregs;
144 struct switch_stack *swstack;
145
146 /*
147 * Put the pt_regs structure at the end of the new kernel stack page and
148 * fix it up. Note: the task_struct doubles as the kernel stack for the
149 * task.
150 */
151 childregs = user_regs(p->thread_info);
152 *childregs = *regs; /* Struct copy of pt_regs. */
153 p->set_child_tid = p->clear_child_tid = NULL;
154 childregs->r10 = 0; /* Child returns 0 after a fork/clone. */
155
156 /* Set a new TLS ?
157 * The TLS is in $mof beacuse it is the 5th argument to sys_clone.
158 */
159 if (p->mm && (clone_flags & CLONE_SETTLS)) {
160 p->thread_info->tls = regs->mof;
161 }
162
163 /* Put the switch stack right below the pt_regs. */
164 swstack = ((struct switch_stack *) childregs) - 1;
165
166 /* Paramater to ret_from_sys_call. 0 is don't restart the syscall. */
167 swstack->r9 = 0;
168
169 /*
170 * We want to return into ret_from_sys_call after the _resume.
171 * ret_from_fork will call ret_from_sys_call.
172 */
173 swstack->return_ip = (unsigned long) ret_from_fork;
174
175 /* Fix the user-mode and kernel-mode stackpointer. */
176 p->thread.usp = usp;
177 p->thread.ksp = (unsigned long) swstack;
178
179 return 0;
180}
181
182/*
183 * Be aware of the "magic" 7th argument in the four system-calls below.
184 * They need the latest stackframe, which is put as the 7th argument by
185 * entry.S. The previous arguments are dummies or actually used, but need
186 * to be defined to reach the 7th argument.
187 *
188 * N.B.: Another method to get the stackframe is to use current_regs(). But
189 * it returns the latest stack-frame stacked when going from _user mode_ and
190 * some of these (at least sys_clone) are called from kernel-mode sometimes
191 * (for example during kernel_thread, above) and thus cannot use it. Thus,
192 * to be sure not to get any surprises, we use the method for the other calls
193 * as well.
194 */
195asmlinkage int
196sys_fork(long r10, long r11, long r12, long r13, long mof, long srp,
197 struct pt_regs *regs)
198{
199 return do_fork(SIGCHLD, rdusp(), regs, 0, NULL, NULL);
200}
201
202/* FIXME: Is parent_tid/child_tid really third/fourth argument? Update lib? */
203asmlinkage int
204sys_clone(unsigned long newusp, unsigned long flags, int *parent_tid, int *child_tid,
205 unsigned long tls, long srp, struct pt_regs *regs)
206{
207 if (!newusp)
208 newusp = rdusp();
209
210 return do_fork(flags, newusp, regs, 0, parent_tid, child_tid);
211}
212
213/*
214 * vfork is a system call in i386 because of register-pressure - maybe
215 * we can remove it and handle it in libc but we put it here until then.
216 */
217asmlinkage int
218sys_vfork(long r10, long r11, long r12, long r13, long mof, long srp,
219 struct pt_regs *regs)
220{
221 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, rdusp(), regs, 0, NULL, NULL);
222}
223
224/* sys_execve() executes a new program. */
225asmlinkage int
226sys_execve(const char *fname, char **argv, char **envp, long r13, long mof, long srp,
227 struct pt_regs *regs)
228{
229 int error;
230 char *filename;
231
232 filename = getname(fname);
233 error = PTR_ERR(filename);
234
235 if (IS_ERR(filename))
236 goto out;
237
238 error = do_execve(filename, argv, envp, regs);
239 putname(filename);
240 out:
241 return error;
242}
243
244unsigned long
245get_wchan(struct task_struct *p)
246{
247 /* TODO */
248 return 0;
249}
250#undef last_sched
251#undef first_sched
252
253void show_regs(struct pt_regs * regs)
254{
255 unsigned long usp = rdusp();
256 printk("ERP: %08lx SRP: %08lx CCS: %08lx USP: %08lx MOF: %08lx\n",
257 regs->erp, regs->srp, regs->ccs, usp, regs->mof);
258
259 printk(" r0: %08lx r1: %08lx r2: %08lx r3: %08lx\n",
260 regs->r0, regs->r1, regs->r2, regs->r3);
261
262 printk(" r4: %08lx r5: %08lx r6: %08lx r7: %08lx\n",
263 regs->r4, regs->r5, regs->r6, regs->r7);
264
265 printk(" r8: %08lx r9: %08lx r10: %08lx r11: %08lx\n",
266 regs->r8, regs->r9, regs->r10, regs->r11);
267
268 printk("r12: %08lx r13: %08lx oR10: %08lx\n",
269 regs->r12, regs->r13, regs->orig_r10);
270}
diff --git a/arch/cris/arch-v32/kernel/ptrace.c b/arch/cris/arch-v32/kernel/ptrace.c
new file mode 100644
index 000000000000..208489da2a87
--- /dev/null
+++ b/arch/cris/arch-v32/kernel/ptrace.c
@@ -0,0 +1,597 @@
1/*
2 * Copyright (C) 2000-2003, Axis Communications AB.
3 */
4
5#include <linux/kernel.h>
6#include <linux/sched.h>
7#include <linux/mm.h>
8#include <linux/smp.h>
9#include <linux/smp_lock.h>
10#include <linux/errno.h>
11#include <linux/ptrace.h>
12#include <linux/user.h>
13#include <linux/signal.h>
14#include <linux/security.h>
15
16#include <asm/uaccess.h>
17#include <asm/page.h>
18#include <asm/pgtable.h>
19#include <asm/system.h>
20#include <asm/processor.h>
21#include <asm/arch/hwregs/supp_reg.h>
22
23/*
24 * Determines which bits in CCS the user has access to.
25 * 1 = access, 0 = no access.
26 */
27#define CCS_MASK 0x00087c00 /* SXNZVC */
28
29#define SBIT_USER (1 << (S_CCS_BITNR + CCS_SHIFT))
30
31static int put_debugreg(long pid, unsigned int regno, long data);
32static long get_debugreg(long pid, unsigned int regno);
33static unsigned long get_pseudo_pc(struct task_struct *child);
34void deconfigure_bp(long pid);
35
36extern unsigned long cris_signal_return_page;
37
38/*
39 * Get contents of register REGNO in task TASK.
40 */
41long get_reg(struct task_struct *task, unsigned int regno)
42{
43 /* USP is a special case, it's not in the pt_regs struct but
44 * in the tasks thread struct
45 */
46 unsigned long ret;
47
48 if (regno <= PT_EDA)
49 ret = ((unsigned long *)user_regs(task->thread_info))[regno];
50 else if (regno == PT_USP)
51 ret = task->thread.usp;
52 else if (regno == PT_PPC)
53 ret = get_pseudo_pc(task);
54 else if (regno <= PT_MAX)
55 ret = get_debugreg(task->pid, regno);
56 else
57 ret = 0;
58
59 return ret;
60}
61
62/*
63 * Write contents of register REGNO in task TASK.
64 */
65int put_reg(struct task_struct *task, unsigned int regno, unsigned long data)
66{
67 if (regno <= PT_EDA)
68 ((unsigned long *)user_regs(task->thread_info))[regno] = data;
69 else if (regno == PT_USP)
70 task->thread.usp = data;
71 else if (regno == PT_PPC) {
72 /* Write pseudo-PC to ERP only if changed. */
73 if (data != get_pseudo_pc(task))
74 ((unsigned long *)user_regs(task->thread_info))[PT_ERP] = data;
75 } else if (regno <= PT_MAX)
76 return put_debugreg(task->pid, regno, data);
77 else
78 return -1;
79 return 0;
80}
81
82/*
83 * Called by kernel/ptrace.c when detaching.
84 *
85 * Make sure the single step bit is not set.
86 */
87void
88ptrace_disable(struct task_struct *child)
89{
90 unsigned long tmp;
91
92 /* Deconfigure SPC and S-bit. */
93 tmp = get_reg(child, PT_CCS) & ~SBIT_USER;
94 put_reg(child, PT_CCS, tmp);
95 put_reg(child, PT_SPC, 0);
96
97 /* Deconfigure any watchpoints associated with the child. */
98 deconfigure_bp(child->pid);
99}
100
101
102asmlinkage int
103sys_ptrace(long request, long pid, long addr, long data)
104{
105 struct task_struct *child;
106 int ret;
107 unsigned long __user *datap = (unsigned long __user *)data;
108
109 lock_kernel();
110 ret = -EPERM;
111
112 if (request == PTRACE_TRACEME) {
113 /* are we already being traced? */
114 if (current->ptrace & PT_PTRACED)
115 goto out;
116 ret = security_ptrace(current->parent, current);
117 if (ret)
118 goto out;
119 /* set the ptrace bit in the process flags. */
120 current->ptrace |= PT_PTRACED;
121 ret = 0;
122 goto out;
123 }
124
125 ret = -ESRCH;
126 read_lock(&tasklist_lock);
127 child = find_task_by_pid(pid);
128
129 if (child)
130 get_task_struct(child);
131
132 read_unlock(&tasklist_lock);
133
134 if (!child)
135 goto out;
136
137 ret = -EPERM;
138
139 if (pid == 1) /* Leave the init process alone! */
140 goto out_tsk;
141
142 if (request == PTRACE_ATTACH) {
143 ret = ptrace_attach(child);
144 goto out_tsk;
145 }
146
147 ret = ptrace_check_attach(child, request == PTRACE_KILL);
148 if (ret < 0)
149 goto out_tsk;
150
151 switch (request) {
152 /* Read word at location address. */
153 case PTRACE_PEEKTEXT:
154 case PTRACE_PEEKDATA: {
155 unsigned long tmp;
156 int copied;
157
158 ret = -EIO;
159
160 /* The signal trampoline page is outside the normal user-addressable
161 * space but still accessible. This is hack to make it possible to
162 * access the signal handler code in GDB.
163 */
164 if ((addr & PAGE_MASK) == cris_signal_return_page) {
165 /* The trampoline page is globally mapped, no page table to traverse.*/
166 tmp = *(unsigned long*)addr;
167 } else {
168 copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
169
170 if (copied != sizeof(tmp))
171 break;
172 }
173
174 ret = put_user(tmp,datap);
175 break;
176 }
177
178 /* Read the word at location address in the USER area. */
179 case PTRACE_PEEKUSR: {
180 unsigned long tmp;
181
182 ret = -EIO;
183 if ((addr & 3) || addr < 0 || addr > PT_MAX << 2)
184 break;
185
186 tmp = get_reg(child, addr >> 2);
187 ret = put_user(tmp, datap);
188 break;
189 }
190
191 /* Write the word at location address. */
192 case PTRACE_POKETEXT:
193 case PTRACE_POKEDATA:
194 ret = 0;
195
196 if (access_process_vm(child, addr, &data, sizeof(data), 1) == sizeof(data))
197 break;
198
199 ret = -EIO;
200 break;
201
202 /* Write the word at location address in the USER area. */
203 case PTRACE_POKEUSR:
204 ret = -EIO;
205 if ((addr & 3) || addr < 0 || addr > PT_MAX << 2)
206 break;
207
208 addr >>= 2;
209
210 if (addr == PT_CCS) {
211 /* don't allow the tracing process to change stuff like
212 * interrupt enable, kernel/user bit, dma enables etc.
213 */
214 data &= CCS_MASK;
215 data |= get_reg(child, PT_CCS) & ~CCS_MASK;
216 }
217 if (put_reg(child, addr, data))
218 break;
219 ret = 0;
220 break;
221
222 case PTRACE_SYSCALL:
223 case PTRACE_CONT:
224 ret = -EIO;
225
226 if (!valid_signal(data))
227 break;
228
229 /* Continue means no single-step. */
230 put_reg(child, PT_SPC, 0);
231
232 if (!get_debugreg(child->pid, PT_BP_CTRL)) {
233 unsigned long tmp;
234 /* If no h/w bp configured, disable S bit. */
235 tmp = get_reg(child, PT_CCS) & ~SBIT_USER;
236 put_reg(child, PT_CCS, tmp);
237 }
238
239 if (request == PTRACE_SYSCALL) {
240 set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
241 }
242 else {
243 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
244 }
245
246 child->exit_code = data;
247
248 /* TODO: make sure any pending breakpoint is killed */
249 wake_up_process(child);
250 ret = 0;
251
252 break;
253
254 /* Make the child exit by sending it a sigkill. */
255 case PTRACE_KILL:
256 ret = 0;
257
258 if (child->exit_state == EXIT_ZOMBIE)
259 break;
260
261 child->exit_code = SIGKILL;
262
263 /* Deconfigure single-step and h/w bp. */
264 ptrace_disable(child);
265
266 /* TODO: make sure any pending breakpoint is killed */
267 wake_up_process(child);
268 break;
269
270 /* Set the trap flag. */
271 case PTRACE_SINGLESTEP: {
272 unsigned long tmp;
273 ret = -EIO;
274
275 /* Set up SPC if not set already (in which case we have
276 no other choice but to trust it). */
277 if (!get_reg(child, PT_SPC)) {
278 /* In case we're stopped in a delay slot. */
279 tmp = get_reg(child, PT_ERP) & ~1;
280 put_reg(child, PT_SPC, tmp);
281 }
282 tmp = get_reg(child, PT_CCS) | SBIT_USER;
283 put_reg(child, PT_CCS, tmp);
284
285 if (!valid_signal(data))
286 break;
287
288 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
289
290 /* TODO: set some clever breakpoint mechanism... */
291
292 child->exit_code = data;
293 wake_up_process(child);
294 ret = 0;
295 break;
296
297 }
298 case PTRACE_DETACH:
299 ret = ptrace_detach(child, data);
300 break;
301
302 /* Get all GP registers from the child. */
303 case PTRACE_GETREGS: {
304 int i;
305 unsigned long tmp;
306
307 for (i = 0; i <= PT_MAX; i++) {
308 tmp = get_reg(child, i);
309
310 if (put_user(tmp, datap)) {
311 ret = -EFAULT;
312 goto out_tsk;
313 }
314
315 datap++;
316 }
317
318 ret = 0;
319 break;
320 }
321
322 /* Set all GP registers in the child. */
323 case PTRACE_SETREGS: {
324 int i;
325 unsigned long tmp;
326
327 for (i = 0; i <= PT_MAX; i++) {
328 if (get_user(tmp, datap)) {
329 ret = -EFAULT;
330 goto out_tsk;
331 }
332
333 if (i == PT_CCS) {
334 tmp &= CCS_MASK;
335 tmp |= get_reg(child, PT_CCS) & ~CCS_MASK;
336 }
337
338 put_reg(child, i, tmp);
339 datap++;
340 }
341
342 ret = 0;
343 break;
344 }
345
346 default:
347 ret = ptrace_request(child, request, addr, data);
348 break;
349 }
350out_tsk:
351 put_task_struct(child);
352out:
353 unlock_kernel();
354 return ret;
355}
356
357void do_syscall_trace(void)
358{
359 if (!test_thread_flag(TIF_SYSCALL_TRACE))
360 return;
361
362 if (!(current->ptrace & PT_PTRACED))
363 return;
364
365 /* the 0x80 provides a way for the tracing parent to distinguish
366 between a syscall stop and SIGTRAP delivery */
367 ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
368 ? 0x80 : 0));
369
370 /*
371 * This isn't the same as continuing with a signal, but it will do for
372 * normal use.
373 */
374 if (current->exit_code) {
375 send_sig(current->exit_code, current, 1);
376 current->exit_code = 0;
377 }
378}
379
380/* Returns the size of an instruction that has a delay slot. */
381
382static int insn_size(struct task_struct *child, unsigned long pc)
383{
384 unsigned long opcode;
385 int copied;
386 int opsize = 0;
387
388 /* Read the opcode at pc (do what PTRACE_PEEKTEXT would do). */
389 copied = access_process_vm(child, pc, &opcode, sizeof(opcode), 0);
390 if (copied != sizeof(opcode))
391 return 0;
392
393 switch ((opcode & 0x0f00) >> 8) {
394 case 0x0:
395 case 0x9:
396 case 0xb:
397 opsize = 2;
398 break;
399 case 0xe:
400 case 0xf:
401 opsize = 6;
402 break;
403 case 0xd:
404 /* Could be 4 or 6; check more bits. */
405 if ((opcode & 0xff) == 0xff)
406 opsize = 4;
407 else
408 opsize = 6;
409 break;
410 default:
411 panic("ERROR: Couldn't find size of opcode 0x%lx at 0x%lx\n",
412 opcode, pc);
413 }
414
415 return opsize;
416}
417
418static unsigned long get_pseudo_pc(struct task_struct *child)
419{
420 /* Default value for PC is ERP. */
421 unsigned long pc = get_reg(child, PT_ERP);
422
423 if (pc & 0x1) {
424 unsigned long spc = get_reg(child, PT_SPC);
425 /* Delay slot bit set. Report as stopped on proper
426 instruction. */
427 if (spc) {
428 /* Rely on SPC if set. FIXME: We might want to check
429 that EXS indicates we stopped due to a single-step
430 exception. */
431 pc = spc;
432 } else {
433 /* Calculate the PC from the size of the instruction
434 that the delay slot we're in belongs to. */
435 pc += insn_size(child, pc & ~1) - 1;
436 }
437 }
438 return pc;
439}
440
441static long bp_owner = 0;
442
443/* Reachable from exit_thread in signal.c, so not static. */
444void deconfigure_bp(long pid)
445{
446 int bp;
447
448 /* Only deconfigure if the pid is the owner. */
449 if (bp_owner != pid)
450 return;
451
452 for (bp = 0; bp < 6; bp++) {
453 unsigned long tmp;
454 /* Deconfigure start and end address (also gets rid of ownership). */
455 put_debugreg(pid, PT_BP + 3 + (bp * 2), 0);
456 put_debugreg(pid, PT_BP + 4 + (bp * 2), 0);
457
458 /* Deconfigure relevant bits in control register. */
459 tmp = get_debugreg(pid, PT_BP_CTRL) & ~(3 << (2 + (bp * 4)));
460 put_debugreg(pid, PT_BP_CTRL, tmp);
461 }
462 /* No owner now. */
463 bp_owner = 0;
464}
465
466static int put_debugreg(long pid, unsigned int regno, long data)
467{
468 int ret = 0;
469 register int old_srs;
470
471#ifdef CONFIG_ETRAX_KGDB
472 /* Ignore write, but pretend it was ok if value is 0
473 (we don't want POKEUSR/SETREGS failing unnessecarily). */
474 return (data == 0) ? ret : -1;
475#endif
476
477 /* Simple owner management. */
478 if (!bp_owner)
479 bp_owner = pid;
480 else if (bp_owner != pid) {
481 /* Ignore write, but pretend it was ok if value is 0
482 (we don't want POKEUSR/SETREGS failing unnessecarily). */
483 return (data == 0) ? ret : -1;
484 }
485
486 /* Remember old SRS. */
487 SPEC_REG_RD(SPEC_REG_SRS, old_srs);
488 /* Switch to BP bank. */
489 SUPP_BANK_SEL(BANK_BP);
490
491 switch (regno - PT_BP) {
492 case 0:
493 SUPP_REG_WR(0, data); break;
494 case 1:
495 case 2:
496 if (data)
497 ret = -1;
498 break;
499 case 3:
500 SUPP_REG_WR(3, data); break;
501 case 4:
502 SUPP_REG_WR(4, data); break;
503 case 5:
504 SUPP_REG_WR(5, data); break;
505 case 6:
506 SUPP_REG_WR(6, data); break;
507 case 7:
508 SUPP_REG_WR(7, data); break;
509 case 8:
510 SUPP_REG_WR(8, data); break;
511 case 9:
512 SUPP_REG_WR(9, data); break;
513 case 10:
514 SUPP_REG_WR(10, data); break;
515 case 11:
516 SUPP_REG_WR(11, data); break;
517 case 12:
518 SUPP_REG_WR(12, data); break;
519 case 13:
520 SUPP_REG_WR(13, data); break;
521 case 14:
522 SUPP_REG_WR(14, data); break;
523 default:
524 ret = -1;
525 break;
526 }
527
528 /* Restore SRS. */
529 SPEC_REG_WR(SPEC_REG_SRS, old_srs);
530 /* Just for show. */
531 NOP();
532 NOP();
533 NOP();
534
535 return ret;
536}
537
538static long get_debugreg(long pid, unsigned int regno)
539{
540 register int old_srs;
541 register long data;
542
543 if (pid != bp_owner) {
544 return 0;
545 }
546
547 /* Remember old SRS. */
548 SPEC_REG_RD(SPEC_REG_SRS, old_srs);
549 /* Switch to BP bank. */
550 SUPP_BANK_SEL(BANK_BP);
551
552 switch (regno - PT_BP) {
553 case 0:
554 SUPP_REG_RD(0, data); break;
555 case 1:
556 case 2:
557 /* error return value? */
558 data = 0;
559 break;
560 case 3:
561 SUPP_REG_RD(3, data); break;
562 case 4:
563 SUPP_REG_RD(4, data); break;
564 case 5:
565 SUPP_REG_RD(5, data); break;
566 case 6:
567 SUPP_REG_RD(6, data); break;
568 case 7:
569 SUPP_REG_RD(7, data); break;
570 case 8:
571 SUPP_REG_RD(8, data); break;
572 case 9:
573 SUPP_REG_RD(9, data); break;
574 case 10:
575 SUPP_REG_RD(10, data); break;
576 case 11:
577 SUPP_REG_RD(11, data); break;
578 case 12:
579 SUPP_REG_RD(12, data); break;
580 case 13:
581 SUPP_REG_RD(13, data); break;
582 case 14:
583 SUPP_REG_RD(14, data); break;
584 default:
585 /* error return value? */
586 data = 0;
587 }
588
589 /* Restore SRS. */
590 SPEC_REG_WR(SPEC_REG_SRS, old_srs);
591 /* Just for show. */
592 NOP();
593 NOP();
594 NOP();
595
596 return data;
597}
diff --git a/arch/cris/arch-v32/kernel/setup.c b/arch/cris/arch-v32/kernel/setup.c
new file mode 100644
index 000000000000..b17a39a2e164
--- /dev/null
+++ b/arch/cris/arch-v32/kernel/setup.c
@@ -0,0 +1,118 @@
1/*
2 * Display CPU info in /proc/cpuinfo.
3 *
4 * Copyright (C) 2003, Axis Communications AB.
5 */
6
7#include <linux/config.h>
8#include <linux/seq_file.h>
9#include <linux/proc_fs.h>
10#include <linux/delay.h>
11#include <linux/param.h>
12
13#ifdef CONFIG_PROC_FS
14
15#define HAS_FPU 0x0001
16#define HAS_MMU 0x0002
17#define HAS_ETHERNET100 0x0004
18#define HAS_TOKENRING 0x0008
19#define HAS_SCSI 0x0010
20#define HAS_ATA 0x0020
21#define HAS_USB 0x0040
22#define HAS_IRQ_BUG 0x0080
23#define HAS_MMU_BUG 0x0100
24
25struct cpu_info {
26 char *cpu_model;
27 unsigned short rev;
28 unsigned short cache_size;
29 unsigned short flags;
30};
31
32/* Some of these model are here for historical reasons only. */
33static struct cpu_info cpinfo[] = {
34 {"ETRAX 1", 0, 0, 0},
35 {"ETRAX 2", 1, 0, 0},
36 {"ETRAX 3", 2, 0, 0},
37 {"ETRAX 4", 3, 0, 0},
38 {"Simulator", 7, 8, HAS_ETHERNET100 | HAS_SCSI | HAS_ATA},
39 {"ETRAX 100", 8, 8, HAS_ETHERNET100 | HAS_SCSI | HAS_ATA | HAS_IRQ_BUG},
40 {"ETRAX 100", 9, 8, HAS_ETHERNET100 | HAS_SCSI | HAS_ATA},
41
42 {"ETRAX 100LX", 10, 8, HAS_ETHERNET100 | HAS_SCSI | HAS_ATA | HAS_USB
43 | HAS_MMU | HAS_MMU_BUG},
44
45 {"ETRAX 100LX v2", 11, 8, HAS_ETHERNET100 | HAS_SCSI | HAS_ATA | HAS_USB
46 | HAS_MMU},
47
48 {"ETRAX FS", 32, 32, HAS_ETHERNET100 | HAS_ATA | HAS_MMU},
49
50 {"Unknown", 0, 0, 0}
51};
52
53int
54show_cpuinfo(struct seq_file *m, void *v)
55{
56 int i;
57 int cpu = (int)v - 1;
58 int entries;
59 unsigned long revision;
60 struct cpu_info *info;
61
62 entries = sizeof cpinfo / sizeof(struct cpu_info);
63 info = &cpinfo[entries - 1];
64
65#ifdef CONFIG_SMP
66 if (!cpu_online(cpu))
67 return 0;
68#endif
69
70 revision = rdvr();
71
72 for (i = 0; i < entries; i++) {
73 if (cpinfo[i].rev == revision) {
74 info = &cpinfo[i];
75 break;
76 }
77 }
78
79 return seq_printf(m,
80 "processor\t: %d\n"
81 "cpu\t\t: CRIS\n"
82 "cpu revision\t: %lu\n"
83 "cpu model\t: %s\n"
84 "cache size\t: %d KB\n"
85 "fpu\t\t: %s\n"
86 "mmu\t\t: %s\n"
87 "mmu DMA bug\t: %s\n"
88 "ethernet\t: %s Mbps\n"
89 "token ring\t: %s\n"
90 "scsi\t\t: %s\n"
91 "ata\t\t: %s\n"
92 "usb\t\t: %s\n"
93 "bogomips\t: %lu.%02lu\n\n",
94
95 cpu,
96 revision,
97 info->cpu_model,
98 info->cache_size,
99 info->flags & HAS_FPU ? "yes" : "no",
100 info->flags & HAS_MMU ? "yes" : "no",
101 info->flags & HAS_MMU_BUG ? "yes" : "no",
102 info->flags & HAS_ETHERNET100 ? "10/100" : "10",
103 info->flags & HAS_TOKENRING ? "4/16 Mbps" : "no",
104 info->flags & HAS_SCSI ? "yes" : "no",
105 info->flags & HAS_ATA ? "yes" : "no",
106 info->flags & HAS_USB ? "yes" : "no",
107 (loops_per_jiffy * HZ + 500) / 500000,
108 ((loops_per_jiffy * HZ + 500) / 5000) % 100);
109}
110
111#endif /* CONFIG_PROC_FS */
112
113void
114show_etrax_copyright(void)
115{
116 printk(KERN_INFO
117 "Linux/CRISv32 port on ETRAX FS (C) 2003, 2004 Axis Communications AB\n");
118}
diff --git a/arch/cris/arch-v32/kernel/signal.c b/arch/cris/arch-v32/kernel/signal.c
new file mode 100644
index 000000000000..fb4c79d5b76b
--- /dev/null
+++ b/arch/cris/arch-v32/kernel/signal.c
@@ -0,0 +1,708 @@
1/*
2 * Copyright (C) 2003, Axis Communications AB.
3 */
4
5#include <linux/sched.h>
6#include <linux/mm.h>
7#include <linux/kernel.h>
8#include <linux/signal.h>
9#include <linux/errno.h>
10#include <linux/wait.h>
11#include <linux/ptrace.h>
12#include <linux/unistd.h>
13#include <linux/stddef.h>
14#include <linux/syscalls.h>
15#include <linux/vmalloc.h>
16
17#include <asm/io.h>
18#include <asm/processor.h>
19#include <asm/ucontext.h>
20#include <asm/uaccess.h>
21#include <asm/arch/ptrace.h>
22#include <asm/arch/hwregs/cpu_vect.h>
23
24extern unsigned long cris_signal_return_page;
25
26/* Flag to check if a signal is blockable. */
27#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
28
29/*
30 * A syscall in CRIS is really a "break 13" instruction, which is 2
31 * bytes. The registers is manipulated so upon return the instruction
32 * will be executed again.
33 *
34 * This relies on that PC points to the instruction after the break call.
35 */
36#define RESTART_CRIS_SYS(regs) regs->r10 = regs->orig_r10; regs->erp -= 2;
37
38/* Signal frames. */
39struct signal_frame {
40 struct sigcontext sc;
41 unsigned long extramask[_NSIG_WORDS - 1];
42 unsigned char retcode[8]; /* Trampoline code. */
43};
44
45struct rt_signal_frame {
46 struct siginfo *pinfo;
47 void *puc;
48 struct siginfo info;
49 struct ucontext uc;
50 unsigned char retcode[8]; /* Trampoline code. */
51};
52
53int do_signal(int restart, sigset_t *oldset, struct pt_regs *regs);
54void keep_debug_flags(unsigned long oldccs, unsigned long oldspc,
55 struct pt_regs *regs);
56/*
57 * Swap in the new signal mask, and wait for a signal. Define some
58 * dummy arguments to be able to reach the regs argument.
59 */
60int
61sys_sigsuspend(old_sigset_t mask, long r11, long r12, long r13, long mof,
62 long srp, struct pt_regs *regs)
63{
64 sigset_t saveset;
65
66 mask &= _BLOCKABLE;
67
68 spin_lock_irq(&current->sighand->siglock);
69
70 saveset = current->blocked;
71
72 siginitset(&current->blocked, mask);
73
74 recalc_sigpending();
75 spin_unlock_irq(&current->sighand->siglock);
76
77 regs->r10 = -EINTR;
78
79 while (1) {
80 current->state = TASK_INTERRUPTIBLE;
81 schedule();
82
83 if (do_signal(0, &saveset, regs)) {
84 /*
85 * This point is reached twice: once to call
86 * the signal handler, then again to return
87 * from the sigsuspend system call. When
88 * calling the signal handler, R10 hold the
89 * signal number as set by do_signal(). The
90 * sigsuspend call will always return with
91 * the restored value above; -EINTR.
92 */
93 return regs->r10;
94 }
95 }
96}
97
98/* Define some dummy arguments to be able to reach the regs argument. */
99int
100sys_rt_sigsuspend(sigset_t *unewset, size_t sigsetsize, long r12, long r13,
101 long mof, long srp, struct pt_regs *regs)
102{
103 sigset_t saveset;
104 sigset_t newset;
105
106 if (sigsetsize != sizeof(sigset_t))
107 return -EINVAL;
108
109 if (copy_from_user(&newset, unewset, sizeof(newset)))
110 return -EFAULT;
111
112 sigdelsetmask(&newset, ~_BLOCKABLE);
113 spin_lock_irq(&current->sighand->siglock);
114
115 saveset = current->blocked;
116 current->blocked = newset;
117
118 recalc_sigpending();
119 spin_unlock_irq(&current->sighand->siglock);
120
121 regs->r10 = -EINTR;
122
123 while (1) {
124 current->state = TASK_INTERRUPTIBLE;
125 schedule();
126
127 if (do_signal(0, &saveset, regs)) {
128 /* See comment in function above. */
129 return regs->r10;
130 }
131 }
132}
133
134int
135sys_sigaction(int signal, const struct old_sigaction *act,
136 struct old_sigaction *oact)
137{
138 int retval;
139 struct k_sigaction newk;
140 struct k_sigaction oldk;
141
142 if (act) {
143 old_sigset_t mask;
144
145 if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||
146 __get_user(newk.sa.sa_handler, &act->sa_handler) ||
147 __get_user(newk.sa.sa_restorer, &act->sa_restorer))
148 return -EFAULT;
149
150 __get_user(newk.sa.sa_flags, &act->sa_flags);
151 __get_user(mask, &act->sa_mask);
152 siginitset(&newk.sa.sa_mask, mask);
153 }
154
155 retval = do_sigaction(signal, act ? &newk : NULL, oact ? &oldk : NULL);
156
157 if (!retval && oact) {
158 if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||
159 __put_user(oldk.sa.sa_handler, &oact->sa_handler) ||
160 __put_user(oldk.sa.sa_restorer, &oact->sa_restorer))
161 return -EFAULT;
162
163 __put_user(oldk.sa.sa_flags, &oact->sa_flags);
164 __put_user(oldk.sa.sa_mask.sig[0], &oact->sa_mask);
165 }
166
167 return retval;
168}
169
170int
171sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss)
172{
173 return do_sigaltstack(uss, uoss, rdusp());
174}
175
176static int
177restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc)
178{
179 unsigned int err = 0;
180 unsigned long old_usp;
181
182 /* Always make any pending restarted system calls return -EINTR */
183 current_thread_info()->restart_block.fn = do_no_restart_syscall;
184
185 /*
186 * Restore the registers from &sc->regs. sc is already checked
187 * for VERIFY_READ since the signal_frame was previously
188 * checked in sys_sigreturn().
189 */
190 if (__copy_from_user(regs, sc, sizeof(struct pt_regs)))
191 goto badframe;
192
193 /* Make that the user-mode flag is set. */
194 regs->ccs |= (1 << (U_CCS_BITNR + CCS_SHIFT));
195
196 /* Restore the old USP. */
197 err |= __get_user(old_usp, &sc->usp);
198 wrusp(old_usp);
199
200 return err;
201
202badframe:
203 return 1;
204}
205
206/* Define some dummy arguments to be able to reach the regs argument. */
207asmlinkage int
208sys_sigreturn(long r10, long r11, long r12, long r13, long mof, long srp,
209 struct pt_regs *regs)
210{
211 sigset_t set;
212 struct signal_frame __user *frame;
213 unsigned long oldspc = regs->spc;
214 unsigned long oldccs = regs->ccs;
215
216 frame = (struct signal_frame *) rdusp();
217
218 /*
219 * Since the signal is stacked on a dword boundary, the frame
220 * should be dword aligned here as well. It it's not, then the
221 * user is trying some funny business.
222 */
223 if (((long)frame) & 3)
224 goto badframe;
225
226 if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
227 goto badframe;
228
229 if (__get_user(set.sig[0], &frame->sc.oldmask) ||
230 (_NSIG_WORDS > 1 && __copy_from_user(&set.sig[1],
231 frame->extramask,
232 sizeof(frame->extramask))))
233 goto badframe;
234
235 sigdelsetmask(&set, ~_BLOCKABLE);
236 spin_lock_irq(&current->sighand->siglock);
237
238 current->blocked = set;
239
240 recalc_sigpending();
241 spin_unlock_irq(&current->sighand->siglock);
242
243 if (restore_sigcontext(regs, &frame->sc))
244 goto badframe;
245
246 keep_debug_flags(oldccs, oldspc, regs);
247
248 return regs->r10;
249
250badframe:
251 force_sig(SIGSEGV, current);
252 return 0;
253}
254
255/* Define some dummy variables to be able to reach the regs argument. */
256asmlinkage int
257sys_rt_sigreturn(long r10, long r11, long r12, long r13, long mof, long srp,
258 struct pt_regs *regs)
259{
260 sigset_t set;
261 struct rt_signal_frame __user *frame;
262 unsigned long oldspc = regs->spc;
263 unsigned long oldccs = regs->ccs;
264
265 frame = (struct rt_signal_frame *) rdusp();
266
267 /*
268 * Since the signal is stacked on a dword boundary, the frame
269 * should be dword aligned here as well. It it's not, then the
270 * user is trying some funny business.
271 */
272 if (((long)frame) & 3)
273 goto badframe;
274
275 if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
276 goto badframe;
277
278 if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set)))
279 goto badframe;
280
281 sigdelsetmask(&set, ~_BLOCKABLE);
282 spin_lock_irq(&current->sighand->siglock);
283
284 current->blocked = set;
285
286 recalc_sigpending();
287 spin_unlock_irq(&current->sighand->siglock);
288
289 if (restore_sigcontext(regs, &frame->uc.uc_mcontext))
290 goto badframe;
291
292 if (do_sigaltstack(&frame->uc.uc_stack, NULL, rdusp()) == -EFAULT)
293 goto badframe;
294
295 keep_debug_flags(oldccs, oldspc, regs);
296
297 return regs->r10;
298
299badframe:
300 force_sig(SIGSEGV, current);
301 return 0;
302}
303
304/* Setup a signal frame. */
305static int
306setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs,
307 unsigned long mask)
308{
309 int err;
310 unsigned long usp;
311
312 err = 0;
313 usp = rdusp();
314
315 /*
316 * Copy the registers. They are located first in sc, so it's
317 * possible to use sc directly.
318 */
319 err |= __copy_to_user(sc, regs, sizeof(struct pt_regs));
320
321 err |= __put_user(mask, &sc->oldmask);
322 err |= __put_user(usp, &sc->usp);
323
324 return err;
325}
326
327/* Figure out where to put the new signal frame - usually on the stack. */
328static inline void __user *
329get_sigframe(struct k_sigaction *ka, struct pt_regs * regs, size_t frame_size)
330{
331 unsigned long sp;
332
333 sp = rdusp();
334
335 /* This is the X/Open sanctioned signal stack switching. */
336 if (ka->sa.sa_flags & SA_ONSTACK) {
337 if (!on_sig_stack(sp))
338 sp = current->sas_ss_sp + current->sas_ss_size;
339 }
340
341 /* Make sure the frame is dword-aligned. */
342 sp &= ~3;
343
344 return (void __user *)(sp - frame_size);
345}
346
347/* Grab and setup a signal frame.
348 *
349 * Basically a lot of state-info is stacked, and arranged for the
350 * user-mode program to return to the kernel using either a trampiline
351 * which performs the syscall sigreturn(), or a provided user-mode
352 * trampoline.
353 */
354static void
355setup_frame(int sig, struct k_sigaction *ka, sigset_t *set,
356 struct pt_regs * regs)
357{
358 int err;
359 unsigned long return_ip;
360 struct signal_frame __user *frame;
361
362 err = 0;
363 frame = get_sigframe(ka, regs, sizeof(*frame));
364
365 if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
366 goto give_sigsegv;
367
368 err |= setup_sigcontext(&frame->sc, regs, set->sig[0]);
369
370 if (err)
371 goto give_sigsegv;
372
373 if (_NSIG_WORDS > 1) {
374 err |= __copy_to_user(frame->extramask, &set->sig[1],
375 sizeof(frame->extramask));
376 }
377
378 if (err)
379 goto give_sigsegv;
380
381 /*
382 * Set up to return from user-space. If provided, use a stub
383 * already located in user-space.
384 */
385 if (ka->sa.sa_flags & SA_RESTORER) {
386 return_ip = (unsigned long)ka->sa.sa_restorer;
387 } else {
388 /* Trampoline - the desired return ip is in the signal return page. */
389 return_ip = cris_signal_return_page;
390
391 /*
392 * This is movu.w __NR_sigreturn, r9; break 13;
393 *
394 * WE DO NOT USE IT ANY MORE! It's only left here for historical
395 * reasons and because gdb uses it as a signature to notice
396 * signal handler stack frames.
397 */
398 err |= __put_user(0x9c5f, (short __user*)(frame->retcode+0));
399 err |= __put_user(__NR_sigreturn, (short __user*)(frame->retcode+2));
400 err |= __put_user(0xe93d, (short __user*)(frame->retcode+4));
401 }
402
403 if (err)
404 goto give_sigsegv;
405
406 /*
407 * Set up registers for signal handler.
408 *
409 * Where the code enters now.
410 * Where the code enter later.
411 * First argument, signo.
412 */
413 regs->erp = (unsigned long) ka->sa.sa_handler;
414 regs->srp = return_ip;
415 regs->r10 = sig;
416
417 /* Actually move the USP to reflect the stacked frame. */
418 wrusp((unsigned long)frame);
419
420 return;
421
422give_sigsegv:
423 if (sig == SIGSEGV)
424 ka->sa.sa_handler = SIG_DFL;
425
426 force_sig(SIGSEGV, current);
427}
428
429static void
430setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
431 sigset_t *set, struct pt_regs * regs)
432{
433 int err;
434 unsigned long return_ip;
435 struct rt_signal_frame __user *frame;
436
437 err = 0;
438 frame = get_sigframe(ka, regs, sizeof(*frame));
439
440 if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
441 goto give_sigsegv;
442
443 /* TODO: what is the current->exec_domain stuff and invmap ? */
444
445 err |= __put_user(&frame->info, &frame->pinfo);
446 err |= __put_user(&frame->uc, &frame->puc);
447 err |= copy_siginfo_to_user(&frame->info, info);
448
449 if (err)
450 goto give_sigsegv;
451
452 /* Clear all the bits of the ucontext we don't use. */
453 err |= __clear_user(&frame->uc, offsetof(struct ucontext, uc_mcontext));
454 err |= setup_sigcontext(&frame->uc.uc_mcontext, regs, set->sig[0]);
455 err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));
456
457 if (err)
458 goto give_sigsegv;
459
460 /*
461 * Set up to return from user-space. If provided, use a stub
462 * already located in user-space.
463 */
464 if (ka->sa.sa_flags & SA_RESTORER) {
465 return_ip = (unsigned long) ka->sa.sa_restorer;
466 } else {
467 /* Trampoline - the desired return ip is in the signal return page. */
468 return_ip = cris_signal_return_page + 6;
469
470 /*
471 * This is movu.w __NR_rt_sigreturn, r9; break 13;
472 *
473 * WE DO NOT USE IT ANY MORE! It's only left here for historical
474 * reasons and because gdb uses it as a signature to notice
475 * signal handler stack frames.
476 */
477 err |= __put_user(0x9c5f, (short __user*)(frame->retcode+0));
478
479 err |= __put_user(__NR_rt_sigreturn,
480 (short __user*)(frame->retcode+2));
481
482 err |= __put_user(0xe93d, (short __user*)(frame->retcode+4));
483 }
484
485 if (err)
486 goto give_sigsegv;
487
488 /*
489 * Set up registers for signal handler.
490 *
491 * Where the code enters now.
492 * Where the code enters later.
493 * First argument is signo.
494 * Second argument is (siginfo_t *).
495 * Third argument is unused.
496 */
497 regs->erp = (unsigned long) ka->sa.sa_handler;
498 regs->srp = return_ip;
499 regs->r10 = sig;
500 regs->r11 = (unsigned long) &frame->info;
501 regs->r12 = 0;
502
503 /* Actually move the usp to reflect the stacked frame. */
504 wrusp((unsigned long)frame);
505
506 return;
507
508give_sigsegv:
509 if (sig == SIGSEGV)
510 ka->sa.sa_handler = SIG_DFL;
511
512 force_sig(SIGSEGV, current);
513}
514
515/* Invoke a singal handler to, well, handle the signal. */
516extern inline void
517handle_signal(int canrestart, unsigned long sig,
518 siginfo_t *info, struct k_sigaction *ka,
519 sigset_t *oldset, struct pt_regs * regs)
520{
521 /* Check if this got called from a system call. */
522 if (canrestart) {
523 /* If so, check system call restarting. */
524 switch (regs->r10) {
525 case -ERESTART_RESTARTBLOCK:
526 case -ERESTARTNOHAND:
527 /*
528 * This means that the syscall should
529 * only be restarted if there was no
530 * handler for the signal, and since
531 * this point isn't reached unless
532 * there is a handler, there's no need
533 * to restart.
534 */
535 regs->r10 = -EINTR;
536 break;
537
538 case -ERESTARTSYS:
539 /*
540 * This means restart the syscall if
541 * there is no handler, or the handler
542 * was registered with SA_RESTART.
543 */
544 if (!(ka->sa.sa_flags & SA_RESTART)) {
545 regs->r10 = -EINTR;
546 break;
547 }
548
549 /* Fall through. */
550
551 case -ERESTARTNOINTR:
552 /*
553 * This means that the syscall should
554 * be called again after the signal
555 * handler returns.
556 */
557 RESTART_CRIS_SYS(regs);
558 break;
559 }
560 }
561
562 /* Set up the stack frame. */
563 if (ka->sa.sa_flags & SA_SIGINFO)
564 setup_rt_frame(sig, ka, info, oldset, regs);
565 else
566 setup_frame(sig, ka, oldset, regs);
567
568 if (ka->sa.sa_flags & SA_ONESHOT)
569 ka->sa.sa_handler = SIG_DFL;
570
571 if (!(ka->sa.sa_flags & SA_NODEFER)) {
572 spin_lock_irq(&current->sighand->siglock);
573 sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
574 sigaddset(&current->blocked,sig);
575 recalc_sigpending();
576 spin_unlock_irq(&current->sighand->siglock);
577 }
578}
579
580/*
581 * Note that 'init' is a special process: it doesn't get signals it doesn't
582 * want to handle. Thus you cannot kill init even with a SIGKILL even by
583 * mistake.
584 *
585 * Also note that the regs structure given here as an argument, is the latest
586 * pushed pt_regs. It may or may not be the same as the first pushed registers
587 * when the initial usermode->kernelmode transition took place. Therefore
588 * we can use user_mode(regs) to see if we came directly from kernel or user
589 * mode below.
590 */
591int
592do_signal(int canrestart, sigset_t *oldset, struct pt_regs *regs)
593{
594 int signr;
595 siginfo_t info;
596 struct k_sigaction ka;
597
598 /*
599 * The common case should go fast, which is why this point is
600 * reached from kernel-mode. If that's the case, just return
601 * without doing anything.
602 */
603 if (!user_mode(regs))
604 return 1;
605
606 if (!oldset)
607 oldset = &current->blocked;
608
609 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
610
611 if (signr > 0) {
612 /* Deliver the signal. */
613 handle_signal(canrestart, signr, &info, &ka, oldset, regs);
614 return 1;
615 }
616
617 /* Got here from a system call? */
618 if (canrestart) {
619 /* Restart the system call - no handlers present. */
620 if (regs->r10 == -ERESTARTNOHAND ||
621 regs->r10 == -ERESTARTSYS ||
622 regs->r10 == -ERESTARTNOINTR) {
623 RESTART_CRIS_SYS(regs);
624 }
625
626 if (regs->r10 == -ERESTART_RESTARTBLOCK){
627 regs->r10 = __NR_restart_syscall;
628 regs->erp -= 2;
629 }
630 }
631
632 return 0;
633}
634
635asmlinkage void
636ugdb_trap_user(struct thread_info *ti, int sig)
637{
638 if (((user_regs(ti)->exs & 0xff00) >> 8) != SINGLE_STEP_INTR_VECT) {
639 /* Zero single-step PC if the reason we stopped wasn't a single
640 step exception. This is to avoid relying on it when it isn't
641 reliable. */
642 user_regs(ti)->spc = 0;
643 }
644 /* FIXME: Filter out false h/w breakpoint hits (i.e. EDA
645 not withing any configured h/w breakpoint range). Synchronize with
646 what already exists for kernel debugging. */
647 if (((user_regs(ti)->exs & 0xff00) >> 8) == BREAK_8_INTR_VECT) {
648 /* Break 8: subtract 2 from ERP unless in a delay slot. */
649 if (!(user_regs(ti)->erp & 0x1))
650 user_regs(ti)->erp -= 2;
651 }
652 sys_kill(ti->task->pid, sig);
653}
654
655void
656keep_debug_flags(unsigned long oldccs, unsigned long oldspc,
657 struct pt_regs *regs)
658{
659 if (oldccs & (1 << Q_CCS_BITNR)) {
660 /* Pending single step due to single-stepping the break 13
661 in the signal trampoline: keep the Q flag. */
662 regs->ccs |= (1 << Q_CCS_BITNR);
663 /* S flag should be set - complain if it's not. */
664 if (!(oldccs & (1 << (S_CCS_BITNR + CCS_SHIFT)))) {
665 printk("Q flag but no S flag?");
666 }
667 regs->ccs |= (1 << (S_CCS_BITNR + CCS_SHIFT));
668 /* Assume the SPC is valid and interesting. */
669 regs->spc = oldspc;
670
671 } else if (oldccs & (1 << (S_CCS_BITNR + CCS_SHIFT))) {
672 /* If a h/w bp was set in the signal handler we need
673 to keep the S flag. */
674 regs->ccs |= (1 << (S_CCS_BITNR + CCS_SHIFT));
675 /* Don't keep the old SPC though; if we got here due to
676 a single-step, the Q flag should have been set. */
677 } else if (regs->spc) {
678 /* If we were single-stepping *before* the signal was taken,
679 we don't want to restore that state now, because GDB will
680 have forgotten all about it. */
681 regs->spc = 0;
682 regs->ccs &= ~(1 << (S_CCS_BITNR + CCS_SHIFT));
683 }
684}
685
686/* Set up the trampolines on the signal return page. */
687int __init
688cris_init_signal(void)
689{
690 u16* data = (u16*)kmalloc(PAGE_SIZE, GFP_KERNEL);
691
692 /* This is movu.w __NR_sigreturn, r9; break 13; */
693 data[0] = 0x9c5f;
694 data[1] = __NR_sigreturn;
695 data[2] = 0xe93d;
696 /* This is movu.w __NR_rt_sigreturn, r9; break 13; */
697 data[3] = 0x9c5f;
698 data[4] = __NR_rt_sigreturn;
699 data[5] = 0xe93d;
700
701 /* Map to userspace with appropriate permissions (no write access...) */
702 cris_signal_return_page = (unsigned long)
703 __ioremap_prot(virt_to_phys(data), PAGE_SIZE, PAGE_SIGNAL_TRAMPOLINE);
704
705 return 0;
706}
707
708__initcall(cris_init_signal);
diff --git a/arch/cris/arch-v32/kernel/smp.c b/arch/cris/arch-v32/kernel/smp.c
new file mode 100644
index 000000000000..2c5cae04a95c
--- /dev/null
+++ b/arch/cris/arch-v32/kernel/smp.c
@@ -0,0 +1,348 @@
1#include <asm/delay.h>
2#include <asm/arch/irq.h>
3#include <asm/arch/hwregs/intr_vect.h>
4#include <asm/arch/hwregs/intr_vect_defs.h>
5#include <asm/tlbflush.h>
6#include <asm/mmu_context.h>
7#include <asm/arch/hwregs/mmu_defs_asm.h>
8#include <asm/arch/hwregs/supp_reg.h>
9#include <asm/atomic.h>
10
11#include <linux/err.h>
12#include <linux/init.h>
13#include <linux/timex.h>
14#include <linux/sched.h>
15#include <linux/kernel.h>
16#include <linux/cpumask.h>
17#include <linux/interrupt.h>
18
19#define IPI_SCHEDULE 1
20#define IPI_CALL 2
21#define IPI_FLUSH_TLB 4
22
23#define FLUSH_ALL (void*)0xffffffff
24
25/* Vector of locks used for various atomic operations */
26spinlock_t cris_atomic_locks[] = { [0 ... LOCK_COUNT - 1] = SPIN_LOCK_UNLOCKED};
27
28/* CPU masks */
29cpumask_t cpu_online_map = CPU_MASK_NONE;
30cpumask_t phys_cpu_present_map = CPU_MASK_NONE;
31
32/* Variables used during SMP boot */
33volatile int cpu_now_booting = 0;
34volatile struct thread_info *smp_init_current_idle_thread;
35
36/* Variables used during IPI */
37static DEFINE_SPINLOCK(call_lock);
38static DEFINE_SPINLOCK(tlbstate_lock);
39
40struct call_data_struct {
41 void (*func) (void *info);
42 void *info;
43 int wait;
44};
45
46static struct call_data_struct * call_data;
47
48static struct mm_struct* flush_mm;
49static struct vm_area_struct* flush_vma;
50static unsigned long flush_addr;
51
52extern int setup_irq(int, struct irqaction *);
53
54/* Mode registers */
55static unsigned long irq_regs[NR_CPUS] =
56{
57 regi_irq,
58 regi_irq2
59};
60
61static irqreturn_t crisv32_ipi_interrupt(int irq, void *dev_id, struct pt_regs *regs);
62static int send_ipi(int vector, int wait, cpumask_t cpu_mask);
63static struct irqaction irq_ipi = { crisv32_ipi_interrupt, SA_INTERRUPT,
64 CPU_MASK_NONE, "ipi", NULL, NULL};
65
66extern void cris_mmu_init(void);
67extern void cris_timer_init(void);
68
69/* SMP initialization */
70void __init smp_prepare_cpus(unsigned int max_cpus)
71{
72 int i;
73
74 /* From now on we can expect IPIs so set them up */
75 setup_irq(IPI_INTR_VECT, &irq_ipi);
76
77 /* Mark all possible CPUs as present */
78 for (i = 0; i < max_cpus; i++)
79 cpu_set(i, phys_cpu_present_map);
80}
81
82void __devinit smp_prepare_boot_cpu(void)
83{
84 /* PGD pointer has moved after per_cpu initialization so
85 * update the MMU.
86 */
87 pgd_t **pgd;
88 pgd = (pgd_t**)&per_cpu(current_pgd, smp_processor_id());
89
90 SUPP_BANK_SEL(1);
91 SUPP_REG_WR(RW_MM_TLB_PGD, pgd);
92 SUPP_BANK_SEL(2);
93 SUPP_REG_WR(RW_MM_TLB_PGD, pgd);
94
95 cpu_set(0, cpu_online_map);
96 cpu_set(0, phys_cpu_present_map);
97}
98
99void __init smp_cpus_done(unsigned int max_cpus)
100{
101}
102
103/* Bring one cpu online.*/
104static int __init
105smp_boot_one_cpu(int cpuid)
106{
107 unsigned timeout;
108 struct task_struct *idle;
109
110 idle = fork_idle(cpuid);
111 if (IS_ERR(idle))
112 panic("SMP: fork failed for CPU:%d", cpuid);
113
114 idle->thread_info->cpu = cpuid;
115
116 /* Information to the CPU that is about to boot */
117 smp_init_current_idle_thread = idle->thread_info;
118 cpu_now_booting = cpuid;
119
120 /* Wait for CPU to come online */
121 for (timeout = 0; timeout < 10000; timeout++) {
122 if(cpu_online(cpuid)) {
123 cpu_now_booting = 0;
124 smp_init_current_idle_thread = NULL;
125 return 0; /* CPU online */
126 }
127 udelay(100);
128 barrier();
129 }
130
131 put_task_struct(idle);
132 idle = NULL;
133
134 printk(KERN_CRIT "SMP: CPU:%d is stuck.\n", cpuid);
135 return -1;
136}
137
138/* Secondary CPUs starts uing C here. Here we need to setup CPU
139 * specific stuff such as the local timer and the MMU. */
140void __init smp_callin(void)
141{
142 extern void cpu_idle(void);
143
144 int cpu = cpu_now_booting;
145 reg_intr_vect_rw_mask vect_mask = {0};
146
147 /* Initialise the idle task for this CPU */
148 atomic_inc(&init_mm.mm_count);
149 current->active_mm = &init_mm;
150
151 /* Set up MMU */
152 cris_mmu_init();
153 __flush_tlb_all();
154
155 /* Setup local timer. */
156 cris_timer_init();
157
158 /* Enable IRQ and idle */
159 REG_WR(intr_vect, irq_regs[cpu], rw_mask, vect_mask);
160 unmask_irq(IPI_INTR_VECT);
161 unmask_irq(TIMER_INTR_VECT);
162 local_irq_enable();
163
164 cpu_set(cpu, cpu_online_map);
165 cpu_idle();
166}
167
168/* Stop execution on this CPU.*/
169void stop_this_cpu(void* dummy)
170{
171 local_irq_disable();
172 asm volatile("halt");
173}
174
175/* Other calls */
176void smp_send_stop(void)
177{
178 smp_call_function(stop_this_cpu, NULL, 1, 0);
179}
180
181int setup_profiling_timer(unsigned int multiplier)
182{
183 return -EINVAL;
184}
185
186
187/* cache_decay_ticks is used by the scheduler to decide if a process
188 * is "hot" on one CPU. A higher value means a higher penalty to move
189 * a process to another CPU. Our cache is rather small so we report
190 * 1 tick.
191 */
192unsigned long cache_decay_ticks = 1;
193
194int __devinit __cpu_up(unsigned int cpu)
195{
196 smp_boot_one_cpu(cpu);
197 return cpu_online(cpu) ? 0 : -ENOSYS;
198}
199
200void smp_send_reschedule(int cpu)
201{
202 cpumask_t cpu_mask = CPU_MASK_NONE;
203 cpu_set(cpu, cpu_mask);
204 send_ipi(IPI_SCHEDULE, 0, cpu_mask);
205}
206
207/* TLB flushing
208 *
209 * Flush needs to be done on the local CPU and on any other CPU that
210 * may have the same mapping. The mm->cpu_vm_mask is used to keep track
211 * of which CPUs that a specific process has been executed on.
212 */
213void flush_tlb_common(struct mm_struct* mm, struct vm_area_struct* vma, unsigned long addr)
214{
215 unsigned long flags;
216 cpumask_t cpu_mask;
217
218 spin_lock_irqsave(&tlbstate_lock, flags);
219 cpu_mask = (mm == FLUSH_ALL ? CPU_MASK_ALL : mm->cpu_vm_mask);
220 cpu_clear(smp_processor_id(), cpu_mask);
221 flush_mm = mm;
222 flush_vma = vma;
223 flush_addr = addr;
224 send_ipi(IPI_FLUSH_TLB, 1, cpu_mask);
225 spin_unlock_irqrestore(&tlbstate_lock, flags);
226}
227
228void flush_tlb_all(void)
229{
230 __flush_tlb_all();
231 flush_tlb_common(FLUSH_ALL, FLUSH_ALL, 0);
232}
233
234void flush_tlb_mm(struct mm_struct *mm)
235{
236 __flush_tlb_mm(mm);
237 flush_tlb_common(mm, FLUSH_ALL, 0);
238 /* No more mappings in other CPUs */
239 cpus_clear(mm->cpu_vm_mask);
240 cpu_set(smp_processor_id(), mm->cpu_vm_mask);
241}
242
243void flush_tlb_page(struct vm_area_struct *vma,
244 unsigned long addr)
245{
246 __flush_tlb_page(vma, addr);
247 flush_tlb_common(vma->vm_mm, vma, addr);
248}
249
250/* Inter processor interrupts
251 *
252 * The IPIs are used for:
253 * * Force a schedule on a CPU
254 * * FLush TLB on other CPUs
255 * * Call a function on other CPUs
256 */
257
258int send_ipi(int vector, int wait, cpumask_t cpu_mask)
259{
260 int i = 0;
261 reg_intr_vect_rw_ipi ipi = REG_RD(intr_vect, irq_regs[i], rw_ipi);
262 int ret = 0;
263
264 /* Calculate CPUs to send to. */
265 cpus_and(cpu_mask, cpu_mask, cpu_online_map);
266
267 /* Send the IPI. */
268 for_each_cpu_mask(i, cpu_mask)
269 {
270 ipi.vector |= vector;
271 REG_WR(intr_vect, irq_regs[i], rw_ipi, ipi);
272 }
273
274 /* Wait for IPI to finish on other CPUS */
275 if (wait) {
276 for_each_cpu_mask(i, cpu_mask) {
277 int j;
278 for (j = 0 ; j < 1000; j++) {
279 ipi = REG_RD(intr_vect, irq_regs[i], rw_ipi);
280 if (!ipi.vector)
281 break;
282 udelay(100);
283 }
284
285 /* Timeout? */
286 if (ipi.vector) {
287 printk("SMP call timeout from %d to %d\n", smp_processor_id(), i);
288 ret = -ETIMEDOUT;
289 dump_stack();
290 }
291 }
292 }
293 return ret;
294}
295
296/*
297 * You must not call this function with disabled interrupts or from a
298 * hardware interrupt handler or from a bottom half handler.
299 */
300int smp_call_function(void (*func)(void *info), void *info,
301 int nonatomic, int wait)
302{
303 cpumask_t cpu_mask = CPU_MASK_ALL;
304 struct call_data_struct data;
305 int ret;
306
307 cpu_clear(smp_processor_id(), cpu_mask);
308
309 WARN_ON(irqs_disabled());
310
311 data.func = func;
312 data.info = info;
313 data.wait = wait;
314
315 spin_lock(&call_lock);
316 call_data = &data;
317 ret = send_ipi(IPI_CALL, wait, cpu_mask);
318 spin_unlock(&call_lock);
319
320 return ret;
321}
322
323irqreturn_t crisv32_ipi_interrupt(int irq, void *dev_id, struct pt_regs *regs)
324{
325 void (*func) (void *info) = call_data->func;
326 void *info = call_data->info;
327 reg_intr_vect_rw_ipi ipi;
328
329 ipi = REG_RD(intr_vect, irq_regs[smp_processor_id()], rw_ipi);
330
331 if (ipi.vector & IPI_CALL) {
332 func(info);
333 }
334 if (ipi.vector & IPI_FLUSH_TLB) {
335 if (flush_mm == FLUSH_ALL)
336 __flush_tlb_all();
337 else if (flush_vma == FLUSH_ALL)
338 __flush_tlb_mm(flush_mm);
339 else
340 __flush_tlb_page(flush_vma, flush_addr);
341 }
342
343 ipi.vector = 0;
344 REG_WR(intr_vect, irq_regs[smp_processor_id()], rw_ipi, ipi);
345
346 return IRQ_HANDLED;
347}
348
diff --git a/arch/cris/arch-v32/kernel/time.c b/arch/cris/arch-v32/kernel/time.c
new file mode 100644
index 000000000000..d48e397f5fa4
--- /dev/null
+++ b/arch/cris/arch-v32/kernel/time.c
@@ -0,0 +1,341 @@
1/* $Id: time.c,v 1.19 2005/04/29 05:40:09 starvik Exp $
2 *
3 * linux/arch/cris/arch-v32/kernel/time.c
4 *
5 * Copyright (C) 2003 Axis Communications AB
6 *
7 */
8
9#include <linux/config.h>
10#include <linux/timex.h>
11#include <linux/time.h>
12#include <linux/jiffies.h>
13#include <linux/interrupt.h>
14#include <linux/swap.h>
15#include <linux/sched.h>
16#include <linux/init.h>
17#include <linux/threads.h>
18#include <asm/types.h>
19#include <asm/signal.h>
20#include <asm/io.h>
21#include <asm/delay.h>
22#include <asm/rtc.h>
23#include <asm/irq.h>
24
25#include <asm/arch/hwregs/reg_map.h>
26#include <asm/arch/hwregs/reg_rdwr.h>
27#include <asm/arch/hwregs/timer_defs.h>
28#include <asm/arch/hwregs/intr_vect_defs.h>
29
30/* Watchdog defines */
31#define ETRAX_WD_KEY_MASK 0x7F /* key is 7 bit */
32#define ETRAX_WD_HZ 763 /* watchdog counts at 763 Hz */
33#define ETRAX_WD_CNT ((2*ETRAX_WD_HZ)/HZ + 1) /* Number of 763 counts before watchdog bites */
34
35unsigned long timer_regs[NR_CPUS] =
36{
37 regi_timer,
38#ifdef CONFIG_SMP
39 regi_timer2
40#endif
41};
42
43extern void update_xtime_from_cmos(void);
44extern int set_rtc_mmss(unsigned long nowtime);
45extern int setup_irq(int, struct irqaction *);
46extern int have_rtc;
47
48unsigned long get_ns_in_jiffie(void)
49{
50 reg_timer_r_tmr0_data data;
51 unsigned long ns;
52
53 data = REG_RD(timer, regi_timer, r_tmr0_data);
54 ns = (TIMER0_DIV - data) * 10;
55 return ns;
56}
57
58unsigned long do_slow_gettimeoffset(void)
59{
60 unsigned long count;
61 unsigned long usec_count = 0;
62
63 static unsigned long count_p = TIMER0_DIV;/* for the first call after boot */
64 static unsigned long jiffies_p = 0;
65
66 /*
67 * cache volatile jiffies temporarily; we have IRQs turned off.
68 */
69 unsigned long jiffies_t;
70
71 /* The timer interrupt comes from Etrax timer 0. In order to get
72 * better precision, we check the current value. It might have
73 * underflowed already though.
74 */
75
76 count = REG_RD(timer, regi_timer, r_tmr0_data);
77 jiffies_t = jiffies;
78
79 /*
80 * avoiding timer inconsistencies (they are rare, but they happen)...
81 * there are one problem that must be avoided here:
82 * 1. the timer counter underflows
83 */
84 if( jiffies_t == jiffies_p ) {
85 if( count > count_p ) {
86 /* Timer wrapped, use new count and prescale
87 * increase the time corresponding to one jiffie
88 */
89 usec_count = 1000000/HZ;
90 }
91 } else
92 jiffies_p = jiffies_t;
93 count_p = count;
94 /* Convert timer value to usec */
95 /* 100 MHz timer, divide by 100 to get usec */
96 usec_count += (TIMER0_DIV - count) / 100;
97 return usec_count;
98}
99
100/* From timer MDS describing the hardware watchdog:
101 * 4.3.1 Watchdog Operation
102 * The watchdog timer is an 8-bit timer with a configurable start value.
103 * Once started the whatchdog counts downwards with a frequency of 763 Hz
104 * (100/131072 MHz). When the watchdog counts down to 1, it generates an
105 * NMI (Non Maskable Interrupt), and when it counts down to 0, it resets the
106 * chip.
107 */
108/* This gives us 1.3 ms to do something useful when the NMI comes */
109
110/* right now, starting the watchdog is the same as resetting it */
111#define start_watchdog reset_watchdog
112
113#if defined(CONFIG_ETRAX_WATCHDOG)
114static short int watchdog_key = 42; /* arbitrary 7 bit number */
115#endif
116
117/* number of pages to consider "out of memory". it is normal that the memory
118 * is used though, so put this really low.
119 */
120
121#define WATCHDOG_MIN_FREE_PAGES 8
122
123void
124reset_watchdog(void)
125{
126#if defined(CONFIG_ETRAX_WATCHDOG)
127 reg_timer_rw_wd_ctrl wd_ctrl = { 0 };
128
129 /* only keep watchdog happy as long as we have memory left! */
130 if(nr_free_pages() > WATCHDOG_MIN_FREE_PAGES) {
131 /* reset the watchdog with the inverse of the old key */
132 watchdog_key ^= ETRAX_WD_KEY_MASK; /* invert key, which is 7 bits */
133 wd_ctrl.cnt = ETRAX_WD_CNT;
134 wd_ctrl.cmd = regk_timer_start;
135 wd_ctrl.key = watchdog_key;
136 REG_WR(timer, regi_timer, rw_wd_ctrl, wd_ctrl);
137 }
138#endif
139}
140
141/* stop the watchdog - we still need the correct key */
142
143void
144stop_watchdog(void)
145{
146#if defined(CONFIG_ETRAX_WATCHDOG)
147 reg_timer_rw_wd_ctrl wd_ctrl = { 0 };
148 watchdog_key ^= ETRAX_WD_KEY_MASK; /* invert key, which is 7 bits */
149 wd_ctrl.cnt = ETRAX_WD_CNT;
150 wd_ctrl.cmd = regk_timer_stop;
151 wd_ctrl.key = watchdog_key;
152 REG_WR(timer, regi_timer, rw_wd_ctrl, wd_ctrl);
153#endif
154}
155
156extern void show_registers(struct pt_regs *regs);
157
158void
159handle_watchdog_bite(struct pt_regs* regs)
160{
161#if defined(CONFIG_ETRAX_WATCHDOG)
162 extern int cause_of_death;
163
164 raw_printk("Watchdog bite\n");
165
166 /* Check if forced restart or unexpected watchdog */
167 if (cause_of_death == 0xbedead) {
168 while(1);
169 }
170
171 /* Unexpected watchdog, stop the watchdog and dump registers*/
172 stop_watchdog();
173 raw_printk("Oops: bitten by watchdog\n");
174 show_registers(regs);
175#ifndef CONFIG_ETRAX_WATCHDOG_NICE_DOGGY
176 reset_watchdog();
177#endif
178 while(1) /* nothing */;
179#endif
180}
181
182/* last time the cmos clock got updated */
183static long last_rtc_update = 0;
184
185/*
186 * timer_interrupt() needs to keep up the real-time clock,
187 * as well as call the "do_timer()" routine every clocktick
188 */
189
190//static unsigned short myjiff; /* used by our debug routine print_timestamp */
191
192extern void cris_do_profile(struct pt_regs *regs);
193
194static inline irqreturn_t
195timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
196{
197 int cpu = smp_processor_id();
198 reg_timer_r_masked_intr masked_intr;
199 reg_timer_rw_ack_intr ack_intr = { 0 };
200
201 /* Check if the timer interrupt is for us (a tmr0 int) */
202 masked_intr = REG_RD(timer, timer_regs[cpu], r_masked_intr);
203 if (!masked_intr.tmr0)
204 return IRQ_NONE;
205
206 /* acknowledge the timer irq */
207 ack_intr.tmr0 = 1;
208 REG_WR(timer, timer_regs[cpu], rw_ack_intr, ack_intr);
209
210 /* reset watchdog otherwise it resets us! */
211 reset_watchdog();
212
213 /* Update statistics. */
214 update_process_times(user_mode(regs));
215
216 cris_do_profile(regs); /* Save profiling information */
217
218 /* The master CPU is responsible for the time keeping. */
219 if (cpu != 0)
220 return IRQ_HANDLED;
221
222 /* call the real timer interrupt handler */
223 do_timer(regs);
224
225 /*
226 * If we have an externally synchronized Linux clock, then update
227 * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
228 * called as close as possible to 500 ms before the new second starts.
229 *
230 * The division here is not time critical since it will run once in
231 * 11 minutes
232 */
233 if ((time_status & STA_UNSYNC) == 0 &&
234 xtime.tv_sec > last_rtc_update + 660 &&
235 (xtime.tv_nsec / 1000) >= 500000 - (tick_nsec / 1000) / 2 &&
236 (xtime.tv_nsec / 1000) <= 500000 + (tick_nsec / 1000) / 2) {
237 if (set_rtc_mmss(xtime.tv_sec) == 0)
238 last_rtc_update = xtime.tv_sec;
239 else
240 last_rtc_update = xtime.tv_sec - 600; /* do it again in 60 s */
241 }
242 return IRQ_HANDLED;
243}
244
245/* timer is SA_SHIRQ so drivers can add stuff to the timer irq chain
246 * it needs to be SA_INTERRUPT to make the jiffies update work properly
247 */
248
249static struct irqaction irq_timer = { timer_interrupt, SA_SHIRQ | SA_INTERRUPT,
250 CPU_MASK_NONE, "timer", NULL, NULL};
251
252void __init
253cris_timer_init(void)
254{
255 int cpu = smp_processor_id();
256 reg_timer_rw_tmr0_ctrl tmr0_ctrl = { 0 };
257 reg_timer_rw_tmr0_div tmr0_div = TIMER0_DIV;
258 reg_timer_rw_intr_mask timer_intr_mask;
259
260 /* Setup the etrax timers
261 * Base frequency is 100MHz, divider 1000000 -> 100 HZ
262 * We use timer0, so timer1 is free.
263 * The trig timer is used by the fasttimer API if enabled.
264 */
265
266 tmr0_ctrl.op = regk_timer_ld;
267 tmr0_ctrl.freq = regk_timer_f100;
268 REG_WR(timer, timer_regs[cpu], rw_tmr0_div, tmr0_div);
269 REG_WR(timer, timer_regs[cpu], rw_tmr0_ctrl, tmr0_ctrl); /* Load */
270 tmr0_ctrl.op = regk_timer_run;
271 REG_WR(timer, timer_regs[cpu], rw_tmr0_ctrl, tmr0_ctrl); /* Start */
272
273 /* enable the timer irq */
274 timer_intr_mask = REG_RD(timer, timer_regs[cpu], rw_intr_mask);
275 timer_intr_mask.tmr0 = 1;
276 REG_WR(timer, timer_regs[cpu], rw_intr_mask, timer_intr_mask);
277}
278
279void __init
280time_init(void)
281{
282 reg_intr_vect_rw_mask intr_mask;
283
284 /* probe for the RTC and read it if it exists
285 * Before the RTC can be probed the loops_per_usec variable needs
286 * to be initialized to make usleep work. A better value for
287 * loops_per_usec is calculated by the kernel later once the
288 * clock has started.
289 */
290 loops_per_usec = 50;
291
292 if(RTC_INIT() < 0) {
293 /* no RTC, start at 1980 */
294 xtime.tv_sec = 0;
295 xtime.tv_nsec = 0;
296 have_rtc = 0;
297 } else {
298 /* get the current time */
299 have_rtc = 1;
300 update_xtime_from_cmos();
301 }
302
303 /*
304 * Initialize wall_to_monotonic such that adding it to xtime will yield zero, the
305 * tv_nsec field must be normalized (i.e., 0 <= nsec < NSEC_PER_SEC).
306 */
307 set_normalized_timespec(&wall_to_monotonic, -xtime.tv_sec, -xtime.tv_nsec);
308
309 /* Start CPU local timer */
310 cris_timer_init();
311
312 /* enable the timer irq in global config */
313 intr_mask = REG_RD(intr_vect, regi_irq, rw_mask);
314 intr_mask.timer = 1;
315 REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
316
317 /* now actually register the timer irq handler that calls timer_interrupt() */
318
319 setup_irq(TIMER_INTR_VECT, &irq_timer);
320
321 /* enable watchdog if we should use one */
322
323#if defined(CONFIG_ETRAX_WATCHDOG)
324 printk("Enabling watchdog...\n");
325 start_watchdog();
326
327 /* If we use the hardware watchdog, we want to trap it as an NMI
328 and dump registers before it resets us. For this to happen, we
329 must set the "m" NMI enable flag (which once set, is unset only
330 when an NMI is taken).
331
332 The same goes for the external NMI, but that doesn't have any
333 driver or infrastructure support yet. */
334 {
335 unsigned long flags;
336 local_save_flags(flags);
337 flags |= (1<<30); /* NMI M flag is at bit 30 */
338 local_irq_restore(flags);
339 }
340#endif
341}
diff --git a/arch/cris/arch-v32/kernel/traps.c b/arch/cris/arch-v32/kernel/traps.c
new file mode 100644
index 000000000000..6e3787045560
--- /dev/null
+++ b/arch/cris/arch-v32/kernel/traps.c
@@ -0,0 +1,160 @@
1/*
2 * Copyright (C) 2003, Axis Communications AB.
3 */
4
5#include <linux/config.h>
6#include <linux/ptrace.h>
7#include <asm/uaccess.h>
8
9#include <asm/arch/hwregs/supp_reg.h>
10
11extern void reset_watchdog(void);
12extern void stop_watchdog(void);
13
14extern int raw_printk(const char *fmt, ...);
15
16void
17show_registers(struct pt_regs *regs)
18{
19 /*
20 * It's possible to use either the USP register or current->thread.usp.
21 * USP might not correspond to the current proccess for all cases this
22 * function is called, and current->thread.usp isn't up to date for the
23 * current proccess. Experience shows that using USP is the way to go.
24 */
25 unsigned long usp;
26 unsigned long d_mmu_cause;
27 unsigned long i_mmu_cause;
28
29 usp = rdusp();
30
31 raw_printk("CPU: %d\n", smp_processor_id());
32
33 raw_printk("ERP: %08lx SRP: %08lx CCS: %08lx USP: %08lx MOF: %08lx\n",
34 regs->erp, regs->srp, regs->ccs, usp, regs->mof);
35
36 raw_printk(" r0: %08lx r1: %08lx r2: %08lx r3: %08lx\n",
37 regs->r0, regs->r1, regs->r2, regs->r3);
38
39 raw_printk(" r4: %08lx r5: %08lx r6: %08lx r7: %08lx\n",
40 regs->r4, regs->r5, regs->r6, regs->r7);
41
42 raw_printk(" r8: %08lx r9: %08lx r10: %08lx r11: %08lx\n",
43 regs->r8, regs->r9, regs->r10, regs->r11);
44
45 raw_printk("r12: %08lx r13: %08lx oR10: %08lx acr: %08lx\n",
46 regs->r12, regs->r13, regs->orig_r10, regs->acr);
47
48 raw_printk("sp: %08lx\n", regs);
49
50 SUPP_BANK_SEL(BANK_IM);
51 SUPP_REG_RD(RW_MM_CAUSE, i_mmu_cause);
52
53 SUPP_BANK_SEL(BANK_DM);
54 SUPP_REG_RD(RW_MM_CAUSE, d_mmu_cause);
55
56 raw_printk(" Data MMU Cause: %08lx\n", d_mmu_cause);
57 raw_printk("Instruction MMU Cause: %08lx\n", i_mmu_cause);
58
59 raw_printk("Process %s (pid: %d, stackpage: %08lx)\n",
60 current->comm, current->pid, (unsigned long) current);
61
62 /* Show additional info if in kernel-mode. */
63 if (!user_mode(regs)) {
64 int i;
65 unsigned char c;
66
67 show_stack(NULL, (unsigned long *) usp);
68
69 /*
70 * If the previous stack-dump wasn't a kernel one, dump the
71 * kernel stack now.
72 */
73 if (usp != 0)
74 show_stack(NULL, NULL);
75
76 raw_printk("\nCode: ");
77
78 if (regs->erp < PAGE_OFFSET)
79 goto bad_value;
80
81 /*
82 * Quite often the value at regs->erp doesn't point to the
83 * interesting instruction, which often is the previous
84 * instruction. So dump at an offset large enough that the
85 * instruction decoding should be in sync at the interesting
86 * point, but small enough to fit on a row. The regs->erp
87 * location is pointed out in a ksymoops-friendly way by
88 * wrapping the byte for that address in parenthesis.
89 */
90 for (i = -12; i < 12; i++) {
91 if (__get_user(c, &((unsigned char *) regs->erp)[i])) {
92bad_value:
93 raw_printk(" Bad IP value.");
94 break;
95 }
96
97 if (i == 0)
98 raw_printk("(%02x) ", c);
99 else
100 raw_printk("%02x ", c);
101 }
102
103 raw_printk("\n");
104 }
105}
106
107/*
108 * This gets called from entry.S when the watchdog has bitten. Show something
109 * similiar to an Oops dump, and if the kernel if configured to be a nice doggy;
110 * halt instead of reboot.
111 */
112void
113watchdog_bite_hook(struct pt_regs *regs)
114{
115#ifdef CONFIG_ETRAX_WATCHDOG_NICE_DOGGY
116 local_irq_disable();
117 stop_watchdog();
118 show_registers(regs);
119
120 while (1)
121 ; /* Do nothing. */
122#else
123 show_registers(regs);
124#endif
125}
126
127/* This is normally the Oops function. */
128void
129die_if_kernel(const char *str, struct pt_regs *regs, long err)
130{
131 if (user_mode(regs))
132 return;
133
134#ifdef CONFIG_ETRAX_WATCHDOG_NICE_DOGGY
135 /*
136 * This printout might take too long and could trigger
137 * the watchdog normally. If NICE_DOGGY is set, simply
138 * stop the watchdog during the printout.
139 */
140 stop_watchdog();
141#endif
142
143 raw_printk("%s: %04lx\n", str, err & 0xffff);
144
145 show_registers(regs);
146
147#ifdef CONFIG_ETRAX_WATCHDOG_NICE_DOGGY
148 reset_watchdog();
149#endif
150
151 do_exit(SIGSEGV);
152}
153
154void arch_enable_nmi(void)
155{
156 unsigned long flags;
157 local_save_flags(flags);
158 flags |= (1<<30); /* NMI M flag is at bit 30 */
159 local_irq_restore(flags);
160}
diff --git a/arch/cris/arch-v32/kernel/vcs_hook.c b/arch/cris/arch-v32/kernel/vcs_hook.c
new file mode 100644
index 000000000000..64d71c54c22c
--- /dev/null
+++ b/arch/cris/arch-v32/kernel/vcs_hook.c
@@ -0,0 +1,96 @@
1// $Id: vcs_hook.c,v 1.2 2003/08/12 12:01:06 starvik Exp $
2//
3// Call simulator hook. This is the part running in the
4// simulated program.
5//
6
7#include "vcs_hook.h"
8#include <stdarg.h>
9#include <asm/arch-v32/hwregs/reg_map.h>
10#include <asm/arch-v32/hwregs/intr_vect_defs.h>
11
12#define HOOK_TRIG_ADDR 0xb7000000 /* hook cvlog model reg address */
13#define HOOK_MEM_BASE_ADDR 0xa0000000 /* csp4 (shared mem) base addr */
14
15#define HOOK_DATA(offset) ((unsigned*) HOOK_MEM_BASE_ADDR)[offset]
16#define VHOOK_DATA(offset) ((volatile unsigned*) HOOK_MEM_BASE_ADDR)[offset]
17#define HOOK_TRIG(funcid) do { *((unsigned *) HOOK_TRIG_ADDR) = funcid; } while(0)
18#define HOOK_DATA_BYTE(offset) ((unsigned char*) HOOK_MEM_BASE_ADDR)[offset]
19
20
21// ------------------------------------------------------------------ hook_call
22int hook_call( unsigned id, unsigned pcnt, ...) {
23 va_list ap;
24 unsigned i;
25 unsigned ret;
26#ifdef USING_SOS
27 PREEMPT_OFF_SAVE();
28#endif
29
30 // pass parameters
31 HOOK_DATA(0) = id;
32
33 /* Have to make hook_print_str a special case since we call with a
34 parameter of byte type. Should perhaps be a separate
35 hook_call. */
36
37 if (id == hook_print_str) {
38 int i;
39 char *str;
40
41 HOOK_DATA(1) = pcnt;
42
43 va_start(ap, pcnt);
44 str = (char*)va_arg(ap,unsigned);
45
46 for (i=0; i!=pcnt; i++) {
47 HOOK_DATA_BYTE(8+i) = str[i];
48 }
49 HOOK_DATA_BYTE(8+i) = 0; /* null byte */
50 }
51 else {
52 va_start(ap, pcnt);
53 for( i = 1; i <= pcnt; i++ ) HOOK_DATA(i) = va_arg(ap,unsigned);
54 va_end(ap);
55 }
56
57 // read from mem to make sure data has propagated to memory before trigging
58 *((volatile unsigned*) HOOK_MEM_BASE_ADDR);
59
60 // trigger hook
61 HOOK_TRIG(id);
62
63 // wait for call to finish
64 while( VHOOK_DATA(0) > 0 ) {}
65
66 // extract return value
67
68 ret = VHOOK_DATA(1);
69
70#ifdef USING_SOS
71 PREEMPT_RESTORE();
72#endif
73 return ret;
74}
75
76unsigned
77hook_buf(unsigned i)
78{
79 return (HOOK_DATA(i));
80}
81
82void print_str( const char *str ) {
83 int i;
84 for (i=1; str[i]; i++); /* find null at end of string */
85 hook_call(hook_print_str, i, str);
86}
87
88// --------------------------------------------------------------- CPU_KICK_DOG
89void CPU_KICK_DOG(void) {
90 (void) hook_call( hook_kick_dog, 0 );
91}
92
93// ------------------------------------------------------- CPU_WATCHDOG_TIMEOUT
94void CPU_WATCHDOG_TIMEOUT( unsigned t ) {
95 (void) hook_call( hook_dog_timeout, 1, t );
96}
diff --git a/arch/cris/arch-v32/kernel/vcs_hook.h b/arch/cris/arch-v32/kernel/vcs_hook.h
new file mode 100644
index 000000000000..7d73709e3cc6
--- /dev/null
+++ b/arch/cris/arch-v32/kernel/vcs_hook.h
@@ -0,0 +1,42 @@
1// $Id: vcs_hook.h,v 1.1 2003/08/12 12:01:06 starvik Exp $
2//
3// Call simulator hook functions
4
5#ifndef HOOK_H
6#define HOOK_H
7
8int hook_call( unsigned id, unsigned pcnt, ...);
9
10enum hook_ids {
11 hook_debug_on = 1,
12 hook_debug_off,
13 hook_stop_sim_ok,
14 hook_stop_sim_fail,
15 hook_alloc_shared,
16 hook_ptr_shared,
17 hook_free_shared,
18 hook_file2shared,
19 hook_cmp_shared,
20 hook_print_params,
21 hook_sim_time,
22 hook_stop_sim,
23 hook_kick_dog,
24 hook_dog_timeout,
25 hook_rand,
26 hook_srand,
27 hook_rand_range,
28 hook_print_str,
29 hook_print_hex,
30 hook_cmp_offset_shared,
31 hook_fill_random_shared,
32 hook_alloc_random_data,
33 hook_calloc_random_data,
34 hook_print_int,
35 hook_print_uint,
36 hook_fputc,
37 hook_init_fd,
38 hook_sbrk
39
40};
41
42#endif
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