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authorMike Frysinger <vapier.adi@gmail.com>2008-08-14 03:15:43 -0400
committerBryan Wu <cooloney@kernel.org>2008-08-14 03:15:43 -0400
commit7e1e7aed0ca082b4e76567ee7ea13993b476e66a (patch)
tree8d294d0b5f838e52f708b6bba622acdf2231c755 /arch/blackfin
parent95a86b5e51139a199d081b6b108e761966d914ef (diff)
Blackfin arch: do not muck with the UART during boot -- let the serial driver worry about it
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin')
-rw-r--r--arch/blackfin/mach-bf527/head.S36
-rw-r--r--arch/blackfin/mach-bf533/head.S48
-rw-r--r--arch/blackfin/mach-bf537/head.S50
-rw-r--r--arch/blackfin/mach-bf548/head.S10
-rw-r--r--arch/blackfin/mach-bf561/head.S36
-rw-r--r--arch/blackfin/mach-common/head.S3
6 files changed, 0 insertions, 183 deletions
diff --git a/arch/blackfin/mach-bf527/head.S b/arch/blackfin/mach-bf527/head.S
index fa4b18eddf63..c3334cc5bcb7 100644
--- a/arch/blackfin/mach-bf527/head.S
+++ b/arch/blackfin/mach-bf527/head.S
@@ -35,42 +35,6 @@
35#include <asm/mach/mem_init.h> 35#include <asm/mach/mem_init.h>
36#endif 36#endif
37 37
38.extern _bf53x_relocate_l1_mem
39
40__INIT
41
42ENTRY(_mach_early_start)
43 /* Initialise UART - when booting from u-boot, the UART is not disabled
44 * so if we dont initalize here, our serial console gets hosed */
45 p0.h = hi(UART1_LCR);
46 p0.l = lo(UART1_LCR);
47 r0 = 0x0(Z);
48 w[p0] = r0.L; /* To enable DLL writes */
49 ssync;
50
51 p0.h = hi(UART1_DLL);
52 p0.l = lo(UART1_DLL);
53 r0 = 0x0(Z);
54 w[p0] = r0.L;
55 ssync;
56
57 p0.h = hi(UART1_DLH);
58 p0.l = lo(UART1_DLH);
59 r0 = 0x00(Z);
60 w[p0] = r0.L;
61 ssync;
62
63 p0.h = hi(UART1_GCTL);
64 p0.l = lo(UART1_GCTL);
65 r0 = 0x0(Z);
66 w[p0] = r0.L; /* To enable UART clock */
67 ssync;
68
69 rts;
70ENDPROC(_mach_early_start)
71
72__FINIT
73
74.section .l1.text 38.section .l1.text
75#ifdef CONFIG_BFIN_KERNEL_CLOCK 39#ifdef CONFIG_BFIN_KERNEL_CLOCK
76ENTRY(_start_dma_code) 40ENTRY(_start_dma_code)
diff --git a/arch/blackfin/mach-bf533/head.S b/arch/blackfin/mach-bf533/head.S
index 184296bee3c9..d59db86195b6 100644
--- a/arch/blackfin/mach-bf533/head.S
+++ b/arch/blackfin/mach-bf533/head.S
@@ -35,54 +35,6 @@
35#include <asm/mach/mem_init.h> 35#include <asm/mach/mem_init.h>
36#endif 36#endif
37 37
38.extern _bf53x_relocate_l1_mem
39
40__INIT
41
42ENTRY(_mach_early_start)
43 p0.h = hi(FIO_MASKA_C);
44 p0.l = lo(FIO_MASKA_C);
45 r0 = 0xFFFF(Z);
46 w[p0] = r0.L; /* Disable all interrupts */
47 ssync;
48
49 p0.h = hi(FIO_MASKB_C);
50 p0.l = lo(FIO_MASKB_C);
51 r0 = 0xFFFF(Z);
52 w[p0] = r0.L; /* Disable all interrupts */
53 ssync;
54
55 /* Initialise UART - when booting from u-boot, the UART is not disabled
56 * so if we dont initalize here, our serial console gets hosed */
57 p0.h = hi(BFIN_UART_LCR);
58 p0.l = lo(BFIN_UART_LCR);
59 r0 = 0x0(Z);
60 w[p0] = r0.L; /* To enable DLL writes */
61 ssync;
62
63 p0.h = hi(BFIN_UART_DLL);
64 p0.l = lo(BFIN_UART_DLL);
65 r0 = 0x0(Z);
66 w[p0] = r0.L;
67 ssync;
68
69 p0.h = hi(BFIN_UART_DLH);
70 p0.l = lo(BFIN_UART_DLH);
71 r0 = 0x00(Z);
72 w[p0] = r0.L;
73 ssync;
74
75 p0.h = hi(BFIN_UART_GCTL);
76 p0.l = lo(BFIN_UART_GCTL);
77 r0 = 0x0(Z);
78 w[p0] = r0.L; /* To enable UART clock */
79 ssync;
80
81 rts;
82ENDPROC(_mach_early_start)
83
84__FINIT
85
86.section .l1.text 38.section .l1.text
87#ifdef CONFIG_BFIN_KERNEL_CLOCK 39#ifdef CONFIG_BFIN_KERNEL_CLOCK
88ENTRY(_start_dma_code) 40ENTRY(_start_dma_code)
diff --git a/arch/blackfin/mach-bf537/head.S b/arch/blackfin/mach-bf537/head.S
index ba81b779511d..64e0287ab266 100644
--- a/arch/blackfin/mach-bf537/head.S
+++ b/arch/blackfin/mach-bf537/head.S
@@ -35,56 +35,6 @@
35#include <asm/mach/mem_init.h> 35#include <asm/mach/mem_init.h>
36#endif 36#endif
37 37
38.extern _bf53x_relocate_l1_mem
39
40__INIT
41
42ENTRY(_mach_early_start)
43 /* Initialise General-Purpose I/O Modules on BF537 */
44 p0.h = hi(BFIN_PORT_MUX);
45 p0.l = lo(BFIN_PORT_MUX);
46 R0 = (PGDE_UART | PFTE_UART)(Z);
47 W[P0] = R0.L; /* Enable both UARTS */
48 SSYNC;
49
50 /* Enable peripheral function of PORTF for UART0 and UART1 */
51 p0.h = hi(PORTF_FER);
52 p0.l = lo(PORTF_FER);
53 R0 = 0x000F(Z);
54 W[P0] = R0.L;
55 SSYNC;
56
57 /* Initialise UART - when booting from u-boot, the UART is not disabled
58 * so if we dont initalize here, our serial console gets hosed */
59 p0.h = hi(BFIN_UART_LCR);
60 p0.l = lo(BFIN_UART_LCR);
61 r0 = 0x0(Z);
62 w[p0] = r0.L; /* To enable DLL writes */
63 ssync;
64
65 p0.h = hi(BFIN_UART_DLL);
66 p0.l = lo(BFIN_UART_DLL);
67 r0 = 0x0(Z);
68 w[p0] = r0.L;
69 ssync;
70
71 p0.h = hi(BFIN_UART_DLH);
72 p0.l = lo(BFIN_UART_DLH);
73 r0 = 0x00(Z);
74 w[p0] = r0.L;
75 ssync;
76
77 p0.h = hi(BFIN_UART_GCTL);
78 p0.l = lo(BFIN_UART_GCTL);
79 r0 = 0x0(Z);
80 w[p0] = r0.L; /* To enable UART clock */
81 ssync;
82
83 rts;
84ENDPROC(_mach_early_start)
85
86__FINIT
87
88.section .l1.text 38.section .l1.text
89#ifdef CONFIG_BFIN_KERNEL_CLOCK 39#ifdef CONFIG_BFIN_KERNEL_CLOCK
90ENTRY(_start_dma_code) 40ENTRY(_start_dma_code)
diff --git a/arch/blackfin/mach-bf548/head.S b/arch/blackfin/mach-bf548/head.S
index 0b18196df869..e3000f70a26e 100644
--- a/arch/blackfin/mach-bf548/head.S
+++ b/arch/blackfin/mach-bf548/head.S
@@ -35,16 +35,6 @@
35#include <asm/mach/mem_init.h> 35#include <asm/mach/mem_init.h>
36#endif 36#endif
37 37
38.extern _bf53x_relocate_l1_mem
39
40__INIT
41
42ENTRY(_mach_early_start)
43 rts;
44ENDPROC(_mach_early_start)
45
46__FINIT
47
48.section .l1.text 38.section .l1.text
49#ifdef CONFIG_BFIN_KERNEL_CLOCK 39#ifdef CONFIG_BFIN_KERNEL_CLOCK
50ENTRY(_start_dma_code) 40ENTRY(_start_dma_code)
diff --git a/arch/blackfin/mach-bf561/head.S b/arch/blackfin/mach-bf561/head.S
index fe6f979947c6..c7a81e34703d 100644
--- a/arch/blackfin/mach-bf561/head.S
+++ b/arch/blackfin/mach-bf561/head.S
@@ -35,42 +35,6 @@
35#include <asm/mach/mem_init.h> 35#include <asm/mach/mem_init.h>
36#endif 36#endif
37 37
38.extern _bf53x_relocate_l1_mem
39
40__INIT
41
42ENTRY(_mach_early_start)
43 /* Initialise UART - when booting from u-boot, the UART is not disabled
44 * so if we dont initalize here, our serial console gets hosed */
45 p0.h = hi(BFIN_UART_LCR);
46 p0.l = lo(BFIN_UART_LCR);
47 r0 = 0x0(Z);
48 w[p0] = r0.L; /* To enable DLL writes */
49 ssync;
50
51 p0.h = hi(BFIN_UART_DLL);
52 p0.l = lo(BFIN_UART_DLL);
53 r0 = 0x0(Z);
54 w[p0] = r0.L;
55 ssync;
56
57 p0.h = hi(BFIN_UART_DLH);
58 p0.l = lo(BFIN_UART_DLH);
59 r0 = 0x00(Z);
60 w[p0] = r0.L;
61 ssync;
62
63 p0.h = hi(BFIN_UART_GCTL);
64 p0.l = lo(BFIN_UART_GCTL);
65 r0 = 0x0(Z);
66 w[p0] = r0.L; /* To enable UART clock */
67 ssync;
68
69 rts;
70ENDPROC(_mach_early_start)
71
72__FINIT
73
74.section .l1.text 38.section .l1.text
75#ifdef CONFIG_BFIN_KERNEL_CLOCK 39#ifdef CONFIG_BFIN_KERNEL_CLOCK
76ENTRY(_start_dma_code) 40ENTRY(_start_dma_code)
diff --git a/arch/blackfin/mach-common/head.S b/arch/blackfin/mach-common/head.S
index fb7e2d426999..191b4e974c4b 100644
--- a/arch/blackfin/mach-common/head.S
+++ b/arch/blackfin/mach-common/head.S
@@ -96,9 +96,6 @@ ENTRY(__start)
96 R0 = RETX; 96 R0 = RETX;
97 [P0] = R0; 97 [P0] = R0;
98 98
99 /* Let each Blackfin family do its own thing */
100 call _mach_early_start;
101
102 /* Initialize stack pointer */ 99 /* Initialize stack pointer */
103 sp.l = lo(INITIAL_STACK); 100 sp.l = lo(INITIAL_STACK);
104 sp.h = hi(INITIAL_STACK); 101 sp.h = hi(INITIAL_STACK);