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authorMike Frysinger <vapier@gentoo.org>2010-10-22 00:41:13 -0400
committerMike Frysinger <vapier@gentoo.org>2010-10-22 16:30:03 -0400
commitfec84d21c52bca67949a17aaf7d410b497f8e1b0 (patch)
treec274bc2d05c489fef3a62403f853d9f4b860edbc /arch/blackfin
parentfaf3d9ed2b9b402aa2c3d11688c6a1ff80ea6ea4 (diff)
Blackfin: bfin_ppi.h: start a common PPI/EPPI header
Start unifying the PPI/EPPI peripheral structures in one place. This may be used by camera/video/fpga/high speed devices. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin')
-rw-r--r--arch/blackfin/include/asm/bfin_ppi.h51
1 files changed, 51 insertions, 0 deletions
diff --git a/arch/blackfin/include/asm/bfin_ppi.h b/arch/blackfin/include/asm/bfin_ppi.h
new file mode 100644
index 000000000000..003900886f97
--- /dev/null
+++ b/arch/blackfin/include/asm/bfin_ppi.h
@@ -0,0 +1,51 @@
1/*
2 * bfin_ppi.h - interface to Blackfin PPIs
3 *
4 * Copyright 2005-2010 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9#ifndef __ASM_BFIN_PPI_H__
10#define __ASM_BFIN_PPI_H__
11
12#include <linux/types.h>
13
14/*
15 * All Blackfin system MMRs are padded to 32bits even if the register
16 * itself is only 16bits. So use a helper macro to streamline this.
17 */
18#define __BFP(m) u16 m; u16 __pad_##m
19
20/*
21 * bfin ppi registers layout
22 */
23struct bfin_ppi_regs {
24 __BFP(control);
25 __BFP(status);
26 __BFP(count);
27 __BFP(delay);
28 __BFP(frame);
29};
30
31/*
32 * bfin eppi registers layout
33 */
34struct bfin_eppi_regs {
35 __BFP(status);
36 __BFP(hcount);
37 __BFP(hdelay);
38 __BFP(vcount);
39 __BFP(vdelay);
40 __BFP(frame);
41 __BFP(line);
42 __BFP(clkdiv);
43 u32 control;
44 u32 fs1w_hbl;
45 u32 fs1p_avpl;
46 u32 fs2w_lvb;
47 u32 fs2p_lavf;
48 u32 clip;
49};
50
51#endif