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authorBernd Schmidt <bernd.schmidt@analog.com>2007-07-25 02:44:49 -0400
committerBryan Wu <bryan.wu@analog.com>2007-07-25 02:44:49 -0400
commit8be80ed3f74a60e1af5a30e6b4fa4f744911676e (patch)
treebcab49313593fb65e5059ece4fcfc3b0c5435194 /arch/blackfin
parentd6e274ddb51fa0f9241d7348813351051275d71b (diff)
Blackfin arch: Initialize the exception vectors early in the boot process
Initialize the exception vectors early in the boot process, so that CPLB faults can be handled when memory protection is enabled. Signed-off-by: Bernd Schmidt <bernd.schmidt@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'arch/blackfin')
-rw-r--r--arch/blackfin/kernel/setup.c1
-rw-r--r--arch/blackfin/mach-common/ints-priority-dc.c39
-rw-r--r--arch/blackfin/mach-common/ints-priority-sc.c42
3 files changed, 46 insertions, 36 deletions
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c
index 75aeca8f7c21..88f221b89b33 100644
--- a/arch/blackfin/kernel/setup.c
+++ b/arch/blackfin/kernel/setup.c
@@ -425,6 +425,7 @@ void __init setup_arch(char **cmdline_p)
425 BUG_ON((char *)&atomic_xor32 - (char *)&fixed_code_start 425 BUG_ON((char *)&atomic_xor32 - (char *)&fixed_code_start
426 != ATOMIC_XOR32 - FIXED_CODE_START); 426 != ATOMIC_XOR32 - FIXED_CODE_START);
427 427
428 init_exception_vectors();
428 bf53x_cache_init(); 429 bf53x_cache_init();
429} 430}
430 431
diff --git a/arch/blackfin/mach-common/ints-priority-dc.c b/arch/blackfin/mach-common/ints-priority-dc.c
index 6b9fd03ce835..660f881b620a 100644
--- a/arch/blackfin/mach-common/ints-priority-dc.c
+++ b/arch/blackfin/mach-common/ints-priority-dc.c
@@ -358,26 +358,10 @@ static void bf561_demux_gpio_irq(unsigned int inta_irq,
358 358
359#endif /* CONFIG_IRQCHIP_DEMUX_GPIO */ 359#endif /* CONFIG_IRQCHIP_DEMUX_GPIO */
360 360
361/* 361void __init init_exception_vectors(void)
362 * This function should be called during kernel startup to initialize
363 * the BFin IRQ handling routines.
364 */
365int __init init_arch_irq(void)
366{ 362{
367 int irq;
368 unsigned long ilat = 0;
369 /* Disable all the peripheral intrs - page 4-29 HW Ref manual */
370 bfin_write_SICA_IMASK0(SIC_UNMASK_ALL);
371 bfin_write_SICA_IMASK1(SIC_UNMASK_ALL);
372 SSYNC(); 363 SSYNC();
373 364
374 bfin_write_SICA_IWR0(IWR_ENABLE_ALL);
375 bfin_write_SICA_IWR1(IWR_ENABLE_ALL);
376
377 local_irq_disable();
378
379 init_exception_buff();
380
381#ifndef CONFIG_KGDB 365#ifndef CONFIG_KGDB
382 bfin_write_EVT0(evt_emulation); 366 bfin_write_EVT0(evt_emulation);
383#endif 367#endif
@@ -395,6 +379,27 @@ int __init init_arch_irq(void)
395 bfin_write_EVT14(evt14_softirq); 379 bfin_write_EVT14(evt14_softirq);
396 bfin_write_EVT15(evt_system_call); 380 bfin_write_EVT15(evt_system_call);
397 CSYNC(); 381 CSYNC();
382}
383
384/*
385 * This function should be called during kernel startup to initialize
386 * the BFin IRQ handling routines.
387 */
388int __init init_arch_irq(void)
389{
390 int irq;
391 unsigned long ilat = 0;
392 /* Disable all the peripheral intrs - page 4-29 HW Ref manual */
393 bfin_write_SICA_IMASK0(SIC_UNMASK_ALL);
394 bfin_write_SICA_IMASK1(SIC_UNMASK_ALL);
395 SSYNC();
396
397 bfin_write_SICA_IWR0(IWR_ENABLE_ALL);
398 bfin_write_SICA_IWR1(IWR_ENABLE_ALL);
399
400 local_irq_disable();
401
402 init_exception_buff();
398 403
399 for (irq = 0; irq <= SYS_IRQS; irq++) { 404 for (irq = 0; irq <= SYS_IRQS; irq++) {
400 if (irq <= IRQ_CORETMR) 405 if (irq <= IRQ_CORETMR)
diff --git a/arch/blackfin/mach-common/ints-priority-sc.c b/arch/blackfin/mach-common/ints-priority-sc.c
index 28a878c3577a..3f6305d1a1af 100644
--- a/arch/blackfin/mach-common/ints-priority-sc.c
+++ b/arch/blackfin/mach-common/ints-priority-sc.c
@@ -713,6 +713,29 @@ static void bfin_demux_gpio_irq(unsigned int intb_irq,
713} 713}
714#endif /* CONFIG_IRQCHIP_DEMUX_GPIO */ 714#endif /* CONFIG_IRQCHIP_DEMUX_GPIO */
715 715
716void __init init_exception_vectors(void)
717{
718 SSYNC();
719
720#ifndef CONFIG_KGDB
721 bfin_write_EVT0(evt_emulation);
722#endif
723 bfin_write_EVT2(evt_evt2);
724 bfin_write_EVT3(trap);
725 bfin_write_EVT5(evt_ivhw);
726 bfin_write_EVT6(evt_timer);
727 bfin_write_EVT7(evt_evt7);
728 bfin_write_EVT8(evt_evt8);
729 bfin_write_EVT9(evt_evt9);
730 bfin_write_EVT10(evt_evt10);
731 bfin_write_EVT11(evt_evt11);
732 bfin_write_EVT12(evt_evt12);
733 bfin_write_EVT13(evt_evt13);
734 bfin_write_EVT14(evt14_softirq);
735 bfin_write_EVT15(evt_system_call);
736 CSYNC();
737}
738
716/* 739/*
717 * This function should be called during kernel startup to initialize 740 * This function should be called during kernel startup to initialize
718 * the BFin IRQ handling routines. 741 * the BFin IRQ handling routines.
@@ -733,29 +756,10 @@ int __init init_arch_irq(void)
733 bfin_write_SIC_IMASK(SIC_UNMASK_ALL); 756 bfin_write_SIC_IMASK(SIC_UNMASK_ALL);
734 bfin_write_SIC_IWR(IWR_ENABLE_ALL); 757 bfin_write_SIC_IWR(IWR_ENABLE_ALL);
735#endif 758#endif
736
737 SSYNC(); 759 SSYNC();
738 760
739 local_irq_disable(); 761 local_irq_disable();
740 762
741#ifndef CONFIG_KGDB
742 bfin_write_EVT0(evt_emulation);
743#endif
744 bfin_write_EVT2(evt_evt2);
745 bfin_write_EVT3(trap);
746 bfin_write_EVT5(evt_ivhw);
747 bfin_write_EVT6(evt_timer);
748 bfin_write_EVT7(evt_evt7);
749 bfin_write_EVT8(evt_evt8);
750 bfin_write_EVT9(evt_evt9);
751 bfin_write_EVT10(evt_evt10);
752 bfin_write_EVT11(evt_evt11);
753 bfin_write_EVT12(evt_evt12);
754 bfin_write_EVT13(evt_evt13);
755 bfin_write_EVT14(evt14_softirq);
756 bfin_write_EVT15(evt_system_call);
757 CSYNC();
758
759#if defined(CONFIG_IRQCHIP_DEMUX_GPIO) && defined(CONFIG_BF54x) 763#if defined(CONFIG_IRQCHIP_DEMUX_GPIO) && defined(CONFIG_BF54x)
760#ifdef CONFIG_PINTx_REASSIGN 764#ifdef CONFIG_PINTx_REASSIGN
761 pint[0]->assign = CONFIG_PINT0_ASSIGN; 765 pint[0]->assign = CONFIG_PINT0_ASSIGN;