[Blackfin] arch: added Minotaur BSP

Signed-off-by: Martin Strubel <hackfin@section5.ch>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>

3 files changed, 324 insertions, 0 deletions

diff --git a/arch/blackfin/mach-bf537/boards/Kconfig b/arch/blackfin/mach-bf537/boards/Kconfig
index 96a15196e416..7e789dbef036 100644
--- a/arch/blackfin/mach-bf537/boards/Kconfig
+++ b/arch/blackfin/mach-bf537/boards/Kconfig
@@ -21,6 +21,12 @@ config PNAV10
         help
           PNAV board support.
 
+config CAMSIG_MINOTAUR
+        bool "Cambridge Signal Processing LTD Minotaur"
+        depends on (BF537)
+        help
+          Board supply package for CSP Minotaur
+
 config GENERIC_BF537_BOARD
         bool "Generic"
         help
diff --git a/arch/blackfin/mach-bf537/boards/Makefile b/arch/blackfin/mach-bf537/boards/Makefile
index 94a85174283a..87e450f29e37 100644
--- a/arch/blackfin/mach-bf537/boards/Makefile
+++ b/arch/blackfin/mach-bf537/boards/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_GENERIC_BF537_BOARD)      += generic_board.o
 obj-$(CONFIG_BFIN537_STAMP)            += stamp.o led.o
 obj-$(CONFIG_BFIN537_BLUETECHNIX_CM)   += cm_bf537.o
 obj-$(CONFIG_PNAV10)                   += pnav10.o
+obj-$(CONFIG_CAMSIG_MINOTAUR)          += minotaur.o
diff --git a/arch/blackfin/mach-bf537/boards/minotaur.c b/arch/blackfin/mach-bf537/boards/minotaur.c
new file mode 100644
index 000000000000..b8bbba85af53
--- /dev/null
+++ b/arch/blackfin/mach-bf537/boards/minotaur.c
@@ -0,0 +1,317 @@
+/*
+ */
+
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/flash.h>
+#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
+#include <linux/usb_isp1362.h>
+#endif
+#include <linux/pata_platform.h>
+#include <linux/irq.h>
+#include <linux/interrupt.h>
+#include <linux/usb_sl811.h>
+#include <asm/dma.h>
+#include <asm/bfin5xx_spi.h>
+#include <asm/reboot.h>
+#include <linux/spi/ad7877.h>
+
+/*
+ * Name the Board for the /proc/cpuinfo
+ */
+char *bfin_board_name = "CamSig Minotaur BF537";
+
+#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
+static struct resource bfin_pcmcia_cf_resources[] = {
+        {
+                .start = 0x20310000, /* IO PORT */
+                .end = 0x20312000,
+                .flags = IORESOURCE_MEM,
+        }, {
+                .start = 0x20311000, /* Attribute Memory */
+                .end = 0x20311FFF,
+                .flags = IORESOURCE_MEM,
+        }, {
+                .start = IRQ_PF4,
+                .end = IRQ_PF4,
+                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
+        }, {
+                .start = IRQ_PF6, /* Card Detect PF6 */
+                .end = IRQ_PF6,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device bfin_pcmcia_cf_device = {
+        .name = "bfin_cf_pcmcia",
+        .id = -1,
+        .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
+        .resource = bfin_pcmcia_cf_resources,
+};
+#endif
+
+#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
+static struct platform_device rtc_device = {
+        .name = "rtc-bfin",
+        .id   = -1,
+};
+#endif
+
+#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
+static struct platform_device bfin_mac_device = {
+        .name = "bfin_mac",
+};
+#endif
+
+#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
+static struct resource net2272_bfin_resources[] = {
+        {
+                .start = 0x20300000,
+                .end = 0x20300000 + 0x100,
+                .flags = IORESOURCE_MEM,
+        }, {
+                .start = IRQ_PF7,
+                .end = IRQ_PF7,
+                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
+        },
+};
+
+static struct platform_device net2272_bfin_device = {
+        .name = "net2272",
+        .id = -1,
+        .num_resources = ARRAY_SIZE(net2272_bfin_resources),
+        .resource = net2272_bfin_resources,
+};
+#endif
+
+#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
+/* all SPI peripherals info goes here */
+
+#if defined(CONFIG_MTD_M25P80) \
+        || defined(CONFIG_MTD_M25P80_MODULE)
+
+/* Partition sizes */
+#define FLASH_SIZE       0x00400000
+#define PSIZE_UBOOT      0x00030000
+#define PSIZE_INITRAMFS  0x00240000
+
+static struct mtd_partition bfin_spi_flash_partitions[] = {
+        {
+                .name       = "uboot",
+                .size       = PSIZE_UBOOT,
+                .offset     = 0x000000,
+                .mask_flags = MTD_CAP_ROM
+        }, {
+                .name       = "initramfs",
+                .size       = PSIZE_INITRAMFS,
+                .offset     = PSIZE_UBOOT
+        }, {
+                .name       = "opt",
+                .size       = FLASH_SIZE - (PSIZE_UBOOT + PSIZE_INITRAMFS),
+                .offset     = PSIZE_UBOOT + PSIZE_INITRAMFS,
+        }
+};
+
+static struct flash_platform_data bfin_spi_flash_data = {
+        .name = "m25p80",
+        .parts = bfin_spi_flash_partitions,
+        .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
+        .type = "m25p64",
+};
+
+/* SPI flash chip (m25p64) */
+static struct bfin5xx_spi_chip spi_flash_chip_info = {
+        .enable_dma = 0,         /* use dma transfer with this chip*/
+        .bits_per_word = 8,
+};
+#endif
+
+#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
+static struct bfin5xx_spi_chip spi_mmc_chip_info = {
+        .enable_dma = 1,
+        .bits_per_word = 8,
+};
+#endif
+
+static struct spi_board_info bfin_spi_board_info[] __initdata = {
+#if defined(CONFIG_MTD_M25P80) \
+        || defined(CONFIG_MTD_M25P80_MODULE)
+        {
+                /* the modalias must be the same as spi device driver name */
+                .modalias = "m25p80", /* Name of spi_driver for this device */
+                .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
+                .bus_num = 0, /* Framework bus number */
+                .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
+                .platform_data = &bfin_spi_flash_data,
+                .controller_data = &spi_flash_chip_info,
+                .mode = SPI_MODE_3,
+        },
+#endif
+
+#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
+        {
+                .modalias = "spi_mmc_dummy",
+                .max_speed_hz = 5000000,     /* max spi clock (SCK) speed in HZ */
+                .bus_num = 0,
+                .chip_select = 0,
+                .platform_data = NULL,
+                .controller_data = &spi_mmc_chip_info,
+                .mode = SPI_MODE_3,
+        },
+        {
+                .modalias = "spi_mmc",
+                .max_speed_hz = 5000000,     /* max spi clock (SCK) speed in HZ */
+                .bus_num = 0,
+                .chip_select = CONFIG_SPI_MMC_CS_CHAN,
+                .platform_data = NULL,
+                .controller_data = &spi_mmc_chip_info,
+                .mode = SPI_MODE_3,
+        },
+#endif
+};
+
+/* SPI controller data */
+static struct bfin5xx_spi_master bfin_spi0_info = {
+        .num_chipselect = 8,
+        .enable_dma = 1,  /* master has the ability to do dma transfer */
+};
+
+/* SPI (0) */
+static struct resource bfin_spi0_resource[] = {
+        [0] = {
+                .start = SPI0_REGBASE,
+                .end   = SPI0_REGBASE + 0xFF,
+                .flags = IORESOURCE_MEM,
+                },
+        [1] = {
+                .start = CH_SPI,
+                .end   = CH_SPI,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device bfin_spi0_device = {
+        .name = "bfin-spi",
+        .id = 0, /* Bus number */
+        .num_resources = ARRAY_SIZE(bfin_spi0_resource),
+        .resource = bfin_spi0_resource,
+        .dev = {
+                .platform_data = &bfin_spi0_info, /* Passed to driver */
+        },
+};
+#endif  /* spi master and devices */
+
+#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
+static struct resource bfin_uart_resources[] = {
+        {
+                .start = 0xFFC00400,
+                .end = 0xFFC004FF,
+                .flags = IORESOURCE_MEM,
+        }, {
+                .start = 0xFFC02000,
+                .end = 0xFFC020FF,
+                .flags = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device bfin_uart_device = {
+        .name = "bfin-uart",
+        .id = 1,
+        .num_resources = ARRAY_SIZE(bfin_uart_resources),
+        .resource = bfin_uart_resources,
+};
+#endif
+
+#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
+static struct resource bfin_twi0_resource[] = {
+        [0] = {
+                .start = TWI0_REGBASE,
+                .end   = TWI0_REGBASE + 0xFF,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = IRQ_TWI,
+                .end   = IRQ_TWI,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device i2c_bfin_twi_device = {
+        .name = "i2c-bfin-twi",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_twi0_resource),
+        .resource = bfin_twi0_resource,
+};
+#endif
+
+#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+static struct platform_device bfin_sport0_uart_device = {
+        .name = "bfin-sport-uart",
+        .id = 0,
+};
+
+static struct platform_device bfin_sport1_uart_device = {
+        .name = "bfin-sport-uart",
+        .id = 1,
+};
+#endif
+
+static struct platform_device *minotaur_devices[] __initdata = {
+#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
+        &bfin_pcmcia_cf_device,
+#endif
+
+#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
+        &rtc_device,
+#endif
+
+#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
+        &bfin_mac_device,
+#endif
+
+#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
+        &net2272_bfin_device,
+#endif
+
+#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
+        &bfin_spi0_device,
+#endif
+
+#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
+        &bfin_uart_device,
+#endif
+
+#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
+        &i2c_bfin_twi_device,
+#endif
+
+#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+        &bfin_sport0_uart_device,
+        &bfin_sport1_uart_device,
+#endif
+
+};
+
+static int __init minotaur_init(void)
+{
+        printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
+        platform_add_devices(minotaur_devices, ARRAY_SIZE(minotaur_devices));
+#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
+        spi_register_board_info(bfin_spi_board_info,
+                                ARRAY_SIZE(bfin_spi_board_info));
+#endif
+
+        return 0;
+}
+
+arch_initcall(minotaur_init);
+
+void native_machine_restart(char *cmd)
+{
+        /* workaround reboot hang when booting from SPI */
+        if ((bfin_read_SYSCR() & 0x7) == 0x3)
+                bfin_gpio_reset_spi0_ssel1();
+}