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authorMichal Marek <mmarek@suse.cz>2010-08-04 07:59:13 -0400
committerMichal Marek <mmarek@suse.cz>2010-08-04 07:59:13 -0400
commit772320e84588dcbe1600ffb83e5f328f2209ac2a (patch)
treea7de21b79340aeaa17c58126f6b801b82c77b53a /arch/blackfin
parent1ce53adf13a54375d2a5c7cdbe341b2558389615 (diff)
parent9fe6206f400646a2322096b56c59891d530e8d51 (diff)
Merge commit 'v2.6.35' into kbuild/kbuild
Conflicts: arch/powerpc/Makefile
Diffstat (limited to 'arch/blackfin')
-rw-r--r--arch/blackfin/Kconfig142
-rw-r--r--arch/blackfin/Kconfig.debug21
-rw-r--r--arch/blackfin/Makefile7
-rw-r--r--arch/blackfin/boot/Makefile23
-rw-r--r--arch/blackfin/configs/BF518F-EZBRD_defconfig270
-rw-r--r--arch/blackfin/configs/BF526-EZBRD_defconfig336
-rw-r--r--arch/blackfin/configs/BF527-EZKIT-V2_defconfig1811
-rw-r--r--arch/blackfin/configs/BF527-EZKIT_defconfig344
-rw-r--r--arch/blackfin/configs/BF533-EZKIT_defconfig250
-rw-r--r--arch/blackfin/configs/BF533-STAMP_defconfig295
-rw-r--r--arch/blackfin/configs/BF537-STAMP_defconfig332
-rw-r--r--arch/blackfin/configs/BF538-EZKIT_defconfig291
-rw-r--r--arch/blackfin/configs/BF548-EZKIT_defconfig108
-rw-r--r--arch/blackfin/configs/BF561-ACVILON_defconfig15
-rw-r--r--arch/blackfin/configs/BF561-EZKIT_defconfig82
-rw-r--r--arch/blackfin/configs/H8606_defconfig7
-rw-r--r--arch/blackfin/configs/PNAV-10_defconfig295
-rw-r--r--arch/blackfin/configs/TCM-BF518_defconfig1375
-rw-r--r--arch/blackfin/include/asm/bfin-global.h6
-rw-r--r--arch/blackfin/include/asm/bfin-lq035q1.h12
-rw-r--r--arch/blackfin/include/asm/bfin_can.h725
-rw-r--r--arch/blackfin/include/asm/bfin_sport.h227
-rw-r--r--arch/blackfin/include/asm/bfin_watchdog.h30
-rw-r--r--arch/blackfin/include/asm/bitops.h74
-rw-r--r--arch/blackfin/include/asm/bug.h7
-rw-r--r--arch/blackfin/include/asm/cache.h2
-rw-r--r--arch/blackfin/include/asm/context.S22
-rw-r--r--arch/blackfin/include/asm/cpu.h2
-rw-r--r--arch/blackfin/include/asm/def_LPBlackfin.h58
-rw-r--r--arch/blackfin/include/asm/delay.h16
-rw-r--r--arch/blackfin/include/asm/dma-mapping.h51
-rw-r--r--arch/blackfin/include/asm/dma.h4
-rw-r--r--arch/blackfin/include/asm/dpmc.h4
-rw-r--r--arch/blackfin/include/asm/elf.h8
-rw-r--r--arch/blackfin/include/asm/ftrace.h53
-rw-r--r--arch/blackfin/include/asm/gpio.h39
-rw-r--r--arch/blackfin/include/asm/irq.h7
-rw-r--r--arch/blackfin/include/asm/mmu_context.h16
-rw-r--r--arch/blackfin/include/asm/nand.h4
-rw-r--r--arch/blackfin/include/asm/nmi.h12
-rw-r--r--arch/blackfin/include/asm/page.h3
-rw-r--r--arch/blackfin/include/asm/pgtable.h3
-rw-r--r--arch/blackfin/include/asm/pseudo_instructions.h18
-rw-r--r--arch/blackfin/include/asm/ptrace.h25
-rw-r--r--arch/blackfin/include/asm/scatterlist.h22
-rw-r--r--arch/blackfin/include/asm/sections.h3
-rw-r--r--arch/blackfin/include/asm/smp.h15
-rw-r--r--arch/blackfin/include/asm/string.h113
-rw-r--r--arch/blackfin/include/asm/syscall.h96
-rw-r--r--arch/blackfin/include/asm/thread_info.h25
-rw-r--r--arch/blackfin/include/asm/time.h13
-rw-r--r--arch/blackfin/include/asm/tlbflush.h1
-rw-r--r--arch/blackfin/include/asm/trace.h7
-rw-r--r--arch/blackfin/kernel/Makefile6
-rw-r--r--arch/blackfin/kernel/bfin_dma_5xx.c10
-rw-r--r--arch/blackfin/kernel/bfin_gpio.c151
-rw-r--r--arch/blackfin/kernel/bfin_ksyms.c12
-rw-r--r--arch/blackfin/kernel/cplb-mpu/cplbinit.c9
-rw-r--r--arch/blackfin/kernel/cplb-mpu/cplbmgr.c54
-rw-r--r--arch/blackfin/kernel/cplb-nompu/cplbinit.c9
-rw-r--r--arch/blackfin/kernel/dma-mapping.c2
-rw-r--r--arch/blackfin/kernel/dumpstack.c174
-rw-r--r--arch/blackfin/kernel/entry.S8
-rw-r--r--arch/blackfin/kernel/exception.c45
-rw-r--r--arch/blackfin/kernel/ftrace-entry.S23
-rw-r--r--arch/blackfin/kernel/ftrace.c6
-rw-r--r--arch/blackfin/kernel/init_task.c2
-rw-r--r--arch/blackfin/kernel/ipipe.c1
-rw-r--r--arch/blackfin/kernel/kgdb.c17
-rw-r--r--arch/blackfin/kernel/nmi.c299
-rw-r--r--arch/blackfin/kernel/process.c8
-rw-r--r--arch/blackfin/kernel/pseudodbg.c191
-rw-r--r--arch/blackfin/kernel/ptrace.c389
-rw-r--r--arch/blackfin/kernel/setup.c38
-rw-r--r--arch/blackfin/kernel/signal.c24
-rw-r--r--arch/blackfin/kernel/sys_bfin.c23
-rw-r--r--arch/blackfin/kernel/time-ts.c214
-rw-r--r--arch/blackfin/kernel/time.c39
-rw-r--r--arch/blackfin/kernel/trace.c981
-rw-r--r--arch/blackfin/kernel/traps.c902
-rw-r--r--arch/blackfin/kernel/vmlinux.lds.S70
-rw-r--r--arch/blackfin/lib/memset.S1
-rw-r--r--arch/blackfin/lib/strcmp.S43
-rw-r--r--arch/blackfin/lib/strcmp.c19
-rw-r--r--arch/blackfin/lib/strcpy.S35
-rw-r--r--arch/blackfin/lib/strcpy.c19
-rw-r--r--arch/blackfin/lib/strncmp.S52
-rw-r--r--arch/blackfin/lib/strncmp.c18
-rw-r--r--arch/blackfin/lib/strncpy.S85
-rw-r--r--arch/blackfin/lib/strncpy.c19
-rw-r--r--arch/blackfin/mach-bf518/boards/Kconfig5
-rw-r--r--arch/blackfin/mach-bf518/boards/Makefile1
-rw-r--r--arch/blackfin/mach-bf518/boards/ezbrd.c178
-rw-r--r--arch/blackfin/mach-bf518/boards/tcm-bf518.c753
-rw-r--r--arch/blackfin/mach-bf518/include/mach/irq.h12
-rw-r--r--arch/blackfin/mach-bf518/include/mach/mem_map.h2
-rw-r--r--arch/blackfin/mach-bf527/boards/Kconfig5
-rw-r--r--arch/blackfin/mach-bf527/boards/Makefile1
-rw-r--r--arch/blackfin/mach-bf527/boards/cm_bf527.c249
-rw-r--r--arch/blackfin/mach-bf527/boards/ezbrd.c203
-rw-r--r--arch/blackfin/mach-bf527/boards/ezkit.c435
-rw-r--r--arch/blackfin/mach-bf527/include/mach/irq.h12
-rw-r--r--arch/blackfin/mach-bf533/boards/H8606.c66
-rw-r--r--arch/blackfin/mach-bf533/boards/blackstamp.c134
-rw-r--r--arch/blackfin/mach-bf533/boards/cm_bf533.c138
-rw-r--r--arch/blackfin/mach-bf533/boards/ezkit.c102
-rw-r--r--arch/blackfin/mach-bf533/boards/ip0x.c63
-rw-r--r--arch/blackfin/mach-bf533/boards/stamp.c174
-rw-r--r--arch/blackfin/mach-bf533/include/mach/irq.h3
-rw-r--r--arch/blackfin/mach-bf537/boards/cm_bf537e.c116
-rw-r--r--arch/blackfin/mach-bf537/boards/cm_bf537u.c187
-rw-r--r--arch/blackfin/mach-bf537/boards/minotaur.c186
-rw-r--r--arch/blackfin/mach-bf537/boards/pnav10.c169
-rw-r--r--arch/blackfin/mach-bf537/boards/stamp.c684
-rw-r--r--arch/blackfin/mach-bf537/boards/tcm_bf537.c187
-rw-r--r--arch/blackfin/mach-bf537/include/mach/defBF534.h622
-rw-r--r--arch/blackfin/mach-bf537/include/mach/irq.h14
-rw-r--r--arch/blackfin/mach-bf538/boards/ezkit.c346
-rw-r--r--arch/blackfin/mach-bf538/include/mach/defBF539.h621
-rw-r--r--arch/blackfin/mach-bf538/include/mach/irq.h3
-rw-r--r--arch/blackfin/mach-bf548/boards/cm_bf548.c403
-rw-r--r--arch/blackfin/mach-bf548/boards/ezkit.c447
-rw-r--r--arch/blackfin/mach-bf548/include/mach/defBF54x_base.h671
-rw-r--r--arch/blackfin/mach-bf548/include/mach/irq.h3
-rw-r--r--arch/blackfin/mach-bf561/Makefile1
-rw-r--r--arch/blackfin/mach-bf561/boards/acvilon.c5
-rw-r--r--arch/blackfin/mach-bf561/boards/cm_bf561.c66
-rw-r--r--arch/blackfin/mach-bf561/boards/ezkit.c70
-rw-r--r--arch/blackfin/mach-bf561/boards/tepla.c68
-rw-r--r--arch/blackfin/mach-bf561/hotplug.c32
-rw-r--r--arch/blackfin/mach-bf561/include/mach/irq.h3
-rw-r--r--arch/blackfin/mach-bf561/include/mach/smp.h2
-rw-r--r--arch/blackfin/mach-bf561/secondary.S50
-rw-r--r--arch/blackfin/mach-bf561/smp.c44
-rw-r--r--arch/blackfin/mach-common/cpufreq.c168
-rw-r--r--arch/blackfin/mach-common/entry.S85
-rw-r--r--arch/blackfin/mach-common/head.S16
-rw-r--r--arch/blackfin/mach-common/interrupt.S35
-rw-r--r--arch/blackfin/mach-common/ints-priority.c250
-rw-r--r--arch/blackfin/mach-common/pm.c25
-rw-r--r--arch/blackfin/mach-common/smp.c92
-rw-r--r--arch/blackfin/mm/init.c61
-rw-r--r--arch/blackfin/mm/isram-driver.c101
-rw-r--r--arch/blackfin/mm/sram-alloc.c31
144 files changed, 14505 insertions, 5620 deletions
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 53c1e1d45c68..f66294b4f9d2 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -23,12 +23,15 @@ config RWSEM_XCHGADD_ALGORITHM
23 23
24config BLACKFIN 24config BLACKFIN
25 def_bool y 25 def_bool y
26 select HAVE_ARCH_KGDB
27 select HAVE_ARCH_TRACEHOOK
26 select HAVE_FUNCTION_GRAPH_TRACER 28 select HAVE_FUNCTION_GRAPH_TRACER
27 select HAVE_FUNCTION_TRACER 29 select HAVE_FUNCTION_TRACER
30 select HAVE_FUNCTION_TRACE_MCOUNT_TEST
28 select HAVE_IDE 31 select HAVE_IDE
29 select HAVE_KERNEL_GZIP 32 select HAVE_KERNEL_GZIP if RAMKERNEL
30 select HAVE_KERNEL_BZIP2 33 select HAVE_KERNEL_BZIP2 if RAMKERNEL
31 select HAVE_KERNEL_LZMA 34 select HAVE_KERNEL_LZMA if RAMKERNEL
32 select HAVE_OPROFILE 35 select HAVE_OPROFILE
33 select ARCH_WANT_OPTIONAL_GPIOLIB 36 select ARCH_WANT_OPTIONAL_GPIOLIB
34 37
@@ -45,9 +48,6 @@ config ZONE_DMA
45config GENERIC_FIND_NEXT_BIT 48config GENERIC_FIND_NEXT_BIT
46 def_bool y 49 def_bool y
47 50
48config GENERIC_HWEIGHT
49 def_bool y
50
51config GENERIC_HARDIRQS 51config GENERIC_HARDIRQS
52 def_bool y 52 def_bool y
53 53
@@ -239,7 +239,7 @@ endchoice
239 239
240config SMP 240config SMP
241 depends on BF561 241 depends on BF561
242 select GENERIC_CLOCKEVENTS 242 select TICKSOURCE_CORETMR
243 bool "Symmetric multi-processing support" 243 bool "Symmetric multi-processing support"
244 ---help--- 244 ---help---
245 This enables support for systems with more than one CPU, 245 This enables support for systems with more than one CPU,
@@ -253,11 +253,20 @@ config NR_CPUS
253 depends on SMP 253 depends on SMP
254 default 2 if BF561 254 default 2 if BF561
255 255
256config HOTPLUG_CPU
257 bool "Support for hot-pluggable CPUs"
258 depends on SMP && HOTPLUG
259 default y
260
256config IRQ_PER_CPU 261config IRQ_PER_CPU
257 bool 262 bool
258 depends on SMP 263 depends on SMP
259 default y 264 default y
260 265
266config HAVE_LEGACY_PER_CPU_AREA
267 def_bool y
268 depends on SMP
269
261config BF_REV_MIN 270config BF_REV_MIN
262 int 271 int
263 default 0 if (BF51x || BF52x || (BF54x && !BF54xM)) 272 default 0 if (BF51x || BF52x || (BF54x && !BF54xM))
@@ -339,7 +348,7 @@ config MEM_MT48LC16M16A2TG_75
339 348
340config MEM_MT48LC32M8A2_75 349config MEM_MT48LC32M8A2_75
341 bool 350 bool
342 depends on (BFIN537_STAMP || PNAV10 || BFIN538_EZKIT) 351 depends on (BFIN518F_EZBRD || BFIN537_STAMP || PNAV10 || BFIN538_EZKIT)
343 default y 352 default y
344 353
345config MEM_MT48LC8M32B2B5_7 354config MEM_MT48LC8M32B2B5_7
@@ -349,12 +358,7 @@ config MEM_MT48LC8M32B2B5_7
349 358
350config MEM_MT48LC32M16A2TG_75 359config MEM_MT48LC32M16A2TG_75
351 bool 360 bool
352 depends on (BFIN527_EZKIT || BFIN532_IP0X || BLACKSTAMP) 361 depends on (BFIN527_EZKIT || BFIN527_EZKIT_V2 || BFIN532_IP0X || BLACKSTAMP)
353 default y
354
355config MEM_MT48LC32M8A2_75
356 bool
357 depends on (BFIN518F_EZBRD)
358 default y 362 default y
359 363
360config MEM_MT48H32M16LFCJ_75 364config MEM_MT48H32M16LFCJ_75
@@ -401,10 +405,18 @@ config BOOT_LOAD
401config ROM_BASE 405config ROM_BASE
402 hex "Kernel ROM Base" 406 hex "Kernel ROM Base"
403 depends on ROMKERNEL 407 depends on ROMKERNEL
404 default "0x20040000" 408 default "0x20040040"
405 range 0x20000000 0x20400000 if !(BF54x || BF561) 409 range 0x20000000 0x20400000 if !(BF54x || BF561)
406 range 0x20000000 0x30000000 if (BF54x || BF561) 410 range 0x20000000 0x30000000 if (BF54x || BF561)
407 help 411 help
412 Make sure your ROM base does not include any file-header
413 information that is prepended to the kernel.
414
415 For example, the bootable U-Boot format (created with
416 mkimage) has a 64 byte header (0x40). So while the image
417 you write to flash might start at say 0x20080000, you have
418 to add 0x40 to get the kernel's ROM base as it will come
419 after the header.
408 420
409comment "Clock/PLL Setup" 421comment "Clock/PLL Setup"
410 422
@@ -448,7 +460,7 @@ config VCO_MULT
448 range 1 64 460 range 1 64
449 default "22" if BFIN533_EZKIT 461 default "22" if BFIN533_EZKIT
450 default "45" if BFIN533_STAMP 462 default "45" if BFIN533_STAMP
451 default "20" if (BFIN537_STAMP || BFIN527_EZKIT || BFIN548_EZKIT || BFIN548_BLUETECHNIX_CM || BFIN538_EZKIT) 463 default "20" if (BFIN537_STAMP || BFIN527_EZKIT || BFIN527_EZKIT_V2 || BFIN548_EZKIT || BFIN548_BLUETECHNIX_CM || BFIN538_EZKIT)
452 default "22" if BFIN533_BLUETECHNIX_CM 464 default "22" if BFIN533_BLUETECHNIX_CM
453 default "20" if (BFIN537_BLUETECHNIX_CM_E || BFIN537_BLUETECHNIX_CM_U || BFIN527_BLUETECHNIX_CM || BFIN561_BLUETECHNIX_CM) 465 default "20" if (BFIN537_BLUETECHNIX_CM_E || BFIN537_BLUETECHNIX_CM_U || BFIN527_BLUETECHNIX_CM || BFIN561_BLUETECHNIX_CM)
454 default "20" if BFIN561_EZKIT 466 default "20" if BFIN561_EZKIT
@@ -609,23 +621,23 @@ config GENERIC_CLOCKEVENTS
609 bool "Generic clock events" 621 bool "Generic clock events"
610 default y 622 default y
611 623
612choice 624menu "Clock event device"
613 prompt "Kernel Tick Source"
614 depends on GENERIC_CLOCKEVENTS 625 depends on GENERIC_CLOCKEVENTS
615 default TICKSOURCE_CORETMR
616
617config TICKSOURCE_GPTMR0 626config TICKSOURCE_GPTMR0
618 bool "Gptimer0 (SCLK domain)" 627 bool "GPTimer0"
628 depends on !SMP
619 select BFIN_GPTIMERS 629 select BFIN_GPTIMERS
620 630
621config TICKSOURCE_CORETMR 631config TICKSOURCE_CORETMR
622 bool "Core timer (CCLK domain)" 632 bool "Core timer"
623 633 default y
624endchoice 634endmenu
625 635
626config CYCLES_CLOCKSOURCE 636menu "Clock souce"
627 bool "Use 'CYCLES' as a clocksource"
628 depends on GENERIC_CLOCKEVENTS 637 depends on GENERIC_CLOCKEVENTS
638config CYCLES_CLOCKSOURCE
639 bool "CYCLES"
640 default y
629 depends on !BFIN_SCRATCH_REG_CYCLES 641 depends on !BFIN_SCRATCH_REG_CYCLES
630 depends on !SMP 642 depends on !SMP
631 help 643 help
@@ -636,10 +648,10 @@ config CYCLES_CLOCKSOURCE
636 writing the registers will most likely crash the kernel. 648 writing the registers will most likely crash the kernel.
637 649
638config GPTMR0_CLOCKSOURCE 650config GPTMR0_CLOCKSOURCE
639 bool "Use GPTimer0 as a clocksource" 651 bool "GPTimer0"
640 select BFIN_GPTIMERS 652 select BFIN_GPTIMERS
641 depends on GENERIC_CLOCKEVENTS
642 depends on !TICKSOURCE_GPTMR0 653 depends on !TICKSOURCE_GPTMR0
654endmenu
643 655
644config ARCH_USES_GETTIMEOFFSET 656config ARCH_USES_GETTIMEOFFSET
645 depends on !GENERIC_CLOCKEVENTS 657 depends on !GENERIC_CLOCKEVENTS
@@ -774,6 +786,34 @@ config MEMCPY_L1
774 If enabled, the memcpy function is linked 786 If enabled, the memcpy function is linked
775 into L1 instruction memory. (less latency) 787 into L1 instruction memory. (less latency)
776 788
789config STRCMP_L1
790 bool "locate strcmp function in L1 Memory"
791 default y
792 help
793 If enabled, the strcmp function is linked
794 into L1 instruction memory (less latency).
795
796config STRNCMP_L1
797 bool "locate strncmp function in L1 Memory"
798 default y
799 help
800 If enabled, the strncmp function is linked
801 into L1 instruction memory (less latency).
802
803config STRCPY_L1
804 bool "locate strcpy function in L1 Memory"
805 default y
806 help
807 If enabled, the strcpy function is linked
808 into L1 instruction memory (less latency).
809
810config STRNCPY_L1
811 bool "locate strncpy function in L1 Memory"
812 default y
813 help
814 If enabled, the strncpy function is linked
815 into L1 instruction memory (less latency).
816
777config SYS_BFIN_SPINLOCK_L1 817config SYS_BFIN_SPINLOCK_L1
778 bool "Locate sys_bfin_spinlock function in L1 Memory" 818 bool "Locate sys_bfin_spinlock function in L1 Memory"
779 default y 819 default y
@@ -1116,24 +1156,6 @@ config PCI
1116 1156
1117source "drivers/pci/Kconfig" 1157source "drivers/pci/Kconfig"
1118 1158
1119config HOTPLUG
1120 bool "Support for hot-pluggable device"
1121 help
1122 Say Y here if you want to plug devices into your computer while
1123 the system is running, and be able to use them quickly. In many
1124 cases, the devices can likewise be unplugged at any time too.
1125
1126 One well known example of this is PCMCIA- or PC-cards, credit-card
1127 size devices such as network cards, modems or hard drives which are
1128 plugged into slots found on all modern laptop computers. Another
1129 example, used on modern desktops as well as laptops, is USB.
1130
1131 Enable HOTPLUG and build a modular kernel. Get agent software
1132 (from <http://linux-hotplug.sourceforge.net/>) and install it.
1133 Then your kernel will automatically call out to a user mode "policy
1134 agent" (/sbin/hotplug) to load modules and set up software needed
1135 to use devices as you hotplug them.
1136
1137source "drivers/pcmcia/Kconfig" 1159source "drivers/pcmcia/Kconfig"
1138 1160
1139source "drivers/pci/hotplug/Kconfig" 1161source "drivers/pci/hotplug/Kconfig"
@@ -1147,7 +1169,6 @@ source "fs/Kconfig.binfmt"
1147endmenu 1169endmenu
1148 1170
1149menu "Power management options" 1171menu "Power management options"
1150 depends on !SMP
1151 1172
1152source "kernel/power/Kconfig" 1173source "kernel/power/Kconfig"
1153 1174
@@ -1189,32 +1210,6 @@ config PM_BFIN_SLEEP
1189 If unsure, select "Sleep Deeper". 1210 If unsure, select "Sleep Deeper".
1190endchoice 1211endchoice
1191 1212
1192config PM_WAKEUP_BY_GPIO
1193 bool "Allow Wakeup from Standby by GPIO"
1194 depends on PM && !BF54x
1195
1196config PM_WAKEUP_GPIO_NUMBER
1197 int "GPIO number"
1198 range 0 47
1199 depends on PM_WAKEUP_BY_GPIO
1200 default 2
1201
1202choice
1203 prompt "GPIO Polarity"
1204 depends on PM_WAKEUP_BY_GPIO
1205 default PM_WAKEUP_GPIO_POLAR_H
1206config PM_WAKEUP_GPIO_POLAR_H
1207 bool "Active High"
1208config PM_WAKEUP_GPIO_POLAR_L
1209 bool "Active Low"
1210config PM_WAKEUP_GPIO_POLAR_EDGE_F
1211 bool "Falling EDGE"
1212config PM_WAKEUP_GPIO_POLAR_EDGE_R
1213 bool "Rising EDGE"
1214config PM_WAKEUP_GPIO_POLAR_EDGE_B
1215 bool "Both EDGE"
1216endchoice
1217
1218comment "Possible Suspend Mem / Hibernate Wake-Up Sources" 1213comment "Possible Suspend Mem / Hibernate Wake-Up Sources"
1219 depends on PM 1214 depends on PM
1220 1215
@@ -1240,7 +1235,6 @@ config PM_BFIN_WAKE_GP
1240endmenu 1235endmenu
1241 1236
1242menu "CPU Frequency scaling" 1237menu "CPU Frequency scaling"
1243 depends on !SMP
1244 1238
1245source "drivers/cpufreq/Kconfig" 1239source "drivers/cpufreq/Kconfig"
1246 1240
diff --git a/arch/blackfin/Kconfig.debug b/arch/blackfin/Kconfig.debug
index 87f195ee2e06..d1825cb24768 100644
--- a/arch/blackfin/Kconfig.debug
+++ b/arch/blackfin/Kconfig.debug
@@ -18,9 +18,6 @@ config DEBUG_STACK_USAGE
18 18
19 This option will slow down process creation somewhat. 19 This option will slow down process creation somewhat.
20 20
21config HAVE_ARCH_KGDB
22 def_bool y
23
24config DEBUG_VERBOSE 21config DEBUG_VERBOSE
25 bool "Verbose fault messages" 22 bool "Verbose fault messages"
26 default y 23 default y
@@ -238,6 +235,15 @@ config EARLY_PRINTK
238 all of this lives in the init section and is thrown away after the 235 all of this lives in the init section and is thrown away after the
239 kernel boots completely. 236 kernel boots completely.
240 237
238config NMI_WATCHDOG
239 bool "Enable NMI watchdog to help debugging lockup on SMP"
240 default n
241 depends on SMP
242 help
243 If any CPU in the system does not execute the period local timer
244 interrupt for more than 5 seconds, then the NMI handler dumps debug
245 information. This information can be used to debug the lockup.
246
241config CPLB_INFO 247config CPLB_INFO
242 bool "Display the CPLB information" 248 bool "Display the CPLB information"
243 help 249 help
@@ -258,4 +264,13 @@ config BFIN_ISRAM_SELF_TEST
258 help 264 help
259 Run some self tests of the isram driver code at boot. 265 Run some self tests of the isram driver code at boot.
260 266
267config BFIN_PSEUDODBG_INSNS
268 bool "Support pseudo debug instructions"
269 default n
270 help
271 This option allows the kernel to emulate some pseudo instructions which
272 allow simulator test cases to be run under Linux with no changes.
273
274 Most people should say N here.
275
261endmenu 276endmenu
diff --git a/arch/blackfin/Makefile b/arch/blackfin/Makefile
index f7ef923297fc..9d5ffaf5492a 100644
--- a/arch/blackfin/Makefile
+++ b/arch/blackfin/Makefile
@@ -14,6 +14,9 @@ OBJCOPYFLAGS := -O binary -R .note -R .comment -S
14GZFLAGS := -9 14GZFLAGS := -9
15 15
16KBUILD_CFLAGS += $(call cc-option,-mno-fdpic) 16KBUILD_CFLAGS += $(call cc-option,-mno-fdpic)
17ifeq ($(CONFIG_ROMKERNEL),y)
18KBUILD_CFLAGS += -mlong-calls
19endif
17KBUILD_AFLAGS += $(call cc-option,-mno-fdpic) 20KBUILD_AFLAGS += $(call cc-option,-mno-fdpic)
18KBUILD_CFLAGS_MODULE += -mlong-calls 21KBUILD_CFLAGS_MODULE += -mlong-calls
19KBUILD_LDFLAGS_MODULE += -m elf32bfin 22KBUILD_LDFLAGS_MODULE += -m elf32bfin
@@ -130,7 +133,6 @@ KBUILD_CFLAGS += -Iarch/$(ARCH)/mach-$(MACHINE)/include
130KBUILD_CPPFLAGS += $(patsubst %,-I$(srctree)/%include,$(machdirs)) 133KBUILD_CPPFLAGS += $(patsubst %,-I$(srctree)/%include,$(machdirs))
131 134
132CLEAN_FILES += \ 135CLEAN_FILES += \
133 arch/$(ARCH)/include/asm/asm-offsets.h \
134 arch/$(ARCH)/kernel/asm-offsets.s \ 136 arch/$(ARCH)/kernel/asm-offsets.s \
135 137
136archclean: 138archclean:
@@ -138,7 +140,7 @@ archclean:
138 140
139INSTALL_PATH ?= /tftpboot 141INSTALL_PATH ?= /tftpboot
140boot := arch/$(ARCH)/boot 142boot := arch/$(ARCH)/boot
141BOOT_TARGETS = vmImage vmImage.bin vmImage.bz2 vmImage.gz vmImage.lzma 143BOOT_TARGETS = vmImage vmImage.bin vmImage.bz2 vmImage.gz vmImage.lzma vmImage.xip
142PHONY += $(BOOT_TARGETS) install 144PHONY += $(BOOT_TARGETS) install
143KBUILD_IMAGE := $(boot)/vmImage 145KBUILD_IMAGE := $(boot)/vmImage
144 146
@@ -156,6 +158,7 @@ define archhelp
156 echo ' vmImage.bz2 - Kernel-only image for U-Boot (arch/$(ARCH)/boot/vmImage.bz2)' 158 echo ' vmImage.bz2 - Kernel-only image for U-Boot (arch/$(ARCH)/boot/vmImage.bz2)'
157 echo '* vmImage.gz - Kernel-only image for U-Boot (arch/$(ARCH)/boot/vmImage.gz)' 159 echo '* vmImage.gz - Kernel-only image for U-Boot (arch/$(ARCH)/boot/vmImage.gz)'
158 echo ' vmImage.lzma - Kernel-only image for U-Boot (arch/$(ARCH)/boot/vmImage.lzma)' 160 echo ' vmImage.lzma - Kernel-only image for U-Boot (arch/$(ARCH)/boot/vmImage.lzma)'
161 echo ' vmImage.xip - XIP Kernel-only image for U-Boot (arch/$(ARCH)/boot/vmImage.xip)'
159 echo ' install - Install kernel using' 162 echo ' install - Install kernel using'
160 echo ' (your) ~/bin/$(INSTALLKERNEL) or' 163 echo ' (your) ~/bin/$(INSTALLKERNEL) or'
161 echo ' (distribution) PATH: $(INSTALLKERNEL) or' 164 echo ' (distribution) PATH: $(INSTALLKERNEL) or'
diff --git a/arch/blackfin/boot/Makefile b/arch/blackfin/boot/Makefile
index e9c48c6f8c1f..d1b3d6051fdf 100644
--- a/arch/blackfin/boot/Makefile
+++ b/arch/blackfin/boot/Makefile
@@ -8,14 +8,18 @@
8 8
9MKIMAGE := $(srctree)/scripts/mkuboot.sh 9MKIMAGE := $(srctree)/scripts/mkuboot.sh
10 10
11targets := vmImage vmImage.bin vmImage.bz2 vmImage.gz vmImage.lzma 11targets := vmImage vmImage.bin vmImage.bz2 vmImage.gz vmImage.lzma vmImage.xip
12extra-y += vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma 12extra-y += vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma vmlinux.bin.xip
13
14UIMAGE_OPTS-y :=
15UIMAGE_OPTS-$(CONFIG_RAMKERNEL) += -a $(CONFIG_BOOT_LOAD)
16UIMAGE_OPTS-$(CONFIG_ROMKERNEL) += -a $(CONFIG_ROM_BASE) -x
13 17
14quiet_cmd_uimage = UIMAGE $@ 18quiet_cmd_uimage = UIMAGE $@
15 cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A $(ARCH) -O linux -T kernel \ 19 cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A $(ARCH) -O linux -T kernel \
16 -C $(2) -n '$(MACHINE)-$(KERNELRELEASE)' -a $(CONFIG_BOOT_LOAD) \ 20 -C $(2) -n '$(MACHINE)-$(KERNELRELEASE)' \
17 -e $(shell $(NM) vmlinux | awk '$$NF == "__start" {print $$1}') \ 21 -e $(shell $(NM) vmlinux | awk '$$NF == "__start" {print $$1}') \
18 -d $< $@ 22 $(UIMAGE_OPTS-y) -d $< $@
19 23
20$(obj)/vmlinux.bin: vmlinux FORCE 24$(obj)/vmlinux.bin: vmlinux FORCE
21 $(call if_changed,objcopy) 25 $(call if_changed,objcopy)
@@ -29,6 +33,12 @@ $(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin FORCE
29$(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE 33$(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE
30 $(call if_changed,lzma) 34 $(call if_changed,lzma)
31 35
36# The mkimage tool wants 64bytes prepended to the image
37quiet_cmd_mk_bin_xip = BIN $@
38 cmd_mk_bin_xip = ( printf '%64s' | tr ' ' '\377' ; cat $< ) > $@
39$(obj)/vmlinux.bin.xip: $(obj)/vmlinux.bin FORCE
40 $(call if_changed,mk_bin_xip)
41
32$(obj)/vmImage.bin: $(obj)/vmlinux.bin 42$(obj)/vmImage.bin: $(obj)/vmlinux.bin
33 $(call if_changed,uimage,none) 43 $(call if_changed,uimage,none)
34 44
@@ -41,10 +51,15 @@ $(obj)/vmImage.gz: $(obj)/vmlinux.bin.gz
41$(obj)/vmImage.lzma: $(obj)/vmlinux.bin.lzma 51$(obj)/vmImage.lzma: $(obj)/vmlinux.bin.lzma
42 $(call if_changed,uimage,lzma) 52 $(call if_changed,uimage,lzma)
43 53
54$(obj)/vmImage.xip: $(obj)/vmlinux.bin.xip
55 $(call if_changed,uimage,none)
56
44suffix-y := bin 57suffix-y := bin
45suffix-$(CONFIG_KERNEL_GZIP) := gz 58suffix-$(CONFIG_KERNEL_GZIP) := gz
46suffix-$(CONFIG_KERNEL_BZIP2) := bz2 59suffix-$(CONFIG_KERNEL_BZIP2) := bz2
47suffix-$(CONFIG_KERNEL_LZMA) := lzma 60suffix-$(CONFIG_KERNEL_LZMA) := lzma
61suffix-$(CONFIG_ROMKERNEL) := xip
62
48$(obj)/vmImage: $(obj)/vmImage.$(suffix-y) 63$(obj)/vmImage: $(obj)/vmImage.$(suffix-y)
49 @ln -sf $(notdir $<) $@ 64 @ln -sf $(notdir $<) $@
50 65
diff --git a/arch/blackfin/configs/BF518F-EZBRD_defconfig b/arch/blackfin/configs/BF518F-EZBRD_defconfig
index e31559419817..cf7c9bc94f13 100644
--- a/arch/blackfin/configs/BF518F-EZBRD_defconfig
+++ b/arch/blackfin/configs/BF518F-EZBRD_defconfig
@@ -1,22 +1,27 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.28.10 3# Linux kernel version: 2.6.32.2
4# Thu May 21 05:50:01 2009
5# 4#
6# CONFIG_MMU is not set 5# CONFIG_MMU is not set
7# CONFIG_FPU is not set 6# CONFIG_FPU is not set
8CONFIG_RWSEM_GENERIC_SPINLOCK=y 7CONFIG_RWSEM_GENERIC_SPINLOCK=y
9# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set 8# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
10CONFIG_BLACKFIN=y 9CONFIG_BLACKFIN=y
10CONFIG_GENERIC_CSUM=y
11CONFIG_GENERIC_BUG=y
11CONFIG_ZONE_DMA=y 12CONFIG_ZONE_DMA=y
12CONFIG_GENERIC_FIND_NEXT_BIT=y 13CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_IRQ_PROBE=y 15CONFIG_GENERIC_IRQ_PROBE=y
16CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_GPIO=y 17CONFIG_GENERIC_GPIO=y
17CONFIG_FORCE_MAX_ZONEORDER=14 18CONFIG_FORCE_MAX_ZONEORDER=14
18CONFIG_GENERIC_CALIBRATE_DELAY=y 19CONFIG_GENERIC_CALIBRATE_DELAY=y
20CONFIG_LOCKDEP_SUPPORT=y
21CONFIG_STACKTRACE_SUPPORT=y
22CONFIG_TRACE_IRQFLAGS_SUPPORT=y
19CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 23CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
24CONFIG_CONSTRUCTORS=y
20 25
21# 26#
22# General setup 27# General setup
@@ -26,22 +31,41 @@ CONFIG_BROKEN_ON_SMP=y
26CONFIG_INIT_ENV_ARG_LIMIT=32 31CONFIG_INIT_ENV_ARG_LIMIT=32
27CONFIG_LOCALVERSION="" 32CONFIG_LOCALVERSION=""
28CONFIG_LOCALVERSION_AUTO=y 33CONFIG_LOCALVERSION_AUTO=y
34CONFIG_HAVE_KERNEL_GZIP=y
35CONFIG_HAVE_KERNEL_BZIP2=y
36CONFIG_HAVE_KERNEL_LZMA=y
37CONFIG_KERNEL_GZIP=y
38# CONFIG_KERNEL_BZIP2 is not set
39# CONFIG_KERNEL_LZMA is not set
29CONFIG_SYSVIPC=y 40CONFIG_SYSVIPC=y
30CONFIG_SYSVIPC_SYSCTL=y 41CONFIG_SYSVIPC_SYSCTL=y
31# CONFIG_POSIX_MQUEUE is not set 42# CONFIG_POSIX_MQUEUE is not set
32# CONFIG_BSD_PROCESS_ACCT is not set 43# CONFIG_BSD_PROCESS_ACCT is not set
33# CONFIG_TASKSTATS is not set 44# CONFIG_TASKSTATS is not set
34# CONFIG_AUDIT is not set 45# CONFIG_AUDIT is not set
46
47#
48# RCU Subsystem
49#
50CONFIG_TREE_RCU=y
51# CONFIG_TREE_PREEMPT_RCU is not set
52# CONFIG_RCU_TRACE is not set
53CONFIG_RCU_FANOUT=32
54# CONFIG_RCU_FANOUT_EXACT is not set
55# CONFIG_TREE_RCU_TRACE is not set
35CONFIG_IKCONFIG=y 56CONFIG_IKCONFIG=y
36CONFIG_IKCONFIG_PROC=y 57CONFIG_IKCONFIG_PROC=y
37CONFIG_LOG_BUF_SHIFT=14 58CONFIG_LOG_BUF_SHIFT=14
38# CONFIG_CGROUPS is not set
39# CONFIG_GROUP_SCHED is not set 59# CONFIG_GROUP_SCHED is not set
60# CONFIG_CGROUPS is not set
40# CONFIG_SYSFS_DEPRECATED_V2 is not set 61# CONFIG_SYSFS_DEPRECATED_V2 is not set
41# CONFIG_RELAY is not set 62# CONFIG_RELAY is not set
42# CONFIG_NAMESPACES is not set 63# CONFIG_NAMESPACES is not set
43CONFIG_BLK_DEV_INITRD=y 64CONFIG_BLK_DEV_INITRD=y
44CONFIG_INITRAMFS_SOURCE="" 65CONFIG_INITRAMFS_SOURCE=""
66CONFIG_RD_GZIP=y
67# CONFIG_RD_BZIP2 is not set
68# CONFIG_RD_LZMA is not set
45# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 69# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
46CONFIG_SYSCTL=y 70CONFIG_SYSCTL=y
47CONFIG_ANON_INODES=y 71CONFIG_ANON_INODES=y
@@ -62,6 +86,10 @@ CONFIG_EPOLL=y
62# CONFIG_TIMERFD is not set 86# CONFIG_TIMERFD is not set
63# CONFIG_EVENTFD is not set 87# CONFIG_EVENTFD is not set
64# CONFIG_AIO is not set 88# CONFIG_AIO is not set
89
90#
91# Kernel Performance Events And Counters
92#
65CONFIG_VM_EVENT_COUNTERS=y 93CONFIG_VM_EVENT_COUNTERS=y
66CONFIG_COMPAT_BRK=y 94CONFIG_COMPAT_BRK=y
67CONFIG_SLAB=y 95CONFIG_SLAB=y
@@ -69,11 +97,15 @@ CONFIG_SLAB=y
69# CONFIG_SLOB is not set 97# CONFIG_SLOB is not set
70CONFIG_MMAP_ALLOW_UNINITIALIZED=y 98CONFIG_MMAP_ALLOW_UNINITIALIZED=y
71# CONFIG_PROFILING is not set 99# CONFIG_PROFILING is not set
72# CONFIG_MARKERS is not set
73CONFIG_HAVE_OPROFILE=y 100CONFIG_HAVE_OPROFILE=y
101
102#
103# GCOV-based kernel profiling
104#
105# CONFIG_GCOV_KERNEL is not set
106# CONFIG_SLOW_WORK is not set
74# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set 107# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
75CONFIG_SLABINFO=y 108CONFIG_SLABINFO=y
76CONFIG_TINY_SHMEM=y
77CONFIG_BASE_SMALL=0 109CONFIG_BASE_SMALL=0
78CONFIG_MODULES=y 110CONFIG_MODULES=y
79# CONFIG_MODULE_FORCE_LOAD is not set 111# CONFIG_MODULE_FORCE_LOAD is not set
@@ -81,11 +113,8 @@ CONFIG_MODULE_UNLOAD=y
81# CONFIG_MODULE_FORCE_UNLOAD is not set 113# CONFIG_MODULE_FORCE_UNLOAD is not set
82# CONFIG_MODVERSIONS is not set 114# CONFIG_MODVERSIONS is not set
83# CONFIG_MODULE_SRCVERSION_ALL is not set 115# CONFIG_MODULE_SRCVERSION_ALL is not set
84CONFIG_KMOD=y
85CONFIG_BLOCK=y 116CONFIG_BLOCK=y
86# CONFIG_LBD is not set 117# CONFIG_LBDAF is not set
87# CONFIG_BLK_DEV_IO_TRACE is not set
88# CONFIG_LSF is not set
89# CONFIG_BLK_DEV_BSG is not set 118# CONFIG_BLK_DEV_BSG is not set
90# CONFIG_BLK_DEV_INTEGRITY is not set 119# CONFIG_BLK_DEV_INTEGRITY is not set
91 120
@@ -101,7 +130,6 @@ CONFIG_IOSCHED_NOOP=y
101# CONFIG_DEFAULT_CFQ is not set 130# CONFIG_DEFAULT_CFQ is not set
102CONFIG_DEFAULT_NOOP=y 131CONFIG_DEFAULT_NOOP=y
103CONFIG_DEFAULT_IOSCHED="noop" 132CONFIG_DEFAULT_IOSCHED="noop"
104CONFIG_CLASSIC_RCU=y
105# CONFIG_PREEMPT_NONE is not set 133# CONFIG_PREEMPT_NONE is not set
106CONFIG_PREEMPT_VOLUNTARY=y 134CONFIG_PREEMPT_VOLUNTARY=y
107# CONFIG_PREEMPT is not set 135# CONFIG_PREEMPT is not set
@@ -132,15 +160,15 @@ CONFIG_BF518=y
132# CONFIG_BF537 is not set 160# CONFIG_BF537 is not set
133# CONFIG_BF538 is not set 161# CONFIG_BF538 is not set
134# CONFIG_BF539 is not set 162# CONFIG_BF539 is not set
135# CONFIG_BF542 is not set 163# CONFIG_BF542_std is not set
136# CONFIG_BF542M is not set 164# CONFIG_BF542M is not set
137# CONFIG_BF544 is not set 165# CONFIG_BF544_std is not set
138# CONFIG_BF544M is not set 166# CONFIG_BF544M is not set
139# CONFIG_BF547 is not set 167# CONFIG_BF547_std is not set
140# CONFIG_BF547M is not set 168# CONFIG_BF547M is not set
141# CONFIG_BF548 is not set 169# CONFIG_BF548_std is not set
142# CONFIG_BF548M is not set 170# CONFIG_BF548M is not set
143# CONFIG_BF549 is not set 171# CONFIG_BF549_std is not set
144# CONFIG_BF549M is not set 172# CONFIG_BF549M is not set
145# CONFIG_BF561 is not set 173# CONFIG_BF561 is not set
146CONFIG_BF_REV_MIN=0 174CONFIG_BF_REV_MIN=0
@@ -154,8 +182,8 @@ CONFIG_BF_REV_0_0=y
154# CONFIG_BF_REV_0_6 is not set 182# CONFIG_BF_REV_0_6 is not set
155# CONFIG_BF_REV_ANY is not set 183# CONFIG_BF_REV_ANY is not set
156# CONFIG_BF_REV_NONE is not set 184# CONFIG_BF_REV_NONE is not set
157CONFIG_BF51x=y
158CONFIG_MEM_MT48LC32M8A2_75=y 185CONFIG_MEM_MT48LC32M8A2_75=y
186CONFIG_BF51x=y
159CONFIG_BFIN518F_EZBRD=y 187CONFIG_BFIN518F_EZBRD=y
160 188
161# 189#
@@ -313,7 +341,6 @@ CONFIG_FLATMEM=y
313CONFIG_FLAT_NODE_MEM_MAP=y 341CONFIG_FLAT_NODE_MEM_MAP=y
314CONFIG_PAGEFLAGS_EXTENDED=y 342CONFIG_PAGEFLAGS_EXTENDED=y
315CONFIG_SPLIT_PTLOCK_CPUS=4 343CONFIG_SPLIT_PTLOCK_CPUS=4
316# CONFIG_RESOURCES_64BIT is not set
317# CONFIG_PHYS_ADDR_T_64BIT is not set 344# CONFIG_PHYS_ADDR_T_64BIT is not set
318CONFIG_ZONE_DMA_FLAG=1 345CONFIG_ZONE_DMA_FLAG=1
319CONFIG_VIRT_TO_BUS=y 346CONFIG_VIRT_TO_BUS=y
@@ -322,16 +349,18 @@ CONFIG_BFIN_GPTIMERS=m
322# CONFIG_DMA_UNCACHED_4M is not set 349# CONFIG_DMA_UNCACHED_4M is not set
323# CONFIG_DMA_UNCACHED_2M is not set 350# CONFIG_DMA_UNCACHED_2M is not set
324CONFIG_DMA_UNCACHED_1M=y 351CONFIG_DMA_UNCACHED_1M=y
352# CONFIG_DMA_UNCACHED_512K is not set
353# CONFIG_DMA_UNCACHED_256K is not set
354# CONFIG_DMA_UNCACHED_128K is not set
325# CONFIG_DMA_UNCACHED_NONE is not set 355# CONFIG_DMA_UNCACHED_NONE is not set
326 356
327# 357#
328# Cache Support 358# Cache Support
329# 359#
330CONFIG_BFIN_ICACHE=y 360CONFIG_BFIN_ICACHE=y
331# CONFIG_BFIN_ICACHE_LOCK is not set 361CONFIG_BFIN_EXTMEM_ICACHEABLE=y
332CONFIG_BFIN_DCACHE=y 362CONFIG_BFIN_DCACHE=y
333# CONFIG_BFIN_DCACHE_BANKA is not set 363# CONFIG_BFIN_DCACHE_BANKA is not set
334CONFIG_BFIN_EXTMEM_ICACHEABLE=y
335CONFIG_BFIN_EXTMEM_DCACHEABLE=y 364CONFIG_BFIN_EXTMEM_DCACHEABLE=y
336CONFIG_BFIN_EXTMEM_WRITEBACK=y 365CONFIG_BFIN_EXTMEM_WRITEBACK=y
337# CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set 366# CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set
@@ -342,7 +371,7 @@ CONFIG_BFIN_EXTMEM_WRITEBACK=y
342# CONFIG_MPU is not set 371# CONFIG_MPU is not set
343 372
344# 373#
345# Asynchonous Memory Configuration 374# Asynchronous Memory Configuration
346# 375#
347 376
348# 377#
@@ -398,11 +427,6 @@ CONFIG_NET=y
398CONFIG_PACKET=y 427CONFIG_PACKET=y
399# CONFIG_PACKET_MMAP is not set 428# CONFIG_PACKET_MMAP is not set
400CONFIG_UNIX=y 429CONFIG_UNIX=y
401CONFIG_XFRM=y
402# CONFIG_XFRM_USER is not set
403# CONFIG_XFRM_SUB_POLICY is not set
404# CONFIG_XFRM_MIGRATE is not set
405# CONFIG_XFRM_STATISTICS is not set
406# CONFIG_NET_KEY is not set 430# CONFIG_NET_KEY is not set
407CONFIG_INET=y 431CONFIG_INET=y
408# CONFIG_IP_MULTICAST is not set 432# CONFIG_IP_MULTICAST is not set
@@ -426,7 +450,6 @@ CONFIG_IP_PNP=y
426# CONFIG_INET_XFRM_MODE_BEET is not set 450# CONFIG_INET_XFRM_MODE_BEET is not set
427# CONFIG_INET_LRO is not set 451# CONFIG_INET_LRO is not set
428# CONFIG_INET_DIAG is not set 452# CONFIG_INET_DIAG is not set
429CONFIG_INET_TCP_DIAG=y
430# CONFIG_TCP_CONG_ADVANCED is not set 453# CONFIG_TCP_CONG_ADVANCED is not set
431CONFIG_TCP_CONG_CUBIC=y 454CONFIG_TCP_CONG_CUBIC=y
432CONFIG_DEFAULT_TCP_CONG="cubic" 455CONFIG_DEFAULT_TCP_CONG="cubic"
@@ -437,6 +460,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
437# CONFIG_NETFILTER is not set 460# CONFIG_NETFILTER is not set
438# CONFIG_IP_DCCP is not set 461# CONFIG_IP_DCCP is not set
439# CONFIG_IP_SCTP is not set 462# CONFIG_IP_SCTP is not set
463# CONFIG_RDS is not set
440# CONFIG_TIPC is not set 464# CONFIG_TIPC is not set
441# CONFIG_ATM is not set 465# CONFIG_ATM is not set
442# CONFIG_BRIDGE is not set 466# CONFIG_BRIDGE is not set
@@ -450,7 +474,10 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
450# CONFIG_LAPB is not set 474# CONFIG_LAPB is not set
451# CONFIG_ECONET is not set 475# CONFIG_ECONET is not set
452# CONFIG_WAN_ROUTER is not set 476# CONFIG_WAN_ROUTER is not set
477# CONFIG_PHONET is not set
478# CONFIG_IEEE802154 is not set
453# CONFIG_NET_SCHED is not set 479# CONFIG_NET_SCHED is not set
480# CONFIG_DCB is not set
454 481
455# 482#
456# Network testing 483# Network testing
@@ -461,13 +488,8 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
461# CONFIG_IRDA is not set 488# CONFIG_IRDA is not set
462# CONFIG_BT is not set 489# CONFIG_BT is not set
463# CONFIG_AF_RXRPC is not set 490# CONFIG_AF_RXRPC is not set
464# CONFIG_PHONET is not set 491# CONFIG_WIRELESS is not set
465CONFIG_WIRELESS=y 492# CONFIG_WIMAX is not set
466# CONFIG_CFG80211 is not set
467CONFIG_WIRELESS_OLD_REGULATORY=y
468# CONFIG_WIRELESS_EXT is not set
469# CONFIG_MAC80211 is not set
470# CONFIG_IEEE80211 is not set
471# CONFIG_RFKILL is not set 493# CONFIG_RFKILL is not set
472# CONFIG_NET_9P is not set 494# CONFIG_NET_9P is not set
473 495
@@ -488,6 +510,7 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
488# CONFIG_CONNECTOR is not set 510# CONFIG_CONNECTOR is not set
489CONFIG_MTD=y 511CONFIG_MTD=y
490# CONFIG_MTD_DEBUG is not set 512# CONFIG_MTD_DEBUG is not set
513# CONFIG_MTD_TESTS is not set
491# CONFIG_MTD_CONCAT is not set 514# CONFIG_MTD_CONCAT is not set
492CONFIG_MTD_PARTITIONS=y 515CONFIG_MTD_PARTITIONS=y
493# CONFIG_MTD_REDBOOT_PARTS is not set 516# CONFIG_MTD_REDBOOT_PARTS is not set
@@ -545,6 +568,7 @@ CONFIG_MTD_COMPLEX_MAPPINGS=y
545# 568#
546# CONFIG_MTD_DATAFLASH is not set 569# CONFIG_MTD_DATAFLASH is not set
547# CONFIG_MTD_M25P80 is not set 570# CONFIG_MTD_M25P80 is not set
571# CONFIG_MTD_SST25L is not set
548# CONFIG_MTD_SLRAM is not set 572# CONFIG_MTD_SLRAM is not set
549# CONFIG_MTD_PHRAM is not set 573# CONFIG_MTD_PHRAM is not set
550# CONFIG_MTD_MTDRAM is not set 574# CONFIG_MTD_MTDRAM is not set
@@ -560,6 +584,11 @@ CONFIG_MTD_COMPLEX_MAPPINGS=y
560# CONFIG_MTD_ONENAND is not set 584# CONFIG_MTD_ONENAND is not set
561 585
562# 586#
587# LPDDR flash memory drivers
588#
589# CONFIG_MTD_LPDDR is not set
590
591#
563# UBI - Unsorted block images 592# UBI - Unsorted block images
564# 593#
565# CONFIG_MTD_UBI is not set 594# CONFIG_MTD_UBI is not set
@@ -576,10 +605,20 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
576# CONFIG_ATA_OVER_ETH is not set 605# CONFIG_ATA_OVER_ETH is not set
577# CONFIG_BLK_DEV_HD is not set 606# CONFIG_BLK_DEV_HD is not set
578CONFIG_MISC_DEVICES=y 607CONFIG_MISC_DEVICES=y
579# CONFIG_EEPROM_93CX6 is not set 608# CONFIG_AD525X_DPOT is not set
580# CONFIG_ICS932S401 is not set 609# CONFIG_ICS932S401 is not set
581# CONFIG_ENCLOSURE_SERVICES is not set 610# CONFIG_ENCLOSURE_SERVICES is not set
611# CONFIG_ISL29003 is not set
582# CONFIG_C2PORT is not set 612# CONFIG_C2PORT is not set
613
614#
615# EEPROM support
616#
617# CONFIG_EEPROM_AT24 is not set
618# CONFIG_EEPROM_AT25 is not set
619# CONFIG_EEPROM_LEGACY is not set
620# CONFIG_EEPROM_MAX6875 is not set
621# CONFIG_EEPROM_93CX6 is not set
583CONFIG_HAVE_IDE=y 622CONFIG_HAVE_IDE=y
584# CONFIG_IDE is not set 623# CONFIG_IDE is not set
585 624
@@ -614,6 +653,9 @@ CONFIG_PHYLIB=y
614# CONFIG_BROADCOM_PHY is not set 653# CONFIG_BROADCOM_PHY is not set
615# CONFIG_ICPLUS_PHY is not set 654# CONFIG_ICPLUS_PHY is not set
616# CONFIG_REALTEK_PHY is not set 655# CONFIG_REALTEK_PHY is not set
656# CONFIG_NATIONAL_PHY is not set
657# CONFIG_STE10XP is not set
658# CONFIG_LSI_ET1011C_PHY is not set
617# CONFIG_FIXED_PHY is not set 659# CONFIG_FIXED_PHY is not set
618# CONFIG_MDIO_BITBANG is not set 660# CONFIG_MDIO_BITBANG is not set
619CONFIG_NET_ETHERNET=y 661CONFIG_NET_ETHERNET=y
@@ -622,10 +664,14 @@ CONFIG_BFIN_MAC=y
622CONFIG_BFIN_TX_DESC_NUM=10 664CONFIG_BFIN_TX_DESC_NUM=10
623CONFIG_BFIN_RX_DESC_NUM=20 665CONFIG_BFIN_RX_DESC_NUM=20
624# CONFIG_BFIN_MAC_RMII is not set 666# CONFIG_BFIN_MAC_RMII is not set
667CONFIG_BFIN_MAC_USE_HWSTAMP=y
625# CONFIG_SMC91X is not set 668# CONFIG_SMC91X is not set
626# CONFIG_SMSC911X is not set
627# CONFIG_DM9000 is not set 669# CONFIG_DM9000 is not set
628# CONFIG_ENC28J60 is not set 670# CONFIG_ENC28J60 is not set
671# CONFIG_ETHOC is not set
672# CONFIG_SMSC911X is not set
673# CONFIG_DNET is not set
674# CONFIG_ADF702X is not set
629# CONFIG_IBM_NEW_EMAC_ZMII is not set 675# CONFIG_IBM_NEW_EMAC_ZMII is not set
630# CONFIG_IBM_NEW_EMAC_RGMII is not set 676# CONFIG_IBM_NEW_EMAC_RGMII is not set
631# CONFIG_IBM_NEW_EMAC_TAH is not set 677# CONFIG_IBM_NEW_EMAC_TAH is not set
@@ -634,15 +680,16 @@ CONFIG_BFIN_RX_DESC_NUM=20
634# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set 680# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
635# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 681# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
636# CONFIG_B44 is not set 682# CONFIG_B44 is not set
683# CONFIG_KS8842 is not set
684# CONFIG_KS8851 is not set
685# CONFIG_KS8851_MLL is not set
637# CONFIG_NETDEV_1000 is not set 686# CONFIG_NETDEV_1000 is not set
638# CONFIG_NETDEV_10000 is not set 687# CONFIG_NETDEV_10000 is not set
688# CONFIG_WLAN is not set
639 689
640# 690#
641# Wireless LAN 691# Enable WiMAX (Networking options) to see the WiMAX drivers
642# 692#
643# CONFIG_WLAN_PRE80211 is not set
644# CONFIG_WLAN_80211 is not set
645# CONFIG_IWLWIFI_LEDS is not set
646# CONFIG_WAN is not set 693# CONFIG_WAN is not set
647# CONFIG_PPP is not set 694# CONFIG_PPP is not set
648# CONFIG_SLIP is not set 695# CONFIG_SLIP is not set
@@ -677,7 +724,10 @@ CONFIG_INPUT=y
677# CONFIG_INPUT_TOUCHSCREEN is not set 724# CONFIG_INPUT_TOUCHSCREEN is not set
678CONFIG_INPUT_MISC=y 725CONFIG_INPUT_MISC=y
679# CONFIG_INPUT_UINPUT is not set 726# CONFIG_INPUT_UINPUT is not set
680# CONFIG_CONFIG_INPUT_PCF8574 is not set 727# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
728# CONFIG_INPUT_AD714X is not set
729# CONFIG_INPUT_ADXL34X is not set
730# CONFIG_INPUT_PCF8574 is not set
681 731
682# 732#
683# Hardware I/O ports 733# Hardware I/O ports
@@ -688,16 +738,13 @@ CONFIG_INPUT_MISC=y
688# 738#
689# Character devices 739# Character devices
690# 740#
691# CONFIG_AD9960 is not set
692CONFIG_BFIN_DMA_INTERFACE=m 741CONFIG_BFIN_DMA_INTERFACE=m
693# CONFIG_BFIN_PPI is not set 742# CONFIG_BFIN_PPI is not set
694# CONFIG_BFIN_PPIFCD is not set 743# CONFIG_BFIN_PPIFCD is not set
695# CONFIG_BFIN_SIMPLE_TIMER is not set 744# CONFIG_BFIN_SIMPLE_TIMER is not set
696# CONFIG_BFIN_SPI_ADC is not set 745# CONFIG_BFIN_SPI_ADC is not set
697# CONFIG_BFIN_SPORT is not set 746# CONFIG_BFIN_SPORT is not set
698# CONFIG_BFIN_TIMER_LATENCY is not set
699# CONFIG_BFIN_TWI_LCD is not set 747# CONFIG_BFIN_TWI_LCD is not set
700CONFIG_SIMPLE_GPIO=m
701CONFIG_VT=y 748CONFIG_VT=y
702CONFIG_CONSOLE_TRANSLATIONS=y 749CONFIG_CONSOLE_TRANSLATIONS=y
703CONFIG_VT_CONSOLE=y 750CONFIG_VT_CONSOLE=y
@@ -715,6 +762,7 @@ CONFIG_BFIN_JTAG_COMM=m
715# 762#
716# Non-8250 serial port support 763# Non-8250 serial port support
717# 764#
765# CONFIG_SERIAL_MAX3100 is not set
718CONFIG_SERIAL_BFIN=y 766CONFIG_SERIAL_BFIN=y
719CONFIG_SERIAL_BFIN_CONSOLE=y 767CONFIG_SERIAL_BFIN_CONSOLE=y
720CONFIG_SERIAL_BFIN_DMA=y 768CONFIG_SERIAL_BFIN_DMA=y
@@ -726,12 +774,10 @@ CONFIG_SERIAL_CORE=y
726CONFIG_SERIAL_CORE_CONSOLE=y 774CONFIG_SERIAL_CORE_CONSOLE=y
727# CONFIG_SERIAL_BFIN_SPORT is not set 775# CONFIG_SERIAL_BFIN_SPORT is not set
728CONFIG_UNIX98_PTYS=y 776CONFIG_UNIX98_PTYS=y
777# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
729# CONFIG_LEGACY_PTYS is not set 778# CONFIG_LEGACY_PTYS is not set
730 779CONFIG_BFIN_OTP=y
731# 780# CONFIG_BFIN_OTP_WRITE_ENABLE is not set
732# CAN, the car bus and industrial fieldbus
733#
734# CONFIG_CAN4LINUX is not set
735# CONFIG_IPMI_HANDLER is not set 781# CONFIG_IPMI_HANDLER is not set
736# CONFIG_HW_RANDOM is not set 782# CONFIG_HW_RANDOM is not set
737# CONFIG_R3964 is not set 783# CONFIG_R3964 is not set
@@ -739,6 +785,7 @@ CONFIG_UNIX98_PTYS=y
739# CONFIG_TCG_TPM is not set 785# CONFIG_TCG_TPM is not set
740CONFIG_I2C=y 786CONFIG_I2C=y
741CONFIG_I2C_BOARDINFO=y 787CONFIG_I2C_BOARDINFO=y
788CONFIG_I2C_COMPAT=y
742CONFIG_I2C_CHARDEV=y 789CONFIG_I2C_CHARDEV=y
743CONFIG_I2C_HELPER_AUTO=y 790CONFIG_I2C_HELPER_AUTO=y
744 791
@@ -771,14 +818,6 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
771# Miscellaneous I2C Chip support 818# Miscellaneous I2C Chip support
772# 819#
773# CONFIG_DS1682 is not set 820# CONFIG_DS1682 is not set
774# CONFIG_EEPROM_AT24 is not set
775# CONFIG_SENSORS_AD5252 is not set
776# CONFIG_EEPROM_LEGACY is not set
777# CONFIG_SENSORS_PCF8574 is not set
778# CONFIG_PCF8575 is not set
779# CONFIG_SENSORS_PCA9539 is not set
780# CONFIG_SENSORS_PCF8591 is not set
781# CONFIG_SENSORS_MAX6875 is not set
782# CONFIG_SENSORS_TSL2550 is not set 821# CONFIG_SENSORS_TSL2550 is not set
783# CONFIG_I2C_DEBUG_CORE is not set 822# CONFIG_I2C_DEBUG_CORE is not set
784# CONFIG_I2C_DEBUG_ALGO is not set 823# CONFIG_I2C_DEBUG_ALGO is not set
@@ -795,13 +834,18 @@ CONFIG_SPI_BFIN=y
795# CONFIG_SPI_BFIN_LOCK is not set 834# CONFIG_SPI_BFIN_LOCK is not set
796# CONFIG_SPI_BFIN_SPORT is not set 835# CONFIG_SPI_BFIN_SPORT is not set
797# CONFIG_SPI_BITBANG is not set 836# CONFIG_SPI_BITBANG is not set
837# CONFIG_SPI_GPIO is not set
798 838
799# 839#
800# SPI Protocol Masters 840# SPI Protocol Masters
801# 841#
802# CONFIG_SPI_AT25 is not set
803# CONFIG_SPI_SPIDEV is not set 842# CONFIG_SPI_SPIDEV is not set
804# CONFIG_SPI_TLE62X0 is not set 843# CONFIG_SPI_TLE62X0 is not set
844
845#
846# PPS support
847#
848# CONFIG_PPS is not set
805CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y 849CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
806CONFIG_GPIOLIB=y 850CONFIG_GPIOLIB=y
807# CONFIG_DEBUG_GPIO is not set 851# CONFIG_DEBUG_GPIO is not set
@@ -817,6 +861,7 @@ CONFIG_GPIO_SYSFS=y
817# CONFIG_GPIO_MAX732X is not set 861# CONFIG_GPIO_MAX732X is not set
818# CONFIG_GPIO_PCA953X is not set 862# CONFIG_GPIO_PCA953X is not set
819# CONFIG_GPIO_PCF857X is not set 863# CONFIG_GPIO_PCF857X is not set
864# CONFIG_GPIO_ADP5588 is not set
820 865
821# 866#
822# PCI GPIO expanders: 867# PCI GPIO expanders:
@@ -827,11 +872,15 @@ CONFIG_GPIO_SYSFS=y
827# 872#
828# CONFIG_GPIO_MAX7301 is not set 873# CONFIG_GPIO_MAX7301 is not set
829# CONFIG_GPIO_MCP23S08 is not set 874# CONFIG_GPIO_MCP23S08 is not set
875# CONFIG_GPIO_MC33880 is not set
876
877#
878# AC97 GPIO expanders:
879#
830# CONFIG_W1 is not set 880# CONFIG_W1 is not set
831# CONFIG_POWER_SUPPLY is not set 881# CONFIG_POWER_SUPPLY is not set
832# CONFIG_HWMON is not set 882# CONFIG_HWMON is not set
833# CONFIG_THERMAL is not set 883# CONFIG_THERMAL is not set
834# CONFIG_THERMAL_HWMON is not set
835CONFIG_WATCHDOG=y 884CONFIG_WATCHDOG=y
836# CONFIG_WATCHDOG_NOWAYOUT is not set 885# CONFIG_WATCHDOG_NOWAYOUT is not set
837 886
@@ -853,28 +902,20 @@ CONFIG_SSB_POSSIBLE=y
853# CONFIG_MFD_CORE is not set 902# CONFIG_MFD_CORE is not set
854# CONFIG_MFD_SM501 is not set 903# CONFIG_MFD_SM501 is not set
855# CONFIG_HTC_PASIC3 is not set 904# CONFIG_HTC_PASIC3 is not set
905# CONFIG_TPS65010 is not set
906# CONFIG_TWL4030_CORE is not set
856# CONFIG_MFD_TMIO is not set 907# CONFIG_MFD_TMIO is not set
857# CONFIG_PMIC_DA903X is not set 908# CONFIG_PMIC_DA903X is not set
858# CONFIG_PMIC_ADP5520 is not set 909# CONFIG_PMIC_ADP5520 is not set
859# CONFIG_MFD_WM8400 is not set 910# CONFIG_MFD_WM8400 is not set
911# CONFIG_MFD_WM831X is not set
860# CONFIG_MFD_WM8350_I2C is not set 912# CONFIG_MFD_WM8350_I2C is not set
913# CONFIG_MFD_PCF50633 is not set
914# CONFIG_MFD_MC13783 is not set
915# CONFIG_AB3100_CORE is not set
916# CONFIG_EZX_PCAP is not set
861# CONFIG_REGULATOR is not set 917# CONFIG_REGULATOR is not set
862 918# CONFIG_MEDIA_SUPPORT is not set
863#
864# Multimedia devices
865#
866
867#
868# Multimedia core support
869#
870# CONFIG_VIDEO_DEV is not set
871# CONFIG_DVB_CORE is not set
872# CONFIG_VIDEO_MEDIA is not set
873
874#
875# Multimedia drivers
876#
877# CONFIG_DAB is not set
878 919
879# 920#
880# Graphics support 921# Graphics support
@@ -912,10 +953,11 @@ CONFIG_MMC_BLOCK_BOUNCE=y
912# MMC/SD/SDIO Host Controller Drivers 953# MMC/SD/SDIO Host Controller Drivers
913# 954#
914# CONFIG_MMC_SDHCI is not set 955# CONFIG_MMC_SDHCI is not set
956# CONFIG_MMC_AT91 is not set
957# CONFIG_MMC_ATMELMCI is not set
958# CONFIG_MMC_SPI is not set
915CONFIG_SDH_BFIN=m 959CONFIG_SDH_BFIN=m
916CONFIG_SDH_BFIN_MISSING_CMD_PULLUP_WORKAROUND=y 960CONFIG_SDH_BFIN_MISSING_CMD_PULLUP_WORKAROUND=y
917# CONFIG_SDH_BFIN_ENABLE_SDIO_IRQ is not set
918# CONFIG_MMC_SPI is not set
919# CONFIG_MEMSTICK is not set 961# CONFIG_MEMSTICK is not set
920# CONFIG_NEW_LEDS is not set 962# CONFIG_NEW_LEDS is not set
921# CONFIG_ACCESSIBILITY is not set 963# CONFIG_ACCESSIBILITY is not set
@@ -950,6 +992,7 @@ CONFIG_RTC_INTF_DEV=y
950# CONFIG_RTC_DRV_S35390A is not set 992# CONFIG_RTC_DRV_S35390A is not set
951# CONFIG_RTC_DRV_FM3130 is not set 993# CONFIG_RTC_DRV_FM3130 is not set
952# CONFIG_RTC_DRV_RX8581 is not set 994# CONFIG_RTC_DRV_RX8581 is not set
995# CONFIG_RTC_DRV_RX8025 is not set
953 996
954# 997#
955# SPI RTC drivers 998# SPI RTC drivers
@@ -961,6 +1004,7 @@ CONFIG_RTC_INTF_DEV=y
961# CONFIG_RTC_DRV_R9701 is not set 1004# CONFIG_RTC_DRV_R9701 is not set
962# CONFIG_RTC_DRV_RS5C348 is not set 1005# CONFIG_RTC_DRV_RS5C348 is not set
963# CONFIG_RTC_DRV_DS3234 is not set 1006# CONFIG_RTC_DRV_DS3234 is not set
1007# CONFIG_RTC_DRV_PCF2123 is not set
964 1008
965# 1009#
966# Platform RTC drivers 1010# Platform RTC drivers
@@ -981,10 +1025,21 @@ CONFIG_RTC_INTF_DEV=y
981# 1025#
982CONFIG_RTC_DRV_BFIN=y 1026CONFIG_RTC_DRV_BFIN=y
983# CONFIG_DMADEVICES is not set 1027# CONFIG_DMADEVICES is not set
1028# CONFIG_AUXDISPLAY is not set
984# CONFIG_UIO is not set 1029# CONFIG_UIO is not set
1030
1031#
1032# TI VLYNQ
1033#
985# CONFIG_STAGING is not set 1034# CONFIG_STAGING is not set
986 1035
987# 1036#
1037# Firmware Drivers
1038#
1039# CONFIG_FIRMWARE_MEMMAP is not set
1040# CONFIG_SIGMA is not set
1041
1042#
988# File systems 1043# File systems
989# 1044#
990CONFIG_EXT2_FS=m 1045CONFIG_EXT2_FS=m
@@ -994,9 +1049,13 @@ CONFIG_EXT2_FS=m
994# CONFIG_REISERFS_FS is not set 1049# CONFIG_REISERFS_FS is not set
995# CONFIG_JFS_FS is not set 1050# CONFIG_JFS_FS is not set
996# CONFIG_FS_POSIX_ACL is not set 1051# CONFIG_FS_POSIX_ACL is not set
997CONFIG_FILE_LOCKING=y
998# CONFIG_XFS_FS is not set 1052# CONFIG_XFS_FS is not set
1053# CONFIG_GFS2_FS is not set
999# CONFIG_OCFS2_FS is not set 1054# CONFIG_OCFS2_FS is not set
1055# CONFIG_BTRFS_FS is not set
1056# CONFIG_NILFS2_FS is not set
1057CONFIG_FILE_LOCKING=y
1058CONFIG_FSNOTIFY=y
1000# CONFIG_DNOTIFY is not set 1059# CONFIG_DNOTIFY is not set
1001CONFIG_INOTIFY=y 1060CONFIG_INOTIFY=y
1002CONFIG_INOTIFY_USER=y 1061CONFIG_INOTIFY_USER=y
@@ -1006,6 +1065,11 @@ CONFIG_INOTIFY_USER=y
1006# CONFIG_FUSE_FS is not set 1065# CONFIG_FUSE_FS is not set
1007 1066
1008# 1067#
1068# Caches
1069#
1070# CONFIG_FSCACHE is not set
1071
1072#
1009# CD-ROM/DVD Filesystems 1073# CD-ROM/DVD Filesystems
1010# 1074#
1011# CONFIG_ISO9660_FS is not set 1075# CONFIG_ISO9660_FS is not set
@@ -1027,13 +1091,9 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1027CONFIG_PROC_FS=y 1091CONFIG_PROC_FS=y
1028CONFIG_PROC_SYSCTL=y 1092CONFIG_PROC_SYSCTL=y
1029CONFIG_SYSFS=y 1093CONFIG_SYSFS=y
1030# CONFIG_TMPFS is not set
1031# CONFIG_HUGETLB_PAGE is not set 1094# CONFIG_HUGETLB_PAGE is not set
1032# CONFIG_CONFIGFS_FS is not set 1095# CONFIG_CONFIGFS_FS is not set
1033 1096CONFIG_MISC_FILESYSTEMS=y
1034#
1035# Miscellaneous filesystems
1036#
1037# CONFIG_ADFS_FS is not set 1097# CONFIG_ADFS_FS is not set
1038# CONFIG_AFFS_FS is not set 1098# CONFIG_AFFS_FS is not set
1039# CONFIG_HFS_FS is not set 1099# CONFIG_HFS_FS is not set
@@ -1042,8 +1102,8 @@ CONFIG_SYSFS=y
1042# CONFIG_BFS_FS is not set 1102# CONFIG_BFS_FS is not set
1043# CONFIG_EFS_FS is not set 1103# CONFIG_EFS_FS is not set
1044# CONFIG_JFFS2_FS is not set 1104# CONFIG_JFFS2_FS is not set
1045# CONFIG_YAFFS_FS is not set
1046# CONFIG_CRAMFS is not set 1105# CONFIG_CRAMFS is not set
1106# CONFIG_SQUASHFS is not set
1047# CONFIG_VXFS_FS is not set 1107# CONFIG_VXFS_FS is not set
1048# CONFIG_MINIX_FS is not set 1108# CONFIG_MINIX_FS is not set
1049# CONFIG_OMFS_FS is not set 1109# CONFIG_OMFS_FS is not set
@@ -1062,7 +1122,6 @@ CONFIG_LOCKD=m
1062CONFIG_LOCKD_V4=y 1122CONFIG_LOCKD_V4=y
1063CONFIG_NFS_COMMON=y 1123CONFIG_NFS_COMMON=y
1064CONFIG_SUNRPC=m 1124CONFIG_SUNRPC=m
1065# CONFIG_SUNRPC_REGISTER_V4 is not set
1066# CONFIG_RPCSEC_GSS_KRB5 is not set 1125# CONFIG_RPCSEC_GSS_KRB5 is not set
1067# CONFIG_RPCSEC_GSS_SPKM3 is not set 1126# CONFIG_RPCSEC_GSS_SPKM3 is not set
1068CONFIG_SMB_FS=m 1127CONFIG_SMB_FS=m
@@ -1127,14 +1186,19 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
1127CONFIG_ENABLE_MUST_CHECK=y 1186CONFIG_ENABLE_MUST_CHECK=y
1128CONFIG_FRAME_WARN=1024 1187CONFIG_FRAME_WARN=1024
1129# CONFIG_MAGIC_SYSRQ is not set 1188# CONFIG_MAGIC_SYSRQ is not set
1189# CONFIG_STRIP_ASM_SYMS is not set
1130# CONFIG_UNUSED_SYMBOLS is not set 1190# CONFIG_UNUSED_SYMBOLS is not set
1131CONFIG_DEBUG_FS=y 1191CONFIG_DEBUG_FS=y
1132# CONFIG_HEADERS_CHECK is not set 1192# CONFIG_HEADERS_CHECK is not set
1193CONFIG_DEBUG_SECTION_MISMATCH=y
1133CONFIG_DEBUG_KERNEL=y 1194CONFIG_DEBUG_KERNEL=y
1134CONFIG_DEBUG_SHIRQ=y 1195CONFIG_DEBUG_SHIRQ=y
1135CONFIG_DETECT_SOFTLOCKUP=y 1196CONFIG_DETECT_SOFTLOCKUP=y
1136# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set 1197# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
1137CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 1198CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
1199CONFIG_DETECT_HUNG_TASK=y
1200# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
1201CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
1138CONFIG_SCHED_DEBUG=y 1202CONFIG_SCHED_DEBUG=y
1139# CONFIG_SCHEDSTATS is not set 1203# CONFIG_SCHEDSTATS is not set
1140# CONFIG_TIMER_STATS is not set 1204# CONFIG_TIMER_STATS is not set
@@ -1142,31 +1206,39 @@ CONFIG_SCHED_DEBUG=y
1142# CONFIG_DEBUG_SLAB is not set 1206# CONFIG_DEBUG_SLAB is not set
1143# CONFIG_DEBUG_SPINLOCK is not set 1207# CONFIG_DEBUG_SPINLOCK is not set
1144# CONFIG_DEBUG_MUTEXES is not set 1208# CONFIG_DEBUG_MUTEXES is not set
1209# CONFIG_DEBUG_LOCK_ALLOC is not set
1210# CONFIG_PROVE_LOCKING is not set
1211# CONFIG_LOCK_STAT is not set
1145# CONFIG_DEBUG_SPINLOCK_SLEEP is not set 1212# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1146# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set 1213# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1147# CONFIG_DEBUG_KOBJECT is not set 1214# CONFIG_DEBUG_KOBJECT is not set
1148CONFIG_DEBUG_BUGVERBOSE=y 1215CONFIG_DEBUG_BUGVERBOSE=y
1149CONFIG_DEBUG_INFO=y 1216CONFIG_DEBUG_INFO=y
1150# CONFIG_DEBUG_VM is not set 1217# CONFIG_DEBUG_VM is not set
1218# CONFIG_DEBUG_NOMMU_REGIONS is not set
1151# CONFIG_DEBUG_WRITECOUNT is not set 1219# CONFIG_DEBUG_WRITECOUNT is not set
1152# CONFIG_DEBUG_MEMORY_INIT is not set 1220# CONFIG_DEBUG_MEMORY_INIT is not set
1153# CONFIG_DEBUG_LIST is not set 1221# CONFIG_DEBUG_LIST is not set
1154# CONFIG_DEBUG_SG is not set 1222# CONFIG_DEBUG_SG is not set
1223# CONFIG_DEBUG_NOTIFIERS is not set
1224# CONFIG_DEBUG_CREDENTIALS is not set
1155# CONFIG_FRAME_POINTER is not set 1225# CONFIG_FRAME_POINTER is not set
1156# CONFIG_BOOT_PRINTK_DELAY is not set 1226# CONFIG_BOOT_PRINTK_DELAY is not set
1157# CONFIG_RCU_TORTURE_TEST is not set 1227# CONFIG_RCU_TORTURE_TEST is not set
1158# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1228# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1159# CONFIG_BACKTRACE_SELF_TEST is not set 1229# CONFIG_BACKTRACE_SELF_TEST is not set
1160# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set 1230# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1231# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
1161# CONFIG_FAULT_INJECTION is not set 1232# CONFIG_FAULT_INJECTION is not set
1162 1233# CONFIG_PAGE_POISONING is not set
1163# 1234CONFIG_HAVE_FUNCTION_TRACER=y
1164# Tracers 1235CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
1165# 1236CONFIG_TRACING_SUPPORT=y
1166# CONFIG_SCHED_TRACER is not set 1237# CONFIG_FTRACE is not set
1167# CONFIG_CONTEXT_SWITCH_TRACER is not set 1238# CONFIG_BRANCH_PROFILE_NONE is not set
1168# CONFIG_BOOT_TRACER is not set 1239# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
1169# CONFIG_DYNAMIC_PRINTK_DEBUG is not set 1240# CONFIG_PROFILE_ALL_BRANCHES is not set
1241# CONFIG_DYNAMIC_DEBUG is not set
1170# CONFIG_SAMPLES is not set 1242# CONFIG_SAMPLES is not set
1171CONFIG_HAVE_ARCH_KGDB=y 1243CONFIG_HAVE_ARCH_KGDB=y
1172# CONFIG_KGDB is not set 1244# CONFIG_KGDB is not set
@@ -1191,6 +1263,7 @@ CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y
1191CONFIG_EARLY_PRINTK=y 1263CONFIG_EARLY_PRINTK=y
1192CONFIG_CPLB_INFO=y 1264CONFIG_CPLB_INFO=y
1193CONFIG_ACCESS_CHECK=y 1265CONFIG_ACCESS_CHECK=y
1266# CONFIG_BFIN_ISRAM_SELF_TEST is not set
1194 1267
1195# 1268#
1196# Security options 1269# Security options
@@ -1199,14 +1272,14 @@ CONFIG_ACCESS_CHECK=y
1199CONFIG_SECURITY=y 1272CONFIG_SECURITY=y
1200# CONFIG_SECURITYFS is not set 1273# CONFIG_SECURITYFS is not set
1201# CONFIG_SECURITY_NETWORK is not set 1274# CONFIG_SECURITY_NETWORK is not set
1275# CONFIG_SECURITY_PATH is not set
1202# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1276# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1203CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0 1277# CONFIG_SECURITY_TOMOYO is not set
1204CONFIG_CRYPTO=y 1278CONFIG_CRYPTO=y
1205 1279
1206# 1280#
1207# Crypto core or helper 1281# Crypto core or helper
1208# 1282#
1209# CONFIG_CRYPTO_FIPS is not set
1210# CONFIG_CRYPTO_MANAGER is not set 1283# CONFIG_CRYPTO_MANAGER is not set
1211# CONFIG_CRYPTO_MANAGER2 is not set 1284# CONFIG_CRYPTO_MANAGER2 is not set
1212# CONFIG_CRYPTO_GF128MUL is not set 1285# CONFIG_CRYPTO_GF128MUL is not set
@@ -1238,11 +1311,13 @@ CONFIG_CRYPTO=y
1238# 1311#
1239# CONFIG_CRYPTO_HMAC is not set 1312# CONFIG_CRYPTO_HMAC is not set
1240# CONFIG_CRYPTO_XCBC is not set 1313# CONFIG_CRYPTO_XCBC is not set
1314# CONFIG_CRYPTO_VMAC is not set
1241 1315
1242# 1316#
1243# Digest 1317# Digest
1244# 1318#
1245# CONFIG_CRYPTO_CRC32C is not set 1319# CONFIG_CRYPTO_CRC32C is not set
1320# CONFIG_CRYPTO_GHASH is not set
1246# CONFIG_CRYPTO_MD4 is not set 1321# CONFIG_CRYPTO_MD4 is not set
1247# CONFIG_CRYPTO_MD5 is not set 1322# CONFIG_CRYPTO_MD5 is not set
1248# CONFIG_CRYPTO_MICHAEL_MIC is not set 1323# CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1279,6 +1354,7 @@ CONFIG_CRYPTO=y
1279# Compression 1354# Compression
1280# 1355#
1281# CONFIG_CRYPTO_DEFLATE is not set 1356# CONFIG_CRYPTO_DEFLATE is not set
1357# CONFIG_CRYPTO_ZLIB is not set
1282# CONFIG_CRYPTO_LZO is not set 1358# CONFIG_CRYPTO_LZO is not set
1283 1359
1284# 1360#
@@ -1286,11 +1362,13 @@ CONFIG_CRYPTO=y
1286# 1362#
1287# CONFIG_CRYPTO_ANSI_CPRNG is not set 1363# CONFIG_CRYPTO_ANSI_CPRNG is not set
1288CONFIG_CRYPTO_HW=y 1364CONFIG_CRYPTO_HW=y
1365# CONFIG_BINARY_PRINTF is not set
1289 1366
1290# 1367#
1291# Library routines 1368# Library routines
1292# 1369#
1293CONFIG_BITREVERSE=y 1370CONFIG_BITREVERSE=y
1371CONFIG_GENERIC_FIND_LAST_BIT=y
1294CONFIG_CRC_CCITT=m 1372CONFIG_CRC_CCITT=m
1295# CONFIG_CRC16 is not set 1373# CONFIG_CRC16 is not set
1296# CONFIG_CRC_T10DIF is not set 1374# CONFIG_CRC_T10DIF is not set
@@ -1299,6 +1377,8 @@ CONFIG_CRC32=y
1299# CONFIG_CRC7 is not set 1377# CONFIG_CRC7 is not set
1300# CONFIG_LIBCRC32C is not set 1378# CONFIG_LIBCRC32C is not set
1301CONFIG_ZLIB_INFLATE=y 1379CONFIG_ZLIB_INFLATE=y
1380CONFIG_DECOMPRESS_GZIP=y
1302CONFIG_HAS_IOMEM=y 1381CONFIG_HAS_IOMEM=y
1303CONFIG_HAS_IOPORT=y 1382CONFIG_HAS_IOPORT=y
1304CONFIG_HAS_DMA=y 1383CONFIG_HAS_DMA=y
1384CONFIG_NLATTR=y
diff --git a/arch/blackfin/configs/BF526-EZBRD_defconfig b/arch/blackfin/configs/BF526-EZBRD_defconfig
index 075e0fdcb399..31c2a6db6ec5 100644
--- a/arch/blackfin/configs/BF526-EZBRD_defconfig
+++ b/arch/blackfin/configs/BF526-EZBRD_defconfig
@@ -1,22 +1,27 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.28.10 3# Linux kernel version: 2.6.32.2
4# Thu May 21 05:50:01 2009
5# 4#
6# CONFIG_MMU is not set 5# CONFIG_MMU is not set
7# CONFIG_FPU is not set 6# CONFIG_FPU is not set
8CONFIG_RWSEM_GENERIC_SPINLOCK=y 7CONFIG_RWSEM_GENERIC_SPINLOCK=y
9# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set 8# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
10CONFIG_BLACKFIN=y 9CONFIG_BLACKFIN=y
10CONFIG_GENERIC_CSUM=y
11CONFIG_GENERIC_BUG=y
11CONFIG_ZONE_DMA=y 12CONFIG_ZONE_DMA=y
12CONFIG_GENERIC_FIND_NEXT_BIT=y 13CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_IRQ_PROBE=y 15CONFIG_GENERIC_IRQ_PROBE=y
16CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_GPIO=y 17CONFIG_GENERIC_GPIO=y
17CONFIG_FORCE_MAX_ZONEORDER=14 18CONFIG_FORCE_MAX_ZONEORDER=14
18CONFIG_GENERIC_CALIBRATE_DELAY=y 19CONFIG_GENERIC_CALIBRATE_DELAY=y
20CONFIG_LOCKDEP_SUPPORT=y
21CONFIG_STACKTRACE_SUPPORT=y
22CONFIG_TRACE_IRQFLAGS_SUPPORT=y
19CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 23CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
24CONFIG_CONSTRUCTORS=y
20 25
21# 26#
22# General setup 27# General setup
@@ -26,22 +31,41 @@ CONFIG_BROKEN_ON_SMP=y
26CONFIG_INIT_ENV_ARG_LIMIT=32 31CONFIG_INIT_ENV_ARG_LIMIT=32
27CONFIG_LOCALVERSION="" 32CONFIG_LOCALVERSION=""
28CONFIG_LOCALVERSION_AUTO=y 33CONFIG_LOCALVERSION_AUTO=y
34CONFIG_HAVE_KERNEL_GZIP=y
35CONFIG_HAVE_KERNEL_BZIP2=y
36CONFIG_HAVE_KERNEL_LZMA=y
37CONFIG_KERNEL_GZIP=y
38# CONFIG_KERNEL_BZIP2 is not set
39# CONFIG_KERNEL_LZMA is not set
29CONFIG_SYSVIPC=y 40CONFIG_SYSVIPC=y
30CONFIG_SYSVIPC_SYSCTL=y 41CONFIG_SYSVIPC_SYSCTL=y
31# CONFIG_POSIX_MQUEUE is not set 42# CONFIG_POSIX_MQUEUE is not set
32# CONFIG_BSD_PROCESS_ACCT is not set 43# CONFIG_BSD_PROCESS_ACCT is not set
33# CONFIG_TASKSTATS is not set 44# CONFIG_TASKSTATS is not set
34# CONFIG_AUDIT is not set 45# CONFIG_AUDIT is not set
46
47#
48# RCU Subsystem
49#
50CONFIG_TREE_RCU=y
51# CONFIG_TREE_PREEMPT_RCU is not set
52# CONFIG_RCU_TRACE is not set
53CONFIG_RCU_FANOUT=32
54# CONFIG_RCU_FANOUT_EXACT is not set
55# CONFIG_TREE_RCU_TRACE is not set
35CONFIG_IKCONFIG=y 56CONFIG_IKCONFIG=y
36CONFIG_IKCONFIG_PROC=y 57CONFIG_IKCONFIG_PROC=y
37CONFIG_LOG_BUF_SHIFT=14 58CONFIG_LOG_BUF_SHIFT=14
38# CONFIG_CGROUPS is not set
39# CONFIG_GROUP_SCHED is not set 59# CONFIG_GROUP_SCHED is not set
60# CONFIG_CGROUPS is not set
40# CONFIG_SYSFS_DEPRECATED_V2 is not set 61# CONFIG_SYSFS_DEPRECATED_V2 is not set
41# CONFIG_RELAY is not set 62# CONFIG_RELAY is not set
42# CONFIG_NAMESPACES is not set 63# CONFIG_NAMESPACES is not set
43CONFIG_BLK_DEV_INITRD=y 64CONFIG_BLK_DEV_INITRD=y
44CONFIG_INITRAMFS_SOURCE="" 65CONFIG_INITRAMFS_SOURCE=""
66CONFIG_RD_GZIP=y
67# CONFIG_RD_BZIP2 is not set
68# CONFIG_RD_LZMA is not set
45# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 69# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
46CONFIG_SYSCTL=y 70CONFIG_SYSCTL=y
47CONFIG_ANON_INODES=y 71CONFIG_ANON_INODES=y
@@ -62,6 +86,10 @@ CONFIG_EPOLL=y
62# CONFIG_TIMERFD is not set 86# CONFIG_TIMERFD is not set
63# CONFIG_EVENTFD is not set 87# CONFIG_EVENTFD is not set
64# CONFIG_AIO is not set 88# CONFIG_AIO is not set
89
90#
91# Kernel Performance Events And Counters
92#
65CONFIG_VM_EVENT_COUNTERS=y 93CONFIG_VM_EVENT_COUNTERS=y
66CONFIG_COMPAT_BRK=y 94CONFIG_COMPAT_BRK=y
67CONFIG_SLAB=y 95CONFIG_SLAB=y
@@ -69,11 +97,15 @@ CONFIG_SLAB=y
69# CONFIG_SLOB is not set 97# CONFIG_SLOB is not set
70CONFIG_MMAP_ALLOW_UNINITIALIZED=y 98CONFIG_MMAP_ALLOW_UNINITIALIZED=y
71# CONFIG_PROFILING is not set 99# CONFIG_PROFILING is not set
72# CONFIG_MARKERS is not set
73CONFIG_HAVE_OPROFILE=y 100CONFIG_HAVE_OPROFILE=y
101
102#
103# GCOV-based kernel profiling
104#
105# CONFIG_GCOV_KERNEL is not set
106# CONFIG_SLOW_WORK is not set
74# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set 107# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
75CONFIG_SLABINFO=y 108CONFIG_SLABINFO=y
76CONFIG_TINY_SHMEM=y
77CONFIG_BASE_SMALL=0 109CONFIG_BASE_SMALL=0
78CONFIG_MODULES=y 110CONFIG_MODULES=y
79# CONFIG_MODULE_FORCE_LOAD is not set 111# CONFIG_MODULE_FORCE_LOAD is not set
@@ -81,11 +113,8 @@ CONFIG_MODULE_UNLOAD=y
81# CONFIG_MODULE_FORCE_UNLOAD is not set 113# CONFIG_MODULE_FORCE_UNLOAD is not set
82# CONFIG_MODVERSIONS is not set 114# CONFIG_MODVERSIONS is not set
83# CONFIG_MODULE_SRCVERSION_ALL is not set 115# CONFIG_MODULE_SRCVERSION_ALL is not set
84CONFIG_KMOD=y
85CONFIG_BLOCK=y 116CONFIG_BLOCK=y
86# CONFIG_LBD is not set 117# CONFIG_LBDAF is not set
87# CONFIG_BLK_DEV_IO_TRACE is not set
88# CONFIG_LSF is not set
89# CONFIG_BLK_DEV_BSG is not set 118# CONFIG_BLK_DEV_BSG is not set
90# CONFIG_BLK_DEV_INTEGRITY is not set 119# CONFIG_BLK_DEV_INTEGRITY is not set
91 120
@@ -101,7 +130,6 @@ CONFIG_IOSCHED_NOOP=y
101# CONFIG_DEFAULT_CFQ is not set 130# CONFIG_DEFAULT_CFQ is not set
102CONFIG_DEFAULT_NOOP=y 131CONFIG_DEFAULT_NOOP=y
103CONFIG_DEFAULT_IOSCHED="noop" 132CONFIG_DEFAULT_IOSCHED="noop"
104CONFIG_CLASSIC_RCU=y
105# CONFIG_PREEMPT_NONE is not set 133# CONFIG_PREEMPT_NONE is not set
106CONFIG_PREEMPT_VOLUNTARY=y 134CONFIG_PREEMPT_VOLUNTARY=y
107# CONFIG_PREEMPT is not set 135# CONFIG_PREEMPT is not set
@@ -132,15 +160,15 @@ CONFIG_BF526=y
132# CONFIG_BF537 is not set 160# CONFIG_BF537 is not set
133# CONFIG_BF538 is not set 161# CONFIG_BF538 is not set
134# CONFIG_BF539 is not set 162# CONFIG_BF539 is not set
135# CONFIG_BF542 is not set 163# CONFIG_BF542_std is not set
136# CONFIG_BF542M is not set 164# CONFIG_BF542M is not set
137# CONFIG_BF544 is not set 165# CONFIG_BF544_std is not set
138# CONFIG_BF544M is not set 166# CONFIG_BF544M is not set
139# CONFIG_BF547 is not set 167# CONFIG_BF547_std is not set
140# CONFIG_BF547M is not set 168# CONFIG_BF547M is not set
141# CONFIG_BF548 is not set 169# CONFIG_BF548_std is not set
142# CONFIG_BF548M is not set 170# CONFIG_BF548M is not set
143# CONFIG_BF549 is not set 171# CONFIG_BF549_std is not set
144# CONFIG_BF549M is not set 172# CONFIG_BF549M is not set
145# CONFIG_BF561 is not set 173# CONFIG_BF561 is not set
146CONFIG_BF_REV_MIN=0 174CONFIG_BF_REV_MIN=0
@@ -154,8 +182,7 @@ CONFIG_BF_REV_0_0=y
154# CONFIG_BF_REV_0_6 is not set 182# CONFIG_BF_REV_0_6 is not set
155# CONFIG_BF_REV_ANY is not set 183# CONFIG_BF_REV_ANY is not set
156# CONFIG_BF_REV_NONE is not set 184# CONFIG_BF_REV_NONE is not set
157CONFIG_BF52x=y 185CONFIG_MEM_MT48H32M16LFCJ_75=y
158CONFIG_MEM_MT48LC32M16A2TG_75=y
159CONFIG_IRQ_PLL_WAKEUP=7 186CONFIG_IRQ_PLL_WAKEUP=7
160CONFIG_IRQ_DMA0_ERROR=7 187CONFIG_IRQ_DMA0_ERROR=7
161CONFIG_IRQ_DMAR0_BLK=7 188CONFIG_IRQ_DMAR0_BLK=7
@@ -200,7 +227,9 @@ CONFIG_IRQ_MEM_DMA1=13
200CONFIG_IRQ_WATCH=13 227CONFIG_IRQ_WATCH=13
201CONFIG_IRQ_PORTF_INTA=13 228CONFIG_IRQ_PORTF_INTA=13
202CONFIG_IRQ_PORTF_INTB=13 229CONFIG_IRQ_PORTF_INTB=13
230CONFIG_BF52x=y
203# CONFIG_BFIN527_EZKIT is not set 231# CONFIG_BFIN527_EZKIT is not set
232# CONFIG_BFIN527_EZKIT_V2 is not set
204# CONFIG_BFIN527_BLUETECHNIX_CM is not set 233# CONFIG_BFIN527_BLUETECHNIX_CM is not set
205CONFIG_BFIN526_EZBRD=y 234CONFIG_BFIN526_EZBRD=y
206 235
@@ -318,7 +347,6 @@ CONFIG_FLATMEM=y
318CONFIG_FLAT_NODE_MEM_MAP=y 347CONFIG_FLAT_NODE_MEM_MAP=y
319CONFIG_PAGEFLAGS_EXTENDED=y 348CONFIG_PAGEFLAGS_EXTENDED=y
320CONFIG_SPLIT_PTLOCK_CPUS=4 349CONFIG_SPLIT_PTLOCK_CPUS=4
321# CONFIG_RESOURCES_64BIT is not set
322# CONFIG_PHYS_ADDR_T_64BIT is not set 350# CONFIG_PHYS_ADDR_T_64BIT is not set
323CONFIG_ZONE_DMA_FLAG=1 351CONFIG_ZONE_DMA_FLAG=1
324CONFIG_VIRT_TO_BUS=y 352CONFIG_VIRT_TO_BUS=y
@@ -327,16 +355,18 @@ CONFIG_BFIN_GPTIMERS=m
327# CONFIG_DMA_UNCACHED_4M is not set 355# CONFIG_DMA_UNCACHED_4M is not set
328# CONFIG_DMA_UNCACHED_2M is not set 356# CONFIG_DMA_UNCACHED_2M is not set
329CONFIG_DMA_UNCACHED_1M=y 357CONFIG_DMA_UNCACHED_1M=y
358# CONFIG_DMA_UNCACHED_512K is not set
359# CONFIG_DMA_UNCACHED_256K is not set
360# CONFIG_DMA_UNCACHED_128K is not set
330# CONFIG_DMA_UNCACHED_NONE is not set 361# CONFIG_DMA_UNCACHED_NONE is not set
331 362
332# 363#
333# Cache Support 364# Cache Support
334# 365#
335CONFIG_BFIN_ICACHE=y 366CONFIG_BFIN_ICACHE=y
336# CONFIG_BFIN_ICACHE_LOCK is not set 367CONFIG_BFIN_EXTMEM_ICACHEABLE=y
337CONFIG_BFIN_DCACHE=y 368CONFIG_BFIN_DCACHE=y
338# CONFIG_BFIN_DCACHE_BANKA is not set 369# CONFIG_BFIN_DCACHE_BANKA is not set
339CONFIG_BFIN_EXTMEM_ICACHEABLE=y
340CONFIG_BFIN_EXTMEM_DCACHEABLE=y 370CONFIG_BFIN_EXTMEM_DCACHEABLE=y
341CONFIG_BFIN_EXTMEM_WRITEBACK=y 371CONFIG_BFIN_EXTMEM_WRITEBACK=y
342# CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set 372# CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set
@@ -347,6 +377,10 @@ CONFIG_BFIN_EXTMEM_WRITEBACK=y
347# CONFIG_MPU is not set 377# CONFIG_MPU is not set
348 378
349# 379#
380# Asynchronous Memory Configuration
381#
382
383#
350# EBIU_AMGCTL Global Control 384# EBIU_AMGCTL Global Control
351# 385#
352CONFIG_C_AMCKEN=y 386CONFIG_C_AMCKEN=y
@@ -399,11 +433,6 @@ CONFIG_NET=y
399CONFIG_PACKET=y 433CONFIG_PACKET=y
400# CONFIG_PACKET_MMAP is not set 434# CONFIG_PACKET_MMAP is not set
401CONFIG_UNIX=y 435CONFIG_UNIX=y
402CONFIG_XFRM=y
403# CONFIG_XFRM_USER is not set
404# CONFIG_XFRM_SUB_POLICY is not set
405# CONFIG_XFRM_MIGRATE is not set
406# CONFIG_XFRM_STATISTICS is not set
407# CONFIG_NET_KEY is not set 436# CONFIG_NET_KEY is not set
408CONFIG_INET=y 437CONFIG_INET=y
409# CONFIG_IP_MULTICAST is not set 438# CONFIG_IP_MULTICAST is not set
@@ -427,7 +456,6 @@ CONFIG_IP_PNP=y
427# CONFIG_INET_XFRM_MODE_BEET is not set 456# CONFIG_INET_XFRM_MODE_BEET is not set
428# CONFIG_INET_LRO is not set 457# CONFIG_INET_LRO is not set
429# CONFIG_INET_DIAG is not set 458# CONFIG_INET_DIAG is not set
430CONFIG_INET_TCP_DIAG=y
431# CONFIG_TCP_CONG_ADVANCED is not set 459# CONFIG_TCP_CONG_ADVANCED is not set
432CONFIG_TCP_CONG_CUBIC=y 460CONFIG_TCP_CONG_CUBIC=y
433CONFIG_DEFAULT_TCP_CONG="cubic" 461CONFIG_DEFAULT_TCP_CONG="cubic"
@@ -438,6 +466,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
438# CONFIG_NETFILTER is not set 466# CONFIG_NETFILTER is not set
439# CONFIG_IP_DCCP is not set 467# CONFIG_IP_DCCP is not set
440# CONFIG_IP_SCTP is not set 468# CONFIG_IP_SCTP is not set
469# CONFIG_RDS is not set
441# CONFIG_TIPC is not set 470# CONFIG_TIPC is not set
442# CONFIG_ATM is not set 471# CONFIG_ATM is not set
443# CONFIG_BRIDGE is not set 472# CONFIG_BRIDGE is not set
@@ -451,7 +480,10 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
451# CONFIG_LAPB is not set 480# CONFIG_LAPB is not set
452# CONFIG_ECONET is not set 481# CONFIG_ECONET is not set
453# CONFIG_WAN_ROUTER is not set 482# CONFIG_WAN_ROUTER is not set
483# CONFIG_PHONET is not set
484# CONFIG_IEEE802154 is not set
454# CONFIG_NET_SCHED is not set 485# CONFIG_NET_SCHED is not set
486# CONFIG_DCB is not set
455 487
456# 488#
457# Network testing 489# Network testing
@@ -462,13 +494,8 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
462# CONFIG_IRDA is not set 494# CONFIG_IRDA is not set
463# CONFIG_BT is not set 495# CONFIG_BT is not set
464# CONFIG_AF_RXRPC is not set 496# CONFIG_AF_RXRPC is not set
465# CONFIG_PHONET is not set 497# CONFIG_WIRELESS is not set
466CONFIG_WIRELESS=y 498# CONFIG_WIMAX is not set
467# CONFIG_CFG80211 is not set
468CONFIG_WIRELESS_OLD_REGULATORY=y
469# CONFIG_WIRELESS_EXT is not set
470# CONFIG_MAC80211 is not set
471# CONFIG_IEEE80211 is not set
472# CONFIG_RFKILL is not set 499# CONFIG_RFKILL is not set
473# CONFIG_NET_9P is not set 500# CONFIG_NET_9P is not set
474 501
@@ -489,6 +516,7 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
489# CONFIG_CONNECTOR is not set 516# CONFIG_CONNECTOR is not set
490CONFIG_MTD=y 517CONFIG_MTD=y
491# CONFIG_MTD_DEBUG is not set 518# CONFIG_MTD_DEBUG is not set
519# CONFIG_MTD_TESTS is not set
492# CONFIG_MTD_CONCAT is not set 520# CONFIG_MTD_CONCAT is not set
493CONFIG_MTD_PARTITIONS=y 521CONFIG_MTD_PARTITIONS=y
494# CONFIG_MTD_REDBOOT_PARTS is not set 522# CONFIG_MTD_REDBOOT_PARTS is not set
@@ -549,6 +577,7 @@ CONFIG_MTD_PHYSMAP=y
549# CONFIG_MTD_DATAFLASH is not set 577# CONFIG_MTD_DATAFLASH is not set
550CONFIG_MTD_M25P80=y 578CONFIG_MTD_M25P80=y
551CONFIG_M25PXX_USE_FAST_READ=y 579CONFIG_M25PXX_USE_FAST_READ=y
580# CONFIG_MTD_SST25L is not set
552# CONFIG_MTD_SLRAM is not set 581# CONFIG_MTD_SLRAM is not set
553# CONFIG_MTD_PHRAM is not set 582# CONFIG_MTD_PHRAM is not set
554# CONFIG_MTD_MTDRAM is not set 583# CONFIG_MTD_MTDRAM is not set
@@ -564,11 +593,6 @@ CONFIG_MTD_NAND=m
564# CONFIG_MTD_NAND_VERIFY_WRITE is not set 593# CONFIG_MTD_NAND_VERIFY_WRITE is not set
565# CONFIG_MTD_NAND_ECC_SMC is not set 594# CONFIG_MTD_NAND_ECC_SMC is not set
566# CONFIG_MTD_NAND_MUSEUM_IDS is not set 595# CONFIG_MTD_NAND_MUSEUM_IDS is not set
567CONFIG_MTD_NAND_BFIN=m
568CONFIG_BFIN_NAND_BASE=0x20212000
569CONFIG_BFIN_NAND_CLE=2
570CONFIG_BFIN_NAND_ALE=1
571CONFIG_BFIN_NAND_READY=3
572CONFIG_MTD_NAND_IDS=m 596CONFIG_MTD_NAND_IDS=m
573# CONFIG_MTD_NAND_BF5XX is not set 597# CONFIG_MTD_NAND_BF5XX is not set
574# CONFIG_MTD_NAND_DISKONCHIP is not set 598# CONFIG_MTD_NAND_DISKONCHIP is not set
@@ -578,6 +602,11 @@ CONFIG_MTD_NAND_IDS=m
578# CONFIG_MTD_ONENAND is not set 602# CONFIG_MTD_ONENAND is not set
579 603
580# 604#
605# LPDDR flash memory drivers
606#
607# CONFIG_MTD_LPDDR is not set
608
609#
581# UBI - Unsorted block images 610# UBI - Unsorted block images
582# 611#
583# CONFIG_MTD_UBI is not set 612# CONFIG_MTD_UBI is not set
@@ -595,10 +624,20 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
595# CONFIG_ATA_OVER_ETH is not set 624# CONFIG_ATA_OVER_ETH is not set
596# CONFIG_BLK_DEV_HD is not set 625# CONFIG_BLK_DEV_HD is not set
597CONFIG_MISC_DEVICES=y 626CONFIG_MISC_DEVICES=y
598# CONFIG_EEPROM_93CX6 is not set 627# CONFIG_AD525X_DPOT is not set
599# CONFIG_ICS932S401 is not set 628# CONFIG_ICS932S401 is not set
600# CONFIG_ENCLOSURE_SERVICES is not set 629# CONFIG_ENCLOSURE_SERVICES is not set
630# CONFIG_ISL29003 is not set
601# CONFIG_C2PORT is not set 631# CONFIG_C2PORT is not set
632
633#
634# EEPROM support
635#
636# CONFIG_EEPROM_AT24 is not set
637# CONFIG_EEPROM_AT25 is not set
638# CONFIG_EEPROM_LEGACY is not set
639# CONFIG_EEPROM_MAX6875 is not set
640# CONFIG_EEPROM_93CX6 is not set
602CONFIG_HAVE_IDE=y 641CONFIG_HAVE_IDE=y
603# CONFIG_IDE is not set 642# CONFIG_IDE is not set
604 643
@@ -622,10 +661,6 @@ CONFIG_BLK_DEV_SR=m
622# CONFIG_BLK_DEV_SR_VENDOR is not set 661# CONFIG_BLK_DEV_SR_VENDOR is not set
623# CONFIG_CHR_DEV_SG is not set 662# CONFIG_CHR_DEV_SG is not set
624# CONFIG_CHR_DEV_SCH is not set 663# CONFIG_CHR_DEV_SCH is not set
625
626#
627# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
628#
629# CONFIG_SCSI_MULTI_LUN is not set 664# CONFIG_SCSI_MULTI_LUN is not set
630# CONFIG_SCSI_CONSTANTS is not set 665# CONFIG_SCSI_CONSTANTS is not set
631# CONFIG_SCSI_LOGGING is not set 666# CONFIG_SCSI_LOGGING is not set
@@ -642,6 +677,7 @@ CONFIG_SCSI_WAIT_SCAN=m
642# CONFIG_SCSI_SRP_ATTRS is not set 677# CONFIG_SCSI_SRP_ATTRS is not set
643# CONFIG_SCSI_LOWLEVEL is not set 678# CONFIG_SCSI_LOWLEVEL is not set
644# CONFIG_SCSI_DH is not set 679# CONFIG_SCSI_DH is not set
680# CONFIG_SCSI_OSD_INITIATOR is not set
645# CONFIG_ATA is not set 681# CONFIG_ATA is not set
646# CONFIG_MD is not set 682# CONFIG_MD is not set
647CONFIG_NETDEVICES=y 683CONFIG_NETDEVICES=y
@@ -666,6 +702,9 @@ CONFIG_PHYLIB=y
666# CONFIG_BROADCOM_PHY is not set 702# CONFIG_BROADCOM_PHY is not set
667# CONFIG_ICPLUS_PHY is not set 703# CONFIG_ICPLUS_PHY is not set
668# CONFIG_REALTEK_PHY is not set 704# CONFIG_REALTEK_PHY is not set
705# CONFIG_NATIONAL_PHY is not set
706# CONFIG_STE10XP is not set
707# CONFIG_LSI_ET1011C_PHY is not set
669# CONFIG_FIXED_PHY is not set 708# CONFIG_FIXED_PHY is not set
670# CONFIG_MDIO_BITBANG is not set 709# CONFIG_MDIO_BITBANG is not set
671CONFIG_NET_ETHERNET=y 710CONFIG_NET_ETHERNET=y
@@ -675,9 +714,12 @@ CONFIG_BFIN_TX_DESC_NUM=10
675CONFIG_BFIN_RX_DESC_NUM=20 714CONFIG_BFIN_RX_DESC_NUM=20
676CONFIG_BFIN_MAC_RMII=y 715CONFIG_BFIN_MAC_RMII=y
677# CONFIG_SMC91X is not set 716# CONFIG_SMC91X is not set
678# CONFIG_SMSC911X is not set
679# CONFIG_DM9000 is not set 717# CONFIG_DM9000 is not set
680# CONFIG_ENC28J60 is not set 718# CONFIG_ENC28J60 is not set
719# CONFIG_ETHOC is not set
720# CONFIG_SMSC911X is not set
721# CONFIG_DNET is not set
722# CONFIG_ADF702X is not set
681# CONFIG_IBM_NEW_EMAC_ZMII is not set 723# CONFIG_IBM_NEW_EMAC_ZMII is not set
682# CONFIG_IBM_NEW_EMAC_RGMII is not set 724# CONFIG_IBM_NEW_EMAC_RGMII is not set
683# CONFIG_IBM_NEW_EMAC_TAH is not set 725# CONFIG_IBM_NEW_EMAC_TAH is not set
@@ -686,15 +728,16 @@ CONFIG_BFIN_MAC_RMII=y
686# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set 728# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
687# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 729# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
688# CONFIG_B44 is not set 730# CONFIG_B44 is not set
731# CONFIG_KS8842 is not set
732# CONFIG_KS8851 is not set
733# CONFIG_KS8851_MLL is not set
689# CONFIG_NETDEV_1000 is not set 734# CONFIG_NETDEV_1000 is not set
690# CONFIG_NETDEV_10000 is not set 735# CONFIG_NETDEV_10000 is not set
736# CONFIG_WLAN is not set
691 737
692# 738#
693# Wireless LAN 739# Enable WiMAX (Networking options) to see the WiMAX drivers
694# 740#
695# CONFIG_WLAN_PRE80211 is not set
696# CONFIG_WLAN_80211 is not set
697# CONFIG_IWLWIFI_LEDS is not set
698 741
699# 742#
700# USB Network Adapters 743# USB Network Adapters
@@ -744,7 +787,11 @@ CONFIG_INPUT_MISC=y
744# CONFIG_INPUT_YEALINK is not set 787# CONFIG_INPUT_YEALINK is not set
745# CONFIG_INPUT_CM109 is not set 788# CONFIG_INPUT_CM109 is not set
746# CONFIG_INPUT_UINPUT is not set 789# CONFIG_INPUT_UINPUT is not set
747# CONFIG_CONFIG_INPUT_PCF8574 is not set 790# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
791# CONFIG_INPUT_BFIN_ROTARY is not set
792# CONFIG_INPUT_AD714X is not set
793# CONFIG_INPUT_ADXL34X is not set
794# CONFIG_INPUT_PCF8574 is not set
748 795
749# 796#
750# Hardware I/O ports 797# Hardware I/O ports
@@ -755,16 +802,13 @@ CONFIG_INPUT_MISC=y
755# 802#
756# Character devices 803# Character devices
757# 804#
758# CONFIG_AD9960 is not set
759CONFIG_BFIN_DMA_INTERFACE=m 805CONFIG_BFIN_DMA_INTERFACE=m
760# CONFIG_BFIN_PPI is not set 806# CONFIG_BFIN_PPI is not set
761# CONFIG_BFIN_PPIFCD is not set 807# CONFIG_BFIN_PPIFCD is not set
762# CONFIG_BFIN_SIMPLE_TIMER is not set 808# CONFIG_BFIN_SIMPLE_TIMER is not set
763# CONFIG_BFIN_SPI_ADC is not set 809# CONFIG_BFIN_SPI_ADC is not set
764# CONFIG_BFIN_SPORT is not set 810# CONFIG_BFIN_SPORT is not set
765# CONFIG_BFIN_TIMER_LATENCY is not set
766# CONFIG_BFIN_TWI_LCD is not set 811# CONFIG_BFIN_TWI_LCD is not set
767CONFIG_SIMPLE_GPIO=m
768CONFIG_VT=y 812CONFIG_VT=y
769CONFIG_CONSOLE_TRANSLATIONS=y 813CONFIG_CONSOLE_TRANSLATIONS=y
770CONFIG_VT_CONSOLE=y 814CONFIG_VT_CONSOLE=y
@@ -782,6 +826,7 @@ CONFIG_BFIN_JTAG_COMM=m
782# 826#
783# Non-8250 serial port support 827# Non-8250 serial port support
784# 828#
829# CONFIG_SERIAL_MAX3100 is not set
785CONFIG_SERIAL_BFIN=y 830CONFIG_SERIAL_BFIN=y
786CONFIG_SERIAL_BFIN_CONSOLE=y 831CONFIG_SERIAL_BFIN_CONSOLE=y
787CONFIG_SERIAL_BFIN_DMA=y 832CONFIG_SERIAL_BFIN_DMA=y
@@ -793,14 +838,10 @@ CONFIG_SERIAL_CORE=y
793CONFIG_SERIAL_CORE_CONSOLE=y 838CONFIG_SERIAL_CORE_CONSOLE=y
794# CONFIG_SERIAL_BFIN_SPORT is not set 839# CONFIG_SERIAL_BFIN_SPORT is not set
795CONFIG_UNIX98_PTYS=y 840CONFIG_UNIX98_PTYS=y
841# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
796# CONFIG_LEGACY_PTYS is not set 842# CONFIG_LEGACY_PTYS is not set
797CONFIG_BFIN_OTP=y 843CONFIG_BFIN_OTP=y
798# CONFIG_BFIN_OTP_WRITE_ENABLE is not set 844# CONFIG_BFIN_OTP_WRITE_ENABLE is not set
799
800#
801# CAN, the car bus and industrial fieldbus
802#
803# CONFIG_CAN4LINUX is not set
804# CONFIG_IPMI_HANDLER is not set 845# CONFIG_IPMI_HANDLER is not set
805# CONFIG_HW_RANDOM is not set 846# CONFIG_HW_RANDOM is not set
806# CONFIG_R3964 is not set 847# CONFIG_R3964 is not set
@@ -808,6 +849,7 @@ CONFIG_BFIN_OTP=y
808# CONFIG_TCG_TPM is not set 849# CONFIG_TCG_TPM is not set
809CONFIG_I2C=y 850CONFIG_I2C=y
810CONFIG_I2C_BOARDINFO=y 851CONFIG_I2C_BOARDINFO=y
852CONFIG_I2C_COMPAT=y
811CONFIG_I2C_CHARDEV=m 853CONFIG_I2C_CHARDEV=m
812CONFIG_I2C_HELPER_AUTO=y 854CONFIG_I2C_HELPER_AUTO=y
813 855
@@ -841,14 +883,6 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
841# Miscellaneous I2C Chip support 883# Miscellaneous I2C Chip support
842# 884#
843# CONFIG_DS1682 is not set 885# CONFIG_DS1682 is not set
844# CONFIG_EEPROM_AT24 is not set
845# CONFIG_SENSORS_AD5252 is not set
846# CONFIG_EEPROM_LEGACY is not set
847# CONFIG_SENSORS_PCF8574 is not set
848# CONFIG_PCF8575 is not set
849# CONFIG_SENSORS_PCA9539 is not set
850# CONFIG_SENSORS_PCF8591 is not set
851# CONFIG_SENSORS_MAX6875 is not set
852# CONFIG_SENSORS_TSL2550 is not set 886# CONFIG_SENSORS_TSL2550 is not set
853# CONFIG_I2C_DEBUG_CORE is not set 887# CONFIG_I2C_DEBUG_CORE is not set
854# CONFIG_I2C_DEBUG_ALGO is not set 888# CONFIG_I2C_DEBUG_ALGO is not set
@@ -865,13 +899,18 @@ CONFIG_SPI_BFIN=y
865# CONFIG_SPI_BFIN_LOCK is not set 899# CONFIG_SPI_BFIN_LOCK is not set
866# CONFIG_SPI_BFIN_SPORT is not set 900# CONFIG_SPI_BFIN_SPORT is not set
867# CONFIG_SPI_BITBANG is not set 901# CONFIG_SPI_BITBANG is not set
902# CONFIG_SPI_GPIO is not set
868 903
869# 904#
870# SPI Protocol Masters 905# SPI Protocol Masters
871# 906#
872# CONFIG_EEPROM_AT25 is not set
873# CONFIG_SPI_SPIDEV is not set 907# CONFIG_SPI_SPIDEV is not set
874# CONFIG_SPI_TLE62X0 is not set 908# CONFIG_SPI_TLE62X0 is not set
909
910#
911# PPS support
912#
913# CONFIG_PPS is not set
875CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y 914CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
876CONFIG_GPIOLIB=y 915CONFIG_GPIOLIB=y
877# CONFIG_DEBUG_GPIO is not set 916# CONFIG_DEBUG_GPIO is not set
@@ -887,6 +926,7 @@ CONFIG_GPIO_SYSFS=y
887# CONFIG_GPIO_MAX732X is not set 926# CONFIG_GPIO_MAX732X is not set
888# CONFIG_GPIO_PCA953X is not set 927# CONFIG_GPIO_PCA953X is not set
889# CONFIG_GPIO_PCF857X is not set 928# CONFIG_GPIO_PCF857X is not set
929# CONFIG_GPIO_ADP5588 is not set
890 930
891# 931#
892# PCI GPIO expanders: 932# PCI GPIO expanders:
@@ -897,11 +937,20 @@ CONFIG_GPIO_SYSFS=y
897# 937#
898# CONFIG_GPIO_MAX7301 is not set 938# CONFIG_GPIO_MAX7301 is not set
899# CONFIG_GPIO_MCP23S08 is not set 939# CONFIG_GPIO_MCP23S08 is not set
940# CONFIG_GPIO_MC33880 is not set
941
942#
943# AC97 GPIO expanders:
944#
900# CONFIG_W1 is not set 945# CONFIG_W1 is not set
901# CONFIG_POWER_SUPPLY is not set 946# CONFIG_POWER_SUPPLY is not set
902CONFIG_HWMON=y 947CONFIG_HWMON=y
903# CONFIG_HWMON_VID is not set 948# CONFIG_HWMON_VID is not set
904# CONFIG_SENSORS_AD5252 is not set 949# CONFIG_HWMON_DEBUG_CHIP is not set
950
951#
952# Native drivers
953#
905# CONFIG_SENSORS_AD7414 is not set 954# CONFIG_SENSORS_AD7414 is not set
906# CONFIG_SENSORS_AD7418 is not set 955# CONFIG_SENSORS_AD7418 is not set
907# CONFIG_SENSORS_ADCXX is not set 956# CONFIG_SENSORS_ADCXX is not set
@@ -914,11 +963,13 @@ CONFIG_HWMON=y
914# CONFIG_SENSORS_ADT7462 is not set 963# CONFIG_SENSORS_ADT7462 is not set
915# CONFIG_SENSORS_ADT7470 is not set 964# CONFIG_SENSORS_ADT7470 is not set
916# CONFIG_SENSORS_ADT7473 is not set 965# CONFIG_SENSORS_ADT7473 is not set
966# CONFIG_SENSORS_ADT7475 is not set
917# CONFIG_SENSORS_ATXP1 is not set 967# CONFIG_SENSORS_ATXP1 is not set
918# CONFIG_SENSORS_DS1621 is not set 968# CONFIG_SENSORS_DS1621 is not set
919# CONFIG_SENSORS_F71805F is not set 969# CONFIG_SENSORS_F71805F is not set
920# CONFIG_SENSORS_F71882FG is not set 970# CONFIG_SENSORS_F71882FG is not set
921# CONFIG_SENSORS_F75375S is not set 971# CONFIG_SENSORS_F75375S is not set
972# CONFIG_SENSORS_G760A is not set
922# CONFIG_SENSORS_GL518SM is not set 973# CONFIG_SENSORS_GL518SM is not set
923# CONFIG_SENSORS_GL520SM is not set 974# CONFIG_SENSORS_GL520SM is not set
924# CONFIG_SENSORS_IT87 is not set 975# CONFIG_SENSORS_IT87 is not set
@@ -934,17 +985,24 @@ CONFIG_HWMON=y
934# CONFIG_SENSORS_LM90 is not set 985# CONFIG_SENSORS_LM90 is not set
935# CONFIG_SENSORS_LM92 is not set 986# CONFIG_SENSORS_LM92 is not set
936# CONFIG_SENSORS_LM93 is not set 987# CONFIG_SENSORS_LM93 is not set
988# CONFIG_SENSORS_LTC4215 is not set
989# CONFIG_SENSORS_LTC4245 is not set
990# CONFIG_SENSORS_LM95241 is not set
937# CONFIG_SENSORS_MAX1111 is not set 991# CONFIG_SENSORS_MAX1111 is not set
938# CONFIG_SENSORS_MAX1619 is not set 992# CONFIG_SENSORS_MAX1619 is not set
939# CONFIG_SENSORS_MAX6650 is not set 993# CONFIG_SENSORS_MAX6650 is not set
940# CONFIG_SENSORS_PC87360 is not set 994# CONFIG_SENSORS_PC87360 is not set
941# CONFIG_SENSORS_PC87427 is not set 995# CONFIG_SENSORS_PC87427 is not set
996# CONFIG_SENSORS_PCF8591 is not set
997# CONFIG_SENSORS_SHT15 is not set
942# CONFIG_SENSORS_DME1737 is not set 998# CONFIG_SENSORS_DME1737 is not set
943# CONFIG_SENSORS_SMSC47M1 is not set 999# CONFIG_SENSORS_SMSC47M1 is not set
944# CONFIG_SENSORS_SMSC47M192 is not set 1000# CONFIG_SENSORS_SMSC47M192 is not set
945# CONFIG_SENSORS_SMSC47B397 is not set 1001# CONFIG_SENSORS_SMSC47B397 is not set
946# CONFIG_SENSORS_ADS7828 is not set 1002# CONFIG_SENSORS_ADS7828 is not set
947# CONFIG_SENSORS_THMC50 is not set 1003# CONFIG_SENSORS_THMC50 is not set
1004# CONFIG_SENSORS_TMP401 is not set
1005# CONFIG_SENSORS_TMP421 is not set
948# CONFIG_SENSORS_VT1211 is not set 1006# CONFIG_SENSORS_VT1211 is not set
949# CONFIG_SENSORS_W83781D is not set 1007# CONFIG_SENSORS_W83781D is not set
950# CONFIG_SENSORS_W83791D is not set 1008# CONFIG_SENSORS_W83791D is not set
@@ -954,9 +1012,8 @@ CONFIG_HWMON=y
954# CONFIG_SENSORS_W83L786NG is not set 1012# CONFIG_SENSORS_W83L786NG is not set
955# CONFIG_SENSORS_W83627HF is not set 1013# CONFIG_SENSORS_W83627HF is not set
956# CONFIG_SENSORS_W83627EHF is not set 1014# CONFIG_SENSORS_W83627EHF is not set
957# CONFIG_HWMON_DEBUG_CHIP is not set 1015# CONFIG_SENSORS_LIS3_SPI is not set
958# CONFIG_THERMAL is not set 1016# CONFIG_THERMAL is not set
959# CONFIG_THERMAL_HWMON is not set
960CONFIG_WATCHDOG=y 1017CONFIG_WATCHDOG=y
961# CONFIG_WATCHDOG_NOWAYOUT is not set 1018# CONFIG_WATCHDOG_NOWAYOUT is not set
962 1019
@@ -983,28 +1040,20 @@ CONFIG_SSB_POSSIBLE=y
983# CONFIG_MFD_CORE is not set 1040# CONFIG_MFD_CORE is not set
984# CONFIG_MFD_SM501 is not set 1041# CONFIG_MFD_SM501 is not set
985# CONFIG_HTC_PASIC3 is not set 1042# CONFIG_HTC_PASIC3 is not set
1043# CONFIG_TPS65010 is not set
1044# CONFIG_TWL4030_CORE is not set
986# CONFIG_MFD_TMIO is not set 1045# CONFIG_MFD_TMIO is not set
987# CONFIG_PMIC_DA903X is not set 1046# CONFIG_PMIC_DA903X is not set
988# CONFIG_PMIC_ADP5520 is not set 1047# CONFIG_PMIC_ADP5520 is not set
989# CONFIG_MFD_WM8400 is not set 1048# CONFIG_MFD_WM8400 is not set
1049# CONFIG_MFD_WM831X is not set
990# CONFIG_MFD_WM8350_I2C is not set 1050# CONFIG_MFD_WM8350_I2C is not set
1051# CONFIG_MFD_PCF50633 is not set
1052# CONFIG_MFD_MC13783 is not set
1053# CONFIG_AB3100_CORE is not set
1054# CONFIG_EZX_PCAP is not set
991# CONFIG_REGULATOR is not set 1055# CONFIG_REGULATOR is not set
992 1056# CONFIG_MEDIA_SUPPORT is not set
993#
994# Multimedia devices
995#
996
997#
998# Multimedia core support
999#
1000# CONFIG_VIDEO_DEV is not set
1001# CONFIG_DVB_CORE is not set
1002# CONFIG_VIDEO_MEDIA is not set
1003
1004#
1005# Multimedia drivers
1006#
1007# CONFIG_DAB is not set
1008 1057
1009# 1058#
1010# Graphics support 1059# Graphics support
@@ -1026,7 +1075,6 @@ CONFIG_DUMMY_CONSOLE=y
1026# CONFIG_SOUND is not set 1075# CONFIG_SOUND is not set
1027CONFIG_HID_SUPPORT=y 1076CONFIG_HID_SUPPORT=y
1028CONFIG_HID=y 1077CONFIG_HID=y
1029# CONFIG_HID_DEBUG is not set
1030# CONFIG_HIDRAW is not set 1078# CONFIG_HIDRAW is not set
1031 1079
1032# 1080#
@@ -1039,30 +1087,35 @@ CONFIG_USB_HID=y
1039# 1087#
1040# Special HID drivers 1088# Special HID drivers
1041# 1089#
1042CONFIG_HID_COMPAT=y
1043CONFIG_HID_A4TECH=y 1090CONFIG_HID_A4TECH=y
1044CONFIG_HID_APPLE=y 1091CONFIG_HID_APPLE=y
1045CONFIG_HID_BELKIN=y 1092CONFIG_HID_BELKIN=y
1046CONFIG_HID_BRIGHT=y
1047CONFIG_HID_CHERRY=y 1093CONFIG_HID_CHERRY=y
1048CONFIG_HID_CHICONY=y 1094CONFIG_HID_CHICONY=y
1049CONFIG_HID_CYPRESS=y 1095CONFIG_HID_CYPRESS=y
1050CONFIG_HID_DELL=y 1096# CONFIG_HID_DRAGONRISE is not set
1051CONFIG_HID_EZKEY=y 1097CONFIG_HID_EZKEY=y
1098# CONFIG_HID_KYE is not set
1052CONFIG_HID_GYRATION=y 1099CONFIG_HID_GYRATION=y
1100# CONFIG_HID_TWINHAN is not set
1101# CONFIG_HID_KENSINGTON is not set
1053CONFIG_HID_LOGITECH=y 1102CONFIG_HID_LOGITECH=y
1054# CONFIG_LOGITECH_FF is not set 1103# CONFIG_LOGITECH_FF is not set
1055# CONFIG_LOGIRUMBLEPAD2_FF is not set 1104# CONFIG_LOGIRUMBLEPAD2_FF is not set
1056CONFIG_HID_MICROSOFT=y 1105CONFIG_HID_MICROSOFT=y
1057CONFIG_HID_MONTEREY=y 1106CONFIG_HID_MONTEREY=y
1107# CONFIG_HID_NTRIG is not set
1058CONFIG_HID_PANTHERLORD=y 1108CONFIG_HID_PANTHERLORD=y
1059# CONFIG_PANTHERLORD_FF is not set 1109# CONFIG_PANTHERLORD_FF is not set
1060CONFIG_HID_PETALYNX=y 1110CONFIG_HID_PETALYNX=y
1061CONFIG_HID_SAMSUNG=y 1111CONFIG_HID_SAMSUNG=y
1062CONFIG_HID_SONY=y 1112CONFIG_HID_SONY=y
1063CONFIG_HID_SUNPLUS=y 1113CONFIG_HID_SUNPLUS=y
1064CONFIG_THRUSTMASTER_FF=m 1114# CONFIG_HID_GREENASIA is not set
1065CONFIG_ZEROPLUS_FF=m 1115# CONFIG_HID_SMARTJOYPLUS is not set
1116# CONFIG_HID_TOPSEED is not set
1117# CONFIG_HID_THRUSTMASTER is not set
1118# CONFIG_HID_ZEROPLUS is not set
1066CONFIG_USB_SUPPORT=y 1119CONFIG_USB_SUPPORT=y
1067CONFIG_USB_ARCH_HAS_HCD=y 1120CONFIG_USB_ARCH_HAS_HCD=y
1068# CONFIG_USB_ARCH_HAS_OHCI is not set 1121# CONFIG_USB_ARCH_HAS_OHCI is not set
@@ -1088,6 +1141,7 @@ CONFIG_USB_MON=y
1088# USB Host Controller Drivers 1141# USB Host Controller Drivers
1089# 1142#
1090# CONFIG_USB_C67X00_HCD is not set 1143# CONFIG_USB_C67X00_HCD is not set
1144# CONFIG_USB_OXU210HP_HCD is not set
1091# CONFIG_USB_ISP116X_HCD is not set 1145# CONFIG_USB_ISP116X_HCD is not set
1092# CONFIG_USB_ISP1760_HCD is not set 1146# CONFIG_USB_ISP1760_HCD is not set
1093# CONFIG_USB_ISP1362_HCD is not set 1147# CONFIG_USB_ISP1362_HCD is not set
@@ -1118,18 +1172,17 @@ CONFIG_USB_INVENTRA_DMA=y
1118# CONFIG_USB_TMC is not set 1172# CONFIG_USB_TMC is not set
1119 1173
1120# 1174#
1121# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; 1175# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
1122# 1176#
1123 1177
1124# 1178#
1125# see USB_STORAGE Help for more information 1179# also be needed; see USB_STORAGE Help for more info
1126# 1180#
1127CONFIG_USB_STORAGE=y 1181CONFIG_USB_STORAGE=y
1128# CONFIG_USB_STORAGE_DEBUG is not set 1182# CONFIG_USB_STORAGE_DEBUG is not set
1129# CONFIG_USB_STORAGE_DATAFAB is not set 1183# CONFIG_USB_STORAGE_DATAFAB is not set
1130# CONFIG_USB_STORAGE_FREECOM is not set 1184# CONFIG_USB_STORAGE_FREECOM is not set
1131# CONFIG_USB_STORAGE_ISD200 is not set 1185# CONFIG_USB_STORAGE_ISD200 is not set
1132# CONFIG_USB_STORAGE_DPCM is not set
1133# CONFIG_USB_STORAGE_USBAT is not set 1186# CONFIG_USB_STORAGE_USBAT is not set
1134# CONFIG_USB_STORAGE_SDDR09 is not set 1187# CONFIG_USB_STORAGE_SDDR09 is not set
1135# CONFIG_USB_STORAGE_SDDR55 is not set 1188# CONFIG_USB_STORAGE_SDDR55 is not set
@@ -1165,7 +1218,6 @@ CONFIG_USB_STORAGE=y
1165# CONFIG_USB_LED is not set 1218# CONFIG_USB_LED is not set
1166# CONFIG_USB_CYPRESS_CY7C63 is not set 1219# CONFIG_USB_CYPRESS_CY7C63 is not set
1167# CONFIG_USB_CYTHERM is not set 1220# CONFIG_USB_CYTHERM is not set
1168# CONFIG_USB_PHIDGET is not set
1169# CONFIG_USB_IDMOUSE is not set 1221# CONFIG_USB_IDMOUSE is not set
1170# CONFIG_USB_FTDI_ELAN is not set 1222# CONFIG_USB_FTDI_ELAN is not set
1171# CONFIG_USB_APPLEDISPLAY is not set 1223# CONFIG_USB_APPLEDISPLAY is not set
@@ -1177,6 +1229,13 @@ CONFIG_USB_STORAGE=y
1177# CONFIG_USB_ISIGHTFW is not set 1229# CONFIG_USB_ISIGHTFW is not set
1178# CONFIG_USB_VST is not set 1230# CONFIG_USB_VST is not set
1179# CONFIG_USB_GADGET is not set 1231# CONFIG_USB_GADGET is not set
1232
1233#
1234# OTG and related infrastructure
1235#
1236CONFIG_USB_OTG_UTILS=y
1237# CONFIG_USB_GPIO_VBUS is not set
1238CONFIG_NOP_USB_XCEIV=y
1180# CONFIG_MMC is not set 1239# CONFIG_MMC is not set
1181# CONFIG_MEMSTICK is not set 1240# CONFIG_MEMSTICK is not set
1182# CONFIG_NEW_LEDS is not set 1241# CONFIG_NEW_LEDS is not set
@@ -1212,6 +1271,7 @@ CONFIG_RTC_INTF_DEV=y
1212# CONFIG_RTC_DRV_S35390A is not set 1271# CONFIG_RTC_DRV_S35390A is not set
1213# CONFIG_RTC_DRV_FM3130 is not set 1272# CONFIG_RTC_DRV_FM3130 is not set
1214# CONFIG_RTC_DRV_RX8581 is not set 1273# CONFIG_RTC_DRV_RX8581 is not set
1274# CONFIG_RTC_DRV_RX8025 is not set
1215 1275
1216# 1276#
1217# SPI RTC drivers 1277# SPI RTC drivers
@@ -1223,6 +1283,7 @@ CONFIG_RTC_INTF_DEV=y
1223# CONFIG_RTC_DRV_R9701 is not set 1283# CONFIG_RTC_DRV_R9701 is not set
1224# CONFIG_RTC_DRV_RS5C348 is not set 1284# CONFIG_RTC_DRV_RS5C348 is not set
1225# CONFIG_RTC_DRV_DS3234 is not set 1285# CONFIG_RTC_DRV_DS3234 is not set
1286# CONFIG_RTC_DRV_PCF2123 is not set
1226 1287
1227# 1288#
1228# Platform RTC drivers 1289# Platform RTC drivers
@@ -1243,10 +1304,21 @@ CONFIG_RTC_INTF_DEV=y
1243# 1304#
1244CONFIG_RTC_DRV_BFIN=y 1305CONFIG_RTC_DRV_BFIN=y
1245# CONFIG_DMADEVICES is not set 1306# CONFIG_DMADEVICES is not set
1307# CONFIG_AUXDISPLAY is not set
1246# CONFIG_UIO is not set 1308# CONFIG_UIO is not set
1309
1310#
1311# TI VLYNQ
1312#
1247# CONFIG_STAGING is not set 1313# CONFIG_STAGING is not set
1248 1314
1249# 1315#
1316# Firmware Drivers
1317#
1318# CONFIG_FIRMWARE_MEMMAP is not set
1319# CONFIG_SIGMA is not set
1320
1321#
1250# File systems 1322# File systems
1251# 1323#
1252CONFIG_EXT2_FS=m 1324CONFIG_EXT2_FS=m
@@ -1256,9 +1328,13 @@ CONFIG_EXT2_FS=m
1256# CONFIG_REISERFS_FS is not set 1328# CONFIG_REISERFS_FS is not set
1257# CONFIG_JFS_FS is not set 1329# CONFIG_JFS_FS is not set
1258# CONFIG_FS_POSIX_ACL is not set 1330# CONFIG_FS_POSIX_ACL is not set
1259CONFIG_FILE_LOCKING=y
1260# CONFIG_XFS_FS is not set 1331# CONFIG_XFS_FS is not set
1332# CONFIG_GFS2_FS is not set
1261# CONFIG_OCFS2_FS is not set 1333# CONFIG_OCFS2_FS is not set
1334# CONFIG_BTRFS_FS is not set
1335# CONFIG_NILFS2_FS is not set
1336CONFIG_FILE_LOCKING=y
1337CONFIG_FSNOTIFY=y
1262# CONFIG_DNOTIFY is not set 1338# CONFIG_DNOTIFY is not set
1263CONFIG_INOTIFY=y 1339CONFIG_INOTIFY=y
1264CONFIG_INOTIFY_USER=y 1340CONFIG_INOTIFY_USER=y
@@ -1268,6 +1344,11 @@ CONFIG_INOTIFY_USER=y
1268# CONFIG_FUSE_FS is not set 1344# CONFIG_FUSE_FS is not set
1269 1345
1270# 1346#
1347# Caches
1348#
1349# CONFIG_FSCACHE is not set
1350
1351#
1271# CD-ROM/DVD Filesystems 1352# CD-ROM/DVD Filesystems
1272# 1353#
1273CONFIG_ISO9660_FS=m 1354CONFIG_ISO9660_FS=m
@@ -1291,13 +1372,9 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1291CONFIG_PROC_FS=y 1372CONFIG_PROC_FS=y
1292CONFIG_PROC_SYSCTL=y 1373CONFIG_PROC_SYSCTL=y
1293CONFIG_SYSFS=y 1374CONFIG_SYSFS=y
1294# CONFIG_TMPFS is not set
1295# CONFIG_HUGETLB_PAGE is not set 1375# CONFIG_HUGETLB_PAGE is not set
1296# CONFIG_CONFIGFS_FS is not set 1376# CONFIG_CONFIGFS_FS is not set
1297 1377CONFIG_MISC_FILESYSTEMS=y
1298#
1299# Miscellaneous filesystems
1300#
1301# CONFIG_ADFS_FS is not set 1378# CONFIG_ADFS_FS is not set
1302# CONFIG_AFFS_FS is not set 1379# CONFIG_AFFS_FS is not set
1303# CONFIG_HFS_FS is not set 1380# CONFIG_HFS_FS is not set
@@ -1316,17 +1393,8 @@ CONFIG_JFFS2_ZLIB=y
1316# CONFIG_JFFS2_LZO is not set 1393# CONFIG_JFFS2_LZO is not set
1317CONFIG_JFFS2_RTIME=y 1394CONFIG_JFFS2_RTIME=y
1318# CONFIG_JFFS2_RUBIN is not set 1395# CONFIG_JFFS2_RUBIN is not set
1319CONFIG_YAFFS_FS=m
1320CONFIG_YAFFS_YAFFS1=y
1321# CONFIG_YAFFS_9BYTE_TAGS is not set
1322# CONFIG_YAFFS_DOES_ECC is not set
1323CONFIG_YAFFS_YAFFS2=y
1324CONFIG_YAFFS_AUTO_YAFFS2=y
1325# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
1326# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
1327# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
1328CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
1329# CONFIG_CRAMFS is not set 1396# CONFIG_CRAMFS is not set
1397# CONFIG_SQUASHFS is not set
1330# CONFIG_VXFS_FS is not set 1398# CONFIG_VXFS_FS is not set
1331# CONFIG_MINIX_FS is not set 1399# CONFIG_MINIX_FS is not set
1332# CONFIG_OMFS_FS is not set 1400# CONFIG_OMFS_FS is not set
@@ -1345,7 +1413,6 @@ CONFIG_LOCKD=m
1345CONFIG_LOCKD_V4=y 1413CONFIG_LOCKD_V4=y
1346CONFIG_NFS_COMMON=y 1414CONFIG_NFS_COMMON=y
1347CONFIG_SUNRPC=m 1415CONFIG_SUNRPC=m
1348# CONFIG_SUNRPC_REGISTER_V4 is not set
1349# CONFIG_RPCSEC_GSS_KRB5 is not set 1416# CONFIG_RPCSEC_GSS_KRB5 is not set
1350# CONFIG_RPCSEC_GSS_SPKM3 is not set 1417# CONFIG_RPCSEC_GSS_SPKM3 is not set
1351CONFIG_SMB_FS=m 1418CONFIG_SMB_FS=m
@@ -1360,7 +1427,7 @@ CONFIG_SMB_FS=m
1360# 1427#
1361# CONFIG_PARTITION_ADVANCED is not set 1428# CONFIG_PARTITION_ADVANCED is not set
1362CONFIG_MSDOS_PARTITION=y 1429CONFIG_MSDOS_PARTITION=y
1363CONFIG_NLS=m 1430CONFIG_NLS=y
1364CONFIG_NLS_DEFAULT="iso8859-1" 1431CONFIG_NLS_DEFAULT="iso8859-1"
1365CONFIG_NLS_CODEPAGE_437=m 1432CONFIG_NLS_CODEPAGE_437=m
1366# CONFIG_NLS_CODEPAGE_737 is not set 1433# CONFIG_NLS_CODEPAGE_737 is not set
@@ -1410,14 +1477,19 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
1410CONFIG_ENABLE_MUST_CHECK=y 1477CONFIG_ENABLE_MUST_CHECK=y
1411CONFIG_FRAME_WARN=1024 1478CONFIG_FRAME_WARN=1024
1412# CONFIG_MAGIC_SYSRQ is not set 1479# CONFIG_MAGIC_SYSRQ is not set
1480# CONFIG_STRIP_ASM_SYMS is not set
1413# CONFIG_UNUSED_SYMBOLS is not set 1481# CONFIG_UNUSED_SYMBOLS is not set
1414CONFIG_DEBUG_FS=y 1482CONFIG_DEBUG_FS=y
1415# CONFIG_HEADERS_CHECK is not set 1483# CONFIG_HEADERS_CHECK is not set
1484CONFIG_DEBUG_SECTION_MISMATCH=y
1416CONFIG_DEBUG_KERNEL=y 1485CONFIG_DEBUG_KERNEL=y
1417CONFIG_DEBUG_SHIRQ=y 1486CONFIG_DEBUG_SHIRQ=y
1418CONFIG_DETECT_SOFTLOCKUP=y 1487CONFIG_DETECT_SOFTLOCKUP=y
1419# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set 1488# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
1420CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 1489CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
1490CONFIG_DETECT_HUNG_TASK=y
1491# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
1492CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
1421CONFIG_SCHED_DEBUG=y 1493CONFIG_SCHED_DEBUG=y
1422# CONFIG_SCHEDSTATS is not set 1494# CONFIG_SCHEDSTATS is not set
1423# CONFIG_TIMER_STATS is not set 1495# CONFIG_TIMER_STATS is not set
@@ -1425,31 +1497,39 @@ CONFIG_SCHED_DEBUG=y
1425# CONFIG_DEBUG_SLAB is not set 1497# CONFIG_DEBUG_SLAB is not set
1426# CONFIG_DEBUG_SPINLOCK is not set 1498# CONFIG_DEBUG_SPINLOCK is not set
1427# CONFIG_DEBUG_MUTEXES is not set 1499# CONFIG_DEBUG_MUTEXES is not set
1500# CONFIG_DEBUG_LOCK_ALLOC is not set
1501# CONFIG_PROVE_LOCKING is not set
1502# CONFIG_LOCK_STAT is not set
1428# CONFIG_DEBUG_SPINLOCK_SLEEP is not set 1503# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1429# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set 1504# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1430# CONFIG_DEBUG_KOBJECT is not set 1505# CONFIG_DEBUG_KOBJECT is not set
1431CONFIG_DEBUG_BUGVERBOSE=y 1506CONFIG_DEBUG_BUGVERBOSE=y
1432CONFIG_DEBUG_INFO=y 1507CONFIG_DEBUG_INFO=y
1433# CONFIG_DEBUG_VM is not set 1508# CONFIG_DEBUG_VM is not set
1509# CONFIG_DEBUG_NOMMU_REGIONS is not set
1434# CONFIG_DEBUG_WRITECOUNT is not set 1510# CONFIG_DEBUG_WRITECOUNT is not set
1435# CONFIG_DEBUG_MEMORY_INIT is not set 1511# CONFIG_DEBUG_MEMORY_INIT is not set
1436# CONFIG_DEBUG_LIST is not set 1512# CONFIG_DEBUG_LIST is not set
1437# CONFIG_DEBUG_SG is not set 1513# CONFIG_DEBUG_SG is not set
1514# CONFIG_DEBUG_NOTIFIERS is not set
1515# CONFIG_DEBUG_CREDENTIALS is not set
1438# CONFIG_FRAME_POINTER is not set 1516# CONFIG_FRAME_POINTER is not set
1439# CONFIG_BOOT_PRINTK_DELAY is not set 1517# CONFIG_BOOT_PRINTK_DELAY is not set
1440# CONFIG_RCU_TORTURE_TEST is not set 1518# CONFIG_RCU_TORTURE_TEST is not set
1441# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1519# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1442# CONFIG_BACKTRACE_SELF_TEST is not set 1520# CONFIG_BACKTRACE_SELF_TEST is not set
1443# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set 1521# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1522# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
1444# CONFIG_FAULT_INJECTION is not set 1523# CONFIG_FAULT_INJECTION is not set
1445 1524# CONFIG_PAGE_POISONING is not set
1446# 1525CONFIG_HAVE_FUNCTION_TRACER=y
1447# Tracers 1526CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
1448# 1527CONFIG_TRACING_SUPPORT=y
1449# CONFIG_SCHED_TRACER is not set 1528# CONFIG_FTRACE is not set
1450# CONFIG_CONTEXT_SWITCH_TRACER is not set 1529# CONFIG_BRANCH_PROFILE_NONE is not set
1451# CONFIG_BOOT_TRACER is not set 1530# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
1452# CONFIG_DYNAMIC_PRINTK_DEBUG is not set 1531# CONFIG_PROFILE_ALL_BRANCHES is not set
1532# CONFIG_DYNAMIC_DEBUG is not set
1453# CONFIG_SAMPLES is not set 1533# CONFIG_SAMPLES is not set
1454CONFIG_HAVE_ARCH_KGDB=y 1534CONFIG_HAVE_ARCH_KGDB=y
1455# CONFIG_KGDB is not set 1535# CONFIG_KGDB is not set
@@ -1474,6 +1554,7 @@ CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y
1474CONFIG_EARLY_PRINTK=y 1554CONFIG_EARLY_PRINTK=y
1475CONFIG_CPLB_INFO=y 1555CONFIG_CPLB_INFO=y
1476CONFIG_ACCESS_CHECK=y 1556CONFIG_ACCESS_CHECK=y
1557# CONFIG_BFIN_ISRAM_SELF_TEST is not set
1477 1558
1478# 1559#
1479# Security options 1560# Security options
@@ -1482,15 +1563,15 @@ CONFIG_ACCESS_CHECK=y
1482CONFIG_SECURITY=y 1563CONFIG_SECURITY=y
1483# CONFIG_SECURITYFS is not set 1564# CONFIG_SECURITYFS is not set
1484# CONFIG_SECURITY_NETWORK is not set 1565# CONFIG_SECURITY_NETWORK is not set
1566# CONFIG_SECURITY_PATH is not set
1485# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1567# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1486# CONFIG_SECURITY_ROOTPLUG is not set 1568# CONFIG_SECURITY_ROOTPLUG is not set
1487CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0 1569# CONFIG_SECURITY_TOMOYO is not set
1488CONFIG_CRYPTO=y 1570CONFIG_CRYPTO=y
1489 1571
1490# 1572#
1491# Crypto core or helper 1573# Crypto core or helper
1492# 1574#
1493# CONFIG_CRYPTO_FIPS is not set
1494# CONFIG_CRYPTO_MANAGER is not set 1575# CONFIG_CRYPTO_MANAGER is not set
1495# CONFIG_CRYPTO_MANAGER2 is not set 1576# CONFIG_CRYPTO_MANAGER2 is not set
1496# CONFIG_CRYPTO_GF128MUL is not set 1577# CONFIG_CRYPTO_GF128MUL is not set
@@ -1522,11 +1603,13 @@ CONFIG_CRYPTO=y
1522# 1603#
1523# CONFIG_CRYPTO_HMAC is not set 1604# CONFIG_CRYPTO_HMAC is not set
1524# CONFIG_CRYPTO_XCBC is not set 1605# CONFIG_CRYPTO_XCBC is not set
1606# CONFIG_CRYPTO_VMAC is not set
1525 1607
1526# 1608#
1527# Digest 1609# Digest
1528# 1610#
1529# CONFIG_CRYPTO_CRC32C is not set 1611# CONFIG_CRYPTO_CRC32C is not set
1612# CONFIG_CRYPTO_GHASH is not set
1530# CONFIG_CRYPTO_MD4 is not set 1613# CONFIG_CRYPTO_MD4 is not set
1531# CONFIG_CRYPTO_MD5 is not set 1614# CONFIG_CRYPTO_MD5 is not set
1532# CONFIG_CRYPTO_MICHAEL_MIC is not set 1615# CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1563,6 +1646,7 @@ CONFIG_CRYPTO=y
1563# Compression 1646# Compression
1564# 1647#
1565# CONFIG_CRYPTO_DEFLATE is not set 1648# CONFIG_CRYPTO_DEFLATE is not set
1649# CONFIG_CRYPTO_ZLIB is not set
1566# CONFIG_CRYPTO_LZO is not set 1650# CONFIG_CRYPTO_LZO is not set
1567 1651
1568# 1652#
@@ -1570,11 +1654,13 @@ CONFIG_CRYPTO=y
1570# 1654#
1571# CONFIG_CRYPTO_ANSI_CPRNG is not set 1655# CONFIG_CRYPTO_ANSI_CPRNG is not set
1572CONFIG_CRYPTO_HW=y 1656CONFIG_CRYPTO_HW=y
1657# CONFIG_BINARY_PRINTF is not set
1573 1658
1574# 1659#
1575# Library routines 1660# Library routines
1576# 1661#
1577CONFIG_BITREVERSE=y 1662CONFIG_BITREVERSE=y
1663CONFIG_GENERIC_FIND_LAST_BIT=y
1578CONFIG_CRC_CCITT=m 1664CONFIG_CRC_CCITT=m
1579# CONFIG_CRC16 is not set 1665# CONFIG_CRC16 is not set
1580# CONFIG_CRC_T10DIF is not set 1666# CONFIG_CRC_T10DIF is not set
@@ -1584,6 +1670,8 @@ CONFIG_CRC32=y
1584# CONFIG_LIBCRC32C is not set 1670# CONFIG_LIBCRC32C is not set
1585CONFIG_ZLIB_INFLATE=y 1671CONFIG_ZLIB_INFLATE=y
1586CONFIG_ZLIB_DEFLATE=m 1672CONFIG_ZLIB_DEFLATE=m
1673CONFIG_DECOMPRESS_GZIP=y
1587CONFIG_HAS_IOMEM=y 1674CONFIG_HAS_IOMEM=y
1588CONFIG_HAS_IOPORT=y 1675CONFIG_HAS_IOPORT=y
1589CONFIG_HAS_DMA=y 1676CONFIG_HAS_DMA=y
1677CONFIG_NLATTR=y
diff --git a/arch/blackfin/configs/BF527-EZKIT-V2_defconfig b/arch/blackfin/configs/BF527-EZKIT-V2_defconfig
new file mode 100644
index 000000000000..d2dfcb0e7ce4
--- /dev/null
+++ b/arch/blackfin/configs/BF527-EZKIT-V2_defconfig
@@ -0,0 +1,1811 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.32.2
4#
5# CONFIG_MMU is not set
6# CONFIG_FPU is not set
7CONFIG_RWSEM_GENERIC_SPINLOCK=y
8# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
9CONFIG_BLACKFIN=y
10CONFIG_GENERIC_CSUM=y
11CONFIG_GENERIC_BUG=y
12CONFIG_ZONE_DMA=y
13CONFIG_GENERIC_FIND_NEXT_BIT=y
14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_IRQ_PROBE=y
16CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
17CONFIG_GENERIC_GPIO=y
18CONFIG_FORCE_MAX_ZONEORDER=14
19CONFIG_GENERIC_CALIBRATE_DELAY=y
20CONFIG_LOCKDEP_SUPPORT=y
21CONFIG_STACKTRACE_SUPPORT=y
22CONFIG_TRACE_IRQFLAGS_SUPPORT=y
23CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
24CONFIG_CONSTRUCTORS=y
25
26#
27# General setup
28#
29CONFIG_EXPERIMENTAL=y
30CONFIG_BROKEN_ON_SMP=y
31CONFIG_INIT_ENV_ARG_LIMIT=32
32CONFIG_LOCALVERSION=""
33CONFIG_LOCALVERSION_AUTO=y
34CONFIG_HAVE_KERNEL_GZIP=y
35CONFIG_HAVE_KERNEL_BZIP2=y
36CONFIG_HAVE_KERNEL_LZMA=y
37CONFIG_KERNEL_GZIP=y
38# CONFIG_KERNEL_BZIP2 is not set
39# CONFIG_KERNEL_LZMA is not set
40CONFIG_SYSVIPC=y
41CONFIG_SYSVIPC_SYSCTL=y
42# CONFIG_POSIX_MQUEUE is not set
43# CONFIG_BSD_PROCESS_ACCT is not set
44# CONFIG_TASKSTATS is not set
45# CONFIG_AUDIT is not set
46
47#
48# RCU Subsystem
49#
50CONFIG_TREE_RCU=y
51# CONFIG_TREE_PREEMPT_RCU is not set
52# CONFIG_RCU_TRACE is not set
53CONFIG_RCU_FANOUT=32
54# CONFIG_RCU_FANOUT_EXACT is not set
55# CONFIG_TREE_RCU_TRACE is not set
56CONFIG_IKCONFIG=y
57CONFIG_IKCONFIG_PROC=y
58CONFIG_LOG_BUF_SHIFT=14
59# CONFIG_GROUP_SCHED is not set
60# CONFIG_CGROUPS is not set
61# CONFIG_SYSFS_DEPRECATED_V2 is not set
62# CONFIG_RELAY is not set
63# CONFIG_NAMESPACES is not set
64CONFIG_BLK_DEV_INITRD=y
65CONFIG_INITRAMFS_SOURCE=""
66CONFIG_RD_GZIP=y
67# CONFIG_RD_BZIP2 is not set
68# CONFIG_RD_LZMA is not set
69# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
70CONFIG_SYSCTL=y
71CONFIG_ANON_INODES=y
72CONFIG_EMBEDDED=y
73CONFIG_UID16=y
74# CONFIG_SYSCTL_SYSCALL is not set
75CONFIG_KALLSYMS=y
76# CONFIG_KALLSYMS_ALL is not set
77# CONFIG_KALLSYMS_EXTRA_PASS is not set
78CONFIG_HOTPLUG=y
79CONFIG_PRINTK=y
80CONFIG_BUG=y
81# CONFIG_ELF_CORE is not set
82CONFIG_BASE_FULL=y
83# CONFIG_FUTEX is not set
84CONFIG_EPOLL=y
85# CONFIG_SIGNALFD is not set
86# CONFIG_TIMERFD is not set
87# CONFIG_EVENTFD is not set
88# CONFIG_AIO is not set
89
90#
91# Kernel Performance Events And Counters
92#
93CONFIG_VM_EVENT_COUNTERS=y
94CONFIG_COMPAT_BRK=y
95CONFIG_SLAB=y
96# CONFIG_SLUB is not set
97# CONFIG_SLOB is not set
98CONFIG_MMAP_ALLOW_UNINITIALIZED=y
99# CONFIG_PROFILING is not set
100CONFIG_HAVE_OPROFILE=y
101
102#
103# GCOV-based kernel profiling
104#
105# CONFIG_GCOV_KERNEL is not set
106# CONFIG_SLOW_WORK is not set
107# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
108CONFIG_SLABINFO=y
109CONFIG_BASE_SMALL=0
110CONFIG_MODULES=y
111# CONFIG_MODULE_FORCE_LOAD is not set
112CONFIG_MODULE_UNLOAD=y
113# CONFIG_MODULE_FORCE_UNLOAD is not set
114# CONFIG_MODVERSIONS is not set
115# CONFIG_MODULE_SRCVERSION_ALL is not set
116CONFIG_BLOCK=y
117# CONFIG_LBDAF is not set
118# CONFIG_BLK_DEV_BSG is not set
119# CONFIG_BLK_DEV_INTEGRITY is not set
120
121#
122# IO Schedulers
123#
124CONFIG_IOSCHED_NOOP=y
125CONFIG_IOSCHED_AS=y
126# CONFIG_IOSCHED_DEADLINE is not set
127CONFIG_IOSCHED_CFQ=y
128CONFIG_DEFAULT_AS=y
129# CONFIG_DEFAULT_DEADLINE is not set
130# CONFIG_DEFAULT_CFQ is not set
131# CONFIG_DEFAULT_NOOP is not set
132CONFIG_DEFAULT_IOSCHED="anticipatory"
133# CONFIG_PREEMPT_NONE is not set
134CONFIG_PREEMPT_VOLUNTARY=y
135# CONFIG_PREEMPT is not set
136# CONFIG_FREEZER is not set
137
138#
139# Blackfin Processor Options
140#
141
142#
143# Processor and Board Settings
144#
145# CONFIG_BF512 is not set
146# CONFIG_BF514 is not set
147# CONFIG_BF516 is not set
148# CONFIG_BF518 is not set
149# CONFIG_BF522 is not set
150# CONFIG_BF523 is not set
151# CONFIG_BF524 is not set
152# CONFIG_BF525 is not set
153# CONFIG_BF526 is not set
154CONFIG_BF527=y
155# CONFIG_BF531 is not set
156# CONFIG_BF532 is not set
157# CONFIG_BF533 is not set
158# CONFIG_BF534 is not set
159# CONFIG_BF536 is not set
160# CONFIG_BF537 is not set
161# CONFIG_BF538 is not set
162# CONFIG_BF539 is not set
163# CONFIG_BF542_std is not set
164# CONFIG_BF542M is not set
165# CONFIG_BF544_std is not set
166# CONFIG_BF544M is not set
167# CONFIG_BF547_std is not set
168# CONFIG_BF547M is not set
169# CONFIG_BF548_std is not set
170# CONFIG_BF548M is not set
171# CONFIG_BF549_std is not set
172# CONFIG_BF549M is not set
173# CONFIG_BF561 is not set
174CONFIG_BF_REV_MIN=0
175CONFIG_BF_REV_MAX=2
176# CONFIG_BF_REV_0_0 is not set
177# CONFIG_BF_REV_0_1 is not set
178CONFIG_BF_REV_0_2=y
179# CONFIG_BF_REV_0_3 is not set
180# CONFIG_BF_REV_0_4 is not set
181# CONFIG_BF_REV_0_5 is not set
182# CONFIG_BF_REV_0_6 is not set
183# CONFIG_BF_REV_ANY is not set
184# CONFIG_BF_REV_NONE is not set
185CONFIG_MEM_MT48LC32M16A2TG_75=y
186CONFIG_IRQ_PLL_WAKEUP=7
187CONFIG_IRQ_DMA0_ERROR=7
188CONFIG_IRQ_DMAR0_BLK=7
189CONFIG_IRQ_DMAR1_BLK=7
190CONFIG_IRQ_DMAR0_OVR=7
191CONFIG_IRQ_DMAR1_OVR=7
192CONFIG_IRQ_PPI_ERROR=7
193CONFIG_IRQ_MAC_ERROR=7
194CONFIG_IRQ_SPORT0_ERROR=7
195CONFIG_IRQ_SPORT1_ERROR=7
196CONFIG_IRQ_UART0_ERROR=7
197CONFIG_IRQ_UART1_ERROR=7
198CONFIG_IRQ_RTC=8
199CONFIG_IRQ_PPI=8
200CONFIG_IRQ_SPORT0_RX=9
201CONFIG_IRQ_SPORT0_TX=9
202CONFIG_IRQ_SPORT1_RX=9
203CONFIG_IRQ_SPORT1_TX=9
204CONFIG_IRQ_TWI=10
205CONFIG_IRQ_UART0_RX=10
206CONFIG_IRQ_UART0_TX=10
207CONFIG_IRQ_UART1_RX=10
208CONFIG_IRQ_UART1_TX=10
209CONFIG_IRQ_OPTSEC=11
210CONFIG_IRQ_CNT=11
211CONFIG_IRQ_MAC_RX=11
212CONFIG_IRQ_PORTH_INTA=11
213CONFIG_IRQ_MAC_TX=11
214CONFIG_IRQ_PORTH_INTB=11
215CONFIG_IRQ_TIMER0=8
216CONFIG_IRQ_TIMER1=12
217CONFIG_IRQ_TIMER2=12
218CONFIG_IRQ_TIMER3=12
219CONFIG_IRQ_TIMER4=12
220CONFIG_IRQ_TIMER5=12
221CONFIG_IRQ_TIMER6=12
222CONFIG_IRQ_TIMER7=12
223CONFIG_IRQ_PORTG_INTA=12
224CONFIG_IRQ_PORTG_INTB=12
225CONFIG_IRQ_MEM_DMA0=13
226CONFIG_IRQ_MEM_DMA1=13
227CONFIG_IRQ_WATCH=13
228CONFIG_IRQ_PORTF_INTA=13
229CONFIG_IRQ_PORTF_INTB=13
230CONFIG_BF52x=y
231# CONFIG_BFIN527_EZKIT is not set
232CONFIG_BFIN527_EZKIT_V2=y
233# CONFIG_BFIN527_BLUETECHNIX_CM is not set
234# CONFIG_BFIN526_EZBRD is not set
235
236#
237# BF527 Specific Configuration
238#
239
240#
241# Alternative Multiplexing Scheme
242#
243# CONFIG_BF527_SPORT0_PORTF is not set
244CONFIG_BF527_SPORT0_PORTG=y
245CONFIG_BF527_SPORT0_TSCLK_PG10=y
246# CONFIG_BF527_SPORT0_TSCLK_PG14 is not set
247CONFIG_BF527_UART1_PORTF=y
248# CONFIG_BF527_UART1_PORTG is not set
249# CONFIG_BF527_NAND_D_PORTF is not set
250CONFIG_BF527_NAND_D_PORTH=y
251
252#
253# Interrupt Priority Assignment
254#
255
256#
257# Priority
258#
259CONFIG_IRQ_SPI=10
260CONFIG_IRQ_SPI_ERROR=7
261CONFIG_IRQ_NFC_ERROR=7
262CONFIG_IRQ_HDMA_ERROR=7
263CONFIG_IRQ_HDMA=7
264CONFIG_IRQ_USB_EINT=10
265CONFIG_IRQ_USB_INT0=11
266CONFIG_IRQ_USB_INT1=11
267CONFIG_IRQ_USB_INT2=11
268CONFIG_IRQ_USB_DMA=11
269
270#
271# Board customizations
272#
273# CONFIG_CMDLINE_BOOL is not set
274CONFIG_BOOT_LOAD=0x1000
275
276#
277# Clock/PLL Setup
278#
279CONFIG_CLKIN_HZ=25000000
280# CONFIG_BFIN_KERNEL_CLOCK is not set
281CONFIG_MAX_VCO_HZ=600000000
282CONFIG_MIN_VCO_HZ=50000000
283CONFIG_MAX_SCLK_HZ=133333333
284CONFIG_MIN_SCLK_HZ=27000000
285
286#
287# Kernel Timer/Scheduler
288#
289# CONFIG_HZ_100 is not set
290CONFIG_HZ_250=y
291# CONFIG_HZ_300 is not set
292# CONFIG_HZ_1000 is not set
293CONFIG_HZ=250
294# CONFIG_SCHED_HRTICK is not set
295CONFIG_GENERIC_TIME=y
296CONFIG_GENERIC_CLOCKEVENTS=y
297# CONFIG_TICKSOURCE_GPTMR0 is not set
298CONFIG_TICKSOURCE_CORETMR=y
299# CONFIG_CYCLES_CLOCKSOURCE is not set
300# CONFIG_GPTMR0_CLOCKSOURCE is not set
301# CONFIG_NO_HZ is not set
302# CONFIG_HIGH_RES_TIMERS is not set
303CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
304
305#
306# Misc
307#
308CONFIG_BFIN_SCRATCH_REG_RETN=y
309# CONFIG_BFIN_SCRATCH_REG_RETE is not set
310# CONFIG_BFIN_SCRATCH_REG_CYCLES is not set
311
312#
313# Blackfin Kernel Optimizations
314#
315
316#
317# Memory Optimizations
318#
319CONFIG_I_ENTRY_L1=y
320CONFIG_EXCPT_IRQ_SYSC_L1=y
321CONFIG_DO_IRQ_L1=y
322CONFIG_CORE_TIMER_IRQ_L1=y
323CONFIG_IDLE_L1=y
324# CONFIG_SCHEDULE_L1 is not set
325CONFIG_ARITHMETIC_OPS_L1=y
326CONFIG_ACCESS_OK_L1=y
327# CONFIG_MEMSET_L1 is not set
328# CONFIG_MEMCPY_L1 is not set
329# CONFIG_SYS_BFIN_SPINLOCK_L1 is not set
330# CONFIG_IP_CHECKSUM_L1 is not set
331CONFIG_CACHELINE_ALIGNED_L1=y
332# CONFIG_SYSCALL_TAB_L1 is not set
333# CONFIG_CPLB_SWITCH_TAB_L1 is not set
334CONFIG_APP_STACK_L1=y
335
336#
337# Speed Optimizations
338#
339CONFIG_BFIN_INS_LOWOVERHEAD=y
340CONFIG_RAMKERNEL=y
341# CONFIG_ROMKERNEL is not set
342CONFIG_SELECT_MEMORY_MODEL=y
343CONFIG_FLATMEM_MANUAL=y
344# CONFIG_DISCONTIGMEM_MANUAL is not set
345# CONFIG_SPARSEMEM_MANUAL is not set
346CONFIG_FLATMEM=y
347CONFIG_FLAT_NODE_MEM_MAP=y
348CONFIG_PAGEFLAGS_EXTENDED=y
349CONFIG_SPLIT_PTLOCK_CPUS=4
350# CONFIG_PHYS_ADDR_T_64BIT is not set
351CONFIG_ZONE_DMA_FLAG=1
352CONFIG_VIRT_TO_BUS=y
353CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0
354CONFIG_BFIN_GPTIMERS=y
355# CONFIG_DMA_UNCACHED_4M is not set
356# CONFIG_DMA_UNCACHED_2M is not set
357CONFIG_DMA_UNCACHED_1M=y
358# CONFIG_DMA_UNCACHED_512K is not set
359# CONFIG_DMA_UNCACHED_256K is not set
360# CONFIG_DMA_UNCACHED_128K is not set
361# CONFIG_DMA_UNCACHED_NONE is not set
362
363#
364# Cache Support
365#
366CONFIG_BFIN_ICACHE=y
367CONFIG_BFIN_EXTMEM_ICACHEABLE=y
368CONFIG_BFIN_DCACHE=y
369# CONFIG_BFIN_DCACHE_BANKA is not set
370CONFIG_BFIN_EXTMEM_DCACHEABLE=y
371CONFIG_BFIN_EXTMEM_WRITEBACK=y
372# CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set
373
374#
375# Memory Protection Unit
376#
377# CONFIG_MPU is not set
378
379#
380# Asynchronous Memory Configuration
381#
382
383#
384# EBIU_AMGCTL Global Control
385#
386CONFIG_C_AMCKEN=y
387CONFIG_C_CDPRIO=y
388# CONFIG_C_AMBEN is not set
389# CONFIG_C_AMBEN_B0 is not set
390# CONFIG_C_AMBEN_B0_B1 is not set
391# CONFIG_C_AMBEN_B0_B1_B2 is not set
392CONFIG_C_AMBEN_ALL=y
393
394#
395# EBIU_AMBCTL Control
396#
397CONFIG_BANK_0=0x7BB0
398CONFIG_BANK_1=0x7BB0
399CONFIG_BANK_2=0x7BB0
400CONFIG_BANK_3=0x99B2
401
402#
403# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
404#
405# CONFIG_ARCH_SUPPORTS_MSI is not set
406# CONFIG_PCCARD is not set
407
408#
409# Executable file formats
410#
411CONFIG_BINFMT_ELF_FDPIC=y
412CONFIG_BINFMT_FLAT=y
413CONFIG_BINFMT_ZFLAT=y
414# CONFIG_BINFMT_SHARED_FLAT is not set
415# CONFIG_HAVE_AOUT is not set
416# CONFIG_BINFMT_MISC is not set
417
418#
419# Power management options
420#
421# CONFIG_PM is not set
422CONFIG_ARCH_SUSPEND_POSSIBLE=y
423
424#
425# CPU Frequency scaling
426#
427# CONFIG_CPU_FREQ is not set
428CONFIG_NET=y
429
430#
431# Networking options
432#
433CONFIG_PACKET=y
434# CONFIG_PACKET_MMAP is not set
435CONFIG_UNIX=y
436# CONFIG_NET_KEY is not set
437CONFIG_INET=y
438# CONFIG_IP_MULTICAST is not set
439# CONFIG_IP_ADVANCED_ROUTER is not set
440CONFIG_IP_FIB_HASH=y
441CONFIG_IP_PNP=y
442# CONFIG_IP_PNP_DHCP is not set
443# CONFIG_IP_PNP_BOOTP is not set
444# CONFIG_IP_PNP_RARP is not set
445# CONFIG_NET_IPIP is not set
446# CONFIG_NET_IPGRE is not set
447# CONFIG_ARPD is not set
448# CONFIG_SYN_COOKIES is not set
449# CONFIG_INET_AH is not set
450# CONFIG_INET_ESP is not set
451# CONFIG_INET_IPCOMP is not set
452# CONFIG_INET_XFRM_TUNNEL is not set
453# CONFIG_INET_TUNNEL is not set
454# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
455# CONFIG_INET_XFRM_MODE_TUNNEL is not set
456# CONFIG_INET_XFRM_MODE_BEET is not set
457# CONFIG_INET_LRO is not set
458# CONFIG_INET_DIAG is not set
459# CONFIG_TCP_CONG_ADVANCED is not set
460CONFIG_TCP_CONG_CUBIC=y
461CONFIG_DEFAULT_TCP_CONG="cubic"
462# CONFIG_TCP_MD5SIG is not set
463# CONFIG_IPV6 is not set
464# CONFIG_NETLABEL is not set
465# CONFIG_NETWORK_SECMARK is not set
466# CONFIG_NETFILTER is not set
467# CONFIG_IP_DCCP is not set
468# CONFIG_IP_SCTP is not set
469# CONFIG_RDS is not set
470# CONFIG_TIPC is not set
471# CONFIG_ATM is not set
472# CONFIG_BRIDGE is not set
473# CONFIG_NET_DSA is not set
474# CONFIG_VLAN_8021Q is not set
475# CONFIG_DECNET is not set
476# CONFIG_LLC2 is not set
477# CONFIG_IPX is not set
478# CONFIG_ATALK is not set
479# CONFIG_X25 is not set
480# CONFIG_LAPB is not set
481# CONFIG_ECONET is not set
482# CONFIG_WAN_ROUTER is not set
483# CONFIG_PHONET is not set
484# CONFIG_IEEE802154 is not set
485# CONFIG_NET_SCHED is not set
486# CONFIG_DCB is not set
487
488#
489# Network testing
490#
491# CONFIG_NET_PKTGEN is not set
492# CONFIG_HAMRADIO is not set
493# CONFIG_CAN is not set
494CONFIG_IRDA=m
495
496#
497# IrDA protocols
498#
499CONFIG_IRLAN=m
500CONFIG_IRCOMM=m
501# CONFIG_IRDA_ULTRA is not set
502
503#
504# IrDA options
505#
506# CONFIG_IRDA_CACHE_LAST_LSAP is not set
507# CONFIG_IRDA_FAST_RR is not set
508# CONFIG_IRDA_DEBUG is not set
509
510#
511# Infrared-port device drivers
512#
513
514#
515# SIR device drivers
516#
517CONFIG_IRTTY_SIR=m
518CONFIG_BFIN_SIR=m
519CONFIG_BFIN_SIR0=y
520CONFIG_SIR_BFIN_DMA=y
521# CONFIG_SIR_BFIN_PIO is not set
522
523#
524# Dongle support
525#
526# CONFIG_DONGLE is not set
527# CONFIG_KINGSUN_DONGLE is not set
528# CONFIG_KSDAZZLE_DONGLE is not set
529# CONFIG_KS959_DONGLE is not set
530
531#
532# FIR device drivers
533#
534# CONFIG_USB_IRDA is not set
535# CONFIG_SIGMATEL_FIR is not set
536# CONFIG_MCS_FIR is not set
537# CONFIG_BT is not set
538# CONFIG_AF_RXRPC is not set
539# CONFIG_WIRELESS is not set
540# CONFIG_WIMAX is not set
541# CONFIG_RFKILL is not set
542# CONFIG_NET_9P is not set
543
544#
545# Device Drivers
546#
547
548#
549# Generic Driver Options
550#
551CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
552CONFIG_STANDALONE=y
553CONFIG_PREVENT_FIRMWARE_BUILD=y
554# CONFIG_FW_LOADER is not set
555# CONFIG_DEBUG_DRIVER is not set
556# CONFIG_DEBUG_DEVRES is not set
557# CONFIG_SYS_HYPERVISOR is not set
558# CONFIG_CONNECTOR is not set
559CONFIG_MTD=y
560# CONFIG_MTD_DEBUG is not set
561# CONFIG_MTD_TESTS is not set
562# CONFIG_MTD_CONCAT is not set
563CONFIG_MTD_PARTITIONS=y
564# CONFIG_MTD_REDBOOT_PARTS is not set
565# CONFIG_MTD_CMDLINE_PARTS is not set
566# CONFIG_MTD_AR7_PARTS is not set
567
568#
569# User Modules And Translation Layers
570#
571CONFIG_MTD_CHAR=m
572CONFIG_MTD_BLKDEVS=y
573CONFIG_MTD_BLOCK=y
574# CONFIG_FTL is not set
575# CONFIG_NFTL is not set
576# CONFIG_INFTL is not set
577# CONFIG_RFD_FTL is not set
578# CONFIG_SSFDC is not set
579# CONFIG_MTD_OOPS is not set
580
581#
582# RAM/ROM/Flash chip drivers
583#
584# CONFIG_MTD_CFI is not set
585CONFIG_MTD_JEDECPROBE=m
586CONFIG_MTD_GEN_PROBE=m
587# CONFIG_MTD_CFI_ADV_OPTIONS is not set
588CONFIG_MTD_MAP_BANK_WIDTH_1=y
589CONFIG_MTD_MAP_BANK_WIDTH_2=y
590CONFIG_MTD_MAP_BANK_WIDTH_4=y
591# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
592# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
593# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
594CONFIG_MTD_CFI_I1=y
595CONFIG_MTD_CFI_I2=y
596# CONFIG_MTD_CFI_I4 is not set
597# CONFIG_MTD_CFI_I8 is not set
598# CONFIG_MTD_CFI_INTELEXT is not set
599# CONFIG_MTD_CFI_AMDSTD is not set
600# CONFIG_MTD_CFI_STAA is not set
601CONFIG_MTD_RAM=y
602CONFIG_MTD_ROM=m
603# CONFIG_MTD_ABSENT is not set
604
605#
606# Mapping drivers for chip access
607#
608CONFIG_MTD_COMPLEX_MAPPINGS=y
609# CONFIG_MTD_PHYSMAP is not set
610# CONFIG_MTD_GPIO_ADDR is not set
611# CONFIG_MTD_UCLINUX is not set
612# CONFIG_MTD_PLATRAM is not set
613
614#
615# Self-contained MTD device drivers
616#
617# CONFIG_MTD_DATAFLASH is not set
618CONFIG_MTD_M25P80=y
619CONFIG_M25PXX_USE_FAST_READ=y
620# CONFIG_MTD_SST25L is not set
621# CONFIG_MTD_SLRAM is not set
622# CONFIG_MTD_PHRAM is not set
623# CONFIG_MTD_MTDRAM is not set
624# CONFIG_MTD_BLOCK2MTD is not set
625
626#
627# Disk-On-Chip Device Drivers
628#
629# CONFIG_MTD_DOC2000 is not set
630# CONFIG_MTD_DOC2001 is not set
631# CONFIG_MTD_DOC2001PLUS is not set
632CONFIG_MTD_NAND=m
633# CONFIG_MTD_NAND_VERIFY_WRITE is not set
634# CONFIG_MTD_NAND_ECC_SMC is not set
635# CONFIG_MTD_NAND_MUSEUM_IDS is not set
636CONFIG_MTD_NAND_IDS=m
637# CONFIG_MTD_NAND_BF5XX is not set
638# CONFIG_MTD_NAND_DISKONCHIP is not set
639# CONFIG_MTD_NAND_NANDSIM is not set
640# CONFIG_MTD_NAND_PLATFORM is not set
641# CONFIG_MTD_ALAUDA is not set
642# CONFIG_MTD_ONENAND is not set
643
644#
645# LPDDR flash memory drivers
646#
647# CONFIG_MTD_LPDDR is not set
648
649#
650# UBI - Unsorted block images
651#
652# CONFIG_MTD_UBI is not set
653# CONFIG_PARPORT is not set
654CONFIG_BLK_DEV=y
655# CONFIG_BLK_DEV_COW_COMMON is not set
656# CONFIG_BLK_DEV_LOOP is not set
657# CONFIG_BLK_DEV_NBD is not set
658# CONFIG_BLK_DEV_UB is not set
659CONFIG_BLK_DEV_RAM=y
660CONFIG_BLK_DEV_RAM_COUNT=16
661CONFIG_BLK_DEV_RAM_SIZE=4096
662# CONFIG_BLK_DEV_XIP is not set
663# CONFIG_CDROM_PKTCDVD is not set
664# CONFIG_ATA_OVER_ETH is not set
665# CONFIG_BLK_DEV_HD is not set
666CONFIG_MISC_DEVICES=y
667# CONFIG_AD525X_DPOT is not set
668# CONFIG_ICS932S401 is not set
669# CONFIG_ENCLOSURE_SERVICES is not set
670# CONFIG_ISL29003 is not set
671# CONFIG_C2PORT is not set
672
673#
674# EEPROM support
675#
676# CONFIG_EEPROM_AT24 is not set
677# CONFIG_EEPROM_AT25 is not set
678# CONFIG_EEPROM_LEGACY is not set
679# CONFIG_EEPROM_MAX6875 is not set
680# CONFIG_EEPROM_93CX6 is not set
681CONFIG_HAVE_IDE=y
682# CONFIG_IDE is not set
683
684#
685# SCSI device support
686#
687# CONFIG_RAID_ATTRS is not set
688CONFIG_SCSI=y
689CONFIG_SCSI_DMA=y
690# CONFIG_SCSI_TGT is not set
691# CONFIG_SCSI_NETLINK is not set
692# CONFIG_SCSI_PROC_FS is not set
693
694#
695# SCSI support type (disk, tape, CD-ROM)
696#
697CONFIG_BLK_DEV_SD=y
698# CONFIG_CHR_DEV_ST is not set
699# CONFIG_CHR_DEV_OSST is not set
700CONFIG_BLK_DEV_SR=m
701# CONFIG_BLK_DEV_SR_VENDOR is not set
702# CONFIG_CHR_DEV_SG is not set
703# CONFIG_CHR_DEV_SCH is not set
704# CONFIG_SCSI_MULTI_LUN is not set
705# CONFIG_SCSI_CONSTANTS is not set
706# CONFIG_SCSI_LOGGING is not set
707# CONFIG_SCSI_SCAN_ASYNC is not set
708CONFIG_SCSI_WAIT_SCAN=m
709
710#
711# SCSI Transports
712#
713# CONFIG_SCSI_SPI_ATTRS is not set
714# CONFIG_SCSI_FC_ATTRS is not set
715# CONFIG_SCSI_ISCSI_ATTRS is not set
716# CONFIG_SCSI_SAS_LIBSAS is not set
717# CONFIG_SCSI_SRP_ATTRS is not set
718# CONFIG_SCSI_LOWLEVEL is not set
719# CONFIG_SCSI_DH is not set
720# CONFIG_SCSI_OSD_INITIATOR is not set
721# CONFIG_ATA is not set
722# CONFIG_MD is not set
723CONFIG_NETDEVICES=y
724# CONFIG_DUMMY is not set
725# CONFIG_BONDING is not set
726# CONFIG_MACVLAN is not set
727# CONFIG_EQUALIZER is not set
728# CONFIG_TUN is not set
729# CONFIG_VETH is not set
730CONFIG_PHYLIB=y
731
732#
733# MII PHY device drivers
734#
735# CONFIG_MARVELL_PHY is not set
736# CONFIG_DAVICOM_PHY is not set
737# CONFIG_QSEMI_PHY is not set
738# CONFIG_LXT_PHY is not set
739# CONFIG_CICADA_PHY is not set
740# CONFIG_VITESSE_PHY is not set
741# CONFIG_SMSC_PHY is not set
742# CONFIG_BROADCOM_PHY is not set
743# CONFIG_ICPLUS_PHY is not set
744# CONFIG_REALTEK_PHY is not set
745# CONFIG_NATIONAL_PHY is not set
746# CONFIG_STE10XP is not set
747# CONFIG_LSI_ET1011C_PHY is not set
748# CONFIG_FIXED_PHY is not set
749# CONFIG_MDIO_BITBANG is not set
750CONFIG_NET_ETHERNET=y
751CONFIG_MII=y
752CONFIG_BFIN_MAC=y
753CONFIG_BFIN_MAC_USE_L1=y
754CONFIG_BFIN_TX_DESC_NUM=10
755CONFIG_BFIN_RX_DESC_NUM=20
756CONFIG_BFIN_MAC_RMII=y
757# CONFIG_SMC91X is not set
758# CONFIG_DM9000 is not set
759# CONFIG_ENC28J60 is not set
760# CONFIG_ETHOC is not set
761# CONFIG_SMSC911X is not set
762# CONFIG_DNET is not set
763# CONFIG_ADF702X is not set
764# CONFIG_IBM_NEW_EMAC_ZMII is not set
765# CONFIG_IBM_NEW_EMAC_RGMII is not set
766# CONFIG_IBM_NEW_EMAC_TAH is not set
767# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
768# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
769# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
770# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
771# CONFIG_B44 is not set
772# CONFIG_KS8842 is not set
773# CONFIG_KS8851 is not set
774# CONFIG_KS8851_MLL is not set
775# CONFIG_NETDEV_1000 is not set
776# CONFIG_NETDEV_10000 is not set
777# CONFIG_WLAN is not set
778
779#
780# Enable WiMAX (Networking options) to see the WiMAX drivers
781#
782
783#
784# USB Network Adapters
785#
786# CONFIG_USB_CATC is not set
787# CONFIG_USB_KAWETH is not set
788# CONFIG_USB_PEGASUS is not set
789# CONFIG_USB_RTL8150 is not set
790# CONFIG_USB_USBNET is not set
791# CONFIG_WAN is not set
792# CONFIG_PPP is not set
793# CONFIG_SLIP is not set
794# CONFIG_NETCONSOLE is not set
795# CONFIG_NETPOLL is not set
796# CONFIG_NET_POLL_CONTROLLER is not set
797# CONFIG_ISDN is not set
798# CONFIG_PHONE is not set
799
800#
801# Input device support
802#
803CONFIG_INPUT=y
804CONFIG_INPUT_FF_MEMLESS=m
805# CONFIG_INPUT_POLLDEV is not set
806
807#
808# Userland interfaces
809#
810# CONFIG_INPUT_MOUSEDEV is not set
811# CONFIG_INPUT_JOYDEV is not set
812CONFIG_INPUT_EVDEV=y
813# CONFIG_INPUT_EVBUG is not set
814
815#
816# Input Device Drivers
817#
818CONFIG_INPUT_KEYBOARD=y
819CONFIG_KEYBOARD_ADP5520=y
820# CONFIG_KEYBOARD_ADP5588 is not set
821# CONFIG_KEYBOARD_ATKBD is not set
822# CONFIG_QT2160 is not set
823# CONFIG_KEYBOARD_LKKBD is not set
824# CONFIG_KEYBOARD_GPIO is not set
825# CONFIG_KEYBOARD_MATRIX is not set
826# CONFIG_KEYBOARD_LM8323 is not set
827# CONFIG_KEYBOARD_MAX7359 is not set
828# CONFIG_KEYBOARD_NEWTON is not set
829# CONFIG_KEYBOARD_OPENCORES is not set
830# CONFIG_KEYBOARD_STOWAWAY is not set
831# CONFIG_KEYBOARD_SUNKBD is not set
832# CONFIG_KEYBOARD_XTKBD is not set
833# CONFIG_INPUT_MOUSE is not set
834# CONFIG_INPUT_JOYSTICK is not set
835# CONFIG_INPUT_TABLET is not set
836CONFIG_INPUT_TOUCHSCREEN=y
837# CONFIG_TOUCHSCREEN_ADS7846 is not set
838# CONFIG_TOUCHSCREEN_AD7877 is not set
839CONFIG_TOUCHSCREEN_AD7879_I2C=y
840CONFIG_TOUCHSCREEN_AD7879=y
841# CONFIG_TOUCHSCREEN_EETI is not set
842# CONFIG_TOUCHSCREEN_FUJITSU is not set
843# CONFIG_TOUCHSCREEN_GUNZE is not set
844# CONFIG_TOUCHSCREEN_ELO is not set
845# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
846# CONFIG_TOUCHSCREEN_MCS5000 is not set
847# CONFIG_TOUCHSCREEN_MTOUCH is not set
848# CONFIG_TOUCHSCREEN_INEXIO is not set
849# CONFIG_TOUCHSCREEN_MK712 is not set
850# CONFIG_TOUCHSCREEN_PENMOUNT is not set
851# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
852# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
853# CONFIG_TOUCHSCREEN_WM97XX is not set
854# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
855# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
856# CONFIG_TOUCHSCREEN_TSC2007 is not set
857CONFIG_INPUT_MISC=y
858# CONFIG_INPUT_ATI_REMOTE is not set
859# CONFIG_INPUT_ATI_REMOTE2 is not set
860# CONFIG_INPUT_KEYSPAN_REMOTE is not set
861# CONFIG_INPUT_POWERMATE is not set
862# CONFIG_INPUT_YEALINK is not set
863# CONFIG_INPUT_CM109 is not set
864# CONFIG_INPUT_UINPUT is not set
865# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
866# CONFIG_INPUT_BFIN_ROTARY is not set
867# CONFIG_INPUT_AD714X is not set
868# CONFIG_INPUT_ADXL34X is not set
869# CONFIG_INPUT_PCF8574 is not set
870
871#
872# Hardware I/O ports
873#
874# CONFIG_SERIO is not set
875# CONFIG_GAMEPORT is not set
876
877#
878# Character devices
879#
880CONFIG_BFIN_DMA_INTERFACE=m
881# CONFIG_BFIN_PPI is not set
882# CONFIG_BFIN_PPIFCD is not set
883# CONFIG_BFIN_SIMPLE_TIMER is not set
884# CONFIG_BFIN_SPI_ADC is not set
885CONFIG_BFIN_SPORT=m
886# CONFIG_BFIN_TWI_LCD is not set
887CONFIG_VT=y
888CONFIG_CONSOLE_TRANSLATIONS=y
889CONFIG_VT_CONSOLE=y
890CONFIG_HW_CONSOLE=y
891# CONFIG_VT_HW_CONSOLE_BINDING is not set
892# CONFIG_DEVKMEM is not set
893CONFIG_BFIN_JTAG_COMM=m
894# CONFIG_SERIAL_NONSTANDARD is not set
895
896#
897# Serial drivers
898#
899# CONFIG_SERIAL_8250 is not set
900
901#
902# Non-8250 serial port support
903#
904# CONFIG_SERIAL_MAX3100 is not set
905CONFIG_SERIAL_BFIN=y
906CONFIG_SERIAL_BFIN_CONSOLE=y
907CONFIG_SERIAL_BFIN_DMA=y
908# CONFIG_SERIAL_BFIN_PIO is not set
909# CONFIG_SERIAL_BFIN_UART0 is not set
910CONFIG_SERIAL_BFIN_UART1=y
911# CONFIG_BFIN_UART1_CTSRTS is not set
912CONFIG_SERIAL_CORE=y
913CONFIG_SERIAL_CORE_CONSOLE=y
914# CONFIG_SERIAL_BFIN_SPORT is not set
915CONFIG_UNIX98_PTYS=y
916# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
917# CONFIG_LEGACY_PTYS is not set
918CONFIG_BFIN_OTP=y
919# CONFIG_BFIN_OTP_WRITE_ENABLE is not set
920# CONFIG_IPMI_HANDLER is not set
921# CONFIG_HW_RANDOM is not set
922# CONFIG_R3964 is not set
923# CONFIG_RAW_DRIVER is not set
924# CONFIG_TCG_TPM is not set
925CONFIG_I2C=y
926CONFIG_I2C_BOARDINFO=y
927CONFIG_I2C_COMPAT=y
928CONFIG_I2C_CHARDEV=m
929CONFIG_I2C_HELPER_AUTO=y
930
931#
932# I2C Hardware Bus support
933#
934
935#
936# I2C system bus drivers (mostly embedded / system-on-chip)
937#
938CONFIG_I2C_BLACKFIN_TWI=y
939CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
940# CONFIG_I2C_GPIO is not set
941# CONFIG_I2C_OCORES is not set
942# CONFIG_I2C_SIMTEC is not set
943
944#
945# External I2C/SMBus adapter drivers
946#
947# CONFIG_I2C_PARPORT_LIGHT is not set
948# CONFIG_I2C_TAOS_EVM is not set
949# CONFIG_I2C_TINY_USB is not set
950
951#
952# Other I2C/SMBus bus drivers
953#
954# CONFIG_I2C_PCA_PLATFORM is not set
955# CONFIG_I2C_STUB is not set
956
957#
958# Miscellaneous I2C Chip support
959#
960# CONFIG_DS1682 is not set
961# CONFIG_SENSORS_TSL2550 is not set
962# CONFIG_I2C_DEBUG_CORE is not set
963# CONFIG_I2C_DEBUG_ALGO is not set
964# CONFIG_I2C_DEBUG_BUS is not set
965# CONFIG_I2C_DEBUG_CHIP is not set
966CONFIG_SPI=y
967# CONFIG_SPI_DEBUG is not set
968CONFIG_SPI_MASTER=y
969
970#
971# SPI Master Controller Drivers
972#
973CONFIG_SPI_BFIN=y
974# CONFIG_SPI_BFIN_LOCK is not set
975# CONFIG_SPI_BFIN_SPORT is not set
976# CONFIG_SPI_BITBANG is not set
977# CONFIG_SPI_GPIO is not set
978
979#
980# SPI Protocol Masters
981#
982# CONFIG_SPI_SPIDEV is not set
983# CONFIG_SPI_TLE62X0 is not set
984
985#
986# PPS support
987#
988# CONFIG_PPS is not set
989CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
990CONFIG_GPIOLIB=y
991# CONFIG_DEBUG_GPIO is not set
992CONFIG_GPIO_SYSFS=y
993
994#
995# Memory mapped GPIO expanders:
996#
997
998#
999# I2C GPIO expanders:
1000#
1001# CONFIG_GPIO_MAX732X is not set
1002# CONFIG_GPIO_PCA953X is not set
1003# CONFIG_GPIO_PCF857X is not set
1004# CONFIG_GPIO_ADP5520 is not set
1005# CONFIG_GPIO_ADP5588 is not set
1006
1007#
1008# PCI GPIO expanders:
1009#
1010
1011#
1012# SPI GPIO expanders:
1013#
1014# CONFIG_GPIO_MAX7301 is not set
1015# CONFIG_GPIO_MCP23S08 is not set
1016# CONFIG_GPIO_MC33880 is not set
1017
1018#
1019# AC97 GPIO expanders:
1020#
1021# CONFIG_W1 is not set
1022# CONFIG_POWER_SUPPLY is not set
1023# CONFIG_HWMON is not set
1024# CONFIG_THERMAL is not set
1025CONFIG_WATCHDOG=y
1026# CONFIG_WATCHDOG_NOWAYOUT is not set
1027
1028#
1029# Watchdog Device Drivers
1030#
1031# CONFIG_SOFT_WATCHDOG is not set
1032CONFIG_BFIN_WDT=y
1033
1034#
1035# USB-based Watchdog Cards
1036#
1037# CONFIG_USBPCWATCHDOG is not set
1038CONFIG_SSB_POSSIBLE=y
1039
1040#
1041# Sonics Silicon Backplane
1042#
1043# CONFIG_SSB is not set
1044
1045#
1046# Multifunction device drivers
1047#
1048# CONFIG_MFD_CORE is not set
1049# CONFIG_MFD_SM501 is not set
1050# CONFIG_HTC_PASIC3 is not set
1051# CONFIG_UCB1400_CORE is not set
1052# CONFIG_TPS65010 is not set
1053# CONFIG_TWL4030_CORE is not set
1054# CONFIG_MFD_TMIO is not set
1055# CONFIG_PMIC_DA903X is not set
1056CONFIG_PMIC_ADP5520=y
1057# CONFIG_MFD_WM8400 is not set
1058# CONFIG_MFD_WM831X is not set
1059# CONFIG_MFD_WM8350_I2C is not set
1060# CONFIG_MFD_PCF50633 is not set
1061# CONFIG_MFD_MC13783 is not set
1062# CONFIG_AB3100_CORE is not set
1063# CONFIG_EZX_PCAP is not set
1064# CONFIG_REGULATOR is not set
1065# CONFIG_MEDIA_SUPPORT is not set
1066
1067#
1068# Graphics support
1069#
1070# CONFIG_VGASTATE is not set
1071# CONFIG_VIDEO_OUTPUT_CONTROL is not set
1072CONFIG_FB=y
1073# CONFIG_FIRMWARE_EDID is not set
1074# CONFIG_FB_DDC is not set
1075# CONFIG_FB_BOOT_VESA_SUPPORT is not set
1076CONFIG_FB_CFB_FILLRECT=y
1077CONFIG_FB_CFB_COPYAREA=y
1078CONFIG_FB_CFB_IMAGEBLIT=y
1079# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
1080# CONFIG_FB_SYS_FILLRECT is not set
1081# CONFIG_FB_SYS_COPYAREA is not set
1082# CONFIG_FB_SYS_IMAGEBLIT is not set
1083# CONFIG_FB_FOREIGN_ENDIAN is not set
1084# CONFIG_FB_SYS_FOPS is not set
1085# CONFIG_FB_SVGALIB is not set
1086# CONFIG_FB_MACMODES is not set
1087# CONFIG_FB_BACKLIGHT is not set
1088# CONFIG_FB_MODE_HELPERS is not set
1089# CONFIG_FB_TILEBLITTING is not set
1090
1091#
1092# Frame buffer hardware drivers
1093#
1094# CONFIG_FB_BFIN_T350MCQB is not set
1095CONFIG_FB_BFIN_LQ035Q1=y
1096# CONFIG_FB_BFIN_7393 is not set
1097# CONFIG_FB_S1D13XXX is not set
1098# CONFIG_FB_VIRTUAL is not set
1099# CONFIG_FB_METRONOME is not set
1100# CONFIG_FB_MB862XX is not set
1101# CONFIG_FB_BROADSHEET is not set
1102CONFIG_BACKLIGHT_LCD_SUPPORT=y
1103CONFIG_LCD_CLASS_DEVICE=m
1104# CONFIG_LCD_LMS283GF05 is not set
1105# CONFIG_LCD_LTV350QV is not set
1106# CONFIG_LCD_ILI9320 is not set
1107# CONFIG_LCD_TDO24M is not set
1108# CONFIG_LCD_VGG2432A4 is not set
1109# CONFIG_LCD_PLATFORM is not set
1110CONFIG_BACKLIGHT_CLASS_DEVICE=m
1111CONFIG_BACKLIGHT_GENERIC=m
1112# CONFIG_BACKLIGHT_ADP5520 is not set
1113# CONFIG_BACKLIGHT_ADP8870 is not set
1114
1115#
1116# Display device support
1117#
1118# CONFIG_DISPLAY_SUPPORT is not set
1119
1120#
1121# Console display driver support
1122#
1123CONFIG_DUMMY_CONSOLE=y
1124CONFIG_FRAMEBUFFER_CONSOLE=y
1125# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
1126# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
1127# CONFIG_FONTS is not set
1128CONFIG_FONT_8x8=y
1129CONFIG_FONT_8x16=y
1130CONFIG_LOGO=y
1131# CONFIG_LOGO_LINUX_MONO is not set
1132# CONFIG_LOGO_LINUX_VGA16 is not set
1133# CONFIG_LOGO_LINUX_CLUT224 is not set
1134# CONFIG_LOGO_BLACKFIN_VGA16 is not set
1135CONFIG_LOGO_BLACKFIN_CLUT224=y
1136CONFIG_SOUND=m
1137# CONFIG_SOUND_OSS_CORE is not set
1138CONFIG_SND=m
1139CONFIG_SND_TIMER=m
1140CONFIG_SND_PCM=m
1141CONFIG_SND_JACK=y
1142# CONFIG_SND_SEQUENCER is not set
1143# CONFIG_SND_MIXER_OSS is not set
1144# CONFIG_SND_PCM_OSS is not set
1145# CONFIG_SND_DYNAMIC_MINORS is not set
1146CONFIG_SND_SUPPORT_OLD_API=y
1147CONFIG_SND_VERBOSE_PROCFS=y
1148# CONFIG_SND_VERBOSE_PRINTK is not set
1149# CONFIG_SND_DEBUG is not set
1150# CONFIG_SND_RAWMIDI_SEQ is not set
1151# CONFIG_SND_OPL3_LIB_SEQ is not set
1152# CONFIG_SND_OPL4_LIB_SEQ is not set
1153# CONFIG_SND_SBAWE_SEQ is not set
1154# CONFIG_SND_EMU10K1_SEQ is not set
1155CONFIG_SND_DRIVERS=y
1156# CONFIG_SND_DUMMY is not set
1157# CONFIG_SND_MTPAV is not set
1158# CONFIG_SND_SERIAL_U16550 is not set
1159# CONFIG_SND_MPU401 is not set
1160CONFIG_SND_SPI=y
1161
1162#
1163# ALSA Blackfin devices
1164#
1165# CONFIG_SND_BFIN_AD73322 is not set
1166CONFIG_SND_USB=y
1167# CONFIG_SND_USB_AUDIO is not set
1168# CONFIG_SND_USB_CAIAQ is not set
1169CONFIG_SND_SOC=m
1170CONFIG_SND_SOC_AC97_BUS=y
1171CONFIG_SND_BF5XX_I2S=m
1172CONFIG_SND_BF5XX_SOC_SSM2602=m
1173# CONFIG_SND_BF5XX_SOC_AD73311 is not set
1174# CONFIG_SND_BF5XX_SOC_ADAU1371 is not set
1175# CONFIG_SND_BF5XX_SOC_ADAU1761 is not set
1176# CONFIG_SND_BF5XX_TDM is not set
1177CONFIG_SND_BF5XX_AC97=m
1178CONFIG_SND_BF5XX_MMAP_SUPPORT=y
1179# CONFIG_SND_BF5XX_MULTICHAN_SUPPORT is not set
1180# CONFIG_SND_BF5XX_HAVE_COLD_RESET is not set
1181CONFIG_SND_BF5XX_SOC_AD1980=m
1182CONFIG_SND_BF5XX_SOC_SPORT=m
1183CONFIG_SND_BF5XX_SOC_I2S=m
1184CONFIG_SND_BF5XX_SOC_AC97=m
1185CONFIG_SND_BF5XX_SPORT_NUM=0
1186CONFIG_SND_SOC_I2C_AND_SPI=m
1187# CONFIG_SND_SOC_ALL_CODECS is not set
1188CONFIG_SND_SOC_AD1980=m
1189CONFIG_SND_SOC_SSM2602=m
1190# CONFIG_SOUND_PRIME is not set
1191CONFIG_AC97_BUS=m
1192CONFIG_HID_SUPPORT=y
1193CONFIG_HID=y
1194# CONFIG_HIDRAW is not set
1195
1196#
1197# USB Input Devices
1198#
1199CONFIG_USB_HID=y
1200# CONFIG_HID_PID is not set
1201# CONFIG_USB_HIDDEV is not set
1202
1203#
1204# Special HID drivers
1205#
1206CONFIG_HID_A4TECH=y
1207CONFIG_HID_APPLE=y
1208CONFIG_HID_BELKIN=y
1209CONFIG_HID_CHERRY=y
1210CONFIG_HID_CHICONY=y
1211CONFIG_HID_CYPRESS=y
1212# CONFIG_HID_DRAGONRISE is not set
1213CONFIG_HID_EZKEY=y
1214# CONFIG_HID_KYE is not set
1215CONFIG_HID_GYRATION=y
1216# CONFIG_HID_TWINHAN is not set
1217# CONFIG_HID_KENSINGTON is not set
1218CONFIG_HID_LOGITECH=y
1219# CONFIG_LOGITECH_FF is not set
1220# CONFIG_LOGIRUMBLEPAD2_FF is not set
1221CONFIG_HID_MICROSOFT=y
1222CONFIG_HID_MONTEREY=y
1223# CONFIG_HID_NTRIG is not set
1224CONFIG_HID_PANTHERLORD=y
1225# CONFIG_PANTHERLORD_FF is not set
1226CONFIG_HID_PETALYNX=y
1227CONFIG_HID_SAMSUNG=y
1228CONFIG_HID_SONY=y
1229CONFIG_HID_SUNPLUS=y
1230# CONFIG_HID_GREENASIA is not set
1231# CONFIG_HID_SMARTJOYPLUS is not set
1232# CONFIG_HID_TOPSEED is not set
1233# CONFIG_HID_THRUSTMASTER is not set
1234# CONFIG_HID_ZEROPLUS is not set
1235CONFIG_USB_SUPPORT=y
1236CONFIG_USB_ARCH_HAS_HCD=y
1237# CONFIG_USB_ARCH_HAS_OHCI is not set
1238# CONFIG_USB_ARCH_HAS_EHCI is not set
1239CONFIG_USB=y
1240# CONFIG_USB_DEBUG is not set
1241# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
1242
1243#
1244# Miscellaneous USB options
1245#
1246CONFIG_USB_DEVICEFS=y
1247# CONFIG_USB_DEVICE_CLASS is not set
1248# CONFIG_USB_DYNAMIC_MINORS is not set
1249# CONFIG_USB_OTG is not set
1250# CONFIG_USB_OTG_WHITELIST is not set
1251CONFIG_USB_OTG_BLACKLIST_HUB=y
1252CONFIG_USB_MON=y
1253# CONFIG_USB_WUSB is not set
1254# CONFIG_USB_WUSB_CBAF is not set
1255
1256#
1257# USB Host Controller Drivers
1258#
1259# CONFIG_USB_C67X00_HCD is not set
1260# CONFIG_USB_OXU210HP_HCD is not set
1261# CONFIG_USB_ISP116X_HCD is not set
1262# CONFIG_USB_ISP1760_HCD is not set
1263# CONFIG_USB_ISP1362_HCD is not set
1264# CONFIG_USB_SL811_HCD is not set
1265# CONFIG_USB_R8A66597_HCD is not set
1266# CONFIG_USB_HWA_HCD is not set
1267CONFIG_USB_MUSB_HDRC=y
1268CONFIG_USB_MUSB_SOC=y
1269
1270#
1271# Blackfin high speed USB Support
1272#
1273CONFIG_USB_MUSB_HOST=y
1274# CONFIG_USB_MUSB_PERIPHERAL is not set
1275# CONFIG_USB_MUSB_OTG is not set
1276CONFIG_USB_MUSB_HDRC_HCD=y
1277# CONFIG_MUSB_PIO_ONLY is not set
1278CONFIG_USB_INVENTRA_DMA=y
1279# CONFIG_USB_TI_CPPI_DMA is not set
1280# CONFIG_USB_MUSB_DEBUG is not set
1281
1282#
1283# USB Device Class drivers
1284#
1285# CONFIG_USB_ACM is not set
1286# CONFIG_USB_PRINTER is not set
1287# CONFIG_USB_WDM is not set
1288# CONFIG_USB_TMC is not set
1289
1290#
1291# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
1292#
1293
1294#
1295# also be needed; see USB_STORAGE Help for more info
1296#
1297CONFIG_USB_STORAGE=y
1298# CONFIG_USB_STORAGE_DEBUG is not set
1299# CONFIG_USB_STORAGE_DATAFAB is not set
1300# CONFIG_USB_STORAGE_FREECOM is not set
1301# CONFIG_USB_STORAGE_ISD200 is not set
1302# CONFIG_USB_STORAGE_USBAT is not set
1303# CONFIG_USB_STORAGE_SDDR09 is not set
1304# CONFIG_USB_STORAGE_SDDR55 is not set
1305# CONFIG_USB_STORAGE_JUMPSHOT is not set
1306# CONFIG_USB_STORAGE_ALAUDA is not set
1307# CONFIG_USB_STORAGE_ONETOUCH is not set
1308# CONFIG_USB_STORAGE_KARMA is not set
1309# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
1310# CONFIG_USB_LIBUSUAL is not set
1311
1312#
1313# USB Imaging devices
1314#
1315# CONFIG_USB_MDC800 is not set
1316# CONFIG_USB_MICROTEK is not set
1317
1318#
1319# USB port drivers
1320#
1321# CONFIG_USB_SERIAL is not set
1322
1323#
1324# USB Miscellaneous drivers
1325#
1326# CONFIG_USB_EMI62 is not set
1327# CONFIG_USB_EMI26 is not set
1328# CONFIG_USB_ADUTUX is not set
1329# CONFIG_USB_SEVSEG is not set
1330# CONFIG_USB_RIO500 is not set
1331# CONFIG_USB_LEGOTOWER is not set
1332# CONFIG_USB_LCD is not set
1333# CONFIG_USB_BERRY_CHARGE is not set
1334# CONFIG_USB_LED is not set
1335# CONFIG_USB_CYPRESS_CY7C63 is not set
1336# CONFIG_USB_CYTHERM is not set
1337# CONFIG_USB_IDMOUSE is not set
1338# CONFIG_USB_FTDI_ELAN is not set
1339# CONFIG_USB_APPLEDISPLAY is not set
1340# CONFIG_USB_SISUSBVGA is not set
1341# CONFIG_USB_LD is not set
1342# CONFIG_USB_TRANCEVIBRATOR is not set
1343# CONFIG_USB_IOWARRIOR is not set
1344# CONFIG_USB_TEST is not set
1345# CONFIG_USB_ISIGHTFW is not set
1346# CONFIG_USB_VST is not set
1347# CONFIG_USB_GADGET is not set
1348
1349#
1350# OTG and related infrastructure
1351#
1352CONFIG_USB_OTG_UTILS=y
1353# CONFIG_USB_GPIO_VBUS is not set
1354CONFIG_NOP_USB_XCEIV=y
1355# CONFIG_MMC is not set
1356# CONFIG_MEMSTICK is not set
1357CONFIG_NEW_LEDS=y
1358CONFIG_LEDS_CLASS=y
1359
1360#
1361# LED drivers
1362#
1363# CONFIG_LEDS_PCA9532 is not set
1364# CONFIG_LEDS_GPIO is not set
1365# CONFIG_LEDS_LP3944 is not set
1366# CONFIG_LEDS_PCA955X is not set
1367# CONFIG_LEDS_DAC124S085 is not set
1368# CONFIG_LEDS_BD2802 is not set
1369CONFIG_LEDS_ADP5520=y
1370
1371#
1372# LED Triggers
1373#
1374# CONFIG_LEDS_TRIGGERS is not set
1375# CONFIG_ACCESSIBILITY is not set
1376CONFIG_RTC_LIB=y
1377CONFIG_RTC_CLASS=y
1378CONFIG_RTC_HCTOSYS=y
1379CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
1380# CONFIG_RTC_DEBUG is not set
1381
1382#
1383# RTC interfaces
1384#
1385CONFIG_RTC_INTF_SYSFS=y
1386CONFIG_RTC_INTF_PROC=y
1387CONFIG_RTC_INTF_DEV=y
1388# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1389# CONFIG_RTC_DRV_TEST is not set
1390
1391#
1392# I2C RTC drivers
1393#
1394# CONFIG_RTC_DRV_DS1307 is not set
1395# CONFIG_RTC_DRV_DS1374 is not set
1396# CONFIG_RTC_DRV_DS1672 is not set
1397# CONFIG_RTC_DRV_MAX6900 is not set
1398# CONFIG_RTC_DRV_RS5C372 is not set
1399# CONFIG_RTC_DRV_ISL1208 is not set
1400# CONFIG_RTC_DRV_X1205 is not set
1401# CONFIG_RTC_DRV_PCF8563 is not set
1402# CONFIG_RTC_DRV_PCF8583 is not set
1403# CONFIG_RTC_DRV_M41T80 is not set
1404# CONFIG_RTC_DRV_S35390A is not set
1405# CONFIG_RTC_DRV_FM3130 is not set
1406# CONFIG_RTC_DRV_RX8581 is not set
1407# CONFIG_RTC_DRV_RX8025 is not set
1408
1409#
1410# SPI RTC drivers
1411#
1412# CONFIG_RTC_DRV_M41T94 is not set
1413# CONFIG_RTC_DRV_DS1305 is not set
1414# CONFIG_RTC_DRV_DS1390 is not set
1415# CONFIG_RTC_DRV_MAX6902 is not set
1416# CONFIG_RTC_DRV_R9701 is not set
1417# CONFIG_RTC_DRV_RS5C348 is not set
1418# CONFIG_RTC_DRV_DS3234 is not set
1419# CONFIG_RTC_DRV_PCF2123 is not set
1420
1421#
1422# Platform RTC drivers
1423#
1424# CONFIG_RTC_DRV_DS1286 is not set
1425# CONFIG_RTC_DRV_DS1511 is not set
1426# CONFIG_RTC_DRV_DS1553 is not set
1427# CONFIG_RTC_DRV_DS1742 is not set
1428# CONFIG_RTC_DRV_STK17TA8 is not set
1429# CONFIG_RTC_DRV_M48T86 is not set
1430# CONFIG_RTC_DRV_M48T35 is not set
1431# CONFIG_RTC_DRV_M48T59 is not set
1432# CONFIG_RTC_DRV_BQ4802 is not set
1433# CONFIG_RTC_DRV_V3020 is not set
1434
1435#
1436# on-CPU RTC drivers
1437#
1438CONFIG_RTC_DRV_BFIN=y
1439# CONFIG_DMADEVICES is not set
1440# CONFIG_AUXDISPLAY is not set
1441# CONFIG_UIO is not set
1442
1443#
1444# TI VLYNQ
1445#
1446# CONFIG_STAGING is not set
1447
1448#
1449# Firmware Drivers
1450#
1451# CONFIG_FIRMWARE_MEMMAP is not set
1452# CONFIG_SIGMA is not set
1453
1454#
1455# File systems
1456#
1457CONFIG_EXT2_FS=m
1458# CONFIG_EXT2_FS_XATTR is not set
1459# CONFIG_EXT3_FS is not set
1460# CONFIG_EXT4_FS is not set
1461# CONFIG_REISERFS_FS is not set
1462# CONFIG_JFS_FS is not set
1463# CONFIG_FS_POSIX_ACL is not set
1464# CONFIG_XFS_FS is not set
1465# CONFIG_GFS2_FS is not set
1466# CONFIG_OCFS2_FS is not set
1467# CONFIG_BTRFS_FS is not set
1468# CONFIG_NILFS2_FS is not set
1469CONFIG_FILE_LOCKING=y
1470CONFIG_FSNOTIFY=y
1471# CONFIG_DNOTIFY is not set
1472CONFIG_INOTIFY=y
1473CONFIG_INOTIFY_USER=y
1474# CONFIG_QUOTA is not set
1475# CONFIG_AUTOFS_FS is not set
1476# CONFIG_AUTOFS4_FS is not set
1477# CONFIG_FUSE_FS is not set
1478
1479#
1480# Caches
1481#
1482# CONFIG_FSCACHE is not set
1483
1484#
1485# CD-ROM/DVD Filesystems
1486#
1487CONFIG_ISO9660_FS=m
1488CONFIG_JOLIET=y
1489# CONFIG_ZISOFS is not set
1490CONFIG_UDF_FS=m
1491CONFIG_UDF_NLS=y
1492
1493#
1494# DOS/FAT/NT Filesystems
1495#
1496CONFIG_FAT_FS=m
1497# CONFIG_MSDOS_FS is not set
1498CONFIG_VFAT_FS=m
1499CONFIG_FAT_DEFAULT_CODEPAGE=437
1500CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1501# CONFIG_NTFS_FS is not set
1502
1503#
1504# Pseudo filesystems
1505#
1506CONFIG_PROC_FS=y
1507CONFIG_PROC_SYSCTL=y
1508CONFIG_SYSFS=y
1509# CONFIG_HUGETLB_PAGE is not set
1510# CONFIG_CONFIGFS_FS is not set
1511CONFIG_MISC_FILESYSTEMS=y
1512# CONFIG_ADFS_FS is not set
1513# CONFIG_AFFS_FS is not set
1514# CONFIG_HFS_FS is not set
1515# CONFIG_HFSPLUS_FS is not set
1516# CONFIG_BEFS_FS is not set
1517# CONFIG_BFS_FS is not set
1518# CONFIG_EFS_FS is not set
1519CONFIG_JFFS2_FS=m
1520CONFIG_JFFS2_FS_DEBUG=0
1521CONFIG_JFFS2_FS_WRITEBUFFER=y
1522# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
1523# CONFIG_JFFS2_SUMMARY is not set
1524# CONFIG_JFFS2_FS_XATTR is not set
1525# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
1526CONFIG_JFFS2_ZLIB=y
1527# CONFIG_JFFS2_LZO is not set
1528CONFIG_JFFS2_RTIME=y
1529# CONFIG_JFFS2_RUBIN is not set
1530# CONFIG_CRAMFS is not set
1531# CONFIG_SQUASHFS is not set
1532# CONFIG_VXFS_FS is not set
1533# CONFIG_MINIX_FS is not set
1534# CONFIG_OMFS_FS is not set
1535# CONFIG_HPFS_FS is not set
1536# CONFIG_QNX4FS_FS is not set
1537# CONFIG_ROMFS_FS is not set
1538# CONFIG_SYSV_FS is not set
1539# CONFIG_UFS_FS is not set
1540CONFIG_NETWORK_FILESYSTEMS=y
1541CONFIG_NFS_FS=m
1542CONFIG_NFS_V3=y
1543# CONFIG_NFS_V3_ACL is not set
1544# CONFIG_NFS_V4 is not set
1545# CONFIG_NFSD is not set
1546CONFIG_LOCKD=m
1547CONFIG_LOCKD_V4=y
1548CONFIG_NFS_COMMON=y
1549CONFIG_SUNRPC=m
1550# CONFIG_RPCSEC_GSS_KRB5 is not set
1551# CONFIG_RPCSEC_GSS_SPKM3 is not set
1552CONFIG_SMB_FS=m
1553# CONFIG_SMB_NLS_DEFAULT is not set
1554# CONFIG_CIFS is not set
1555# CONFIG_NCP_FS is not set
1556# CONFIG_CODA_FS is not set
1557# CONFIG_AFS_FS is not set
1558
1559#
1560# Partition Types
1561#
1562# CONFIG_PARTITION_ADVANCED is not set
1563CONFIG_MSDOS_PARTITION=y
1564CONFIG_NLS=y
1565CONFIG_NLS_DEFAULT="iso8859-1"
1566CONFIG_NLS_CODEPAGE_437=m
1567# CONFIG_NLS_CODEPAGE_737 is not set
1568# CONFIG_NLS_CODEPAGE_775 is not set
1569# CONFIG_NLS_CODEPAGE_850 is not set
1570# CONFIG_NLS_CODEPAGE_852 is not set
1571# CONFIG_NLS_CODEPAGE_855 is not set
1572# CONFIG_NLS_CODEPAGE_857 is not set
1573# CONFIG_NLS_CODEPAGE_860 is not set
1574# CONFIG_NLS_CODEPAGE_861 is not set
1575# CONFIG_NLS_CODEPAGE_862 is not set
1576# CONFIG_NLS_CODEPAGE_863 is not set
1577# CONFIG_NLS_CODEPAGE_864 is not set
1578# CONFIG_NLS_CODEPAGE_865 is not set
1579# CONFIG_NLS_CODEPAGE_866 is not set
1580# CONFIG_NLS_CODEPAGE_869 is not set
1581CONFIG_NLS_CODEPAGE_936=m
1582# CONFIG_NLS_CODEPAGE_950 is not set
1583# CONFIG_NLS_CODEPAGE_932 is not set
1584# CONFIG_NLS_CODEPAGE_949 is not set
1585# CONFIG_NLS_CODEPAGE_874 is not set
1586# CONFIG_NLS_ISO8859_8 is not set
1587# CONFIG_NLS_CODEPAGE_1250 is not set
1588# CONFIG_NLS_CODEPAGE_1251 is not set
1589# CONFIG_NLS_ASCII is not set
1590CONFIG_NLS_ISO8859_1=m
1591# CONFIG_NLS_ISO8859_2 is not set
1592# CONFIG_NLS_ISO8859_3 is not set
1593# CONFIG_NLS_ISO8859_4 is not set
1594# CONFIG_NLS_ISO8859_5 is not set
1595# CONFIG_NLS_ISO8859_6 is not set
1596# CONFIG_NLS_ISO8859_7 is not set
1597# CONFIG_NLS_ISO8859_9 is not set
1598# CONFIG_NLS_ISO8859_13 is not set
1599# CONFIG_NLS_ISO8859_14 is not set
1600# CONFIG_NLS_ISO8859_15 is not set
1601# CONFIG_NLS_KOI8_R is not set
1602# CONFIG_NLS_KOI8_U is not set
1603CONFIG_NLS_UTF8=m
1604# CONFIG_DLM is not set
1605
1606#
1607# Kernel hacking
1608#
1609# CONFIG_PRINTK_TIME is not set
1610CONFIG_ENABLE_WARN_DEPRECATED=y
1611CONFIG_ENABLE_MUST_CHECK=y
1612CONFIG_FRAME_WARN=1024
1613# CONFIG_MAGIC_SYSRQ is not set
1614# CONFIG_STRIP_ASM_SYMS is not set
1615# CONFIG_UNUSED_SYMBOLS is not set
1616CONFIG_DEBUG_FS=y
1617# CONFIG_HEADERS_CHECK is not set
1618CONFIG_DEBUG_SECTION_MISMATCH=y
1619CONFIG_DEBUG_KERNEL=y
1620CONFIG_DEBUG_SHIRQ=y
1621CONFIG_DETECT_SOFTLOCKUP=y
1622# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
1623CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
1624CONFIG_DETECT_HUNG_TASK=y
1625# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
1626CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
1627CONFIG_SCHED_DEBUG=y
1628# CONFIG_SCHEDSTATS is not set
1629# CONFIG_TIMER_STATS is not set
1630# CONFIG_DEBUG_OBJECTS is not set
1631# CONFIG_DEBUG_SLAB is not set
1632# CONFIG_DEBUG_SPINLOCK is not set
1633# CONFIG_DEBUG_MUTEXES is not set
1634# CONFIG_DEBUG_LOCK_ALLOC is not set
1635# CONFIG_PROVE_LOCKING is not set
1636# CONFIG_LOCK_STAT is not set
1637# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1638# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1639# CONFIG_DEBUG_KOBJECT is not set
1640CONFIG_DEBUG_BUGVERBOSE=y
1641CONFIG_DEBUG_INFO=y
1642# CONFIG_DEBUG_VM is not set
1643# CONFIG_DEBUG_NOMMU_REGIONS is not set
1644# CONFIG_DEBUG_WRITECOUNT is not set
1645# CONFIG_DEBUG_MEMORY_INIT is not set
1646# CONFIG_DEBUG_LIST is not set
1647# CONFIG_DEBUG_SG is not set
1648# CONFIG_DEBUG_NOTIFIERS is not set
1649# CONFIG_DEBUG_CREDENTIALS is not set
1650# CONFIG_FRAME_POINTER is not set
1651# CONFIG_BOOT_PRINTK_DELAY is not set
1652# CONFIG_RCU_TORTURE_TEST is not set
1653# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1654# CONFIG_BACKTRACE_SELF_TEST is not set
1655# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1656# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
1657# CONFIG_FAULT_INJECTION is not set
1658# CONFIG_PAGE_POISONING is not set
1659CONFIG_HAVE_FUNCTION_TRACER=y
1660CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
1661CONFIG_TRACING_SUPPORT=y
1662# CONFIG_FTRACE is not set
1663# CONFIG_BRANCH_PROFILE_NONE is not set
1664# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
1665# CONFIG_PROFILE_ALL_BRANCHES is not set
1666# CONFIG_DYNAMIC_DEBUG is not set
1667# CONFIG_SAMPLES is not set
1668CONFIG_HAVE_ARCH_KGDB=y
1669# CONFIG_KGDB is not set
1670# CONFIG_DEBUG_STACKOVERFLOW is not set
1671# CONFIG_DEBUG_STACK_USAGE is not set
1672CONFIG_DEBUG_VERBOSE=y
1673CONFIG_DEBUG_MMRS=y
1674CONFIG_DEBUG_HWERR=y
1675CONFIG_EXACT_HWERR=y
1676CONFIG_DEBUG_DOUBLEFAULT=y
1677CONFIG_DEBUG_DOUBLEFAULT_PRINT=y
1678# CONFIG_DEBUG_DOUBLEFAULT_RESET is not set
1679# CONFIG_DEBUG_ICACHE_CHECK is not set
1680CONFIG_DEBUG_HUNT_FOR_ZERO=y
1681CONFIG_DEBUG_BFIN_HWTRACE_ON=y
1682# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF is not set
1683CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y
1684# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set
1685CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=1
1686# CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
1687CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y
1688CONFIG_EARLY_PRINTK=y
1689CONFIG_CPLB_INFO=y
1690CONFIG_ACCESS_CHECK=y
1691# CONFIG_BFIN_ISRAM_SELF_TEST is not set
1692
1693#
1694# Security options
1695#
1696# CONFIG_KEYS is not set
1697CONFIG_SECURITY=y
1698# CONFIG_SECURITYFS is not set
1699# CONFIG_SECURITY_NETWORK is not set
1700# CONFIG_SECURITY_PATH is not set
1701# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1702# CONFIG_SECURITY_ROOTPLUG is not set
1703# CONFIG_SECURITY_TOMOYO is not set
1704CONFIG_CRYPTO=y
1705
1706#
1707# Crypto core or helper
1708#
1709# CONFIG_CRYPTO_MANAGER is not set
1710# CONFIG_CRYPTO_MANAGER2 is not set
1711# CONFIG_CRYPTO_GF128MUL is not set
1712# CONFIG_CRYPTO_NULL is not set
1713# CONFIG_CRYPTO_CRYPTD is not set
1714# CONFIG_CRYPTO_AUTHENC is not set
1715# CONFIG_CRYPTO_TEST is not set
1716
1717#
1718# Authenticated Encryption with Associated Data
1719#
1720# CONFIG_CRYPTO_CCM is not set
1721# CONFIG_CRYPTO_GCM is not set
1722# CONFIG_CRYPTO_SEQIV is not set
1723
1724#
1725# Block modes
1726#
1727# CONFIG_CRYPTO_CBC is not set
1728# CONFIG_CRYPTO_CTR is not set
1729# CONFIG_CRYPTO_CTS is not set
1730# CONFIG_CRYPTO_ECB is not set
1731# CONFIG_CRYPTO_LRW is not set
1732# CONFIG_CRYPTO_PCBC is not set
1733# CONFIG_CRYPTO_XTS is not set
1734
1735#
1736# Hash modes
1737#
1738# CONFIG_CRYPTO_HMAC is not set
1739# CONFIG_CRYPTO_XCBC is not set
1740# CONFIG_CRYPTO_VMAC is not set
1741
1742#
1743# Digest
1744#
1745# CONFIG_CRYPTO_CRC32C is not set
1746# CONFIG_CRYPTO_GHASH is not set
1747# CONFIG_CRYPTO_MD4 is not set
1748# CONFIG_CRYPTO_MD5 is not set
1749# CONFIG_CRYPTO_MICHAEL_MIC is not set
1750# CONFIG_CRYPTO_RMD128 is not set
1751# CONFIG_CRYPTO_RMD160 is not set
1752# CONFIG_CRYPTO_RMD256 is not set
1753# CONFIG_CRYPTO_RMD320 is not set
1754# CONFIG_CRYPTO_SHA1 is not set
1755# CONFIG_CRYPTO_SHA256 is not set
1756# CONFIG_CRYPTO_SHA512 is not set
1757# CONFIG_CRYPTO_TGR192 is not set
1758# CONFIG_CRYPTO_WP512 is not set
1759
1760#
1761# Ciphers
1762#
1763# CONFIG_CRYPTO_AES is not set
1764# CONFIG_CRYPTO_ANUBIS is not set
1765# CONFIG_CRYPTO_ARC4 is not set
1766# CONFIG_CRYPTO_BLOWFISH is not set
1767# CONFIG_CRYPTO_CAMELLIA is not set
1768# CONFIG_CRYPTO_CAST5 is not set
1769# CONFIG_CRYPTO_CAST6 is not set
1770# CONFIG_CRYPTO_DES is not set
1771# CONFIG_CRYPTO_FCRYPT is not set
1772# CONFIG_CRYPTO_KHAZAD is not set
1773# CONFIG_CRYPTO_SALSA20 is not set
1774# CONFIG_CRYPTO_SEED is not set
1775# CONFIG_CRYPTO_SERPENT is not set
1776# CONFIG_CRYPTO_TEA is not set
1777# CONFIG_CRYPTO_TWOFISH is not set
1778
1779#
1780# Compression
1781#
1782# CONFIG_CRYPTO_DEFLATE is not set
1783# CONFIG_CRYPTO_ZLIB is not set
1784# CONFIG_CRYPTO_LZO is not set
1785
1786#
1787# Random Number Generation
1788#
1789# CONFIG_CRYPTO_ANSI_CPRNG is not set
1790CONFIG_CRYPTO_HW=y
1791# CONFIG_BINARY_PRINTF is not set
1792
1793#
1794# Library routines
1795#
1796CONFIG_BITREVERSE=y
1797CONFIG_GENERIC_FIND_LAST_BIT=y
1798CONFIG_CRC_CCITT=m
1799# CONFIG_CRC16 is not set
1800# CONFIG_CRC_T10DIF is not set
1801CONFIG_CRC_ITU_T=m
1802CONFIG_CRC32=y
1803# CONFIG_CRC7 is not set
1804# CONFIG_LIBCRC32C is not set
1805CONFIG_ZLIB_INFLATE=y
1806CONFIG_ZLIB_DEFLATE=m
1807CONFIG_DECOMPRESS_GZIP=y
1808CONFIG_HAS_IOMEM=y
1809CONFIG_HAS_IOPORT=y
1810CONFIG_HAS_DMA=y
1811CONFIG_NLATTR=y
diff --git a/arch/blackfin/configs/BF527-EZKIT_defconfig b/arch/blackfin/configs/BF527-EZKIT_defconfig
index 6d1a623fb149..edbb44d26bbf 100644
--- a/arch/blackfin/configs/BF527-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF527-EZKIT_defconfig
@@ -1,22 +1,27 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.28.10 3# Linux kernel version: 2.6.32.2
4# Thu May 21 05:50:01 2009
5# 4#
6# CONFIG_MMU is not set 5# CONFIG_MMU is not set
7# CONFIG_FPU is not set 6# CONFIG_FPU is not set
8CONFIG_RWSEM_GENERIC_SPINLOCK=y 7CONFIG_RWSEM_GENERIC_SPINLOCK=y
9# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set 8# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
10CONFIG_BLACKFIN=y 9CONFIG_BLACKFIN=y
10CONFIG_GENERIC_CSUM=y
11CONFIG_GENERIC_BUG=y
11CONFIG_ZONE_DMA=y 12CONFIG_ZONE_DMA=y
12CONFIG_GENERIC_FIND_NEXT_BIT=y 13CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_IRQ_PROBE=y 15CONFIG_GENERIC_IRQ_PROBE=y
16CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_GPIO=y 17CONFIG_GENERIC_GPIO=y
17CONFIG_FORCE_MAX_ZONEORDER=14 18CONFIG_FORCE_MAX_ZONEORDER=14
18CONFIG_GENERIC_CALIBRATE_DELAY=y 19CONFIG_GENERIC_CALIBRATE_DELAY=y
20CONFIG_LOCKDEP_SUPPORT=y
21CONFIG_STACKTRACE_SUPPORT=y
22CONFIG_TRACE_IRQFLAGS_SUPPORT=y
19CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 23CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
24CONFIG_CONSTRUCTORS=y
20 25
21# 26#
22# General setup 27# General setup
@@ -26,22 +31,41 @@ CONFIG_BROKEN_ON_SMP=y
26CONFIG_INIT_ENV_ARG_LIMIT=32 31CONFIG_INIT_ENV_ARG_LIMIT=32
27CONFIG_LOCALVERSION="" 32CONFIG_LOCALVERSION=""
28CONFIG_LOCALVERSION_AUTO=y 33CONFIG_LOCALVERSION_AUTO=y
34CONFIG_HAVE_KERNEL_GZIP=y
35CONFIG_HAVE_KERNEL_BZIP2=y
36CONFIG_HAVE_KERNEL_LZMA=y
37CONFIG_KERNEL_GZIP=y
38# CONFIG_KERNEL_BZIP2 is not set
39# CONFIG_KERNEL_LZMA is not set
29CONFIG_SYSVIPC=y 40CONFIG_SYSVIPC=y
30CONFIG_SYSVIPC_SYSCTL=y 41CONFIG_SYSVIPC_SYSCTL=y
31# CONFIG_POSIX_MQUEUE is not set 42# CONFIG_POSIX_MQUEUE is not set
32# CONFIG_BSD_PROCESS_ACCT is not set 43# CONFIG_BSD_PROCESS_ACCT is not set
33# CONFIG_TASKSTATS is not set 44# CONFIG_TASKSTATS is not set
34# CONFIG_AUDIT is not set 45# CONFIG_AUDIT is not set
46
47#
48# RCU Subsystem
49#
50CONFIG_TREE_RCU=y
51# CONFIG_TREE_PREEMPT_RCU is not set
52# CONFIG_RCU_TRACE is not set
53CONFIG_RCU_FANOUT=32
54# CONFIG_RCU_FANOUT_EXACT is not set
55# CONFIG_TREE_RCU_TRACE is not set
35CONFIG_IKCONFIG=y 56CONFIG_IKCONFIG=y
36CONFIG_IKCONFIG_PROC=y 57CONFIG_IKCONFIG_PROC=y
37CONFIG_LOG_BUF_SHIFT=14 58CONFIG_LOG_BUF_SHIFT=14
38# CONFIG_CGROUPS is not set
39# CONFIG_GROUP_SCHED is not set 59# CONFIG_GROUP_SCHED is not set
60# CONFIG_CGROUPS is not set
40# CONFIG_SYSFS_DEPRECATED_V2 is not set 61# CONFIG_SYSFS_DEPRECATED_V2 is not set
41# CONFIG_RELAY is not set 62# CONFIG_RELAY is not set
42# CONFIG_NAMESPACES is not set 63# CONFIG_NAMESPACES is not set
43CONFIG_BLK_DEV_INITRD=y 64CONFIG_BLK_DEV_INITRD=y
44CONFIG_INITRAMFS_SOURCE="" 65CONFIG_INITRAMFS_SOURCE=""
66CONFIG_RD_GZIP=y
67# CONFIG_RD_BZIP2 is not set
68# CONFIG_RD_LZMA is not set
45# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 69# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
46CONFIG_SYSCTL=y 70CONFIG_SYSCTL=y
47CONFIG_ANON_INODES=y 71CONFIG_ANON_INODES=y
@@ -62,6 +86,10 @@ CONFIG_EPOLL=y
62# CONFIG_TIMERFD is not set 86# CONFIG_TIMERFD is not set
63# CONFIG_EVENTFD is not set 87# CONFIG_EVENTFD is not set
64# CONFIG_AIO is not set 88# CONFIG_AIO is not set
89
90#
91# Kernel Performance Events And Counters
92#
65CONFIG_VM_EVENT_COUNTERS=y 93CONFIG_VM_EVENT_COUNTERS=y
66CONFIG_COMPAT_BRK=y 94CONFIG_COMPAT_BRK=y
67CONFIG_SLAB=y 95CONFIG_SLAB=y
@@ -69,11 +97,15 @@ CONFIG_SLAB=y
69# CONFIG_SLOB is not set 97# CONFIG_SLOB is not set
70CONFIG_MMAP_ALLOW_UNINITIALIZED=y 98CONFIG_MMAP_ALLOW_UNINITIALIZED=y
71# CONFIG_PROFILING is not set 99# CONFIG_PROFILING is not set
72# CONFIG_MARKERS is not set
73CONFIG_HAVE_OPROFILE=y 100CONFIG_HAVE_OPROFILE=y
101
102#
103# GCOV-based kernel profiling
104#
105# CONFIG_GCOV_KERNEL is not set
106# CONFIG_SLOW_WORK is not set
74# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set 107# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
75CONFIG_SLABINFO=y 108CONFIG_SLABINFO=y
76CONFIG_TINY_SHMEM=y
77CONFIG_BASE_SMALL=0 109CONFIG_BASE_SMALL=0
78CONFIG_MODULES=y 110CONFIG_MODULES=y
79# CONFIG_MODULE_FORCE_LOAD is not set 111# CONFIG_MODULE_FORCE_LOAD is not set
@@ -81,11 +113,8 @@ CONFIG_MODULE_UNLOAD=y
81# CONFIG_MODULE_FORCE_UNLOAD is not set 113# CONFIG_MODULE_FORCE_UNLOAD is not set
82# CONFIG_MODVERSIONS is not set 114# CONFIG_MODVERSIONS is not set
83# CONFIG_MODULE_SRCVERSION_ALL is not set 115# CONFIG_MODULE_SRCVERSION_ALL is not set
84CONFIG_KMOD=y
85CONFIG_BLOCK=y 116CONFIG_BLOCK=y
86# CONFIG_LBD is not set 117# CONFIG_LBDAF is not set
87# CONFIG_BLK_DEV_IO_TRACE is not set
88# CONFIG_LSF is not set
89# CONFIG_BLK_DEV_BSG is not set 118# CONFIG_BLK_DEV_BSG is not set
90# CONFIG_BLK_DEV_INTEGRITY is not set 119# CONFIG_BLK_DEV_INTEGRITY is not set
91 120
@@ -101,7 +130,6 @@ CONFIG_DEFAULT_AS=y
101# CONFIG_DEFAULT_CFQ is not set 130# CONFIG_DEFAULT_CFQ is not set
102# CONFIG_DEFAULT_NOOP is not set 131# CONFIG_DEFAULT_NOOP is not set
103CONFIG_DEFAULT_IOSCHED="anticipatory" 132CONFIG_DEFAULT_IOSCHED="anticipatory"
104CONFIG_CLASSIC_RCU=y
105# CONFIG_PREEMPT_NONE is not set 133# CONFIG_PREEMPT_NONE is not set
106CONFIG_PREEMPT_VOLUNTARY=y 134CONFIG_PREEMPT_VOLUNTARY=y
107# CONFIG_PREEMPT is not set 135# CONFIG_PREEMPT is not set
@@ -132,29 +160,28 @@ CONFIG_BF527=y
132# CONFIG_BF537 is not set 160# CONFIG_BF537 is not set
133# CONFIG_BF538 is not set 161# CONFIG_BF538 is not set
134# CONFIG_BF539 is not set 162# CONFIG_BF539 is not set
135# CONFIG_BF542 is not set 163# CONFIG_BF542_std is not set
136# CONFIG_BF542M is not set 164# CONFIG_BF542M is not set
137# CONFIG_BF544 is not set 165# CONFIG_BF544_std is not set
138# CONFIG_BF544M is not set 166# CONFIG_BF544M is not set
139# CONFIG_BF547 is not set 167# CONFIG_BF547_std is not set
140# CONFIG_BF547M is not set 168# CONFIG_BF547M is not set
141# CONFIG_BF548 is not set 169# CONFIG_BF548_std is not set
142# CONFIG_BF548M is not set 170# CONFIG_BF548M is not set
143# CONFIG_BF549 is not set 171# CONFIG_BF549_std is not set
144# CONFIG_BF549M is not set 172# CONFIG_BF549M is not set
145# CONFIG_BF561 is not set 173# CONFIG_BF561 is not set
146CONFIG_BF_REV_MIN=0 174CONFIG_BF_REV_MIN=0
147CONFIG_BF_REV_MAX=2 175CONFIG_BF_REV_MAX=2
148# CONFIG_BF_REV_0_0 is not set 176# CONFIG_BF_REV_0_0 is not set
149# CONFIG_BF_REV_0_1 is not set 177CONFIG_BF_REV_0_1=y
150CONFIG_BF_REV_0_2=y 178# CONFIG_BF_REV_0_2 is not set
151# CONFIG_BF_REV_0_3 is not set 179# CONFIG_BF_REV_0_3 is not set
152# CONFIG_BF_REV_0_4 is not set 180# CONFIG_BF_REV_0_4 is not set
153# CONFIG_BF_REV_0_5 is not set 181# CONFIG_BF_REV_0_5 is not set
154# CONFIG_BF_REV_0_6 is not set 182# CONFIG_BF_REV_0_6 is not set
155# CONFIG_BF_REV_ANY is not set 183# CONFIG_BF_REV_ANY is not set
156# CONFIG_BF_REV_NONE is not set 184# CONFIG_BF_REV_NONE is not set
157CONFIG_BF52x=y
158CONFIG_MEM_MT48LC32M16A2TG_75=y 185CONFIG_MEM_MT48LC32M16A2TG_75=y
159CONFIG_IRQ_PLL_WAKEUP=7 186CONFIG_IRQ_PLL_WAKEUP=7
160CONFIG_IRQ_DMA0_ERROR=7 187CONFIG_IRQ_DMA0_ERROR=7
@@ -200,7 +227,9 @@ CONFIG_IRQ_MEM_DMA1=13
200CONFIG_IRQ_WATCH=13 227CONFIG_IRQ_WATCH=13
201CONFIG_IRQ_PORTF_INTA=13 228CONFIG_IRQ_PORTF_INTA=13
202CONFIG_IRQ_PORTF_INTB=13 229CONFIG_IRQ_PORTF_INTB=13
230CONFIG_BF52x=y
203CONFIG_BFIN527_EZKIT=y 231CONFIG_BFIN527_EZKIT=y
232# CONFIG_BFIN527_EZKIT_V2 is not set
204# CONFIG_BFIN527_BLUETECHNIX_CM is not set 233# CONFIG_BFIN527_BLUETECHNIX_CM is not set
205# CONFIG_BFIN526_EZBRD is not set 234# CONFIG_BFIN526_EZBRD is not set
206 235
@@ -318,7 +347,6 @@ CONFIG_FLATMEM=y
318CONFIG_FLAT_NODE_MEM_MAP=y 347CONFIG_FLAT_NODE_MEM_MAP=y
319CONFIG_PAGEFLAGS_EXTENDED=y 348CONFIG_PAGEFLAGS_EXTENDED=y
320CONFIG_SPLIT_PTLOCK_CPUS=4 349CONFIG_SPLIT_PTLOCK_CPUS=4
321# CONFIG_RESOURCES_64BIT is not set
322# CONFIG_PHYS_ADDR_T_64BIT is not set 350# CONFIG_PHYS_ADDR_T_64BIT is not set
323CONFIG_ZONE_DMA_FLAG=1 351CONFIG_ZONE_DMA_FLAG=1
324CONFIG_VIRT_TO_BUS=y 352CONFIG_VIRT_TO_BUS=y
@@ -327,16 +355,18 @@ CONFIG_BFIN_GPTIMERS=y
327# CONFIG_DMA_UNCACHED_4M is not set 355# CONFIG_DMA_UNCACHED_4M is not set
328# CONFIG_DMA_UNCACHED_2M is not set 356# CONFIG_DMA_UNCACHED_2M is not set
329CONFIG_DMA_UNCACHED_1M=y 357CONFIG_DMA_UNCACHED_1M=y
358# CONFIG_DMA_UNCACHED_512K is not set
359# CONFIG_DMA_UNCACHED_256K is not set
360# CONFIG_DMA_UNCACHED_128K is not set
330# CONFIG_DMA_UNCACHED_NONE is not set 361# CONFIG_DMA_UNCACHED_NONE is not set
331 362
332# 363#
333# Cache Support 364# Cache Support
334# 365#
335CONFIG_BFIN_ICACHE=y 366CONFIG_BFIN_ICACHE=y
336# CONFIG_BFIN_ICACHE_LOCK is not set 367CONFIG_BFIN_EXTMEM_ICACHEABLE=y
337CONFIG_BFIN_DCACHE=y 368CONFIG_BFIN_DCACHE=y
338# CONFIG_BFIN_DCACHE_BANKA is not set 369# CONFIG_BFIN_DCACHE_BANKA is not set
339CONFIG_BFIN_EXTMEM_ICACHEABLE=y
340CONFIG_BFIN_EXTMEM_DCACHEABLE=y 370CONFIG_BFIN_EXTMEM_DCACHEABLE=y
341CONFIG_BFIN_EXTMEM_WRITEBACK=y 371CONFIG_BFIN_EXTMEM_WRITEBACK=y
342# CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set 372# CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set
@@ -347,7 +377,7 @@ CONFIG_BFIN_EXTMEM_WRITEBACK=y
347# CONFIG_MPU is not set 377# CONFIG_MPU is not set
348 378
349# 379#
350# Asynchonous Memory Configuration 380# Asynchronous Memory Configuration
351# 381#
352 382
353# 383#
@@ -403,11 +433,6 @@ CONFIG_NET=y
403CONFIG_PACKET=y 433CONFIG_PACKET=y
404# CONFIG_PACKET_MMAP is not set 434# CONFIG_PACKET_MMAP is not set
405CONFIG_UNIX=y 435CONFIG_UNIX=y
406CONFIG_XFRM=y
407# CONFIG_XFRM_USER is not set
408# CONFIG_XFRM_SUB_POLICY is not set
409# CONFIG_XFRM_MIGRATE is not set
410# CONFIG_XFRM_STATISTICS is not set
411# CONFIG_NET_KEY is not set 436# CONFIG_NET_KEY is not set
412CONFIG_INET=y 437CONFIG_INET=y
413# CONFIG_IP_MULTICAST is not set 438# CONFIG_IP_MULTICAST is not set
@@ -431,7 +456,6 @@ CONFIG_IP_PNP=y
431# CONFIG_INET_XFRM_MODE_BEET is not set 456# CONFIG_INET_XFRM_MODE_BEET is not set
432# CONFIG_INET_LRO is not set 457# CONFIG_INET_LRO is not set
433# CONFIG_INET_DIAG is not set 458# CONFIG_INET_DIAG is not set
434CONFIG_INET_TCP_DIAG=y
435# CONFIG_TCP_CONG_ADVANCED is not set 459# CONFIG_TCP_CONG_ADVANCED is not set
436CONFIG_TCP_CONG_CUBIC=y 460CONFIG_TCP_CONG_CUBIC=y
437CONFIG_DEFAULT_TCP_CONG="cubic" 461CONFIG_DEFAULT_TCP_CONG="cubic"
@@ -442,6 +466,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
442# CONFIG_NETFILTER is not set 466# CONFIG_NETFILTER is not set
443# CONFIG_IP_DCCP is not set 467# CONFIG_IP_DCCP is not set
444# CONFIG_IP_SCTP is not set 468# CONFIG_IP_SCTP is not set
469# CONFIG_RDS is not set
445# CONFIG_TIPC is not set 470# CONFIG_TIPC is not set
446# CONFIG_ATM is not set 471# CONFIG_ATM is not set
447# CONFIG_BRIDGE is not set 472# CONFIG_BRIDGE is not set
@@ -455,7 +480,10 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
455# CONFIG_LAPB is not set 480# CONFIG_LAPB is not set
456# CONFIG_ECONET is not set 481# CONFIG_ECONET is not set
457# CONFIG_WAN_ROUTER is not set 482# CONFIG_WAN_ROUTER is not set
483# CONFIG_PHONET is not set
484# CONFIG_IEEE802154 is not set
458# CONFIG_NET_SCHED is not set 485# CONFIG_NET_SCHED is not set
486# CONFIG_DCB is not set
459 487
460# 488#
461# Network testing 489# Network testing
@@ -508,13 +536,8 @@ CONFIG_SIR_BFIN_DMA=y
508# CONFIG_MCS_FIR is not set 536# CONFIG_MCS_FIR is not set
509# CONFIG_BT is not set 537# CONFIG_BT is not set
510# CONFIG_AF_RXRPC is not set 538# CONFIG_AF_RXRPC is not set
511# CONFIG_PHONET is not set 539# CONFIG_WIRELESS is not set
512CONFIG_WIRELESS=y 540# CONFIG_WIMAX is not set
513# CONFIG_CFG80211 is not set
514CONFIG_WIRELESS_OLD_REGULATORY=y
515# CONFIG_WIRELESS_EXT is not set
516# CONFIG_MAC80211 is not set
517# CONFIG_IEEE80211 is not set
518# CONFIG_RFKILL is not set 541# CONFIG_RFKILL is not set
519# CONFIG_NET_9P is not set 542# CONFIG_NET_9P is not set
520 543
@@ -535,6 +558,7 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
535# CONFIG_CONNECTOR is not set 558# CONFIG_CONNECTOR is not set
536CONFIG_MTD=y 559CONFIG_MTD=y
537# CONFIG_MTD_DEBUG is not set 560# CONFIG_MTD_DEBUG is not set
561# CONFIG_MTD_TESTS is not set
538# CONFIG_MTD_CONCAT is not set 562# CONFIG_MTD_CONCAT is not set
539CONFIG_MTD_PARTITIONS=y 563CONFIG_MTD_PARTITIONS=y
540# CONFIG_MTD_REDBOOT_PARTS is not set 564# CONFIG_MTD_REDBOOT_PARTS is not set
@@ -593,6 +617,7 @@ CONFIG_MTD_COMPLEX_MAPPINGS=y
593# CONFIG_MTD_DATAFLASH is not set 617# CONFIG_MTD_DATAFLASH is not set
594CONFIG_MTD_M25P80=y 618CONFIG_MTD_M25P80=y
595CONFIG_M25PXX_USE_FAST_READ=y 619CONFIG_M25PXX_USE_FAST_READ=y
620# CONFIG_MTD_SST25L is not set
596# CONFIG_MTD_SLRAM is not set 621# CONFIG_MTD_SLRAM is not set
597# CONFIG_MTD_PHRAM is not set 622# CONFIG_MTD_PHRAM is not set
598# CONFIG_MTD_MTDRAM is not set 623# CONFIG_MTD_MTDRAM is not set
@@ -608,11 +633,6 @@ CONFIG_MTD_NAND=m
608# CONFIG_MTD_NAND_VERIFY_WRITE is not set 633# CONFIG_MTD_NAND_VERIFY_WRITE is not set
609# CONFIG_MTD_NAND_ECC_SMC is not set 634# CONFIG_MTD_NAND_ECC_SMC is not set
610# CONFIG_MTD_NAND_MUSEUM_IDS is not set 635# CONFIG_MTD_NAND_MUSEUM_IDS is not set
611CONFIG_MTD_NAND_BFIN=m
612CONFIG_BFIN_NAND_BASE=0x20212000
613CONFIG_BFIN_NAND_CLE=2
614CONFIG_BFIN_NAND_ALE=1
615CONFIG_BFIN_NAND_READY=3
616CONFIG_MTD_NAND_IDS=m 636CONFIG_MTD_NAND_IDS=m
617# CONFIG_MTD_NAND_BF5XX is not set 637# CONFIG_MTD_NAND_BF5XX is not set
618# CONFIG_MTD_NAND_DISKONCHIP is not set 638# CONFIG_MTD_NAND_DISKONCHIP is not set
@@ -622,6 +642,11 @@ CONFIG_MTD_NAND_IDS=m
622# CONFIG_MTD_ONENAND is not set 642# CONFIG_MTD_ONENAND is not set
623 643
624# 644#
645# LPDDR flash memory drivers
646#
647# CONFIG_MTD_LPDDR is not set
648
649#
625# UBI - Unsorted block images 650# UBI - Unsorted block images
626# 651#
627# CONFIG_MTD_UBI is not set 652# CONFIG_MTD_UBI is not set
@@ -639,10 +664,20 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
639# CONFIG_ATA_OVER_ETH is not set 664# CONFIG_ATA_OVER_ETH is not set
640# CONFIG_BLK_DEV_HD is not set 665# CONFIG_BLK_DEV_HD is not set
641CONFIG_MISC_DEVICES=y 666CONFIG_MISC_DEVICES=y
642# CONFIG_EEPROM_93CX6 is not set 667# CONFIG_AD525X_DPOT is not set
643# CONFIG_ICS932S401 is not set 668# CONFIG_ICS932S401 is not set
644# CONFIG_ENCLOSURE_SERVICES is not set 669# CONFIG_ENCLOSURE_SERVICES is not set
670# CONFIG_ISL29003 is not set
645# CONFIG_C2PORT is not set 671# CONFIG_C2PORT is not set
672
673#
674# EEPROM support
675#
676# CONFIG_EEPROM_AT24 is not set
677# CONFIG_EEPROM_AT25 is not set
678# CONFIG_EEPROM_LEGACY is not set
679# CONFIG_EEPROM_MAX6875 is not set
680# CONFIG_EEPROM_93CX6 is not set
646CONFIG_HAVE_IDE=y 681CONFIG_HAVE_IDE=y
647# CONFIG_IDE is not set 682# CONFIG_IDE is not set
648 683
@@ -666,10 +701,6 @@ CONFIG_BLK_DEV_SR=m
666# CONFIG_BLK_DEV_SR_VENDOR is not set 701# CONFIG_BLK_DEV_SR_VENDOR is not set
667# CONFIG_CHR_DEV_SG is not set 702# CONFIG_CHR_DEV_SG is not set
668# CONFIG_CHR_DEV_SCH is not set 703# CONFIG_CHR_DEV_SCH is not set
669
670#
671# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
672#
673# CONFIG_SCSI_MULTI_LUN is not set 704# CONFIG_SCSI_MULTI_LUN is not set
674# CONFIG_SCSI_CONSTANTS is not set 705# CONFIG_SCSI_CONSTANTS is not set
675# CONFIG_SCSI_LOGGING is not set 706# CONFIG_SCSI_LOGGING is not set
@@ -686,6 +717,7 @@ CONFIG_SCSI_WAIT_SCAN=m
686# CONFIG_SCSI_SRP_ATTRS is not set 717# CONFIG_SCSI_SRP_ATTRS is not set
687# CONFIG_SCSI_LOWLEVEL is not set 718# CONFIG_SCSI_LOWLEVEL is not set
688# CONFIG_SCSI_DH is not set 719# CONFIG_SCSI_DH is not set
720# CONFIG_SCSI_OSD_INITIATOR is not set
689# CONFIG_ATA is not set 721# CONFIG_ATA is not set
690# CONFIG_MD is not set 722# CONFIG_MD is not set
691CONFIG_NETDEVICES=y 723CONFIG_NETDEVICES=y
@@ -710,6 +742,9 @@ CONFIG_PHYLIB=y
710# CONFIG_BROADCOM_PHY is not set 742# CONFIG_BROADCOM_PHY is not set
711# CONFIG_ICPLUS_PHY is not set 743# CONFIG_ICPLUS_PHY is not set
712# CONFIG_REALTEK_PHY is not set 744# CONFIG_REALTEK_PHY is not set
745# CONFIG_NATIONAL_PHY is not set
746# CONFIG_STE10XP is not set
747# CONFIG_LSI_ET1011C_PHY is not set
713# CONFIG_FIXED_PHY is not set 748# CONFIG_FIXED_PHY is not set
714# CONFIG_MDIO_BITBANG is not set 749# CONFIG_MDIO_BITBANG is not set
715CONFIG_NET_ETHERNET=y 750CONFIG_NET_ETHERNET=y
@@ -720,9 +755,12 @@ CONFIG_BFIN_TX_DESC_NUM=10
720CONFIG_BFIN_RX_DESC_NUM=20 755CONFIG_BFIN_RX_DESC_NUM=20
721CONFIG_BFIN_MAC_RMII=y 756CONFIG_BFIN_MAC_RMII=y
722# CONFIG_SMC91X is not set 757# CONFIG_SMC91X is not set
723# CONFIG_SMSC911X is not set
724# CONFIG_DM9000 is not set 758# CONFIG_DM9000 is not set
725# CONFIG_ENC28J60 is not set 759# CONFIG_ENC28J60 is not set
760# CONFIG_ETHOC is not set
761# CONFIG_SMSC911X is not set
762# CONFIG_DNET is not set
763# CONFIG_ADF702X is not set
726# CONFIG_IBM_NEW_EMAC_ZMII is not set 764# CONFIG_IBM_NEW_EMAC_ZMII is not set
727# CONFIG_IBM_NEW_EMAC_RGMII is not set 765# CONFIG_IBM_NEW_EMAC_RGMII is not set
728# CONFIG_IBM_NEW_EMAC_TAH is not set 766# CONFIG_IBM_NEW_EMAC_TAH is not set
@@ -731,15 +769,16 @@ CONFIG_BFIN_MAC_RMII=y
731# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set 769# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
732# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 770# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
733# CONFIG_B44 is not set 771# CONFIG_B44 is not set
772# CONFIG_KS8842 is not set
773# CONFIG_KS8851 is not set
774# CONFIG_KS8851_MLL is not set
734# CONFIG_NETDEV_1000 is not set 775# CONFIG_NETDEV_1000 is not set
735# CONFIG_NETDEV_10000 is not set 776# CONFIG_NETDEV_10000 is not set
777# CONFIG_WLAN is not set
736 778
737# 779#
738# Wireless LAN 780# Enable WiMAX (Networking options) to see the WiMAX drivers
739# 781#
740# CONFIG_WLAN_PRE80211 is not set
741# CONFIG_WLAN_80211 is not set
742# CONFIG_IWLWIFI_LEDS is not set
743 782
744# 783#
745# USB Network Adapters 784# USB Network Adapters
@@ -789,7 +828,11 @@ CONFIG_INPUT_MISC=y
789# CONFIG_INPUT_YEALINK is not set 828# CONFIG_INPUT_YEALINK is not set
790# CONFIG_INPUT_CM109 is not set 829# CONFIG_INPUT_CM109 is not set
791# CONFIG_INPUT_UINPUT is not set 830# CONFIG_INPUT_UINPUT is not set
792# CONFIG_CONFIG_INPUT_PCF8574 is not set 831# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
832# CONFIG_INPUT_BFIN_ROTARY is not set
833# CONFIG_INPUT_AD714X is not set
834# CONFIG_INPUT_ADXL34X is not set
835# CONFIG_INPUT_PCF8574 is not set
793 836
794# 837#
795# Hardware I/O ports 838# Hardware I/O ports
@@ -800,16 +843,13 @@ CONFIG_INPUT_MISC=y
800# 843#
801# Character devices 844# Character devices
802# 845#
803# CONFIG_AD9960 is not set
804CONFIG_BFIN_DMA_INTERFACE=m 846CONFIG_BFIN_DMA_INTERFACE=m
805# CONFIG_BFIN_PPI is not set 847# CONFIG_BFIN_PPI is not set
806# CONFIG_BFIN_PPIFCD is not set 848# CONFIG_BFIN_PPIFCD is not set
807# CONFIG_BFIN_SIMPLE_TIMER is not set 849# CONFIG_BFIN_SIMPLE_TIMER is not set
808# CONFIG_BFIN_SPI_ADC is not set 850# CONFIG_BFIN_SPI_ADC is not set
809CONFIG_BFIN_SPORT=m 851CONFIG_BFIN_SPORT=m
810# CONFIG_BFIN_TIMER_LATENCY is not set
811# CONFIG_BFIN_TWI_LCD is not set 852# CONFIG_BFIN_TWI_LCD is not set
812CONFIG_SIMPLE_GPIO=m
813CONFIG_VT=y 853CONFIG_VT=y
814CONFIG_CONSOLE_TRANSLATIONS=y 854CONFIG_CONSOLE_TRANSLATIONS=y
815CONFIG_VT_CONSOLE=y 855CONFIG_VT_CONSOLE=y
@@ -827,6 +867,7 @@ CONFIG_BFIN_JTAG_COMM=m
827# 867#
828# Non-8250 serial port support 868# Non-8250 serial port support
829# 869#
870# CONFIG_SERIAL_MAX3100 is not set
830CONFIG_SERIAL_BFIN=y 871CONFIG_SERIAL_BFIN=y
831CONFIG_SERIAL_BFIN_CONSOLE=y 872CONFIG_SERIAL_BFIN_CONSOLE=y
832CONFIG_SERIAL_BFIN_DMA=y 873CONFIG_SERIAL_BFIN_DMA=y
@@ -838,14 +879,10 @@ CONFIG_SERIAL_CORE=y
838CONFIG_SERIAL_CORE_CONSOLE=y 879CONFIG_SERIAL_CORE_CONSOLE=y
839# CONFIG_SERIAL_BFIN_SPORT is not set 880# CONFIG_SERIAL_BFIN_SPORT is not set
840CONFIG_UNIX98_PTYS=y 881CONFIG_UNIX98_PTYS=y
882# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
841# CONFIG_LEGACY_PTYS is not set 883# CONFIG_LEGACY_PTYS is not set
842CONFIG_BFIN_OTP=y 884CONFIG_BFIN_OTP=y
843# CONFIG_BFIN_OTP_WRITE_ENABLE is not set 885# CONFIG_BFIN_OTP_WRITE_ENABLE is not set
844
845#
846# CAN, the car bus and industrial fieldbus
847#
848# CONFIG_CAN4LINUX is not set
849# CONFIG_IPMI_HANDLER is not set 886# CONFIG_IPMI_HANDLER is not set
850# CONFIG_HW_RANDOM is not set 887# CONFIG_HW_RANDOM is not set
851# CONFIG_R3964 is not set 888# CONFIG_R3964 is not set
@@ -853,6 +890,7 @@ CONFIG_BFIN_OTP=y
853# CONFIG_TCG_TPM is not set 890# CONFIG_TCG_TPM is not set
854CONFIG_I2C=y 891CONFIG_I2C=y
855CONFIG_I2C_BOARDINFO=y 892CONFIG_I2C_BOARDINFO=y
893CONFIG_I2C_COMPAT=y
856CONFIG_I2C_CHARDEV=m 894CONFIG_I2C_CHARDEV=m
857CONFIG_I2C_HELPER_AUTO=y 895CONFIG_I2C_HELPER_AUTO=y
858 896
@@ -886,14 +924,6 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
886# Miscellaneous I2C Chip support 924# Miscellaneous I2C Chip support
887# 925#
888# CONFIG_DS1682 is not set 926# CONFIG_DS1682 is not set
889# CONFIG_EEPROM_AT24 is not set
890# CONFIG_SENSORS_AD5252 is not set
891# CONFIG_EEPROM_LEGACY is not set
892# CONFIG_SENSORS_PCF8574 is not set
893# CONFIG_PCF8575 is not set
894# CONFIG_SENSORS_PCA9539 is not set
895# CONFIG_SENSORS_PCF8591 is not set
896# CONFIG_SENSORS_MAX6875 is not set
897# CONFIG_SENSORS_TSL2550 is not set 927# CONFIG_SENSORS_TSL2550 is not set
898# CONFIG_I2C_DEBUG_CORE is not set 928# CONFIG_I2C_DEBUG_CORE is not set
899# CONFIG_I2C_DEBUG_ALGO is not set 929# CONFIG_I2C_DEBUG_ALGO is not set
@@ -910,13 +940,18 @@ CONFIG_SPI_BFIN=y
910# CONFIG_SPI_BFIN_LOCK is not set 940# CONFIG_SPI_BFIN_LOCK is not set
911# CONFIG_SPI_BFIN_SPORT is not set 941# CONFIG_SPI_BFIN_SPORT is not set
912# CONFIG_SPI_BITBANG is not set 942# CONFIG_SPI_BITBANG is not set
943# CONFIG_SPI_GPIO is not set
913 944
914# 945#
915# SPI Protocol Masters 946# SPI Protocol Masters
916# 947#
917# CONFIG_EEPROM_AT25 is not set
918# CONFIG_SPI_SPIDEV is not set 948# CONFIG_SPI_SPIDEV is not set
919# CONFIG_SPI_TLE62X0 is not set 949# CONFIG_SPI_TLE62X0 is not set
950
951#
952# PPS support
953#
954# CONFIG_PPS is not set
920CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y 955CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
921CONFIG_GPIOLIB=y 956CONFIG_GPIOLIB=y
922# CONFIG_DEBUG_GPIO is not set 957# CONFIG_DEBUG_GPIO is not set
@@ -932,6 +967,7 @@ CONFIG_GPIO_SYSFS=y
932# CONFIG_GPIO_MAX732X is not set 967# CONFIG_GPIO_MAX732X is not set
933# CONFIG_GPIO_PCA953X is not set 968# CONFIG_GPIO_PCA953X is not set
934# CONFIG_GPIO_PCF857X is not set 969# CONFIG_GPIO_PCF857X is not set
970# CONFIG_GPIO_ADP5588 is not set
935 971
936# 972#
937# PCI GPIO expanders: 973# PCI GPIO expanders:
@@ -942,11 +978,15 @@ CONFIG_GPIO_SYSFS=y
942# 978#
943# CONFIG_GPIO_MAX7301 is not set 979# CONFIG_GPIO_MAX7301 is not set
944# CONFIG_GPIO_MCP23S08 is not set 980# CONFIG_GPIO_MCP23S08 is not set
981# CONFIG_GPIO_MC33880 is not set
982
983#
984# AC97 GPIO expanders:
985#
945# CONFIG_W1 is not set 986# CONFIG_W1 is not set
946# CONFIG_POWER_SUPPLY is not set 987# CONFIG_POWER_SUPPLY is not set
947# CONFIG_HWMON is not set 988# CONFIG_HWMON is not set
948# CONFIG_THERMAL is not set 989# CONFIG_THERMAL is not set
949# CONFIG_THERMAL_HWMON is not set
950CONFIG_WATCHDOG=y 990CONFIG_WATCHDOG=y
951# CONFIG_WATCHDOG_NOWAYOUT is not set 991# CONFIG_WATCHDOG_NOWAYOUT is not set
952 992
@@ -973,28 +1013,21 @@ CONFIG_SSB_POSSIBLE=y
973# CONFIG_MFD_CORE is not set 1013# CONFIG_MFD_CORE is not set
974# CONFIG_MFD_SM501 is not set 1014# CONFIG_MFD_SM501 is not set
975# CONFIG_HTC_PASIC3 is not set 1015# CONFIG_HTC_PASIC3 is not set
1016# CONFIG_UCB1400_CORE is not set
1017# CONFIG_TPS65010 is not set
1018# CONFIG_TWL4030_CORE is not set
976# CONFIG_MFD_TMIO is not set 1019# CONFIG_MFD_TMIO is not set
977# CONFIG_PMIC_DA903X is not set 1020# CONFIG_PMIC_DA903X is not set
978# CONFIG_PMIC_ADP5520 is not set 1021# CONFIG_PMIC_ADP5520 is not set
979# CONFIG_MFD_WM8400 is not set 1022# CONFIG_MFD_WM8400 is not set
1023# CONFIG_MFD_WM831X is not set
980# CONFIG_MFD_WM8350_I2C is not set 1024# CONFIG_MFD_WM8350_I2C is not set
1025# CONFIG_MFD_PCF50633 is not set
1026# CONFIG_MFD_MC13783 is not set
1027# CONFIG_AB3100_CORE is not set
1028# CONFIG_EZX_PCAP is not set
981# CONFIG_REGULATOR is not set 1029# CONFIG_REGULATOR is not set
982 1030# CONFIG_MEDIA_SUPPORT is not set
983#
984# Multimedia devices
985#
986
987#
988# Multimedia core support
989#
990# CONFIG_VIDEO_DEV is not set
991# CONFIG_DVB_CORE is not set
992# CONFIG_VIDEO_MEDIA is not set
993
994#
995# Multimedia drivers
996#
997# CONFIG_DAB is not set
998 1031
999# 1032#
1000# Graphics support 1033# Graphics support
@@ -1030,15 +1063,18 @@ CONFIG_FB_BFIN_T350MCQB=y
1030# CONFIG_FB_VIRTUAL is not set 1063# CONFIG_FB_VIRTUAL is not set
1031# CONFIG_FB_METRONOME is not set 1064# CONFIG_FB_METRONOME is not set
1032# CONFIG_FB_MB862XX is not set 1065# CONFIG_FB_MB862XX is not set
1066# CONFIG_FB_BROADSHEET is not set
1033CONFIG_BACKLIGHT_LCD_SUPPORT=y 1067CONFIG_BACKLIGHT_LCD_SUPPORT=y
1034CONFIG_LCD_CLASS_DEVICE=m 1068CONFIG_LCD_CLASS_DEVICE=m
1069# CONFIG_LCD_LMS283GF05 is not set
1035CONFIG_LCD_LTV350QV=m 1070CONFIG_LCD_LTV350QV=m
1036# CONFIG_LCD_ILI9320 is not set 1071# CONFIG_LCD_ILI9320 is not set
1037# CONFIG_LCD_TDO24M is not set 1072# CONFIG_LCD_TDO24M is not set
1038# CONFIG_LCD_VGG2432A4 is not set 1073# CONFIG_LCD_VGG2432A4 is not set
1039# CONFIG_LCD_PLATFORM is not set 1074# CONFIG_LCD_PLATFORM is not set
1040CONFIG_BACKLIGHT_CLASS_DEVICE=m 1075CONFIG_BACKLIGHT_CLASS_DEVICE=m
1041# CONFIG_BACKLIGHT_CORGI is not set 1076CONFIG_BACKLIGHT_GENERIC=m
1077# CONFIG_BACKLIGHT_ADP8870 is not set
1042 1078
1043# 1079#
1044# Display device support 1080# Display device support
@@ -1066,6 +1102,7 @@ CONFIG_SOUND=m
1066CONFIG_SND=m 1102CONFIG_SND=m
1067CONFIG_SND_TIMER=m 1103CONFIG_SND_TIMER=m
1068CONFIG_SND_PCM=m 1104CONFIG_SND_PCM=m
1105CONFIG_SND_JACK=y
1069# CONFIG_SND_SEQUENCER is not set 1106# CONFIG_SND_SEQUENCER is not set
1070# CONFIG_SND_MIXER_OSS is not set 1107# CONFIG_SND_MIXER_OSS is not set
1071# CONFIG_SND_PCM_OSS is not set 1108# CONFIG_SND_PCM_OSS is not set
@@ -1074,6 +1111,11 @@ CONFIG_SND_SUPPORT_OLD_API=y
1074CONFIG_SND_VERBOSE_PROCFS=y 1111CONFIG_SND_VERBOSE_PROCFS=y
1075# CONFIG_SND_VERBOSE_PRINTK is not set 1112# CONFIG_SND_VERBOSE_PRINTK is not set
1076# CONFIG_SND_DEBUG is not set 1113# CONFIG_SND_DEBUG is not set
1114# CONFIG_SND_RAWMIDI_SEQ is not set
1115# CONFIG_SND_OPL3_LIB_SEQ is not set
1116# CONFIG_SND_OPL4_LIB_SEQ is not set
1117# CONFIG_SND_SBAWE_SEQ is not set
1118# CONFIG_SND_EMU10K1_SEQ is not set
1077CONFIG_SND_DRIVERS=y 1119CONFIG_SND_DRIVERS=y
1078# CONFIG_SND_DUMMY is not set 1120# CONFIG_SND_DUMMY is not set
1079# CONFIG_SND_MTPAV is not set 1121# CONFIG_SND_MTPAV is not set
@@ -1084,7 +1126,6 @@ CONFIG_SND_SPI=y
1084# 1126#
1085# ALSA Blackfin devices 1127# ALSA Blackfin devices
1086# 1128#
1087# CONFIG_SND_BLACKFIN_AD1836 is not set
1088# CONFIG_SND_BFIN_AD73322 is not set 1129# CONFIG_SND_BFIN_AD73322 is not set
1089CONFIG_SND_USB=y 1130CONFIG_SND_USB=y
1090# CONFIG_SND_USB_AUDIO is not set 1131# CONFIG_SND_USB_AUDIO is not set
@@ -1094,15 +1135,19 @@ CONFIG_SND_SOC_AC97_BUS=y
1094CONFIG_SND_BF5XX_I2S=m 1135CONFIG_SND_BF5XX_I2S=m
1095CONFIG_SND_BF5XX_SOC_SSM2602=m 1136CONFIG_SND_BF5XX_SOC_SSM2602=m
1096# CONFIG_SND_BF5XX_SOC_AD73311 is not set 1137# CONFIG_SND_BF5XX_SOC_AD73311 is not set
1138# CONFIG_SND_BF5XX_SOC_ADAU1371 is not set
1139# CONFIG_SND_BF5XX_SOC_ADAU1761 is not set
1140# CONFIG_SND_BF5XX_TDM is not set
1097CONFIG_SND_BF5XX_AC97=m 1141CONFIG_SND_BF5XX_AC97=m
1098CONFIG_SND_BF5XX_MMAP_SUPPORT=y 1142CONFIG_SND_BF5XX_MMAP_SUPPORT=y
1099# CONFIG_SND_BF5XX_MULTICHAN_SUPPORT is not set 1143# CONFIG_SND_BF5XX_MULTICHAN_SUPPORT is not set
1144# CONFIG_SND_BF5XX_HAVE_COLD_RESET is not set
1145CONFIG_SND_BF5XX_SOC_AD1980=m
1100CONFIG_SND_BF5XX_SOC_SPORT=m 1146CONFIG_SND_BF5XX_SOC_SPORT=m
1101CONFIG_SND_BF5XX_SOC_I2S=m 1147CONFIG_SND_BF5XX_SOC_I2S=m
1102CONFIG_SND_BF5XX_SOC_AC97=m 1148CONFIG_SND_BF5XX_SOC_AC97=m
1103CONFIG_SND_BF5XX_SOC_AD1980=m
1104CONFIG_SND_BF5XX_SPORT_NUM=0 1149CONFIG_SND_BF5XX_SPORT_NUM=0
1105# CONFIG_SND_BF5XX_HAVE_COLD_RESET is not set 1150CONFIG_SND_SOC_I2C_AND_SPI=m
1106# CONFIG_SND_SOC_ALL_CODECS is not set 1151# CONFIG_SND_SOC_ALL_CODECS is not set
1107CONFIG_SND_SOC_AD1980=m 1152CONFIG_SND_SOC_AD1980=m
1108CONFIG_SND_SOC_SSM2602=m 1153CONFIG_SND_SOC_SSM2602=m
@@ -1110,7 +1155,6 @@ CONFIG_SND_SOC_SSM2602=m
1110CONFIG_AC97_BUS=m 1155CONFIG_AC97_BUS=m
1111CONFIG_HID_SUPPORT=y 1156CONFIG_HID_SUPPORT=y
1112CONFIG_HID=y 1157CONFIG_HID=y
1113# CONFIG_HID_DEBUG is not set
1114# CONFIG_HIDRAW is not set 1158# CONFIG_HIDRAW is not set
1115 1159
1116# 1160#
@@ -1123,30 +1167,35 @@ CONFIG_USB_HID=y
1123# 1167#
1124# Special HID drivers 1168# Special HID drivers
1125# 1169#
1126CONFIG_HID_COMPAT=y
1127CONFIG_HID_A4TECH=y 1170CONFIG_HID_A4TECH=y
1128CONFIG_HID_APPLE=y 1171CONFIG_HID_APPLE=y
1129CONFIG_HID_BELKIN=y 1172CONFIG_HID_BELKIN=y
1130CONFIG_HID_BRIGHT=y
1131CONFIG_HID_CHERRY=y 1173CONFIG_HID_CHERRY=y
1132CONFIG_HID_CHICONY=y 1174CONFIG_HID_CHICONY=y
1133CONFIG_HID_CYPRESS=y 1175CONFIG_HID_CYPRESS=y
1134CONFIG_HID_DELL=y 1176# CONFIG_HID_DRAGONRISE is not set
1135CONFIG_HID_EZKEY=y 1177CONFIG_HID_EZKEY=y
1178# CONFIG_HID_KYE is not set
1136CONFIG_HID_GYRATION=y 1179CONFIG_HID_GYRATION=y
1180# CONFIG_HID_TWINHAN is not set
1181# CONFIG_HID_KENSINGTON is not set
1137CONFIG_HID_LOGITECH=y 1182CONFIG_HID_LOGITECH=y
1138# CONFIG_LOGITECH_FF is not set 1183# CONFIG_LOGITECH_FF is not set
1139# CONFIG_LOGIRUMBLEPAD2_FF is not set 1184# CONFIG_LOGIRUMBLEPAD2_FF is not set
1140CONFIG_HID_MICROSOFT=y 1185CONFIG_HID_MICROSOFT=y
1141CONFIG_HID_MONTEREY=y 1186CONFIG_HID_MONTEREY=y
1187# CONFIG_HID_NTRIG is not set
1142CONFIG_HID_PANTHERLORD=y 1188CONFIG_HID_PANTHERLORD=y
1143# CONFIG_PANTHERLORD_FF is not set 1189# CONFIG_PANTHERLORD_FF is not set
1144CONFIG_HID_PETALYNX=y 1190CONFIG_HID_PETALYNX=y
1145CONFIG_HID_SAMSUNG=y 1191CONFIG_HID_SAMSUNG=y
1146CONFIG_HID_SONY=y 1192CONFIG_HID_SONY=y
1147CONFIG_HID_SUNPLUS=y 1193CONFIG_HID_SUNPLUS=y
1148CONFIG_THRUSTMASTER_FF=m 1194# CONFIG_HID_GREENASIA is not set
1149CONFIG_ZEROPLUS_FF=m 1195# CONFIG_HID_SMARTJOYPLUS is not set
1196# CONFIG_HID_TOPSEED is not set
1197# CONFIG_HID_THRUSTMASTER is not set
1198# CONFIG_HID_ZEROPLUS is not set
1150CONFIG_USB_SUPPORT=y 1199CONFIG_USB_SUPPORT=y
1151CONFIG_USB_ARCH_HAS_HCD=y 1200CONFIG_USB_ARCH_HAS_HCD=y
1152# CONFIG_USB_ARCH_HAS_OHCI is not set 1201# CONFIG_USB_ARCH_HAS_OHCI is not set
@@ -1172,6 +1221,7 @@ CONFIG_USB_MON=y
1172# USB Host Controller Drivers 1221# USB Host Controller Drivers
1173# 1222#
1174# CONFIG_USB_C67X00_HCD is not set 1223# CONFIG_USB_C67X00_HCD is not set
1224# CONFIG_USB_OXU210HP_HCD is not set
1175# CONFIG_USB_ISP116X_HCD is not set 1225# CONFIG_USB_ISP116X_HCD is not set
1176# CONFIG_USB_ISP1760_HCD is not set 1226# CONFIG_USB_ISP1760_HCD is not set
1177# CONFIG_USB_ISP1362_HCD is not set 1227# CONFIG_USB_ISP1362_HCD is not set
@@ -1188,9 +1238,7 @@ CONFIG_USB_MUSB_HOST=y
1188# CONFIG_USB_MUSB_PERIPHERAL is not set 1238# CONFIG_USB_MUSB_PERIPHERAL is not set
1189# CONFIG_USB_MUSB_OTG is not set 1239# CONFIG_USB_MUSB_OTG is not set
1190CONFIG_USB_MUSB_HDRC_HCD=y 1240CONFIG_USB_MUSB_HDRC_HCD=y
1191# CONFIG_MUSB_PIO_ONLY is not set 1241CONFIG_MUSB_PIO_ONLY=y
1192CONFIG_USB_INVENTRA_DMA=y
1193# CONFIG_USB_TI_CPPI_DMA is not set
1194# CONFIG_USB_MUSB_DEBUG is not set 1242# CONFIG_USB_MUSB_DEBUG is not set
1195 1243
1196# 1244#
@@ -1202,18 +1250,17 @@ CONFIG_USB_INVENTRA_DMA=y
1202# CONFIG_USB_TMC is not set 1250# CONFIG_USB_TMC is not set
1203 1251
1204# 1252#
1205# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; 1253# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
1206# 1254#
1207 1255
1208# 1256#
1209# see USB_STORAGE Help for more information 1257# also be needed; see USB_STORAGE Help for more info
1210# 1258#
1211CONFIG_USB_STORAGE=y 1259CONFIG_USB_STORAGE=y
1212# CONFIG_USB_STORAGE_DEBUG is not set 1260# CONFIG_USB_STORAGE_DEBUG is not set
1213# CONFIG_USB_STORAGE_DATAFAB is not set 1261# CONFIG_USB_STORAGE_DATAFAB is not set
1214# CONFIG_USB_STORAGE_FREECOM is not set 1262# CONFIG_USB_STORAGE_FREECOM is not set
1215# CONFIG_USB_STORAGE_ISD200 is not set 1263# CONFIG_USB_STORAGE_ISD200 is not set
1216# CONFIG_USB_STORAGE_DPCM is not set
1217# CONFIG_USB_STORAGE_USBAT is not set 1264# CONFIG_USB_STORAGE_USBAT is not set
1218# CONFIG_USB_STORAGE_SDDR09 is not set 1265# CONFIG_USB_STORAGE_SDDR09 is not set
1219# CONFIG_USB_STORAGE_SDDR55 is not set 1266# CONFIG_USB_STORAGE_SDDR55 is not set
@@ -1249,7 +1296,6 @@ CONFIG_USB_STORAGE=y
1249# CONFIG_USB_LED is not set 1296# CONFIG_USB_LED is not set
1250# CONFIG_USB_CYPRESS_CY7C63 is not set 1297# CONFIG_USB_CYPRESS_CY7C63 is not set
1251# CONFIG_USB_CYTHERM is not set 1298# CONFIG_USB_CYTHERM is not set
1252# CONFIG_USB_PHIDGET is not set
1253# CONFIG_USB_IDMOUSE is not set 1299# CONFIG_USB_IDMOUSE is not set
1254# CONFIG_USB_FTDI_ELAN is not set 1300# CONFIG_USB_FTDI_ELAN is not set
1255# CONFIG_USB_APPLEDISPLAY is not set 1301# CONFIG_USB_APPLEDISPLAY is not set
@@ -1261,6 +1307,13 @@ CONFIG_USB_STORAGE=y
1261# CONFIG_USB_ISIGHTFW is not set 1307# CONFIG_USB_ISIGHTFW is not set
1262# CONFIG_USB_VST is not set 1308# CONFIG_USB_VST is not set
1263# CONFIG_USB_GADGET is not set 1309# CONFIG_USB_GADGET is not set
1310
1311#
1312# OTG and related infrastructure
1313#
1314CONFIG_USB_OTG_UTILS=y
1315# CONFIG_USB_GPIO_VBUS is not set
1316CONFIG_NOP_USB_XCEIV=y
1264# CONFIG_MMC is not set 1317# CONFIG_MMC is not set
1265# CONFIG_MEMSTICK is not set 1318# CONFIG_MEMSTICK is not set
1266# CONFIG_NEW_LEDS is not set 1319# CONFIG_NEW_LEDS is not set
@@ -1296,6 +1349,7 @@ CONFIG_RTC_INTF_DEV=y
1296# CONFIG_RTC_DRV_S35390A is not set 1349# CONFIG_RTC_DRV_S35390A is not set
1297# CONFIG_RTC_DRV_FM3130 is not set 1350# CONFIG_RTC_DRV_FM3130 is not set
1298# CONFIG_RTC_DRV_RX8581 is not set 1351# CONFIG_RTC_DRV_RX8581 is not set
1352# CONFIG_RTC_DRV_RX8025 is not set
1299 1353
1300# 1354#
1301# SPI RTC drivers 1355# SPI RTC drivers
@@ -1307,6 +1361,7 @@ CONFIG_RTC_INTF_DEV=y
1307# CONFIG_RTC_DRV_R9701 is not set 1361# CONFIG_RTC_DRV_R9701 is not set
1308# CONFIG_RTC_DRV_RS5C348 is not set 1362# CONFIG_RTC_DRV_RS5C348 is not set
1309# CONFIG_RTC_DRV_DS3234 is not set 1363# CONFIG_RTC_DRV_DS3234 is not set
1364# CONFIG_RTC_DRV_PCF2123 is not set
1310 1365
1311# 1366#
1312# Platform RTC drivers 1367# Platform RTC drivers
@@ -1327,10 +1382,21 @@ CONFIG_RTC_INTF_DEV=y
1327# 1382#
1328CONFIG_RTC_DRV_BFIN=y 1383CONFIG_RTC_DRV_BFIN=y
1329# CONFIG_DMADEVICES is not set 1384# CONFIG_DMADEVICES is not set
1385# CONFIG_AUXDISPLAY is not set
1330# CONFIG_UIO is not set 1386# CONFIG_UIO is not set
1387
1388#
1389# TI VLYNQ
1390#
1331# CONFIG_STAGING is not set 1391# CONFIG_STAGING is not set
1332 1392
1333# 1393#
1394# Firmware Drivers
1395#
1396# CONFIG_FIRMWARE_MEMMAP is not set
1397# CONFIG_SIGMA is not set
1398
1399#
1334# File systems 1400# File systems
1335# 1401#
1336CONFIG_EXT2_FS=m 1402CONFIG_EXT2_FS=m
@@ -1340,9 +1406,13 @@ CONFIG_EXT2_FS=m
1340# CONFIG_REISERFS_FS is not set 1406# CONFIG_REISERFS_FS is not set
1341# CONFIG_JFS_FS is not set 1407# CONFIG_JFS_FS is not set
1342# CONFIG_FS_POSIX_ACL is not set 1408# CONFIG_FS_POSIX_ACL is not set
1343CONFIG_FILE_LOCKING=y
1344# CONFIG_XFS_FS is not set 1409# CONFIG_XFS_FS is not set
1410# CONFIG_GFS2_FS is not set
1345# CONFIG_OCFS2_FS is not set 1411# CONFIG_OCFS2_FS is not set
1412# CONFIG_BTRFS_FS is not set
1413# CONFIG_NILFS2_FS is not set
1414CONFIG_FILE_LOCKING=y
1415CONFIG_FSNOTIFY=y
1346# CONFIG_DNOTIFY is not set 1416# CONFIG_DNOTIFY is not set
1347CONFIG_INOTIFY=y 1417CONFIG_INOTIFY=y
1348CONFIG_INOTIFY_USER=y 1418CONFIG_INOTIFY_USER=y
@@ -1352,6 +1422,11 @@ CONFIG_INOTIFY_USER=y
1352# CONFIG_FUSE_FS is not set 1422# CONFIG_FUSE_FS is not set
1353 1423
1354# 1424#
1425# Caches
1426#
1427# CONFIG_FSCACHE is not set
1428
1429#
1355# CD-ROM/DVD Filesystems 1430# CD-ROM/DVD Filesystems
1356# 1431#
1357CONFIG_ISO9660_FS=m 1432CONFIG_ISO9660_FS=m
@@ -1376,13 +1451,9 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1376CONFIG_PROC_FS=y 1451CONFIG_PROC_FS=y
1377CONFIG_PROC_SYSCTL=y 1452CONFIG_PROC_SYSCTL=y
1378CONFIG_SYSFS=y 1453CONFIG_SYSFS=y
1379# CONFIG_TMPFS is not set
1380# CONFIG_HUGETLB_PAGE is not set 1454# CONFIG_HUGETLB_PAGE is not set
1381# CONFIG_CONFIGFS_FS is not set 1455# CONFIG_CONFIGFS_FS is not set
1382 1456CONFIG_MISC_FILESYSTEMS=y
1383#
1384# Miscellaneous filesystems
1385#
1386# CONFIG_ADFS_FS is not set 1457# CONFIG_ADFS_FS is not set
1387# CONFIG_AFFS_FS is not set 1458# CONFIG_AFFS_FS is not set
1388# CONFIG_HFS_FS is not set 1459# CONFIG_HFS_FS is not set
@@ -1401,17 +1472,8 @@ CONFIG_JFFS2_ZLIB=y
1401# CONFIG_JFFS2_LZO is not set 1472# CONFIG_JFFS2_LZO is not set
1402CONFIG_JFFS2_RTIME=y 1473CONFIG_JFFS2_RTIME=y
1403# CONFIG_JFFS2_RUBIN is not set 1474# CONFIG_JFFS2_RUBIN is not set
1404CONFIG_YAFFS_FS=m
1405CONFIG_YAFFS_YAFFS1=y
1406# CONFIG_YAFFS_9BYTE_TAGS is not set
1407# CONFIG_YAFFS_DOES_ECC is not set
1408CONFIG_YAFFS_YAFFS2=y
1409CONFIG_YAFFS_AUTO_YAFFS2=y
1410# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
1411# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
1412# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
1413CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
1414# CONFIG_CRAMFS is not set 1475# CONFIG_CRAMFS is not set
1476# CONFIG_SQUASHFS is not set
1415# CONFIG_VXFS_FS is not set 1477# CONFIG_VXFS_FS is not set
1416# CONFIG_MINIX_FS is not set 1478# CONFIG_MINIX_FS is not set
1417# CONFIG_OMFS_FS is not set 1479# CONFIG_OMFS_FS is not set
@@ -1430,7 +1492,6 @@ CONFIG_LOCKD=m
1430CONFIG_LOCKD_V4=y 1492CONFIG_LOCKD_V4=y
1431CONFIG_NFS_COMMON=y 1493CONFIG_NFS_COMMON=y
1432CONFIG_SUNRPC=m 1494CONFIG_SUNRPC=m
1433# CONFIG_SUNRPC_REGISTER_V4 is not set
1434# CONFIG_RPCSEC_GSS_KRB5 is not set 1495# CONFIG_RPCSEC_GSS_KRB5 is not set
1435# CONFIG_RPCSEC_GSS_SPKM3 is not set 1496# CONFIG_RPCSEC_GSS_SPKM3 is not set
1436CONFIG_SMB_FS=m 1497CONFIG_SMB_FS=m
@@ -1445,7 +1506,7 @@ CONFIG_SMB_FS=m
1445# 1506#
1446# CONFIG_PARTITION_ADVANCED is not set 1507# CONFIG_PARTITION_ADVANCED is not set
1447CONFIG_MSDOS_PARTITION=y 1508CONFIG_MSDOS_PARTITION=y
1448CONFIG_NLS=m 1509CONFIG_NLS=y
1449CONFIG_NLS_DEFAULT="iso8859-1" 1510CONFIG_NLS_DEFAULT="iso8859-1"
1450CONFIG_NLS_CODEPAGE_437=m 1511CONFIG_NLS_CODEPAGE_437=m
1451# CONFIG_NLS_CODEPAGE_737 is not set 1512# CONFIG_NLS_CODEPAGE_737 is not set
@@ -1495,14 +1556,19 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
1495CONFIG_ENABLE_MUST_CHECK=y 1556CONFIG_ENABLE_MUST_CHECK=y
1496CONFIG_FRAME_WARN=1024 1557CONFIG_FRAME_WARN=1024
1497# CONFIG_MAGIC_SYSRQ is not set 1558# CONFIG_MAGIC_SYSRQ is not set
1559# CONFIG_STRIP_ASM_SYMS is not set
1498# CONFIG_UNUSED_SYMBOLS is not set 1560# CONFIG_UNUSED_SYMBOLS is not set
1499CONFIG_DEBUG_FS=y 1561CONFIG_DEBUG_FS=y
1500# CONFIG_HEADERS_CHECK is not set 1562# CONFIG_HEADERS_CHECK is not set
1563CONFIG_DEBUG_SECTION_MISMATCH=y
1501CONFIG_DEBUG_KERNEL=y 1564CONFIG_DEBUG_KERNEL=y
1502CONFIG_DEBUG_SHIRQ=y 1565CONFIG_DEBUG_SHIRQ=y
1503CONFIG_DETECT_SOFTLOCKUP=y 1566CONFIG_DETECT_SOFTLOCKUP=y
1504# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set 1567# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
1505CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 1568CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
1569CONFIG_DETECT_HUNG_TASK=y
1570# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
1571CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
1506CONFIG_SCHED_DEBUG=y 1572CONFIG_SCHED_DEBUG=y
1507# CONFIG_SCHEDSTATS is not set 1573# CONFIG_SCHEDSTATS is not set
1508# CONFIG_TIMER_STATS is not set 1574# CONFIG_TIMER_STATS is not set
@@ -1510,31 +1576,39 @@ CONFIG_SCHED_DEBUG=y
1510# CONFIG_DEBUG_SLAB is not set 1576# CONFIG_DEBUG_SLAB is not set
1511# CONFIG_DEBUG_SPINLOCK is not set 1577# CONFIG_DEBUG_SPINLOCK is not set
1512# CONFIG_DEBUG_MUTEXES is not set 1578# CONFIG_DEBUG_MUTEXES is not set
1579# CONFIG_DEBUG_LOCK_ALLOC is not set
1580# CONFIG_PROVE_LOCKING is not set
1581# CONFIG_LOCK_STAT is not set
1513# CONFIG_DEBUG_SPINLOCK_SLEEP is not set 1582# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1514# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set 1583# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1515# CONFIG_DEBUG_KOBJECT is not set 1584# CONFIG_DEBUG_KOBJECT is not set
1516CONFIG_DEBUG_BUGVERBOSE=y 1585CONFIG_DEBUG_BUGVERBOSE=y
1517CONFIG_DEBUG_INFO=y 1586CONFIG_DEBUG_INFO=y
1518# CONFIG_DEBUG_VM is not set 1587# CONFIG_DEBUG_VM is not set
1588# CONFIG_DEBUG_NOMMU_REGIONS is not set
1519# CONFIG_DEBUG_WRITECOUNT is not set 1589# CONFIG_DEBUG_WRITECOUNT is not set
1520# CONFIG_DEBUG_MEMORY_INIT is not set 1590# CONFIG_DEBUG_MEMORY_INIT is not set
1521# CONFIG_DEBUG_LIST is not set 1591# CONFIG_DEBUG_LIST is not set
1522# CONFIG_DEBUG_SG is not set 1592# CONFIG_DEBUG_SG is not set
1593# CONFIG_DEBUG_NOTIFIERS is not set
1594# CONFIG_DEBUG_CREDENTIALS is not set
1523# CONFIG_FRAME_POINTER is not set 1595# CONFIG_FRAME_POINTER is not set
1524# CONFIG_BOOT_PRINTK_DELAY is not set 1596# CONFIG_BOOT_PRINTK_DELAY is not set
1525# CONFIG_RCU_TORTURE_TEST is not set 1597# CONFIG_RCU_TORTURE_TEST is not set
1526# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1598# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1527# CONFIG_BACKTRACE_SELF_TEST is not set 1599# CONFIG_BACKTRACE_SELF_TEST is not set
1528# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set 1600# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1601# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
1529# CONFIG_FAULT_INJECTION is not set 1602# CONFIG_FAULT_INJECTION is not set
1530 1603# CONFIG_PAGE_POISONING is not set
1531# 1604CONFIG_HAVE_FUNCTION_TRACER=y
1532# Tracers 1605CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
1533# 1606CONFIG_TRACING_SUPPORT=y
1534# CONFIG_SCHED_TRACER is not set 1607# CONFIG_FTRACE is not set
1535# CONFIG_CONTEXT_SWITCH_TRACER is not set 1608# CONFIG_BRANCH_PROFILE_NONE is not set
1536# CONFIG_BOOT_TRACER is not set 1609# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
1537# CONFIG_DYNAMIC_PRINTK_DEBUG is not set 1610# CONFIG_PROFILE_ALL_BRANCHES is not set
1611# CONFIG_DYNAMIC_DEBUG is not set
1538# CONFIG_SAMPLES is not set 1612# CONFIG_SAMPLES is not set
1539CONFIG_HAVE_ARCH_KGDB=y 1613CONFIG_HAVE_ARCH_KGDB=y
1540# CONFIG_KGDB is not set 1614# CONFIG_KGDB is not set
@@ -1559,6 +1633,7 @@ CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y
1559CONFIG_EARLY_PRINTK=y 1633CONFIG_EARLY_PRINTK=y
1560CONFIG_CPLB_INFO=y 1634CONFIG_CPLB_INFO=y
1561CONFIG_ACCESS_CHECK=y 1635CONFIG_ACCESS_CHECK=y
1636# CONFIG_BFIN_ISRAM_SELF_TEST is not set
1562 1637
1563# 1638#
1564# Security options 1639# Security options
@@ -1567,15 +1642,15 @@ CONFIG_ACCESS_CHECK=y
1567CONFIG_SECURITY=y 1642CONFIG_SECURITY=y
1568# CONFIG_SECURITYFS is not set 1643# CONFIG_SECURITYFS is not set
1569# CONFIG_SECURITY_NETWORK is not set 1644# CONFIG_SECURITY_NETWORK is not set
1645# CONFIG_SECURITY_PATH is not set
1570# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1646# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1571# CONFIG_SECURITY_ROOTPLUG is not set 1647# CONFIG_SECURITY_ROOTPLUG is not set
1572CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0 1648# CONFIG_SECURITY_TOMOYO is not set
1573CONFIG_CRYPTO=y 1649CONFIG_CRYPTO=y
1574 1650
1575# 1651#
1576# Crypto core or helper 1652# Crypto core or helper
1577# 1653#
1578# CONFIG_CRYPTO_FIPS is not set
1579# CONFIG_CRYPTO_MANAGER is not set 1654# CONFIG_CRYPTO_MANAGER is not set
1580# CONFIG_CRYPTO_MANAGER2 is not set 1655# CONFIG_CRYPTO_MANAGER2 is not set
1581# CONFIG_CRYPTO_GF128MUL is not set 1656# CONFIG_CRYPTO_GF128MUL is not set
@@ -1607,11 +1682,13 @@ CONFIG_CRYPTO=y
1607# 1682#
1608# CONFIG_CRYPTO_HMAC is not set 1683# CONFIG_CRYPTO_HMAC is not set
1609# CONFIG_CRYPTO_XCBC is not set 1684# CONFIG_CRYPTO_XCBC is not set
1685# CONFIG_CRYPTO_VMAC is not set
1610 1686
1611# 1687#
1612# Digest 1688# Digest
1613# 1689#
1614# CONFIG_CRYPTO_CRC32C is not set 1690# CONFIG_CRYPTO_CRC32C is not set
1691# CONFIG_CRYPTO_GHASH is not set
1615# CONFIG_CRYPTO_MD4 is not set 1692# CONFIG_CRYPTO_MD4 is not set
1616# CONFIG_CRYPTO_MD5 is not set 1693# CONFIG_CRYPTO_MD5 is not set
1617# CONFIG_CRYPTO_MICHAEL_MIC is not set 1694# CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1648,6 +1725,7 @@ CONFIG_CRYPTO=y
1648# Compression 1725# Compression
1649# 1726#
1650# CONFIG_CRYPTO_DEFLATE is not set 1727# CONFIG_CRYPTO_DEFLATE is not set
1728# CONFIG_CRYPTO_ZLIB is not set
1651# CONFIG_CRYPTO_LZO is not set 1729# CONFIG_CRYPTO_LZO is not set
1652 1730
1653# 1731#
@@ -1655,11 +1733,13 @@ CONFIG_CRYPTO=y
1655# 1733#
1656# CONFIG_CRYPTO_ANSI_CPRNG is not set 1734# CONFIG_CRYPTO_ANSI_CPRNG is not set
1657CONFIG_CRYPTO_HW=y 1735CONFIG_CRYPTO_HW=y
1736# CONFIG_BINARY_PRINTF is not set
1658 1737
1659# 1738#
1660# Library routines 1739# Library routines
1661# 1740#
1662CONFIG_BITREVERSE=y 1741CONFIG_BITREVERSE=y
1742CONFIG_GENERIC_FIND_LAST_BIT=y
1663CONFIG_CRC_CCITT=m 1743CONFIG_CRC_CCITT=m
1664# CONFIG_CRC16 is not set 1744# CONFIG_CRC16 is not set
1665# CONFIG_CRC_T10DIF is not set 1745# CONFIG_CRC_T10DIF is not set
@@ -1669,6 +1749,8 @@ CONFIG_CRC32=y
1669# CONFIG_LIBCRC32C is not set 1749# CONFIG_LIBCRC32C is not set
1670CONFIG_ZLIB_INFLATE=y 1750CONFIG_ZLIB_INFLATE=y
1671CONFIG_ZLIB_DEFLATE=m 1751CONFIG_ZLIB_DEFLATE=m
1752CONFIG_DECOMPRESS_GZIP=y
1672CONFIG_HAS_IOMEM=y 1753CONFIG_HAS_IOMEM=y
1673CONFIG_HAS_IOPORT=y 1754CONFIG_HAS_IOPORT=y
1674CONFIG_HAS_DMA=y 1755CONFIG_HAS_DMA=y
1756CONFIG_NLATTR=y
diff --git a/arch/blackfin/configs/BF533-EZKIT_defconfig b/arch/blackfin/configs/BF533-EZKIT_defconfig
index 50f9a23ccdbd..0b13d5836a48 100644
--- a/arch/blackfin/configs/BF533-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF533-EZKIT_defconfig
@@ -1,22 +1,27 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.28.10 3# Linux kernel version: 2.6.32.2
4# Thu May 21 05:50:01 2009
5# 4#
6# CONFIG_MMU is not set 5# CONFIG_MMU is not set
7# CONFIG_FPU is not set 6# CONFIG_FPU is not set
8CONFIG_RWSEM_GENERIC_SPINLOCK=y 7CONFIG_RWSEM_GENERIC_SPINLOCK=y
9# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set 8# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
10CONFIG_BLACKFIN=y 9CONFIG_BLACKFIN=y
10CONFIG_GENERIC_CSUM=y
11CONFIG_GENERIC_BUG=y
11CONFIG_ZONE_DMA=y 12CONFIG_ZONE_DMA=y
12CONFIG_GENERIC_FIND_NEXT_BIT=y 13CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_IRQ_PROBE=y 15CONFIG_GENERIC_IRQ_PROBE=y
16CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_GPIO=y 17CONFIG_GENERIC_GPIO=y
17CONFIG_FORCE_MAX_ZONEORDER=14 18CONFIG_FORCE_MAX_ZONEORDER=14
18CONFIG_GENERIC_CALIBRATE_DELAY=y 19CONFIG_GENERIC_CALIBRATE_DELAY=y
20CONFIG_LOCKDEP_SUPPORT=y
21CONFIG_STACKTRACE_SUPPORT=y
22CONFIG_TRACE_IRQFLAGS_SUPPORT=y
19CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 23CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
24CONFIG_CONSTRUCTORS=y
20 25
21# 26#
22# General setup 27# General setup
@@ -26,22 +31,41 @@ CONFIG_BROKEN_ON_SMP=y
26CONFIG_INIT_ENV_ARG_LIMIT=32 31CONFIG_INIT_ENV_ARG_LIMIT=32
27CONFIG_LOCALVERSION="" 32CONFIG_LOCALVERSION=""
28CONFIG_LOCALVERSION_AUTO=y 33CONFIG_LOCALVERSION_AUTO=y
34CONFIG_HAVE_KERNEL_GZIP=y
35CONFIG_HAVE_KERNEL_BZIP2=y
36CONFIG_HAVE_KERNEL_LZMA=y
37CONFIG_KERNEL_GZIP=y
38# CONFIG_KERNEL_BZIP2 is not set
39# CONFIG_KERNEL_LZMA is not set
29CONFIG_SYSVIPC=y 40CONFIG_SYSVIPC=y
30CONFIG_SYSVIPC_SYSCTL=y 41CONFIG_SYSVIPC_SYSCTL=y
31# CONFIG_POSIX_MQUEUE is not set 42# CONFIG_POSIX_MQUEUE is not set
32# CONFIG_BSD_PROCESS_ACCT is not set 43# CONFIG_BSD_PROCESS_ACCT is not set
33# CONFIG_TASKSTATS is not set 44# CONFIG_TASKSTATS is not set
34# CONFIG_AUDIT is not set 45# CONFIG_AUDIT is not set
46
47#
48# RCU Subsystem
49#
50CONFIG_TREE_RCU=y
51# CONFIG_TREE_PREEMPT_RCU is not set
52# CONFIG_RCU_TRACE is not set
53CONFIG_RCU_FANOUT=32
54# CONFIG_RCU_FANOUT_EXACT is not set
55# CONFIG_TREE_RCU_TRACE is not set
35CONFIG_IKCONFIG=y 56CONFIG_IKCONFIG=y
36CONFIG_IKCONFIG_PROC=y 57CONFIG_IKCONFIG_PROC=y
37CONFIG_LOG_BUF_SHIFT=14 58CONFIG_LOG_BUF_SHIFT=14
38# CONFIG_CGROUPS is not set
39# CONFIG_GROUP_SCHED is not set 59# CONFIG_GROUP_SCHED is not set
60# CONFIG_CGROUPS is not set
40# CONFIG_SYSFS_DEPRECATED_V2 is not set 61# CONFIG_SYSFS_DEPRECATED_V2 is not set
41# CONFIG_RELAY is not set 62# CONFIG_RELAY is not set
42# CONFIG_NAMESPACES is not set 63# CONFIG_NAMESPACES is not set
43CONFIG_BLK_DEV_INITRD=y 64CONFIG_BLK_DEV_INITRD=y
44CONFIG_INITRAMFS_SOURCE="" 65CONFIG_INITRAMFS_SOURCE=""
66CONFIG_RD_GZIP=y
67# CONFIG_RD_BZIP2 is not set
68# CONFIG_RD_LZMA is not set
45# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 69# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
46CONFIG_SYSCTL=y 70CONFIG_SYSCTL=y
47CONFIG_ANON_INODES=y 71CONFIG_ANON_INODES=y
@@ -62,6 +86,10 @@ CONFIG_EPOLL=y
62# CONFIG_TIMERFD is not set 86# CONFIG_TIMERFD is not set
63# CONFIG_EVENTFD is not set 87# CONFIG_EVENTFD is not set
64# CONFIG_AIO is not set 88# CONFIG_AIO is not set
89
90#
91# Kernel Performance Events And Counters
92#
65CONFIG_VM_EVENT_COUNTERS=y 93CONFIG_VM_EVENT_COUNTERS=y
66CONFIG_COMPAT_BRK=y 94CONFIG_COMPAT_BRK=y
67CONFIG_SLAB=y 95CONFIG_SLAB=y
@@ -69,11 +97,15 @@ CONFIG_SLAB=y
69# CONFIG_SLOB is not set 97# CONFIG_SLOB is not set
70CONFIG_MMAP_ALLOW_UNINITIALIZED=y 98CONFIG_MMAP_ALLOW_UNINITIALIZED=y
71# CONFIG_PROFILING is not set 99# CONFIG_PROFILING is not set
72# CONFIG_MARKERS is not set
73CONFIG_HAVE_OPROFILE=y 100CONFIG_HAVE_OPROFILE=y
101
102#
103# GCOV-based kernel profiling
104#
105# CONFIG_GCOV_KERNEL is not set
106# CONFIG_SLOW_WORK is not set
74# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set 107# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
75CONFIG_SLABINFO=y 108CONFIG_SLABINFO=y
76CONFIG_TINY_SHMEM=y
77CONFIG_BASE_SMALL=0 109CONFIG_BASE_SMALL=0
78CONFIG_MODULES=y 110CONFIG_MODULES=y
79# CONFIG_MODULE_FORCE_LOAD is not set 111# CONFIG_MODULE_FORCE_LOAD is not set
@@ -81,11 +113,8 @@ CONFIG_MODULE_UNLOAD=y
81# CONFIG_MODULE_FORCE_UNLOAD is not set 113# CONFIG_MODULE_FORCE_UNLOAD is not set
82# CONFIG_MODVERSIONS is not set 114# CONFIG_MODVERSIONS is not set
83# CONFIG_MODULE_SRCVERSION_ALL is not set 115# CONFIG_MODULE_SRCVERSION_ALL is not set
84CONFIG_KMOD=y
85CONFIG_BLOCK=y 116CONFIG_BLOCK=y
86# CONFIG_LBD is not set 117# CONFIG_LBDAF is not set
87# CONFIG_BLK_DEV_IO_TRACE is not set
88# CONFIG_LSF is not set
89# CONFIG_BLK_DEV_BSG is not set 118# CONFIG_BLK_DEV_BSG is not set
90# CONFIG_BLK_DEV_INTEGRITY is not set 119# CONFIG_BLK_DEV_INTEGRITY is not set
91 120
@@ -101,7 +130,6 @@ CONFIG_DEFAULT_AS=y
101# CONFIG_DEFAULT_CFQ is not set 130# CONFIG_DEFAULT_CFQ is not set
102# CONFIG_DEFAULT_NOOP is not set 131# CONFIG_DEFAULT_NOOP is not set
103CONFIG_DEFAULT_IOSCHED="anticipatory" 132CONFIG_DEFAULT_IOSCHED="anticipatory"
104CONFIG_CLASSIC_RCU=y
105# CONFIG_PREEMPT_NONE is not set 133# CONFIG_PREEMPT_NONE is not set
106CONFIG_PREEMPT_VOLUNTARY=y 134CONFIG_PREEMPT_VOLUNTARY=y
107# CONFIG_PREEMPT is not set 135# CONFIG_PREEMPT is not set
@@ -132,15 +160,15 @@ CONFIG_BF533=y
132# CONFIG_BF537 is not set 160# CONFIG_BF537 is not set
133# CONFIG_BF538 is not set 161# CONFIG_BF538 is not set
134# CONFIG_BF539 is not set 162# CONFIG_BF539 is not set
135# CONFIG_BF542 is not set 163# CONFIG_BF542_std is not set
136# CONFIG_BF542M is not set 164# CONFIG_BF542M is not set
137# CONFIG_BF544 is not set 165# CONFIG_BF544_std is not set
138# CONFIG_BF544M is not set 166# CONFIG_BF544M is not set
139# CONFIG_BF547 is not set 167# CONFIG_BF547_std is not set
140# CONFIG_BF547M is not set 168# CONFIG_BF547M is not set
141# CONFIG_BF548 is not set 169# CONFIG_BF548_std is not set
142# CONFIG_BF548M is not set 170# CONFIG_BF548M is not set
143# CONFIG_BF549 is not set 171# CONFIG_BF549_std is not set
144# CONFIG_BF549M is not set 172# CONFIG_BF549M is not set
145# CONFIG_BF561 is not set 173# CONFIG_BF561 is not set
146CONFIG_BF_REV_MIN=3 174CONFIG_BF_REV_MIN=3
@@ -228,7 +256,7 @@ CONFIG_GENERIC_TIME=y
228CONFIG_GENERIC_CLOCKEVENTS=y 256CONFIG_GENERIC_CLOCKEVENTS=y
229# CONFIG_TICKSOURCE_GPTMR0 is not set 257# CONFIG_TICKSOURCE_GPTMR0 is not set
230CONFIG_TICKSOURCE_CORETMR=y 258CONFIG_TICKSOURCE_CORETMR=y
231# CONFIG_CYCLES_CLOCKSOURCE is not set 259CONFIG_CYCLES_CLOCKSOURCE=y
232# CONFIG_GPTMR0_CLOCKSOURCE is not set 260# CONFIG_GPTMR0_CLOCKSOURCE is not set
233CONFIG_TICK_ONESHOT=y 261CONFIG_TICK_ONESHOT=y
234# CONFIG_NO_HZ is not set 262# CONFIG_NO_HZ is not set
@@ -280,7 +308,6 @@ CONFIG_FLATMEM=y
280CONFIG_FLAT_NODE_MEM_MAP=y 308CONFIG_FLAT_NODE_MEM_MAP=y
281CONFIG_PAGEFLAGS_EXTENDED=y 309CONFIG_PAGEFLAGS_EXTENDED=y
282CONFIG_SPLIT_PTLOCK_CPUS=4 310CONFIG_SPLIT_PTLOCK_CPUS=4
283# CONFIG_RESOURCES_64BIT is not set
284# CONFIG_PHYS_ADDR_T_64BIT is not set 311# CONFIG_PHYS_ADDR_T_64BIT is not set
285CONFIG_ZONE_DMA_FLAG=1 312CONFIG_ZONE_DMA_FLAG=1
286CONFIG_VIRT_TO_BUS=y 313CONFIG_VIRT_TO_BUS=y
@@ -289,19 +316,18 @@ CONFIG_BFIN_GPTIMERS=m
289# CONFIG_DMA_UNCACHED_4M is not set 316# CONFIG_DMA_UNCACHED_4M is not set
290# CONFIG_DMA_UNCACHED_2M is not set 317# CONFIG_DMA_UNCACHED_2M is not set
291CONFIG_DMA_UNCACHED_1M=y 318CONFIG_DMA_UNCACHED_1M=y
319# CONFIG_DMA_UNCACHED_512K is not set
320# CONFIG_DMA_UNCACHED_256K is not set
321# CONFIG_DMA_UNCACHED_128K is not set
292# CONFIG_DMA_UNCACHED_NONE is not set 322# CONFIG_DMA_UNCACHED_NONE is not set
293 323
294# 324#
295# Cache Support 325# Cache Support
296# 326#
297#
298# Cache Support
299#
300CONFIG_BFIN_ICACHE=y 327CONFIG_BFIN_ICACHE=y
301# CONFIG_BFIN_ICACHE_LOCK is not set 328CONFIG_BFIN_EXTMEM_ICACHEABLE=y
302CONFIG_BFIN_DCACHE=y 329CONFIG_BFIN_DCACHE=y
303# CONFIG_BFIN_DCACHE_BANKA is not set 330# CONFIG_BFIN_DCACHE_BANKA is not set
304CONFIG_BFIN_EXTMEM_ICACHEABLE=y
305CONFIG_BFIN_EXTMEM_DCACHEABLE=y 331CONFIG_BFIN_EXTMEM_DCACHEABLE=y
306CONFIG_BFIN_EXTMEM_WRITEBACK=y 332CONFIG_BFIN_EXTMEM_WRITEBACK=y
307# CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set 333# CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set
@@ -312,7 +338,7 @@ CONFIG_BFIN_EXTMEM_WRITEBACK=y
312# CONFIG_MPU is not set 338# CONFIG_MPU is not set
313 339
314# 340#
315# Asynchonous Memory Configuration 341# Asynchronous Memory Configuration
316# 342#
317 343
318# 344#
@@ -358,6 +384,7 @@ CONFIG_PM=y
358CONFIG_PM_SLEEP=y 384CONFIG_PM_SLEEP=y
359CONFIG_SUSPEND=y 385CONFIG_SUSPEND=y
360CONFIG_SUSPEND_FREEZER=y 386CONFIG_SUSPEND_FREEZER=y
387# CONFIG_PM_RUNTIME is not set
361CONFIG_ARCH_SUSPEND_POSSIBLE=y 388CONFIG_ARCH_SUSPEND_POSSIBLE=y
362CONFIG_PM_BFIN_SLEEP_DEEPER=y 389CONFIG_PM_BFIN_SLEEP_DEEPER=y
363# CONFIG_PM_BFIN_SLEEP is not set 390# CONFIG_PM_BFIN_SLEEP is not set
@@ -379,11 +406,6 @@ CONFIG_NET=y
379CONFIG_PACKET=y 406CONFIG_PACKET=y
380# CONFIG_PACKET_MMAP is not set 407# CONFIG_PACKET_MMAP is not set
381CONFIG_UNIX=y 408CONFIG_UNIX=y
382CONFIG_XFRM=y
383# CONFIG_XFRM_USER is not set
384# CONFIG_XFRM_SUB_POLICY is not set
385# CONFIG_XFRM_MIGRATE is not set
386# CONFIG_XFRM_STATISTICS is not set
387# CONFIG_NET_KEY is not set 409# CONFIG_NET_KEY is not set
388CONFIG_INET=y 410CONFIG_INET=y
389# CONFIG_IP_MULTICAST is not set 411# CONFIG_IP_MULTICAST is not set
@@ -407,7 +429,6 @@ CONFIG_IP_PNP=y
407# CONFIG_INET_XFRM_MODE_BEET is not set 429# CONFIG_INET_XFRM_MODE_BEET is not set
408# CONFIG_INET_LRO is not set 430# CONFIG_INET_LRO is not set
409# CONFIG_INET_DIAG is not set 431# CONFIG_INET_DIAG is not set
410CONFIG_INET_TCP_DIAG=y
411# CONFIG_TCP_CONG_ADVANCED is not set 432# CONFIG_TCP_CONG_ADVANCED is not set
412CONFIG_TCP_CONG_CUBIC=y 433CONFIG_TCP_CONG_CUBIC=y
413CONFIG_DEFAULT_TCP_CONG="cubic" 434CONFIG_DEFAULT_TCP_CONG="cubic"
@@ -418,6 +439,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
418# CONFIG_NETFILTER is not set 439# CONFIG_NETFILTER is not set
419# CONFIG_IP_DCCP is not set 440# CONFIG_IP_DCCP is not set
420# CONFIG_IP_SCTP is not set 441# CONFIG_IP_SCTP is not set
442# CONFIG_RDS is not set
421# CONFIG_TIPC is not set 443# CONFIG_TIPC is not set
422# CONFIG_ATM is not set 444# CONFIG_ATM is not set
423# CONFIG_BRIDGE is not set 445# CONFIG_BRIDGE is not set
@@ -431,7 +453,10 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
431# CONFIG_LAPB is not set 453# CONFIG_LAPB is not set
432# CONFIG_ECONET is not set 454# CONFIG_ECONET is not set
433# CONFIG_WAN_ROUTER is not set 455# CONFIG_WAN_ROUTER is not set
456# CONFIG_PHONET is not set
457# CONFIG_IEEE802154 is not set
434# CONFIG_NET_SCHED is not set 458# CONFIG_NET_SCHED is not set
459# CONFIG_DCB is not set
435 460
436# 461#
437# Network testing 462# Network testing
@@ -475,13 +500,8 @@ CONFIG_IRTTY_SIR=m
475# 500#
476# CONFIG_BT is not set 501# CONFIG_BT is not set
477# CONFIG_AF_RXRPC is not set 502# CONFIG_AF_RXRPC is not set
478# CONFIG_PHONET is not set 503# CONFIG_WIRELESS is not set
479CONFIG_WIRELESS=y 504# CONFIG_WIMAX is not set
480# CONFIG_CFG80211 is not set
481CONFIG_WIRELESS_OLD_REGULATORY=y
482# CONFIG_WIRELESS_EXT is not set
483# CONFIG_MAC80211 is not set
484# CONFIG_IEEE80211 is not set
485# CONFIG_RFKILL is not set 505# CONFIG_RFKILL is not set
486# CONFIG_NET_9P is not set 506# CONFIG_NET_9P is not set
487 507
@@ -502,6 +522,7 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
502# CONFIG_CONNECTOR is not set 522# CONFIG_CONNECTOR is not set
503CONFIG_MTD=y 523CONFIG_MTD=y
504# CONFIG_MTD_DEBUG is not set 524# CONFIG_MTD_DEBUG is not set
525# CONFIG_MTD_TESTS is not set
505# CONFIG_MTD_CONCAT is not set 526# CONFIG_MTD_CONCAT is not set
506CONFIG_MTD_PARTITIONS=y 527CONFIG_MTD_PARTITIONS=y
507# CONFIG_MTD_REDBOOT_PARTS is not set 528# CONFIG_MTD_REDBOOT_PARTS is not set
@@ -559,6 +580,7 @@ CONFIG_MTD_COMPLEX_MAPPINGS=y
559# 580#
560# CONFIG_MTD_DATAFLASH is not set 581# CONFIG_MTD_DATAFLASH is not set
561# CONFIG_MTD_M25P80 is not set 582# CONFIG_MTD_M25P80 is not set
583# CONFIG_MTD_SST25L is not set
562# CONFIG_MTD_SLRAM is not set 584# CONFIG_MTD_SLRAM is not set
563# CONFIG_MTD_PHRAM is not set 585# CONFIG_MTD_PHRAM is not set
564# CONFIG_MTD_MTDRAM is not set 586# CONFIG_MTD_MTDRAM is not set
@@ -574,6 +596,11 @@ CONFIG_MTD_COMPLEX_MAPPINGS=y
574# CONFIG_MTD_ONENAND is not set 596# CONFIG_MTD_ONENAND is not set
575 597
576# 598#
599# LPDDR flash memory drivers
600#
601# CONFIG_MTD_LPDDR is not set
602
603#
577# UBI - Unsorted block images 604# UBI - Unsorted block images
578# 605#
579# CONFIG_MTD_UBI is not set 606# CONFIG_MTD_UBI is not set
@@ -590,9 +617,14 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
590# CONFIG_ATA_OVER_ETH is not set 617# CONFIG_ATA_OVER_ETH is not set
591# CONFIG_BLK_DEV_HD is not set 618# CONFIG_BLK_DEV_HD is not set
592CONFIG_MISC_DEVICES=y 619CONFIG_MISC_DEVICES=y
593# CONFIG_EEPROM_93CX6 is not set
594# CONFIG_ENCLOSURE_SERVICES is not set 620# CONFIG_ENCLOSURE_SERVICES is not set
595# CONFIG_C2PORT is not set 621# CONFIG_C2PORT is not set
622
623#
624# EEPROM support
625#
626# CONFIG_EEPROM_AT25 is not set
627# CONFIG_EEPROM_93CX6 is not set
596CONFIG_HAVE_IDE=y 628CONFIG_HAVE_IDE=y
597# CONFIG_IDE is not set 629# CONFIG_IDE is not set
598 630
@@ -616,9 +648,12 @@ CONFIG_NETDEVICES=y
616CONFIG_NET_ETHERNET=y 648CONFIG_NET_ETHERNET=y
617CONFIG_MII=y 649CONFIG_MII=y
618CONFIG_SMC91X=y 650CONFIG_SMC91X=y
619# CONFIG_SMSC911X is not set
620# CONFIG_DM9000 is not set 651# CONFIG_DM9000 is not set
621# CONFIG_ENC28J60 is not set 652# CONFIG_ENC28J60 is not set
653# CONFIG_ETHOC is not set
654# CONFIG_SMSC911X is not set
655# CONFIG_DNET is not set
656# CONFIG_ADF702X is not set
622# CONFIG_IBM_NEW_EMAC_ZMII is not set 657# CONFIG_IBM_NEW_EMAC_ZMII is not set
623# CONFIG_IBM_NEW_EMAC_RGMII is not set 658# CONFIG_IBM_NEW_EMAC_RGMII is not set
624# CONFIG_IBM_NEW_EMAC_TAH is not set 659# CONFIG_IBM_NEW_EMAC_TAH is not set
@@ -627,15 +662,16 @@ CONFIG_SMC91X=y
627# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set 662# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
628# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 663# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
629# CONFIG_B44 is not set 664# CONFIG_B44 is not set
665# CONFIG_KS8842 is not set
666# CONFIG_KS8851 is not set
667# CONFIG_KS8851_MLL is not set
630# CONFIG_NETDEV_1000 is not set 668# CONFIG_NETDEV_1000 is not set
631# CONFIG_NETDEV_10000 is not set 669# CONFIG_NETDEV_10000 is not set
670# CONFIG_WLAN is not set
632 671
633# 672#
634# Wireless LAN 673# Enable WiMAX (Networking options) to see the WiMAX drivers
635# 674#
636# CONFIG_WLAN_PRE80211 is not set
637# CONFIG_WLAN_80211 is not set
638# CONFIG_IWLWIFI_LEDS is not set
639# CONFIG_WAN is not set 675# CONFIG_WAN is not set
640# CONFIG_PPP is not set 676# CONFIG_PPP is not set
641# CONFIG_SLIP is not set 677# CONFIG_SLIP is not set
@@ -679,15 +715,12 @@ CONFIG_INPUT_EVDEV=m
679# 715#
680# Character devices 716# Character devices
681# 717#
682# CONFIG_AD9960 is not set
683CONFIG_BFIN_DMA_INTERFACE=m 718CONFIG_BFIN_DMA_INTERFACE=m
684# CONFIG_BFIN_PPI is not set 719# CONFIG_BFIN_PPI is not set
685# CONFIG_BFIN_PPIFCD is not set 720# CONFIG_BFIN_PPIFCD is not set
686# CONFIG_BFIN_SIMPLE_TIMER is not set 721# CONFIG_BFIN_SIMPLE_TIMER is not set
687# CONFIG_BFIN_SPI_ADC is not set 722# CONFIG_BFIN_SPI_ADC is not set
688CONFIG_BFIN_SPORT=y 723CONFIG_BFIN_SPORT=y
689# CONFIG_BFIN_TIMER_LATENCY is not set
690CONFIG_SIMPLE_GPIO=m
691# CONFIG_VT is not set 724# CONFIG_VT is not set
692# CONFIG_DEVKMEM is not set 725# CONFIG_DEVKMEM is not set
693CONFIG_BFIN_JTAG_COMM=m 726CONFIG_BFIN_JTAG_COMM=m
@@ -701,6 +734,7 @@ CONFIG_BFIN_JTAG_COMM=m
701# 734#
702# Non-8250 serial port support 735# Non-8250 serial port support
703# 736#
737# CONFIG_SERIAL_MAX3100 is not set
704CONFIG_SERIAL_BFIN=y 738CONFIG_SERIAL_BFIN=y
705CONFIG_SERIAL_BFIN_CONSOLE=y 739CONFIG_SERIAL_BFIN_CONSOLE=y
706CONFIG_SERIAL_BFIN_DMA=y 740CONFIG_SERIAL_BFIN_DMA=y
@@ -711,12 +745,8 @@ CONFIG_SERIAL_CORE=y
711CONFIG_SERIAL_CORE_CONSOLE=y 745CONFIG_SERIAL_CORE_CONSOLE=y
712# CONFIG_SERIAL_BFIN_SPORT is not set 746# CONFIG_SERIAL_BFIN_SPORT is not set
713CONFIG_UNIX98_PTYS=y 747CONFIG_UNIX98_PTYS=y
748# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
714# CONFIG_LEGACY_PTYS is not set 749# CONFIG_LEGACY_PTYS is not set
715
716#
717# CAN, the car bus and industrial fieldbus
718#
719# CONFIG_CAN4LINUX is not set
720# CONFIG_IPMI_HANDLER is not set 750# CONFIG_IPMI_HANDLER is not set
721# CONFIG_HW_RANDOM is not set 751# CONFIG_HW_RANDOM is not set
722# CONFIG_R3964 is not set 752# CONFIG_R3964 is not set
@@ -734,13 +764,18 @@ CONFIG_SPI_BFIN=y
734# CONFIG_SPI_BFIN_LOCK is not set 764# CONFIG_SPI_BFIN_LOCK is not set
735# CONFIG_SPI_BFIN_SPORT is not set 765# CONFIG_SPI_BFIN_SPORT is not set
736# CONFIG_SPI_BITBANG is not set 766# CONFIG_SPI_BITBANG is not set
767# CONFIG_SPI_GPIO is not set
737 768
738# 769#
739# SPI Protocol Masters 770# SPI Protocol Masters
740# 771#
741# CONFIG_EEPROM_AT25 is not set
742# CONFIG_SPI_SPIDEV is not set 772# CONFIG_SPI_SPIDEV is not set
743# CONFIG_SPI_TLE62X0 is not set 773# CONFIG_SPI_TLE62X0 is not set
774
775#
776# PPS support
777#
778# CONFIG_PPS is not set
744CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y 779CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
745CONFIG_GPIOLIB=y 780CONFIG_GPIOLIB=y
746# CONFIG_DEBUG_GPIO is not set 781# CONFIG_DEBUG_GPIO is not set
@@ -753,9 +788,6 @@ CONFIG_GPIO_SYSFS=y
753# 788#
754# I2C GPIO expanders: 789# I2C GPIO expanders:
755# 790#
756# CONFIG_GPIO_MAX732X is not set
757# CONFIG_GPIO_PCA953X is not set
758# CONFIG_GPIO_PCF857X is not set
759 791
760# 792#
761# PCI GPIO expanders: 793# PCI GPIO expanders:
@@ -766,11 +798,15 @@ CONFIG_GPIO_SYSFS=y
766# 798#
767# CONFIG_GPIO_MAX7301 is not set 799# CONFIG_GPIO_MAX7301 is not set
768# CONFIG_GPIO_MCP23S08 is not set 800# CONFIG_GPIO_MCP23S08 is not set
801# CONFIG_GPIO_MC33880 is not set
802
803#
804# AC97 GPIO expanders:
805#
769# CONFIG_W1 is not set 806# CONFIG_W1 is not set
770# CONFIG_POWER_SUPPLY is not set 807# CONFIG_POWER_SUPPLY is not set
771# CONFIG_HWMON is not set 808# CONFIG_HWMON is not set
772# CONFIG_THERMAL is not set 809# CONFIG_THERMAL is not set
773# CONFIG_THERMAL_HWMON is not set
774CONFIG_WATCHDOG=y 810CONFIG_WATCHDOG=y
775# CONFIG_WATCHDOG_NOWAYOUT is not set 811# CONFIG_WATCHDOG_NOWAYOUT is not set
776 812
@@ -793,23 +829,10 @@ CONFIG_SSB_POSSIBLE=y
793# CONFIG_MFD_SM501 is not set 829# CONFIG_MFD_SM501 is not set
794# CONFIG_HTC_PASIC3 is not set 830# CONFIG_HTC_PASIC3 is not set
795# CONFIG_MFD_TMIO is not set 831# CONFIG_MFD_TMIO is not set
832# CONFIG_MFD_MC13783 is not set
833# CONFIG_EZX_PCAP is not set
796# CONFIG_REGULATOR is not set 834# CONFIG_REGULATOR is not set
797 835# CONFIG_MEDIA_SUPPORT is not set
798#
799# Multimedia devices
800#
801
802#
803# Multimedia core support
804#
805# CONFIG_VIDEO_DEV is not set
806# CONFIG_DVB_CORE is not set
807# CONFIG_VIDEO_MEDIA is not set
808
809#
810# Multimedia drivers
811#
812# CONFIG_DAB is not set
813 836
814# 837#
815# Graphics support 838# Graphics support
@@ -826,14 +849,12 @@ CONFIG_SSB_POSSIBLE=y
826# CONFIG_SOUND is not set 849# CONFIG_SOUND is not set
827CONFIG_HID_SUPPORT=y 850CONFIG_HID_SUPPORT=y
828CONFIG_HID=m 851CONFIG_HID=m
829# CONFIG_HID_DEBUG is not set
830# CONFIG_HIDRAW is not set 852# CONFIG_HIDRAW is not set
831# CONFIG_HID_PID is not set 853# CONFIG_HID_PID is not set
832 854
833# 855#
834# Special HID drivers 856# Special HID drivers
835# 857#
836CONFIG_HID_COMPAT=y
837# CONFIG_USB_SUPPORT is not set 858# CONFIG_USB_SUPPORT is not set
838# CONFIG_MMC is not set 859# CONFIG_MMC is not set
839# CONFIG_MEMSTICK is not set 860# CONFIG_MEMSTICK is not set
@@ -864,6 +885,7 @@ CONFIG_RTC_INTF_DEV=y
864# CONFIG_RTC_DRV_R9701 is not set 885# CONFIG_RTC_DRV_R9701 is not set
865# CONFIG_RTC_DRV_RS5C348 is not set 886# CONFIG_RTC_DRV_RS5C348 is not set
866# CONFIG_RTC_DRV_DS3234 is not set 887# CONFIG_RTC_DRV_DS3234 is not set
888# CONFIG_RTC_DRV_PCF2123 is not set
867 889
868# 890#
869# Platform RTC drivers 891# Platform RTC drivers
@@ -884,10 +906,20 @@ CONFIG_RTC_INTF_DEV=y
884# 906#
885CONFIG_RTC_DRV_BFIN=y 907CONFIG_RTC_DRV_BFIN=y
886# CONFIG_DMADEVICES is not set 908# CONFIG_DMADEVICES is not set
909# CONFIG_AUXDISPLAY is not set
887# CONFIG_UIO is not set 910# CONFIG_UIO is not set
911
912#
913# TI VLYNQ
914#
888# CONFIG_STAGING is not set 915# CONFIG_STAGING is not set
889 916
890# 917#
918# Firmware Drivers
919#
920# CONFIG_FIRMWARE_MEMMAP is not set
921
922#
891# File systems 923# File systems
892# 924#
893# CONFIG_EXT2_FS is not set 925# CONFIG_EXT2_FS is not set
@@ -896,9 +928,13 @@ CONFIG_RTC_DRV_BFIN=y
896# CONFIG_REISERFS_FS is not set 928# CONFIG_REISERFS_FS is not set
897# CONFIG_JFS_FS is not set 929# CONFIG_JFS_FS is not set
898# CONFIG_FS_POSIX_ACL is not set 930# CONFIG_FS_POSIX_ACL is not set
899CONFIG_FILE_LOCKING=y
900# CONFIG_XFS_FS is not set 931# CONFIG_XFS_FS is not set
932# CONFIG_GFS2_FS is not set
901# CONFIG_OCFS2_FS is not set 933# CONFIG_OCFS2_FS is not set
934# CONFIG_BTRFS_FS is not set
935# CONFIG_NILFS2_FS is not set
936CONFIG_FILE_LOCKING=y
937CONFIG_FSNOTIFY=y
902# CONFIG_DNOTIFY is not set 938# CONFIG_DNOTIFY is not set
903CONFIG_INOTIFY=y 939CONFIG_INOTIFY=y
904CONFIG_INOTIFY_USER=y 940CONFIG_INOTIFY_USER=y
@@ -908,6 +944,11 @@ CONFIG_INOTIFY_USER=y
908# CONFIG_FUSE_FS is not set 944# CONFIG_FUSE_FS is not set
909 945
910# 946#
947# Caches
948#
949# CONFIG_FSCACHE is not set
950
951#
911# CD-ROM/DVD Filesystems 952# CD-ROM/DVD Filesystems
912# 953#
913# CONFIG_ISO9660_FS is not set 954# CONFIG_ISO9660_FS is not set
@@ -926,13 +967,9 @@ CONFIG_INOTIFY_USER=y
926CONFIG_PROC_FS=y 967CONFIG_PROC_FS=y
927CONFIG_PROC_SYSCTL=y 968CONFIG_PROC_SYSCTL=y
928CONFIG_SYSFS=y 969CONFIG_SYSFS=y
929# CONFIG_TMPFS is not set
930# CONFIG_HUGETLB_PAGE is not set 970# CONFIG_HUGETLB_PAGE is not set
931# CONFIG_CONFIGFS_FS is not set 971# CONFIG_CONFIGFS_FS is not set
932 972CONFIG_MISC_FILESYSTEMS=y
933#
934# Miscellaneous filesystems
935#
936# CONFIG_ADFS_FS is not set 973# CONFIG_ADFS_FS is not set
937# CONFIG_AFFS_FS is not set 974# CONFIG_AFFS_FS is not set
938# CONFIG_HFS_FS is not set 975# CONFIG_HFS_FS is not set
@@ -951,17 +988,8 @@ CONFIG_JFFS2_ZLIB=y
951# CONFIG_JFFS2_LZO is not set 988# CONFIG_JFFS2_LZO is not set
952CONFIG_JFFS2_RTIME=y 989CONFIG_JFFS2_RTIME=y
953# CONFIG_JFFS2_RUBIN is not set 990# CONFIG_JFFS2_RUBIN is not set
954CONFIG_YAFFS_FS=m
955CONFIG_YAFFS_YAFFS1=y
956# CONFIG_YAFFS_9BYTE_TAGS is not set
957# CONFIG_YAFFS_DOES_ECC is not set
958CONFIG_YAFFS_YAFFS2=y
959CONFIG_YAFFS_AUTO_YAFFS2=y
960# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
961# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
962# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
963CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
964# CONFIG_CRAMFS is not set 991# CONFIG_CRAMFS is not set
992# CONFIG_SQUASHFS is not set
965# CONFIG_VXFS_FS is not set 993# CONFIG_VXFS_FS is not set
966# CONFIG_MINIX_FS is not set 994# CONFIG_MINIX_FS is not set
967# CONFIG_OMFS_FS is not set 995# CONFIG_OMFS_FS is not set
@@ -980,7 +1008,6 @@ CONFIG_LOCKD=m
980CONFIG_LOCKD_V4=y 1008CONFIG_LOCKD_V4=y
981CONFIG_NFS_COMMON=y 1009CONFIG_NFS_COMMON=y
982CONFIG_SUNRPC=m 1010CONFIG_SUNRPC=m
983# CONFIG_SUNRPC_REGISTER_V4 is not set
984# CONFIG_RPCSEC_GSS_KRB5 is not set 1011# CONFIG_RPCSEC_GSS_KRB5 is not set
985# CONFIG_RPCSEC_GSS_SPKM3 is not set 1012# CONFIG_RPCSEC_GSS_SPKM3 is not set
986CONFIG_SMB_FS=m 1013CONFIG_SMB_FS=m
@@ -1045,14 +1072,19 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
1045CONFIG_ENABLE_MUST_CHECK=y 1072CONFIG_ENABLE_MUST_CHECK=y
1046CONFIG_FRAME_WARN=1024 1073CONFIG_FRAME_WARN=1024
1047# CONFIG_MAGIC_SYSRQ is not set 1074# CONFIG_MAGIC_SYSRQ is not set
1075# CONFIG_STRIP_ASM_SYMS is not set
1048# CONFIG_UNUSED_SYMBOLS is not set 1076# CONFIG_UNUSED_SYMBOLS is not set
1049CONFIG_DEBUG_FS=y 1077CONFIG_DEBUG_FS=y
1050# CONFIG_HEADERS_CHECK is not set 1078# CONFIG_HEADERS_CHECK is not set
1079CONFIG_DEBUG_SECTION_MISMATCH=y
1051CONFIG_DEBUG_KERNEL=y 1080CONFIG_DEBUG_KERNEL=y
1052CONFIG_DEBUG_SHIRQ=y 1081CONFIG_DEBUG_SHIRQ=y
1053CONFIG_DETECT_SOFTLOCKUP=y 1082CONFIG_DETECT_SOFTLOCKUP=y
1054# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set 1083# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
1055CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 1084CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
1085CONFIG_DETECT_HUNG_TASK=y
1086# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
1087CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
1056CONFIG_SCHED_DEBUG=y 1088CONFIG_SCHED_DEBUG=y
1057# CONFIG_SCHEDSTATS is not set 1089# CONFIG_SCHEDSTATS is not set
1058# CONFIG_TIMER_STATS is not set 1090# CONFIG_TIMER_STATS is not set
@@ -1060,31 +1092,39 @@ CONFIG_SCHED_DEBUG=y
1060# CONFIG_DEBUG_SLAB is not set 1092# CONFIG_DEBUG_SLAB is not set
1061# CONFIG_DEBUG_SPINLOCK is not set 1093# CONFIG_DEBUG_SPINLOCK is not set
1062# CONFIG_DEBUG_MUTEXES is not set 1094# CONFIG_DEBUG_MUTEXES is not set
1095# CONFIG_DEBUG_LOCK_ALLOC is not set
1096# CONFIG_PROVE_LOCKING is not set
1097# CONFIG_LOCK_STAT is not set
1063# CONFIG_DEBUG_SPINLOCK_SLEEP is not set 1098# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1064# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set 1099# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1065# CONFIG_DEBUG_KOBJECT is not set 1100# CONFIG_DEBUG_KOBJECT is not set
1066CONFIG_DEBUG_BUGVERBOSE=y 1101CONFIG_DEBUG_BUGVERBOSE=y
1067CONFIG_DEBUG_INFO=y 1102CONFIG_DEBUG_INFO=y
1068# CONFIG_DEBUG_VM is not set 1103# CONFIG_DEBUG_VM is not set
1104# CONFIG_DEBUG_NOMMU_REGIONS is not set
1069# CONFIG_DEBUG_WRITECOUNT is not set 1105# CONFIG_DEBUG_WRITECOUNT is not set
1070# CONFIG_DEBUG_MEMORY_INIT is not set 1106# CONFIG_DEBUG_MEMORY_INIT is not set
1071# CONFIG_DEBUG_LIST is not set 1107# CONFIG_DEBUG_LIST is not set
1072# CONFIG_DEBUG_SG is not set 1108# CONFIG_DEBUG_SG is not set
1109# CONFIG_DEBUG_NOTIFIERS is not set
1110# CONFIG_DEBUG_CREDENTIALS is not set
1073# CONFIG_FRAME_POINTER is not set 1111# CONFIG_FRAME_POINTER is not set
1074# CONFIG_BOOT_PRINTK_DELAY is not set 1112# CONFIG_BOOT_PRINTK_DELAY is not set
1075# CONFIG_RCU_TORTURE_TEST is not set 1113# CONFIG_RCU_TORTURE_TEST is not set
1076# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1114# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1077# CONFIG_BACKTRACE_SELF_TEST is not set 1115# CONFIG_BACKTRACE_SELF_TEST is not set
1078# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set 1116# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1117# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
1079# CONFIG_FAULT_INJECTION is not set 1118# CONFIG_FAULT_INJECTION is not set
1080 1119# CONFIG_PAGE_POISONING is not set
1081# 1120CONFIG_HAVE_FUNCTION_TRACER=y
1082# Tracers 1121CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
1083# 1122CONFIG_TRACING_SUPPORT=y
1084# CONFIG_SCHED_TRACER is not set 1123# CONFIG_FTRACE is not set
1085# CONFIG_CONTEXT_SWITCH_TRACER is not set 1124# CONFIG_BRANCH_PROFILE_NONE is not set
1086# CONFIG_BOOT_TRACER is not set 1125# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
1087# CONFIG_DYNAMIC_PRINTK_DEBUG is not set 1126# CONFIG_PROFILE_ALL_BRANCHES is not set
1127# CONFIG_DYNAMIC_DEBUG is not set
1088# CONFIG_SAMPLES is not set 1128# CONFIG_SAMPLES is not set
1089CONFIG_HAVE_ARCH_KGDB=y 1129CONFIG_HAVE_ARCH_KGDB=y
1090# CONFIG_KGDB is not set 1130# CONFIG_KGDB is not set
@@ -1109,6 +1149,7 @@ CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y
1109CONFIG_EARLY_PRINTK=y 1149CONFIG_EARLY_PRINTK=y
1110CONFIG_CPLB_INFO=y 1150CONFIG_CPLB_INFO=y
1111CONFIG_ACCESS_CHECK=y 1151CONFIG_ACCESS_CHECK=y
1152# CONFIG_BFIN_ISRAM_SELF_TEST is not set
1112 1153
1113# 1154#
1114# Security options 1155# Security options
@@ -1117,14 +1158,14 @@ CONFIG_ACCESS_CHECK=y
1117CONFIG_SECURITY=y 1158CONFIG_SECURITY=y
1118# CONFIG_SECURITYFS is not set 1159# CONFIG_SECURITYFS is not set
1119# CONFIG_SECURITY_NETWORK is not set 1160# CONFIG_SECURITY_NETWORK is not set
1161# CONFIG_SECURITY_PATH is not set
1120# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1162# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1121CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0 1163# CONFIG_SECURITY_TOMOYO is not set
1122CONFIG_CRYPTO=y 1164CONFIG_CRYPTO=y
1123 1165
1124# 1166#
1125# Crypto core or helper 1167# Crypto core or helper
1126# 1168#
1127# CONFIG_CRYPTO_FIPS is not set
1128# CONFIG_CRYPTO_MANAGER is not set 1169# CONFIG_CRYPTO_MANAGER is not set
1129# CONFIG_CRYPTO_MANAGER2 is not set 1170# CONFIG_CRYPTO_MANAGER2 is not set
1130# CONFIG_CRYPTO_GF128MUL is not set 1171# CONFIG_CRYPTO_GF128MUL is not set
@@ -1156,11 +1197,13 @@ CONFIG_CRYPTO=y
1156# 1197#
1157# CONFIG_CRYPTO_HMAC is not set 1198# CONFIG_CRYPTO_HMAC is not set
1158# CONFIG_CRYPTO_XCBC is not set 1199# CONFIG_CRYPTO_XCBC is not set
1200# CONFIG_CRYPTO_VMAC is not set
1159 1201
1160# 1202#
1161# Digest 1203# Digest
1162# 1204#
1163# CONFIG_CRYPTO_CRC32C is not set 1205# CONFIG_CRYPTO_CRC32C is not set
1206# CONFIG_CRYPTO_GHASH is not set
1164# CONFIG_CRYPTO_MD4 is not set 1207# CONFIG_CRYPTO_MD4 is not set
1165# CONFIG_CRYPTO_MD5 is not set 1208# CONFIG_CRYPTO_MD5 is not set
1166# CONFIG_CRYPTO_MICHAEL_MIC is not set 1209# CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1197,6 +1240,7 @@ CONFIG_CRYPTO=y
1197# Compression 1240# Compression
1198# 1241#
1199# CONFIG_CRYPTO_DEFLATE is not set 1242# CONFIG_CRYPTO_DEFLATE is not set
1243# CONFIG_CRYPTO_ZLIB is not set
1200# CONFIG_CRYPTO_LZO is not set 1244# CONFIG_CRYPTO_LZO is not set
1201 1245
1202# 1246#
@@ -1204,11 +1248,13 @@ CONFIG_CRYPTO=y
1204# 1248#
1205# CONFIG_CRYPTO_ANSI_CPRNG is not set 1249# CONFIG_CRYPTO_ANSI_CPRNG is not set
1206CONFIG_CRYPTO_HW=y 1250CONFIG_CRYPTO_HW=y
1251# CONFIG_BINARY_PRINTF is not set
1207 1252
1208# 1253#
1209# Library routines 1254# Library routines
1210# 1255#
1211CONFIG_BITREVERSE=y 1256CONFIG_BITREVERSE=y
1257CONFIG_GENERIC_FIND_LAST_BIT=y
1212CONFIG_CRC_CCITT=m 1258CONFIG_CRC_CCITT=m
1213# CONFIG_CRC16 is not set 1259# CONFIG_CRC16 is not set
1214# CONFIG_CRC_T10DIF is not set 1260# CONFIG_CRC_T10DIF is not set
@@ -1218,6 +1264,8 @@ CONFIG_CRC32=y
1218# CONFIG_LIBCRC32C is not set 1264# CONFIG_LIBCRC32C is not set
1219CONFIG_ZLIB_INFLATE=y 1265CONFIG_ZLIB_INFLATE=y
1220CONFIG_ZLIB_DEFLATE=m 1266CONFIG_ZLIB_DEFLATE=m
1267CONFIG_DECOMPRESS_GZIP=y
1221CONFIG_HAS_IOMEM=y 1268CONFIG_HAS_IOMEM=y
1222CONFIG_HAS_IOPORT=y 1269CONFIG_HAS_IOPORT=y
1223CONFIG_HAS_DMA=y 1270CONFIG_HAS_DMA=y
1271CONFIG_NLATTR=y
diff --git a/arch/blackfin/configs/BF533-STAMP_defconfig b/arch/blackfin/configs/BF533-STAMP_defconfig
index 6c60c8286318..c3fe6e5b612f 100644
--- a/arch/blackfin/configs/BF533-STAMP_defconfig
+++ b/arch/blackfin/configs/BF533-STAMP_defconfig
@@ -1,22 +1,27 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.28.10 3# Linux kernel version: 2.6.32.2
4# Thu May 21 05:50:01 2009
5# 4#
6# CONFIG_MMU is not set 5# CONFIG_MMU is not set
7# CONFIG_FPU is not set 6# CONFIG_FPU is not set
8CONFIG_RWSEM_GENERIC_SPINLOCK=y 7CONFIG_RWSEM_GENERIC_SPINLOCK=y
9# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set 8# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
10CONFIG_BLACKFIN=y 9CONFIG_BLACKFIN=y
10CONFIG_GENERIC_CSUM=y
11CONFIG_GENERIC_BUG=y
11CONFIG_ZONE_DMA=y 12CONFIG_ZONE_DMA=y
12CONFIG_GENERIC_FIND_NEXT_BIT=y 13CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_IRQ_PROBE=y 15CONFIG_GENERIC_IRQ_PROBE=y
16CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_GPIO=y 17CONFIG_GENERIC_GPIO=y
17CONFIG_FORCE_MAX_ZONEORDER=14 18CONFIG_FORCE_MAX_ZONEORDER=14
18CONFIG_GENERIC_CALIBRATE_DELAY=y 19CONFIG_GENERIC_CALIBRATE_DELAY=y
20CONFIG_LOCKDEP_SUPPORT=y
21CONFIG_STACKTRACE_SUPPORT=y
22CONFIG_TRACE_IRQFLAGS_SUPPORT=y
19CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 23CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
24CONFIG_CONSTRUCTORS=y
20 25
21# 26#
22# General setup 27# General setup
@@ -26,22 +31,41 @@ CONFIG_BROKEN_ON_SMP=y
26CONFIG_INIT_ENV_ARG_LIMIT=32 31CONFIG_INIT_ENV_ARG_LIMIT=32
27CONFIG_LOCALVERSION="" 32CONFIG_LOCALVERSION=""
28CONFIG_LOCALVERSION_AUTO=y 33CONFIG_LOCALVERSION_AUTO=y
34CONFIG_HAVE_KERNEL_GZIP=y
35CONFIG_HAVE_KERNEL_BZIP2=y
36CONFIG_HAVE_KERNEL_LZMA=y
37CONFIG_KERNEL_GZIP=y
38# CONFIG_KERNEL_BZIP2 is not set
39# CONFIG_KERNEL_LZMA is not set
29CONFIG_SYSVIPC=y 40CONFIG_SYSVIPC=y
30CONFIG_SYSVIPC_SYSCTL=y 41CONFIG_SYSVIPC_SYSCTL=y
31# CONFIG_POSIX_MQUEUE is not set 42# CONFIG_POSIX_MQUEUE is not set
32# CONFIG_BSD_PROCESS_ACCT is not set 43# CONFIG_BSD_PROCESS_ACCT is not set
33# CONFIG_TASKSTATS is not set 44# CONFIG_TASKSTATS is not set
34# CONFIG_AUDIT is not set 45# CONFIG_AUDIT is not set
46
47#
48# RCU Subsystem
49#
50CONFIG_TREE_RCU=y
51# CONFIG_TREE_PREEMPT_RCU is not set
52# CONFIG_RCU_TRACE is not set
53CONFIG_RCU_FANOUT=32
54# CONFIG_RCU_FANOUT_EXACT is not set
55# CONFIG_TREE_RCU_TRACE is not set
35CONFIG_IKCONFIG=y 56CONFIG_IKCONFIG=y
36CONFIG_IKCONFIG_PROC=y 57CONFIG_IKCONFIG_PROC=y
37CONFIG_LOG_BUF_SHIFT=14 58CONFIG_LOG_BUF_SHIFT=14
38# CONFIG_CGROUPS is not set
39# CONFIG_GROUP_SCHED is not set 59# CONFIG_GROUP_SCHED is not set
60# CONFIG_CGROUPS is not set
40# CONFIG_SYSFS_DEPRECATED_V2 is not set 61# CONFIG_SYSFS_DEPRECATED_V2 is not set
41# CONFIG_RELAY is not set 62# CONFIG_RELAY is not set
42# CONFIG_NAMESPACES is not set 63# CONFIG_NAMESPACES is not set
43CONFIG_BLK_DEV_INITRD=y 64CONFIG_BLK_DEV_INITRD=y
44CONFIG_INITRAMFS_SOURCE="" 65CONFIG_INITRAMFS_SOURCE=""
66CONFIG_RD_GZIP=y
67# CONFIG_RD_BZIP2 is not set
68# CONFIG_RD_LZMA is not set
45# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 69# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
46CONFIG_SYSCTL=y 70CONFIG_SYSCTL=y
47CONFIG_ANON_INODES=y 71CONFIG_ANON_INODES=y
@@ -62,6 +86,10 @@ CONFIG_EPOLL=y
62# CONFIG_TIMERFD is not set 86# CONFIG_TIMERFD is not set
63# CONFIG_EVENTFD is not set 87# CONFIG_EVENTFD is not set
64# CONFIG_AIO is not set 88# CONFIG_AIO is not set
89
90#
91# Kernel Performance Events And Counters
92#
65CONFIG_VM_EVENT_COUNTERS=y 93CONFIG_VM_EVENT_COUNTERS=y
66CONFIG_COMPAT_BRK=y 94CONFIG_COMPAT_BRK=y
67CONFIG_SLAB=y 95CONFIG_SLAB=y
@@ -69,11 +97,15 @@ CONFIG_SLAB=y
69# CONFIG_SLOB is not set 97# CONFIG_SLOB is not set
70CONFIG_MMAP_ALLOW_UNINITIALIZED=y 98CONFIG_MMAP_ALLOW_UNINITIALIZED=y
71# CONFIG_PROFILING is not set 99# CONFIG_PROFILING is not set
72# CONFIG_MARKERS is not set
73CONFIG_HAVE_OPROFILE=y 100CONFIG_HAVE_OPROFILE=y
101
102#
103# GCOV-based kernel profiling
104#
105# CONFIG_GCOV_KERNEL is not set
106# CONFIG_SLOW_WORK is not set
74# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set 107# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
75CONFIG_SLABINFO=y 108CONFIG_SLABINFO=y
76CONFIG_TINY_SHMEM=y
77CONFIG_BASE_SMALL=0 109CONFIG_BASE_SMALL=0
78CONFIG_MODULES=y 110CONFIG_MODULES=y
79# CONFIG_MODULE_FORCE_LOAD is not set 111# CONFIG_MODULE_FORCE_LOAD is not set
@@ -81,11 +113,8 @@ CONFIG_MODULE_UNLOAD=y
81# CONFIG_MODULE_FORCE_UNLOAD is not set 113# CONFIG_MODULE_FORCE_UNLOAD is not set
82# CONFIG_MODVERSIONS is not set 114# CONFIG_MODVERSIONS is not set
83# CONFIG_MODULE_SRCVERSION_ALL is not set 115# CONFIG_MODULE_SRCVERSION_ALL is not set
84CONFIG_KMOD=y
85CONFIG_BLOCK=y 116CONFIG_BLOCK=y
86# CONFIG_LBD is not set 117# CONFIG_LBDAF is not set
87# CONFIG_BLK_DEV_IO_TRACE is not set
88# CONFIG_LSF is not set
89# CONFIG_BLK_DEV_BSG is not set 118# CONFIG_BLK_DEV_BSG is not set
90# CONFIG_BLK_DEV_INTEGRITY is not set 119# CONFIG_BLK_DEV_INTEGRITY is not set
91 120
@@ -101,7 +130,6 @@ CONFIG_DEFAULT_AS=y
101# CONFIG_DEFAULT_CFQ is not set 130# CONFIG_DEFAULT_CFQ is not set
102# CONFIG_DEFAULT_NOOP is not set 131# CONFIG_DEFAULT_NOOP is not set
103CONFIG_DEFAULT_IOSCHED="anticipatory" 132CONFIG_DEFAULT_IOSCHED="anticipatory"
104CONFIG_CLASSIC_RCU=y
105# CONFIG_PREEMPT_NONE is not set 133# CONFIG_PREEMPT_NONE is not set
106CONFIG_PREEMPT_VOLUNTARY=y 134CONFIG_PREEMPT_VOLUNTARY=y
107# CONFIG_PREEMPT is not set 135# CONFIG_PREEMPT is not set
@@ -132,15 +160,15 @@ CONFIG_BF533=y
132# CONFIG_BF537 is not set 160# CONFIG_BF537 is not set
133# CONFIG_BF538 is not set 161# CONFIG_BF538 is not set
134# CONFIG_BF539 is not set 162# CONFIG_BF539 is not set
135# CONFIG_BF542 is not set 163# CONFIG_BF542_std is not set
136# CONFIG_BF542M is not set 164# CONFIG_BF542M is not set
137# CONFIG_BF544 is not set 165# CONFIG_BF544_std is not set
138# CONFIG_BF544M is not set 166# CONFIG_BF544M is not set
139# CONFIG_BF547 is not set 167# CONFIG_BF547_std is not set
140# CONFIG_BF547M is not set 168# CONFIG_BF547M is not set
141# CONFIG_BF548 is not set 169# CONFIG_BF548_std is not set
142# CONFIG_BF548M is not set 170# CONFIG_BF548M is not set
143# CONFIG_BF549 is not set 171# CONFIG_BF549_std is not set
144# CONFIG_BF549M is not set 172# CONFIG_BF549M is not set
145# CONFIG_BF561 is not set 173# CONFIG_BF561 is not set
146CONFIG_BF_REV_MIN=3 174CONFIG_BF_REV_MIN=3
@@ -228,7 +256,7 @@ CONFIG_GENERIC_TIME=y
228CONFIG_GENERIC_CLOCKEVENTS=y 256CONFIG_GENERIC_CLOCKEVENTS=y
229# CONFIG_TICKSOURCE_GPTMR0 is not set 257# CONFIG_TICKSOURCE_GPTMR0 is not set
230CONFIG_TICKSOURCE_CORETMR=y 258CONFIG_TICKSOURCE_CORETMR=y
231# CONFIG_CYCLES_CLOCKSOURCE is not set 259CONFIG_CYCLES_CLOCKSOURCE=y
232# CONFIG_GPTMR0_CLOCKSOURCE is not set 260# CONFIG_GPTMR0_CLOCKSOURCE is not set
233CONFIG_TICK_ONESHOT=y 261CONFIG_TICK_ONESHOT=y
234# CONFIG_NO_HZ is not set 262# CONFIG_NO_HZ is not set
@@ -280,7 +308,6 @@ CONFIG_FLATMEM=y
280CONFIG_FLAT_NODE_MEM_MAP=y 308CONFIG_FLAT_NODE_MEM_MAP=y
281CONFIG_PAGEFLAGS_EXTENDED=y 309CONFIG_PAGEFLAGS_EXTENDED=y
282CONFIG_SPLIT_PTLOCK_CPUS=4 310CONFIG_SPLIT_PTLOCK_CPUS=4
283# CONFIG_RESOURCES_64BIT is not set
284# CONFIG_PHYS_ADDR_T_64BIT is not set 311# CONFIG_PHYS_ADDR_T_64BIT is not set
285CONFIG_ZONE_DMA_FLAG=1 312CONFIG_ZONE_DMA_FLAG=1
286CONFIG_VIRT_TO_BUS=y 313CONFIG_VIRT_TO_BUS=y
@@ -289,16 +316,18 @@ CONFIG_BFIN_GPTIMERS=m
289# CONFIG_DMA_UNCACHED_4M is not set 316# CONFIG_DMA_UNCACHED_4M is not set
290# CONFIG_DMA_UNCACHED_2M is not set 317# CONFIG_DMA_UNCACHED_2M is not set
291CONFIG_DMA_UNCACHED_1M=y 318CONFIG_DMA_UNCACHED_1M=y
319# CONFIG_DMA_UNCACHED_512K is not set
320# CONFIG_DMA_UNCACHED_256K is not set
321# CONFIG_DMA_UNCACHED_128K is not set
292# CONFIG_DMA_UNCACHED_NONE is not set 322# CONFIG_DMA_UNCACHED_NONE is not set
293 323
294# 324#
295# Cache Support 325# Cache Support
296# 326#
297CONFIG_BFIN_ICACHE=y 327CONFIG_BFIN_ICACHE=y
298# CONFIG_BFIN_ICACHE_LOCK is not set 328CONFIG_BFIN_EXTMEM_ICACHEABLE=y
299CONFIG_BFIN_DCACHE=y 329CONFIG_BFIN_DCACHE=y
300# CONFIG_BFIN_DCACHE_BANKA is not set 330# CONFIG_BFIN_DCACHE_BANKA is not set
301CONFIG_BFIN_EXTMEM_ICACHEABLE=y
302CONFIG_BFIN_EXTMEM_DCACHEABLE=y 331CONFIG_BFIN_EXTMEM_DCACHEABLE=y
303CONFIG_BFIN_EXTMEM_WRITEBACK=y 332CONFIG_BFIN_EXTMEM_WRITEBACK=y
304# CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set 333# CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set
@@ -309,7 +338,7 @@ CONFIG_BFIN_EXTMEM_WRITEBACK=y
309# CONFIG_MPU is not set 338# CONFIG_MPU is not set
310 339
311# 340#
312# Asynchonous Memory Configuration 341# Asynchronous Memory Configuration
313# 342#
314 343
315# 344#
@@ -355,6 +384,7 @@ CONFIG_PM=y
355CONFIG_PM_SLEEP=y 384CONFIG_PM_SLEEP=y
356CONFIG_SUSPEND=y 385CONFIG_SUSPEND=y
357CONFIG_SUSPEND_FREEZER=y 386CONFIG_SUSPEND_FREEZER=y
387# CONFIG_PM_RUNTIME is not set
358CONFIG_ARCH_SUSPEND_POSSIBLE=y 388CONFIG_ARCH_SUSPEND_POSSIBLE=y
359CONFIG_PM_BFIN_SLEEP_DEEPER=y 389CONFIG_PM_BFIN_SLEEP_DEEPER=y
360# CONFIG_PM_BFIN_SLEEP is not set 390# CONFIG_PM_BFIN_SLEEP is not set
@@ -376,11 +406,6 @@ CONFIG_NET=y
376CONFIG_PACKET=y 406CONFIG_PACKET=y
377# CONFIG_PACKET_MMAP is not set 407# CONFIG_PACKET_MMAP is not set
378CONFIG_UNIX=y 408CONFIG_UNIX=y
379CONFIG_XFRM=y
380# CONFIG_XFRM_USER is not set
381# CONFIG_XFRM_SUB_POLICY is not set
382# CONFIG_XFRM_MIGRATE is not set
383# CONFIG_XFRM_STATISTICS is not set
384# CONFIG_NET_KEY is not set 409# CONFIG_NET_KEY is not set
385CONFIG_INET=y 410CONFIG_INET=y
386# CONFIG_IP_MULTICAST is not set 411# CONFIG_IP_MULTICAST is not set
@@ -404,7 +429,6 @@ CONFIG_IP_PNP=y
404# CONFIG_INET_XFRM_MODE_BEET is not set 429# CONFIG_INET_XFRM_MODE_BEET is not set
405# CONFIG_INET_LRO is not set 430# CONFIG_INET_LRO is not set
406# CONFIG_INET_DIAG is not set 431# CONFIG_INET_DIAG is not set
407CONFIG_INET_TCP_DIAG=y
408# CONFIG_TCP_CONG_ADVANCED is not set 432# CONFIG_TCP_CONG_ADVANCED is not set
409CONFIG_TCP_CONG_CUBIC=y 433CONFIG_TCP_CONG_CUBIC=y
410CONFIG_DEFAULT_TCP_CONG="cubic" 434CONFIG_DEFAULT_TCP_CONG="cubic"
@@ -415,6 +439,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
415# CONFIG_NETFILTER is not set 439# CONFIG_NETFILTER is not set
416# CONFIG_IP_DCCP is not set 440# CONFIG_IP_DCCP is not set
417# CONFIG_IP_SCTP is not set 441# CONFIG_IP_SCTP is not set
442# CONFIG_RDS is not set
418# CONFIG_TIPC is not set 443# CONFIG_TIPC is not set
419# CONFIG_ATM is not set 444# CONFIG_ATM is not set
420# CONFIG_BRIDGE is not set 445# CONFIG_BRIDGE is not set
@@ -428,7 +453,10 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
428# CONFIG_LAPB is not set 453# CONFIG_LAPB is not set
429# CONFIG_ECONET is not set 454# CONFIG_ECONET is not set
430# CONFIG_WAN_ROUTER is not set 455# CONFIG_WAN_ROUTER is not set
456# CONFIG_PHONET is not set
457# CONFIG_IEEE802154 is not set
431# CONFIG_NET_SCHED is not set 458# CONFIG_NET_SCHED is not set
459# CONFIG_DCB is not set
432 460
433# 461#
434# Network testing 462# Network testing
@@ -474,13 +502,8 @@ CONFIG_SIR_BFIN_DMA=y
474# 502#
475# CONFIG_BT is not set 503# CONFIG_BT is not set
476# CONFIG_AF_RXRPC is not set 504# CONFIG_AF_RXRPC is not set
477# CONFIG_PHONET is not set 505# CONFIG_WIRELESS is not set
478CONFIG_WIRELESS=y 506# CONFIG_WIMAX is not set
479# CONFIG_CFG80211 is not set
480CONFIG_WIRELESS_OLD_REGULATORY=y
481# CONFIG_WIRELESS_EXT is not set
482# CONFIG_MAC80211 is not set
483# CONFIG_IEEE80211 is not set
484# CONFIG_RFKILL is not set 507# CONFIG_RFKILL is not set
485# CONFIG_NET_9P is not set 508# CONFIG_NET_9P is not set
486 509
@@ -501,6 +524,7 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
501# CONFIG_CONNECTOR is not set 524# CONFIG_CONNECTOR is not set
502CONFIG_MTD=y 525CONFIG_MTD=y
503# CONFIG_MTD_DEBUG is not set 526# CONFIG_MTD_DEBUG is not set
527# CONFIG_MTD_TESTS is not set
504# CONFIG_MTD_CONCAT is not set 528# CONFIG_MTD_CONCAT is not set
505CONFIG_MTD_PARTITIONS=y 529CONFIG_MTD_PARTITIONS=y
506# CONFIG_MTD_REDBOOT_PARTS is not set 530# CONFIG_MTD_REDBOOT_PARTS is not set
@@ -560,6 +584,7 @@ CONFIG_MTD_BFIN_ASYNC=m
560# 584#
561# CONFIG_MTD_DATAFLASH is not set 585# CONFIG_MTD_DATAFLASH is not set
562# CONFIG_MTD_M25P80 is not set 586# CONFIG_MTD_M25P80 is not set
587# CONFIG_MTD_SST25L is not set
563# CONFIG_MTD_SLRAM is not set 588# CONFIG_MTD_SLRAM is not set
564# CONFIG_MTD_PHRAM is not set 589# CONFIG_MTD_PHRAM is not set
565# CONFIG_MTD_MTDRAM is not set 590# CONFIG_MTD_MTDRAM is not set
@@ -575,6 +600,11 @@ CONFIG_MTD_BFIN_ASYNC=m
575# CONFIG_MTD_ONENAND is not set 600# CONFIG_MTD_ONENAND is not set
576 601
577# 602#
603# LPDDR flash memory drivers
604#
605# CONFIG_MTD_LPDDR is not set
606
607#
578# UBI - Unsorted block images 608# UBI - Unsorted block images
579# 609#
580# CONFIG_MTD_UBI is not set 610# CONFIG_MTD_UBI is not set
@@ -591,10 +621,20 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
591# CONFIG_ATA_OVER_ETH is not set 621# CONFIG_ATA_OVER_ETH is not set
592# CONFIG_BLK_DEV_HD is not set 622# CONFIG_BLK_DEV_HD is not set
593CONFIG_MISC_DEVICES=y 623CONFIG_MISC_DEVICES=y
594# CONFIG_EEPROM_93CX6 is not set 624# CONFIG_AD525X_DPOT is not set
595# CONFIG_ICS932S401 is not set 625# CONFIG_ICS932S401 is not set
596# CONFIG_ENCLOSURE_SERVICES is not set 626# CONFIG_ENCLOSURE_SERVICES is not set
627# CONFIG_ISL29003 is not set
597# CONFIG_C2PORT is not set 628# CONFIG_C2PORT is not set
629
630#
631# EEPROM support
632#
633# CONFIG_EEPROM_AT24 is not set
634# CONFIG_EEPROM_AT25 is not set
635# CONFIG_EEPROM_LEGACY is not set
636# CONFIG_EEPROM_MAX6875 is not set
637# CONFIG_EEPROM_93CX6 is not set
598CONFIG_HAVE_IDE=y 638CONFIG_HAVE_IDE=y
599# CONFIG_IDE is not set 639# CONFIG_IDE is not set
600 640
@@ -618,9 +658,12 @@ CONFIG_NETDEVICES=y
618CONFIG_NET_ETHERNET=y 658CONFIG_NET_ETHERNET=y
619CONFIG_MII=y 659CONFIG_MII=y
620CONFIG_SMC91X=y 660CONFIG_SMC91X=y
621# CONFIG_SMSC911X is not set
622# CONFIG_DM9000 is not set 661# CONFIG_DM9000 is not set
623# CONFIG_ENC28J60 is not set 662# CONFIG_ENC28J60 is not set
663# CONFIG_ETHOC is not set
664# CONFIG_SMSC911X is not set
665# CONFIG_DNET is not set
666# CONFIG_ADF702X is not set
624# CONFIG_IBM_NEW_EMAC_ZMII is not set 667# CONFIG_IBM_NEW_EMAC_ZMII is not set
625# CONFIG_IBM_NEW_EMAC_RGMII is not set 668# CONFIG_IBM_NEW_EMAC_RGMII is not set
626# CONFIG_IBM_NEW_EMAC_TAH is not set 669# CONFIG_IBM_NEW_EMAC_TAH is not set
@@ -629,15 +672,16 @@ CONFIG_SMC91X=y
629# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set 672# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
630# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 673# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
631# CONFIG_B44 is not set 674# CONFIG_B44 is not set
675# CONFIG_KS8842 is not set
676# CONFIG_KS8851 is not set
677# CONFIG_KS8851_MLL is not set
632# CONFIG_NETDEV_1000 is not set 678# CONFIG_NETDEV_1000 is not set
633# CONFIG_NETDEV_10000 is not set 679# CONFIG_NETDEV_10000 is not set
680# CONFIG_WLAN is not set
634 681
635# 682#
636# Wireless LAN 683# Enable WiMAX (Networking options) to see the WiMAX drivers
637# 684#
638# CONFIG_WLAN_PRE80211 is not set
639# CONFIG_WLAN_80211 is not set
640# CONFIG_IWLWIFI_LEDS is not set
641# CONFIG_WAN is not set 685# CONFIG_WAN is not set
642# CONFIG_PPP is not set 686# CONFIG_PPP is not set
643# CONFIG_SLIP is not set 687# CONFIG_SLIP is not set
@@ -672,7 +716,10 @@ CONFIG_INPUT_EVDEV=m
672# CONFIG_INPUT_TOUCHSCREEN is not set 716# CONFIG_INPUT_TOUCHSCREEN is not set
673CONFIG_INPUT_MISC=y 717CONFIG_INPUT_MISC=y
674# CONFIG_INPUT_UINPUT is not set 718# CONFIG_INPUT_UINPUT is not set
675CONFIG_CONFIG_INPUT_PCF8574=m 719# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
720# CONFIG_INPUT_AD714X is not set
721# CONFIG_INPUT_ADXL34X is not set
722# CONFIG_INPUT_PCF8574 is not set
676 723
677# 724#
678# Hardware I/O ports 725# Hardware I/O ports
@@ -683,16 +730,13 @@ CONFIG_CONFIG_INPUT_PCF8574=m
683# 730#
684# Character devices 731# Character devices
685# 732#
686# CONFIG_AD9960 is not set
687CONFIG_BFIN_DMA_INTERFACE=m 733CONFIG_BFIN_DMA_INTERFACE=m
688# CONFIG_BFIN_PPI is not set 734# CONFIG_BFIN_PPI is not set
689# CONFIG_BFIN_PPIFCD is not set 735# CONFIG_BFIN_PPIFCD is not set
690# CONFIG_BFIN_SIMPLE_TIMER is not set 736# CONFIG_BFIN_SIMPLE_TIMER is not set
691# CONFIG_BFIN_SPI_ADC is not set 737# CONFIG_BFIN_SPI_ADC is not set
692CONFIG_BFIN_SPORT=m 738CONFIG_BFIN_SPORT=m
693# CONFIG_BFIN_TIMER_LATENCY is not set
694# CONFIG_BFIN_TWI_LCD is not set 739# CONFIG_BFIN_TWI_LCD is not set
695CONFIG_SIMPLE_GPIO=m
696# CONFIG_VT is not set 740# CONFIG_VT is not set
697# CONFIG_DEVKMEM is not set 741# CONFIG_DEVKMEM is not set
698CONFIG_BFIN_JTAG_COMM=m 742CONFIG_BFIN_JTAG_COMM=m
@@ -706,6 +750,7 @@ CONFIG_BFIN_JTAG_COMM=m
706# 750#
707# Non-8250 serial port support 751# Non-8250 serial port support
708# 752#
753# CONFIG_SERIAL_MAX3100 is not set
709CONFIG_SERIAL_BFIN=y 754CONFIG_SERIAL_BFIN=y
710CONFIG_SERIAL_BFIN_CONSOLE=y 755CONFIG_SERIAL_BFIN_CONSOLE=y
711CONFIG_SERIAL_BFIN_DMA=y 756CONFIG_SERIAL_BFIN_DMA=y
@@ -716,12 +761,8 @@ CONFIG_SERIAL_CORE=y
716CONFIG_SERIAL_CORE_CONSOLE=y 761CONFIG_SERIAL_CORE_CONSOLE=y
717# CONFIG_SERIAL_BFIN_SPORT is not set 762# CONFIG_SERIAL_BFIN_SPORT is not set
718CONFIG_UNIX98_PTYS=y 763CONFIG_UNIX98_PTYS=y
764# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
719# CONFIG_LEGACY_PTYS is not set 765# CONFIG_LEGACY_PTYS is not set
720
721#
722# CAN, the car bus and industrial fieldbus
723#
724# CONFIG_CAN4LINUX is not set
725# CONFIG_IPMI_HANDLER is not set 766# CONFIG_IPMI_HANDLER is not set
726# CONFIG_HW_RANDOM is not set 767# CONFIG_HW_RANDOM is not set
727# CONFIG_R3964 is not set 768# CONFIG_R3964 is not set
@@ -729,6 +770,7 @@ CONFIG_UNIX98_PTYS=y
729# CONFIG_TCG_TPM is not set 770# CONFIG_TCG_TPM is not set
730CONFIG_I2C=m 771CONFIG_I2C=m
731CONFIG_I2C_BOARDINFO=y 772CONFIG_I2C_BOARDINFO=y
773CONFIG_I2C_COMPAT=y
732CONFIG_I2C_CHARDEV=m 774CONFIG_I2C_CHARDEV=m
733CONFIG_I2C_HELPER_AUTO=y 775CONFIG_I2C_HELPER_AUTO=y
734 776
@@ -759,14 +801,6 @@ CONFIG_I2C_HELPER_AUTO=y
759# Miscellaneous I2C Chip support 801# Miscellaneous I2C Chip support
760# 802#
761# CONFIG_DS1682 is not set 803# CONFIG_DS1682 is not set
762# CONFIG_EEPROM_AT24 is not set
763# CONFIG_SENSORS_AD5252 is not set
764# CONFIG_EEPROM_LEGACY is not set
765# CONFIG_SENSORS_PCF8574 is not set
766# CONFIG_PCF8575 is not set
767# CONFIG_SENSORS_PCA9539 is not set
768# CONFIG_SENSORS_PCF8591 is not set
769# CONFIG_SENSORS_MAX6875 is not set
770# CONFIG_SENSORS_TSL2550 is not set 804# CONFIG_SENSORS_TSL2550 is not set
771# CONFIG_I2C_DEBUG_CORE is not set 805# CONFIG_I2C_DEBUG_CORE is not set
772# CONFIG_I2C_DEBUG_ALGO is not set 806# CONFIG_I2C_DEBUG_ALGO is not set
@@ -783,13 +817,18 @@ CONFIG_SPI_BFIN=y
783# CONFIG_SPI_BFIN_LOCK is not set 817# CONFIG_SPI_BFIN_LOCK is not set
784# CONFIG_SPI_BFIN_SPORT is not set 818# CONFIG_SPI_BFIN_SPORT is not set
785# CONFIG_SPI_BITBANG is not set 819# CONFIG_SPI_BITBANG is not set
820# CONFIG_SPI_GPIO is not set
786 821
787# 822#
788# SPI Protocol Masters 823# SPI Protocol Masters
789# 824#
790# CONFIG_EEPROM_AT25 is not set
791# CONFIG_SPI_SPIDEV is not set 825# CONFIG_SPI_SPIDEV is not set
792# CONFIG_SPI_TLE62X0 is not set 826# CONFIG_SPI_TLE62X0 is not set
827
828#
829# PPS support
830#
831# CONFIG_PPS is not set
793CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y 832CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
794CONFIG_GPIOLIB=y 833CONFIG_GPIOLIB=y
795# CONFIG_DEBUG_GPIO is not set 834# CONFIG_DEBUG_GPIO is not set
@@ -805,6 +844,7 @@ CONFIG_GPIO_SYSFS=y
805# CONFIG_GPIO_MAX732X is not set 844# CONFIG_GPIO_MAX732X is not set
806# CONFIG_GPIO_PCA953X is not set 845# CONFIG_GPIO_PCA953X is not set
807# CONFIG_GPIO_PCF857X is not set 846# CONFIG_GPIO_PCF857X is not set
847# CONFIG_GPIO_ADP5588 is not set
808 848
809# 849#
810# PCI GPIO expanders: 850# PCI GPIO expanders:
@@ -815,11 +855,15 @@ CONFIG_GPIO_SYSFS=y
815# 855#
816# CONFIG_GPIO_MAX7301 is not set 856# CONFIG_GPIO_MAX7301 is not set
817# CONFIG_GPIO_MCP23S08 is not set 857# CONFIG_GPIO_MCP23S08 is not set
858# CONFIG_GPIO_MC33880 is not set
859
860#
861# AC97 GPIO expanders:
862#
818# CONFIG_W1 is not set 863# CONFIG_W1 is not set
819# CONFIG_POWER_SUPPLY is not set 864# CONFIG_POWER_SUPPLY is not set
820# CONFIG_HWMON is not set 865# CONFIG_HWMON is not set
821# CONFIG_THERMAL is not set 866# CONFIG_THERMAL is not set
822# CONFIG_THERMAL_HWMON is not set
823CONFIG_WATCHDOG=y 867CONFIG_WATCHDOG=y
824# CONFIG_WATCHDOG_NOWAYOUT is not set 868# CONFIG_WATCHDOG_NOWAYOUT is not set
825 869
@@ -841,26 +885,18 @@ CONFIG_SSB_POSSIBLE=y
841# CONFIG_MFD_CORE is not set 885# CONFIG_MFD_CORE is not set
842# CONFIG_MFD_SM501 is not set 886# CONFIG_MFD_SM501 is not set
843# CONFIG_HTC_PASIC3 is not set 887# CONFIG_HTC_PASIC3 is not set
888# CONFIG_UCB1400_CORE is not set
889# CONFIG_TPS65010 is not set
844# CONFIG_MFD_TMIO is not set 890# CONFIG_MFD_TMIO is not set
845# CONFIG_MFD_WM8400 is not set 891# CONFIG_MFD_WM8400 is not set
892# CONFIG_MFD_WM831X is not set
846# CONFIG_MFD_WM8350_I2C is not set 893# CONFIG_MFD_WM8350_I2C is not set
894# CONFIG_MFD_PCF50633 is not set
895# CONFIG_MFD_MC13783 is not set
896# CONFIG_AB3100_CORE is not set
897# CONFIG_EZX_PCAP is not set
847# CONFIG_REGULATOR is not set 898# CONFIG_REGULATOR is not set
848 899# CONFIG_MEDIA_SUPPORT is not set
849#
850# Multimedia devices
851#
852
853#
854# Multimedia core support
855#
856# CONFIG_VIDEO_DEV is not set
857# CONFIG_DVB_CORE is not set
858# CONFIG_VIDEO_MEDIA is not set
859
860#
861# Multimedia drivers
862#
863# CONFIG_DAB is not set
864 900
865# 901#
866# Graphics support 902# Graphics support
@@ -904,6 +940,7 @@ CONFIG_ADV7393_1XMEM=y
904# CONFIG_FB_VIRTUAL is not set 940# CONFIG_FB_VIRTUAL is not set
905# CONFIG_FB_METRONOME is not set 941# CONFIG_FB_METRONOME is not set
906# CONFIG_FB_MB862XX is not set 942# CONFIG_FB_MB862XX is not set
943# CONFIG_FB_BROADSHEET is not set
907# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 944# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
908 945
909# 946#
@@ -913,19 +950,27 @@ CONFIG_ADV7393_1XMEM=y
913# CONFIG_LOGO is not set 950# CONFIG_LOGO is not set
914CONFIG_SOUND=m 951CONFIG_SOUND=m
915CONFIG_SOUND_OSS_CORE=y 952CONFIG_SOUND_OSS_CORE=y
953CONFIG_SOUND_OSS_CORE_PRECLAIM=y
916CONFIG_SND=m 954CONFIG_SND=m
917CONFIG_SND_TIMER=m 955CONFIG_SND_TIMER=m
918CONFIG_SND_PCM=m 956CONFIG_SND_PCM=m
957CONFIG_SND_JACK=y
919# CONFIG_SND_SEQUENCER is not set 958# CONFIG_SND_SEQUENCER is not set
920CONFIG_SND_OSSEMUL=y 959CONFIG_SND_OSSEMUL=y
921CONFIG_SND_MIXER_OSS=m 960CONFIG_SND_MIXER_OSS=m
922CONFIG_SND_PCM_OSS=m 961CONFIG_SND_PCM_OSS=m
923CONFIG_SND_PCM_OSS_PLUGINS=y 962CONFIG_SND_PCM_OSS_PLUGINS=y
963# CONFIG_SND_HRTIMER is not set
924# CONFIG_SND_DYNAMIC_MINORS is not set 964# CONFIG_SND_DYNAMIC_MINORS is not set
925CONFIG_SND_SUPPORT_OLD_API=y 965CONFIG_SND_SUPPORT_OLD_API=y
926CONFIG_SND_VERBOSE_PROCFS=y 966CONFIG_SND_VERBOSE_PROCFS=y
927# CONFIG_SND_VERBOSE_PRINTK is not set 967# CONFIG_SND_VERBOSE_PRINTK is not set
928# CONFIG_SND_DEBUG is not set 968# CONFIG_SND_DEBUG is not set
969# CONFIG_SND_RAWMIDI_SEQ is not set
970# CONFIG_SND_OPL3_LIB_SEQ is not set
971# CONFIG_SND_OPL4_LIB_SEQ is not set
972# CONFIG_SND_SBAWE_SEQ is not set
973# CONFIG_SND_EMU10K1_SEQ is not set
929CONFIG_SND_DRIVERS=y 974CONFIG_SND_DRIVERS=y
930# CONFIG_SND_DUMMY is not set 975# CONFIG_SND_DUMMY is not set
931# CONFIG_SND_MTPAV is not set 976# CONFIG_SND_MTPAV is not set
@@ -936,13 +981,6 @@ CONFIG_SND_SPI=y
936# 981#
937# ALSA Blackfin devices 982# ALSA Blackfin devices
938# 983#
939CONFIG_SND_BLACKFIN_AD1836=m
940CONFIG_SND_BLACKFIN_AD1836_TDM=y
941# CONFIG_SND_BLACKFIN_AD1836_I2S is not set
942CONFIG_SND_BLACKFIN_AD1836_MULSUB=y
943# CONFIG_SND_BLACKFIN_AD1836_5P1 is not set
944CONFIG_SND_BLACKFIN_SPORT=0
945CONFIG_SND_BLACKFIN_SPI_PFBIT=4
946CONFIG_SND_BFIN_SPORT=0 984CONFIG_SND_BFIN_SPORT=0
947CONFIG_SND_BFIN_AD73322=m 985CONFIG_SND_BFIN_AD73322=m
948CONFIG_SND_BFIN_AD73322_SPORT0_SE=10 986CONFIG_SND_BFIN_AD73322_SPORT0_SE=10
@@ -953,16 +991,20 @@ CONFIG_SND_SOC_AC97_BUS=y
953CONFIG_SND_BF5XX_I2S=m 991CONFIG_SND_BF5XX_I2S=m
954# CONFIG_SND_BF5XX_SOC_SSM2602 is not set 992# CONFIG_SND_BF5XX_SOC_SSM2602 is not set
955CONFIG_SND_BF5XX_SOC_AD73311=m 993CONFIG_SND_BF5XX_SOC_AD73311=m
994# CONFIG_SND_BF5XX_SOC_ADAU1371 is not set
995# CONFIG_SND_BF5XX_SOC_ADAU1761 is not set
956CONFIG_SND_BFIN_AD73311_SE=4 996CONFIG_SND_BFIN_AD73311_SE=4
997# CONFIG_SND_BF5XX_TDM is not set
957CONFIG_SND_BF5XX_AC97=m 998CONFIG_SND_BF5XX_AC97=m
958CONFIG_SND_BF5XX_MMAP_SUPPORT=y 999CONFIG_SND_BF5XX_MMAP_SUPPORT=y
959# CONFIG_SND_BF5XX_MULTICHAN_SUPPORT is not set 1000# CONFIG_SND_BF5XX_MULTICHAN_SUPPORT is not set
1001# CONFIG_SND_BF5XX_HAVE_COLD_RESET is not set
1002CONFIG_SND_BF5XX_SOC_AD1980=m
960CONFIG_SND_BF5XX_SOC_SPORT=m 1003CONFIG_SND_BF5XX_SOC_SPORT=m
961CONFIG_SND_BF5XX_SOC_I2S=m 1004CONFIG_SND_BF5XX_SOC_I2S=m
962CONFIG_SND_BF5XX_SOC_AC97=m 1005CONFIG_SND_BF5XX_SOC_AC97=m
963CONFIG_SND_BF5XX_SOC_AD1980=m
964CONFIG_SND_BF5XX_SPORT_NUM=0 1006CONFIG_SND_BF5XX_SPORT_NUM=0
965# CONFIG_SND_BF5XX_HAVE_COLD_RESET is not set 1007CONFIG_SND_SOC_I2C_AND_SPI=m
966# CONFIG_SND_SOC_ALL_CODECS is not set 1008# CONFIG_SND_SOC_ALL_CODECS is not set
967CONFIG_SND_SOC_AD1980=m 1009CONFIG_SND_SOC_AD1980=m
968CONFIG_SND_SOC_AD73311=m 1010CONFIG_SND_SOC_AD73311=m
@@ -970,14 +1012,12 @@ CONFIG_SND_SOC_AD73311=m
970CONFIG_AC97_BUS=m 1012CONFIG_AC97_BUS=m
971CONFIG_HID_SUPPORT=y 1013CONFIG_HID_SUPPORT=y
972CONFIG_HID=y 1014CONFIG_HID=y
973# CONFIG_HID_DEBUG is not set
974# CONFIG_HIDRAW is not set 1015# CONFIG_HIDRAW is not set
975# CONFIG_HID_PID is not set 1016# CONFIG_HID_PID is not set
976 1017
977# 1018#
978# Special HID drivers 1019# Special HID drivers
979# 1020#
980CONFIG_HID_COMPAT=y
981# CONFIG_USB_SUPPORT is not set 1021# CONFIG_USB_SUPPORT is not set
982# CONFIG_MMC is not set 1022# CONFIG_MMC is not set
983# CONFIG_MEMSTICK is not set 1023# CONFIG_MEMSTICK is not set
@@ -1014,6 +1054,7 @@ CONFIG_RTC_INTF_DEV=y
1014# CONFIG_RTC_DRV_S35390A is not set 1054# CONFIG_RTC_DRV_S35390A is not set
1015# CONFIG_RTC_DRV_FM3130 is not set 1055# CONFIG_RTC_DRV_FM3130 is not set
1016# CONFIG_RTC_DRV_RX8581 is not set 1056# CONFIG_RTC_DRV_RX8581 is not set
1057# CONFIG_RTC_DRV_RX8025 is not set
1017 1058
1018# 1059#
1019# SPI RTC drivers 1060# SPI RTC drivers
@@ -1025,6 +1066,7 @@ CONFIG_RTC_INTF_DEV=y
1025# CONFIG_RTC_DRV_R9701 is not set 1066# CONFIG_RTC_DRV_R9701 is not set
1026# CONFIG_RTC_DRV_RS5C348 is not set 1067# CONFIG_RTC_DRV_RS5C348 is not set
1027# CONFIG_RTC_DRV_DS3234 is not set 1068# CONFIG_RTC_DRV_DS3234 is not set
1069# CONFIG_RTC_DRV_PCF2123 is not set
1028 1070
1029# 1071#
1030# Platform RTC drivers 1072# Platform RTC drivers
@@ -1045,10 +1087,21 @@ CONFIG_RTC_INTF_DEV=y
1045# 1087#
1046CONFIG_RTC_DRV_BFIN=y 1088CONFIG_RTC_DRV_BFIN=y
1047# CONFIG_DMADEVICES is not set 1089# CONFIG_DMADEVICES is not set
1090# CONFIG_AUXDISPLAY is not set
1048# CONFIG_UIO is not set 1091# CONFIG_UIO is not set
1092
1093#
1094# TI VLYNQ
1095#
1049# CONFIG_STAGING is not set 1096# CONFIG_STAGING is not set
1050 1097
1051# 1098#
1099# Firmware Drivers
1100#
1101# CONFIG_FIRMWARE_MEMMAP is not set
1102# CONFIG_SIGMA is not set
1103
1104#
1052# File systems 1105# File systems
1053# 1106#
1054# CONFIG_EXT2_FS is not set 1107# CONFIG_EXT2_FS is not set
@@ -1057,9 +1110,13 @@ CONFIG_RTC_DRV_BFIN=y
1057# CONFIG_REISERFS_FS is not set 1110# CONFIG_REISERFS_FS is not set
1058# CONFIG_JFS_FS is not set 1111# CONFIG_JFS_FS is not set
1059# CONFIG_FS_POSIX_ACL is not set 1112# CONFIG_FS_POSIX_ACL is not set
1060CONFIG_FILE_LOCKING=y
1061# CONFIG_XFS_FS is not set 1113# CONFIG_XFS_FS is not set
1114# CONFIG_GFS2_FS is not set
1062# CONFIG_OCFS2_FS is not set 1115# CONFIG_OCFS2_FS is not set
1116# CONFIG_BTRFS_FS is not set
1117# CONFIG_NILFS2_FS is not set
1118CONFIG_FILE_LOCKING=y
1119CONFIG_FSNOTIFY=y
1063# CONFIG_DNOTIFY is not set 1120# CONFIG_DNOTIFY is not set
1064CONFIG_INOTIFY=y 1121CONFIG_INOTIFY=y
1065CONFIG_INOTIFY_USER=y 1122CONFIG_INOTIFY_USER=y
@@ -1069,6 +1126,11 @@ CONFIG_INOTIFY_USER=y
1069# CONFIG_FUSE_FS is not set 1126# CONFIG_FUSE_FS is not set
1070 1127
1071# 1128#
1129# Caches
1130#
1131# CONFIG_FSCACHE is not set
1132
1133#
1072# CD-ROM/DVD Filesystems 1134# CD-ROM/DVD Filesystems
1073# 1135#
1074# CONFIG_ISO9660_FS is not set 1136# CONFIG_ISO9660_FS is not set
@@ -1087,13 +1149,9 @@ CONFIG_INOTIFY_USER=y
1087CONFIG_PROC_FS=y 1149CONFIG_PROC_FS=y
1088CONFIG_PROC_SYSCTL=y 1150CONFIG_PROC_SYSCTL=y
1089CONFIG_SYSFS=y 1151CONFIG_SYSFS=y
1090# CONFIG_TMPFS is not set
1091# CONFIG_HUGETLB_PAGE is not set 1152# CONFIG_HUGETLB_PAGE is not set
1092# CONFIG_CONFIGFS_FS is not set 1153# CONFIG_CONFIGFS_FS is not set
1093 1154CONFIG_MISC_FILESYSTEMS=y
1094#
1095# Miscellaneous filesystems
1096#
1097# CONFIG_ADFS_FS is not set 1155# CONFIG_ADFS_FS is not set
1098# CONFIG_AFFS_FS is not set 1156# CONFIG_AFFS_FS is not set
1099# CONFIG_HFS_FS is not set 1157# CONFIG_HFS_FS is not set
@@ -1112,17 +1170,8 @@ CONFIG_JFFS2_ZLIB=y
1112# CONFIG_JFFS2_LZO is not set 1170# CONFIG_JFFS2_LZO is not set
1113CONFIG_JFFS2_RTIME=y 1171CONFIG_JFFS2_RTIME=y
1114# CONFIG_JFFS2_RUBIN is not set 1172# CONFIG_JFFS2_RUBIN is not set
1115CONFIG_YAFFS_FS=m
1116CONFIG_YAFFS_YAFFS1=y
1117# CONFIG_YAFFS_9BYTE_TAGS is not set
1118# CONFIG_YAFFS_DOES_ECC is not set
1119CONFIG_YAFFS_YAFFS2=y
1120CONFIG_YAFFS_AUTO_YAFFS2=y
1121# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
1122# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
1123# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
1124CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
1125# CONFIG_CRAMFS is not set 1173# CONFIG_CRAMFS is not set
1174# CONFIG_SQUASHFS is not set
1126# CONFIG_VXFS_FS is not set 1175# CONFIG_VXFS_FS is not set
1127# CONFIG_MINIX_FS is not set 1176# CONFIG_MINIX_FS is not set
1128# CONFIG_OMFS_FS is not set 1177# CONFIG_OMFS_FS is not set
@@ -1141,7 +1190,6 @@ CONFIG_LOCKD=m
1141CONFIG_LOCKD_V4=y 1190CONFIG_LOCKD_V4=y
1142CONFIG_NFS_COMMON=y 1191CONFIG_NFS_COMMON=y
1143CONFIG_SUNRPC=m 1192CONFIG_SUNRPC=m
1144# CONFIG_SUNRPC_REGISTER_V4 is not set
1145# CONFIG_RPCSEC_GSS_KRB5 is not set 1193# CONFIG_RPCSEC_GSS_KRB5 is not set
1146# CONFIG_RPCSEC_GSS_SPKM3 is not set 1194# CONFIG_RPCSEC_GSS_SPKM3 is not set
1147CONFIG_SMB_FS=m 1195CONFIG_SMB_FS=m
@@ -1206,14 +1254,19 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
1206CONFIG_ENABLE_MUST_CHECK=y 1254CONFIG_ENABLE_MUST_CHECK=y
1207CONFIG_FRAME_WARN=1024 1255CONFIG_FRAME_WARN=1024
1208# CONFIG_MAGIC_SYSRQ is not set 1256# CONFIG_MAGIC_SYSRQ is not set
1257# CONFIG_STRIP_ASM_SYMS is not set
1209# CONFIG_UNUSED_SYMBOLS is not set 1258# CONFIG_UNUSED_SYMBOLS is not set
1210CONFIG_DEBUG_FS=y 1259CONFIG_DEBUG_FS=y
1211# CONFIG_HEADERS_CHECK is not set 1260# CONFIG_HEADERS_CHECK is not set
1261CONFIG_DEBUG_SECTION_MISMATCH=y
1212CONFIG_DEBUG_KERNEL=y 1262CONFIG_DEBUG_KERNEL=y
1213CONFIG_DEBUG_SHIRQ=y 1263CONFIG_DEBUG_SHIRQ=y
1214CONFIG_DETECT_SOFTLOCKUP=y 1264CONFIG_DETECT_SOFTLOCKUP=y
1215# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set 1265# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
1216CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 1266CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
1267CONFIG_DETECT_HUNG_TASK=y
1268# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
1269CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
1217CONFIG_SCHED_DEBUG=y 1270CONFIG_SCHED_DEBUG=y
1218# CONFIG_SCHEDSTATS is not set 1271# CONFIG_SCHEDSTATS is not set
1219# CONFIG_TIMER_STATS is not set 1272# CONFIG_TIMER_STATS is not set
@@ -1221,31 +1274,39 @@ CONFIG_SCHED_DEBUG=y
1221# CONFIG_DEBUG_SLAB is not set 1274# CONFIG_DEBUG_SLAB is not set
1222# CONFIG_DEBUG_SPINLOCK is not set 1275# CONFIG_DEBUG_SPINLOCK is not set
1223# CONFIG_DEBUG_MUTEXES is not set 1276# CONFIG_DEBUG_MUTEXES is not set
1277# CONFIG_DEBUG_LOCK_ALLOC is not set
1278# CONFIG_PROVE_LOCKING is not set
1279# CONFIG_LOCK_STAT is not set
1224# CONFIG_DEBUG_SPINLOCK_SLEEP is not set 1280# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1225# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set 1281# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1226# CONFIG_DEBUG_KOBJECT is not set 1282# CONFIG_DEBUG_KOBJECT is not set
1227CONFIG_DEBUG_BUGVERBOSE=y 1283CONFIG_DEBUG_BUGVERBOSE=y
1228CONFIG_DEBUG_INFO=y 1284CONFIG_DEBUG_INFO=y
1229# CONFIG_DEBUG_VM is not set 1285# CONFIG_DEBUG_VM is not set
1286# CONFIG_DEBUG_NOMMU_REGIONS is not set
1230# CONFIG_DEBUG_WRITECOUNT is not set 1287# CONFIG_DEBUG_WRITECOUNT is not set
1231# CONFIG_DEBUG_MEMORY_INIT is not set 1288# CONFIG_DEBUG_MEMORY_INIT is not set
1232# CONFIG_DEBUG_LIST is not set 1289# CONFIG_DEBUG_LIST is not set
1233# CONFIG_DEBUG_SG is not set 1290# CONFIG_DEBUG_SG is not set
1291# CONFIG_DEBUG_NOTIFIERS is not set
1292# CONFIG_DEBUG_CREDENTIALS is not set
1234# CONFIG_FRAME_POINTER is not set 1293# CONFIG_FRAME_POINTER is not set
1235# CONFIG_BOOT_PRINTK_DELAY is not set 1294# CONFIG_BOOT_PRINTK_DELAY is not set
1236# CONFIG_RCU_TORTURE_TEST is not set 1295# CONFIG_RCU_TORTURE_TEST is not set
1237# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1296# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1238# CONFIG_BACKTRACE_SELF_TEST is not set 1297# CONFIG_BACKTRACE_SELF_TEST is not set
1239# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set 1298# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1299# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
1240# CONFIG_FAULT_INJECTION is not set 1300# CONFIG_FAULT_INJECTION is not set
1241 1301# CONFIG_PAGE_POISONING is not set
1242# 1302CONFIG_HAVE_FUNCTION_TRACER=y
1243# Tracers 1303CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
1244# 1304CONFIG_TRACING_SUPPORT=y
1245# CONFIG_SCHED_TRACER is not set 1305# CONFIG_FTRACE is not set
1246# CONFIG_CONTEXT_SWITCH_TRACER is not set 1306# CONFIG_BRANCH_PROFILE_NONE is not set
1247# CONFIG_BOOT_TRACER is not set 1307# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
1248# CONFIG_DYNAMIC_PRINTK_DEBUG is not set 1308# CONFIG_PROFILE_ALL_BRANCHES is not set
1309# CONFIG_DYNAMIC_DEBUG is not set
1249# CONFIG_SAMPLES is not set 1310# CONFIG_SAMPLES is not set
1250CONFIG_HAVE_ARCH_KGDB=y 1311CONFIG_HAVE_ARCH_KGDB=y
1251# CONFIG_KGDB is not set 1312# CONFIG_KGDB is not set
@@ -1270,6 +1331,7 @@ CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y
1270CONFIG_EARLY_PRINTK=y 1331CONFIG_EARLY_PRINTK=y
1271CONFIG_CPLB_INFO=y 1332CONFIG_CPLB_INFO=y
1272CONFIG_ACCESS_CHECK=y 1333CONFIG_ACCESS_CHECK=y
1334# CONFIG_BFIN_ISRAM_SELF_TEST is not set
1273 1335
1274# 1336#
1275# Security options 1337# Security options
@@ -1278,14 +1340,14 @@ CONFIG_ACCESS_CHECK=y
1278CONFIG_SECURITY=y 1340CONFIG_SECURITY=y
1279# CONFIG_SECURITYFS is not set 1341# CONFIG_SECURITYFS is not set
1280# CONFIG_SECURITY_NETWORK is not set 1342# CONFIG_SECURITY_NETWORK is not set
1343# CONFIG_SECURITY_PATH is not set
1281# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1344# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1282CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0 1345# CONFIG_SECURITY_TOMOYO is not set
1283CONFIG_CRYPTO=y 1346CONFIG_CRYPTO=y
1284 1347
1285# 1348#
1286# Crypto core or helper 1349# Crypto core or helper
1287# 1350#
1288# CONFIG_CRYPTO_FIPS is not set
1289# CONFIG_CRYPTO_MANAGER is not set 1351# CONFIG_CRYPTO_MANAGER is not set
1290# CONFIG_CRYPTO_MANAGER2 is not set 1352# CONFIG_CRYPTO_MANAGER2 is not set
1291# CONFIG_CRYPTO_GF128MUL is not set 1353# CONFIG_CRYPTO_GF128MUL is not set
@@ -1317,11 +1379,13 @@ CONFIG_CRYPTO=y
1317# 1379#
1318# CONFIG_CRYPTO_HMAC is not set 1380# CONFIG_CRYPTO_HMAC is not set
1319# CONFIG_CRYPTO_XCBC is not set 1381# CONFIG_CRYPTO_XCBC is not set
1382# CONFIG_CRYPTO_VMAC is not set
1320 1383
1321# 1384#
1322# Digest 1385# Digest
1323# 1386#
1324# CONFIG_CRYPTO_CRC32C is not set 1387# CONFIG_CRYPTO_CRC32C is not set
1388# CONFIG_CRYPTO_GHASH is not set
1325# CONFIG_CRYPTO_MD4 is not set 1389# CONFIG_CRYPTO_MD4 is not set
1326# CONFIG_CRYPTO_MD5 is not set 1390# CONFIG_CRYPTO_MD5 is not set
1327# CONFIG_CRYPTO_MICHAEL_MIC is not set 1391# CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1358,6 +1422,7 @@ CONFIG_CRYPTO=y
1358# Compression 1422# Compression
1359# 1423#
1360# CONFIG_CRYPTO_DEFLATE is not set 1424# CONFIG_CRYPTO_DEFLATE is not set
1425# CONFIG_CRYPTO_ZLIB is not set
1361# CONFIG_CRYPTO_LZO is not set 1426# CONFIG_CRYPTO_LZO is not set
1362 1427
1363# 1428#
@@ -1365,11 +1430,13 @@ CONFIG_CRYPTO=y
1365# 1430#
1366# CONFIG_CRYPTO_ANSI_CPRNG is not set 1431# CONFIG_CRYPTO_ANSI_CPRNG is not set
1367CONFIG_CRYPTO_HW=y 1432CONFIG_CRYPTO_HW=y
1433# CONFIG_BINARY_PRINTF is not set
1368 1434
1369# 1435#
1370# Library routines 1436# Library routines
1371# 1437#
1372CONFIG_BITREVERSE=y 1438CONFIG_BITREVERSE=y
1439CONFIG_GENERIC_FIND_LAST_BIT=y
1373CONFIG_CRC_CCITT=m 1440CONFIG_CRC_CCITT=m
1374# CONFIG_CRC16 is not set 1441# CONFIG_CRC16 is not set
1375# CONFIG_CRC_T10DIF is not set 1442# CONFIG_CRC_T10DIF is not set
@@ -1379,6 +1446,8 @@ CONFIG_CRC32=y
1379# CONFIG_LIBCRC32C is not set 1446# CONFIG_LIBCRC32C is not set
1380CONFIG_ZLIB_INFLATE=y 1447CONFIG_ZLIB_INFLATE=y
1381CONFIG_ZLIB_DEFLATE=m 1448CONFIG_ZLIB_DEFLATE=m
1449CONFIG_DECOMPRESS_GZIP=y
1382CONFIG_HAS_IOMEM=y 1450CONFIG_HAS_IOMEM=y
1383CONFIG_HAS_IOPORT=y 1451CONFIG_HAS_IOPORT=y
1384CONFIG_HAS_DMA=y 1452CONFIG_HAS_DMA=y
1453CONFIG_NLATTR=y
diff --git a/arch/blackfin/configs/BF537-STAMP_defconfig b/arch/blackfin/configs/BF537-STAMP_defconfig
index 2908595b67c5..7596cf7673f1 100644
--- a/arch/blackfin/configs/BF537-STAMP_defconfig
+++ b/arch/blackfin/configs/BF537-STAMP_defconfig
@@ -1,22 +1,27 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.28.10 3# Linux kernel version: 2.6.32.2
4# Thu May 21 05:50:01 2009
5# 4#
6# CONFIG_MMU is not set 5# CONFIG_MMU is not set
7# CONFIG_FPU is not set 6# CONFIG_FPU is not set
8CONFIG_RWSEM_GENERIC_SPINLOCK=y 7CONFIG_RWSEM_GENERIC_SPINLOCK=y
9# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set 8# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
10CONFIG_BLACKFIN=y 9CONFIG_BLACKFIN=y
10CONFIG_GENERIC_CSUM=y
11CONFIG_GENERIC_BUG=y
11CONFIG_ZONE_DMA=y 12CONFIG_ZONE_DMA=y
12CONFIG_GENERIC_FIND_NEXT_BIT=y 13CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_IRQ_PROBE=y 15CONFIG_GENERIC_IRQ_PROBE=y
16CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_GPIO=y 17CONFIG_GENERIC_GPIO=y
17CONFIG_FORCE_MAX_ZONEORDER=14 18CONFIG_FORCE_MAX_ZONEORDER=14
18CONFIG_GENERIC_CALIBRATE_DELAY=y 19CONFIG_GENERIC_CALIBRATE_DELAY=y
20CONFIG_LOCKDEP_SUPPORT=y
21CONFIG_STACKTRACE_SUPPORT=y
22CONFIG_TRACE_IRQFLAGS_SUPPORT=y
19CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 23CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
24CONFIG_CONSTRUCTORS=y
20 25
21# 26#
22# General setup 27# General setup
@@ -26,22 +31,41 @@ CONFIG_BROKEN_ON_SMP=y
26CONFIG_INIT_ENV_ARG_LIMIT=32 31CONFIG_INIT_ENV_ARG_LIMIT=32
27CONFIG_LOCALVERSION="" 32CONFIG_LOCALVERSION=""
28CONFIG_LOCALVERSION_AUTO=y 33CONFIG_LOCALVERSION_AUTO=y
34CONFIG_HAVE_KERNEL_GZIP=y
35CONFIG_HAVE_KERNEL_BZIP2=y
36CONFIG_HAVE_KERNEL_LZMA=y
37CONFIG_KERNEL_GZIP=y
38# CONFIG_KERNEL_BZIP2 is not set
39# CONFIG_KERNEL_LZMA is not set
29CONFIG_SYSVIPC=y 40CONFIG_SYSVIPC=y
30CONFIG_SYSVIPC_SYSCTL=y 41CONFIG_SYSVIPC_SYSCTL=y
31# CONFIG_POSIX_MQUEUE is not set 42# CONFIG_POSIX_MQUEUE is not set
32# CONFIG_BSD_PROCESS_ACCT is not set 43# CONFIG_BSD_PROCESS_ACCT is not set
33# CONFIG_TASKSTATS is not set 44# CONFIG_TASKSTATS is not set
34# CONFIG_AUDIT is not set 45# CONFIG_AUDIT is not set
46
47#
48# RCU Subsystem
49#
50CONFIG_TREE_RCU=y
51# CONFIG_TREE_PREEMPT_RCU is not set
52# CONFIG_RCU_TRACE is not set
53CONFIG_RCU_FANOUT=32
54# CONFIG_RCU_FANOUT_EXACT is not set
55# CONFIG_TREE_RCU_TRACE is not set
35CONFIG_IKCONFIG=y 56CONFIG_IKCONFIG=y
36CONFIG_IKCONFIG_PROC=y 57CONFIG_IKCONFIG_PROC=y
37CONFIG_LOG_BUF_SHIFT=14 58CONFIG_LOG_BUF_SHIFT=14
38# CONFIG_CGROUPS is not set
39# CONFIG_GROUP_SCHED is not set 59# CONFIG_GROUP_SCHED is not set
60# CONFIG_CGROUPS is not set
40# CONFIG_SYSFS_DEPRECATED_V2 is not set 61# CONFIG_SYSFS_DEPRECATED_V2 is not set
41# CONFIG_RELAY is not set 62# CONFIG_RELAY is not set
42# CONFIG_NAMESPACES is not set 63# CONFIG_NAMESPACES is not set
43CONFIG_BLK_DEV_INITRD=y 64CONFIG_BLK_DEV_INITRD=y
44CONFIG_INITRAMFS_SOURCE="" 65CONFIG_INITRAMFS_SOURCE=""
66CONFIG_RD_GZIP=y
67# CONFIG_RD_BZIP2 is not set
68# CONFIG_RD_LZMA is not set
45# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 69# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
46CONFIG_SYSCTL=y 70CONFIG_SYSCTL=y
47CONFIG_ANON_INODES=y 71CONFIG_ANON_INODES=y
@@ -62,6 +86,10 @@ CONFIG_EPOLL=y
62# CONFIG_TIMERFD is not set 86# CONFIG_TIMERFD is not set
63# CONFIG_EVENTFD is not set 87# CONFIG_EVENTFD is not set
64# CONFIG_AIO is not set 88# CONFIG_AIO is not set
89
90#
91# Kernel Performance Events And Counters
92#
65CONFIG_VM_EVENT_COUNTERS=y 93CONFIG_VM_EVENT_COUNTERS=y
66CONFIG_COMPAT_BRK=y 94CONFIG_COMPAT_BRK=y
67CONFIG_SLAB=y 95CONFIG_SLAB=y
@@ -69,11 +97,15 @@ CONFIG_SLAB=y
69# CONFIG_SLOB is not set 97# CONFIG_SLOB is not set
70CONFIG_MMAP_ALLOW_UNINITIALIZED=y 98CONFIG_MMAP_ALLOW_UNINITIALIZED=y
71# CONFIG_PROFILING is not set 99# CONFIG_PROFILING is not set
72# CONFIG_MARKERS is not set
73CONFIG_HAVE_OPROFILE=y 100CONFIG_HAVE_OPROFILE=y
101
102#
103# GCOV-based kernel profiling
104#
105# CONFIG_GCOV_KERNEL is not set
106# CONFIG_SLOW_WORK is not set
74# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set 107# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
75CONFIG_SLABINFO=y 108CONFIG_SLABINFO=y
76CONFIG_TINY_SHMEM=y
77CONFIG_BASE_SMALL=0 109CONFIG_BASE_SMALL=0
78CONFIG_MODULES=y 110CONFIG_MODULES=y
79# CONFIG_MODULE_FORCE_LOAD is not set 111# CONFIG_MODULE_FORCE_LOAD is not set
@@ -81,11 +113,8 @@ CONFIG_MODULE_UNLOAD=y
81# CONFIG_MODULE_FORCE_UNLOAD is not set 113# CONFIG_MODULE_FORCE_UNLOAD is not set
82# CONFIG_MODVERSIONS is not set 114# CONFIG_MODVERSIONS is not set
83# CONFIG_MODULE_SRCVERSION_ALL is not set 115# CONFIG_MODULE_SRCVERSION_ALL is not set
84CONFIG_KMOD=y
85CONFIG_BLOCK=y 116CONFIG_BLOCK=y
86# CONFIG_LBD is not set 117# CONFIG_LBDAF is not set
87# CONFIG_BLK_DEV_IO_TRACE is not set
88# CONFIG_LSF is not set
89# CONFIG_BLK_DEV_BSG is not set 118# CONFIG_BLK_DEV_BSG is not set
90# CONFIG_BLK_DEV_INTEGRITY is not set 119# CONFIG_BLK_DEV_INTEGRITY is not set
91 120
@@ -101,7 +130,6 @@ CONFIG_DEFAULT_AS=y
101# CONFIG_DEFAULT_CFQ is not set 130# CONFIG_DEFAULT_CFQ is not set
102# CONFIG_DEFAULT_NOOP is not set 131# CONFIG_DEFAULT_NOOP is not set
103CONFIG_DEFAULT_IOSCHED="anticipatory" 132CONFIG_DEFAULT_IOSCHED="anticipatory"
104CONFIG_CLASSIC_RCU=y
105# CONFIG_PREEMPT_NONE is not set 133# CONFIG_PREEMPT_NONE is not set
106CONFIG_PREEMPT_VOLUNTARY=y 134CONFIG_PREEMPT_VOLUNTARY=y
107# CONFIG_PREEMPT is not set 135# CONFIG_PREEMPT is not set
@@ -132,15 +160,15 @@ CONFIG_FREEZER=y
132CONFIG_BF537=y 160CONFIG_BF537=y
133# CONFIG_BF538 is not set 161# CONFIG_BF538 is not set
134# CONFIG_BF539 is not set 162# CONFIG_BF539 is not set
135# CONFIG_BF542 is not set 163# CONFIG_BF542_std is not set
136# CONFIG_BF542M is not set 164# CONFIG_BF542M is not set
137# CONFIG_BF544 is not set 165# CONFIG_BF544_std is not set
138# CONFIG_BF544M is not set 166# CONFIG_BF544M is not set
139# CONFIG_BF547 is not set 167# CONFIG_BF547_std is not set
140# CONFIG_BF547M is not set 168# CONFIG_BF547M is not set
141# CONFIG_BF548 is not set 169# CONFIG_BF548_std is not set
142# CONFIG_BF548M is not set 170# CONFIG_BF548M is not set
143# CONFIG_BF549 is not set 171# CONFIG_BF549_std is not set
144# CONFIG_BF549M is not set 172# CONFIG_BF549M is not set
145# CONFIG_BF561 is not set 173# CONFIG_BF561 is not set
146CONFIG_BF_REV_MIN=2 174CONFIG_BF_REV_MIN=2
@@ -184,7 +212,8 @@ CONFIG_IRQ_MEM_DMA1=13
184CONFIG_IRQ_WATCH=13 212CONFIG_IRQ_WATCH=13
185CONFIG_IRQ_SPI=10 213CONFIG_IRQ_SPI=10
186CONFIG_BFIN537_STAMP=y 214CONFIG_BFIN537_STAMP=y
187# CONFIG_BFIN537_BLUETECHNIX_CM is not set 215# CONFIG_BFIN537_BLUETECHNIX_CM_E is not set
216# CONFIG_BFIN537_BLUETECHNIX_CM_U is not set
188# CONFIG_BFIN537_BLUETECHNIX_TCM is not set 217# CONFIG_BFIN537_BLUETECHNIX_TCM is not set
189# CONFIG_PNAV10 is not set 218# CONFIG_PNAV10 is not set
190# CONFIG_CAMSIG_MINOTAUR is not set 219# CONFIG_CAMSIG_MINOTAUR is not set
@@ -235,7 +264,7 @@ CONFIG_GENERIC_TIME=y
235CONFIG_GENERIC_CLOCKEVENTS=y 264CONFIG_GENERIC_CLOCKEVENTS=y
236# CONFIG_TICKSOURCE_GPTMR0 is not set 265# CONFIG_TICKSOURCE_GPTMR0 is not set
237CONFIG_TICKSOURCE_CORETMR=y 266CONFIG_TICKSOURCE_CORETMR=y
238# CONFIG_CYCLES_CLOCKSOURCE is not set 267CONFIG_CYCLES_CLOCKSOURCE=y
239# CONFIG_GPTMR0_CLOCKSOURCE is not set 268# CONFIG_GPTMR0_CLOCKSOURCE is not set
240CONFIG_TICK_ONESHOT=y 269CONFIG_TICK_ONESHOT=y
241# CONFIG_NO_HZ is not set 270# CONFIG_NO_HZ is not set
@@ -287,7 +316,6 @@ CONFIG_FLATMEM=y
287CONFIG_FLAT_NODE_MEM_MAP=y 316CONFIG_FLAT_NODE_MEM_MAP=y
288CONFIG_PAGEFLAGS_EXTENDED=y 317CONFIG_PAGEFLAGS_EXTENDED=y
289CONFIG_SPLIT_PTLOCK_CPUS=4 318CONFIG_SPLIT_PTLOCK_CPUS=4
290# CONFIG_RESOURCES_64BIT is not set
291# CONFIG_PHYS_ADDR_T_64BIT is not set 319# CONFIG_PHYS_ADDR_T_64BIT is not set
292CONFIG_ZONE_DMA_FLAG=1 320CONFIG_ZONE_DMA_FLAG=1
293CONFIG_VIRT_TO_BUS=y 321CONFIG_VIRT_TO_BUS=y
@@ -296,16 +324,18 @@ CONFIG_BFIN_GPTIMERS=m
296# CONFIG_DMA_UNCACHED_4M is not set 324# CONFIG_DMA_UNCACHED_4M is not set
297# CONFIG_DMA_UNCACHED_2M is not set 325# CONFIG_DMA_UNCACHED_2M is not set
298CONFIG_DMA_UNCACHED_1M=y 326CONFIG_DMA_UNCACHED_1M=y
327# CONFIG_DMA_UNCACHED_512K is not set
328# CONFIG_DMA_UNCACHED_256K is not set
329# CONFIG_DMA_UNCACHED_128K is not set
299# CONFIG_DMA_UNCACHED_NONE is not set 330# CONFIG_DMA_UNCACHED_NONE is not set
300 331
301# 332#
302# Cache Support 333# Cache Support
303# 334#
304CONFIG_BFIN_ICACHE=y 335CONFIG_BFIN_ICACHE=y
305# CONFIG_BFIN_ICACHE_LOCK is not set 336CONFIG_BFIN_EXTMEM_ICACHEABLE=y
306CONFIG_BFIN_DCACHE=y 337CONFIG_BFIN_DCACHE=y
307# CONFIG_BFIN_DCACHE_BANKA is not set 338# CONFIG_BFIN_DCACHE_BANKA is not set
308CONFIG_BFIN_EXTMEM_ICACHEABLE=y
309CONFIG_BFIN_EXTMEM_DCACHEABLE=y 339CONFIG_BFIN_EXTMEM_DCACHEABLE=y
310CONFIG_BFIN_EXTMEM_WRITEBACK=y 340CONFIG_BFIN_EXTMEM_WRITEBACK=y
311# CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set 341# CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set
@@ -316,7 +346,7 @@ CONFIG_BFIN_EXTMEM_WRITEBACK=y
316# CONFIG_MPU is not set 346# CONFIG_MPU is not set
317 347
318# 348#
319# Asynchonous Memory Configuration 349# Asynchronous Memory Configuration
320# 350#
321 351
322# 352#
@@ -362,6 +392,7 @@ CONFIG_PM=y
362CONFIG_PM_SLEEP=y 392CONFIG_PM_SLEEP=y
363CONFIG_SUSPEND=y 393CONFIG_SUSPEND=y
364CONFIG_SUSPEND_FREEZER=y 394CONFIG_SUSPEND_FREEZER=y
395# CONFIG_PM_RUNTIME is not set
365CONFIG_ARCH_SUSPEND_POSSIBLE=y 396CONFIG_ARCH_SUSPEND_POSSIBLE=y
366CONFIG_PM_BFIN_SLEEP_DEEPER=y 397CONFIG_PM_BFIN_SLEEP_DEEPER=y
367# CONFIG_PM_BFIN_SLEEP is not set 398# CONFIG_PM_BFIN_SLEEP is not set
@@ -384,11 +415,6 @@ CONFIG_NET=y
384CONFIG_PACKET=y 415CONFIG_PACKET=y
385# CONFIG_PACKET_MMAP is not set 416# CONFIG_PACKET_MMAP is not set
386CONFIG_UNIX=y 417CONFIG_UNIX=y
387CONFIG_XFRM=y
388# CONFIG_XFRM_USER is not set
389# CONFIG_XFRM_SUB_POLICY is not set
390# CONFIG_XFRM_MIGRATE is not set
391# CONFIG_XFRM_STATISTICS is not set
392# CONFIG_NET_KEY is not set 418# CONFIG_NET_KEY is not set
393CONFIG_INET=y 419CONFIG_INET=y
394# CONFIG_IP_MULTICAST is not set 420# CONFIG_IP_MULTICAST is not set
@@ -412,7 +438,6 @@ CONFIG_IP_PNP=y
412# CONFIG_INET_XFRM_MODE_BEET is not set 438# CONFIG_INET_XFRM_MODE_BEET is not set
413# CONFIG_INET_LRO is not set 439# CONFIG_INET_LRO is not set
414# CONFIG_INET_DIAG is not set 440# CONFIG_INET_DIAG is not set
415CONFIG_INET_TCP_DIAG=y
416# CONFIG_TCP_CONG_ADVANCED is not set 441# CONFIG_TCP_CONG_ADVANCED is not set
417CONFIG_TCP_CONG_CUBIC=y 442CONFIG_TCP_CONG_CUBIC=y
418CONFIG_DEFAULT_TCP_CONG="cubic" 443CONFIG_DEFAULT_TCP_CONG="cubic"
@@ -423,6 +448,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
423# CONFIG_NETFILTER is not set 448# CONFIG_NETFILTER is not set
424# CONFIG_IP_DCCP is not set 449# CONFIG_IP_DCCP is not set
425# CONFIG_IP_SCTP is not set 450# CONFIG_IP_SCTP is not set
451# CONFIG_RDS is not set
426# CONFIG_TIPC is not set 452# CONFIG_TIPC is not set
427# CONFIG_ATM is not set 453# CONFIG_ATM is not set
428# CONFIG_BRIDGE is not set 454# CONFIG_BRIDGE is not set
@@ -436,14 +462,34 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
436# CONFIG_LAPB is not set 462# CONFIG_LAPB is not set
437# CONFIG_ECONET is not set 463# CONFIG_ECONET is not set
438# CONFIG_WAN_ROUTER is not set 464# CONFIG_WAN_ROUTER is not set
465# CONFIG_PHONET is not set
466# CONFIG_IEEE802154 is not set
439# CONFIG_NET_SCHED is not set 467# CONFIG_NET_SCHED is not set
468# CONFIG_DCB is not set
440 469
441# 470#
442# Network testing 471# Network testing
443# 472#
444# CONFIG_NET_PKTGEN is not set 473# CONFIG_NET_PKTGEN is not set
445# CONFIG_HAMRADIO is not set 474# CONFIG_HAMRADIO is not set
446# CONFIG_CAN is not set 475CONFIG_CAN=m
476CONFIG_CAN_RAW=m
477CONFIG_CAN_BCM=m
478
479#
480# CAN Device Drivers
481#
482# CONFIG_CAN_VCAN is not set
483CONFIG_CAN_DEV=m
484# CONFIG_CAN_CALC_BITTIMING is not set
485CONFIG_CAN_BFIN=m
486# CONFIG_CAN_SJA1000 is not set
487
488#
489# CAN USB interfaces
490#
491# CONFIG_CAN_EMS_USB is not set
492# CONFIG_CAN_DEBUG_DEVICES is not set
447CONFIG_IRDA=m 493CONFIG_IRDA=m
448 494
449# 495#
@@ -483,13 +529,8 @@ CONFIG_SIR_BFIN_DMA=y
483# 529#
484# CONFIG_BT is not set 530# CONFIG_BT is not set
485# CONFIG_AF_RXRPC is not set 531# CONFIG_AF_RXRPC is not set
486# CONFIG_PHONET is not set 532# CONFIG_WIRELESS is not set
487CONFIG_WIRELESS=y 533# CONFIG_WIMAX is not set
488# CONFIG_CFG80211 is not set
489CONFIG_WIRELESS_OLD_REGULATORY=y
490# CONFIG_WIRELESS_EXT is not set
491# CONFIG_MAC80211 is not set
492# CONFIG_IEEE80211 is not set
493# CONFIG_RFKILL is not set 534# CONFIG_RFKILL is not set
494# CONFIG_NET_9P is not set 535# CONFIG_NET_9P is not set
495 536
@@ -510,6 +551,7 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
510# CONFIG_CONNECTOR is not set 551# CONFIG_CONNECTOR is not set
511CONFIG_MTD=y 552CONFIG_MTD=y
512# CONFIG_MTD_DEBUG is not set 553# CONFIG_MTD_DEBUG is not set
554# CONFIG_MTD_TESTS is not set
513# CONFIG_MTD_CONCAT is not set 555# CONFIG_MTD_CONCAT is not set
514CONFIG_MTD_PARTITIONS=y 556CONFIG_MTD_PARTITIONS=y
515# CONFIG_MTD_REDBOOT_PARTS is not set 557# CONFIG_MTD_REDBOOT_PARTS is not set
@@ -568,6 +610,7 @@ CONFIG_MTD_PHYSMAP=m
568# 610#
569# CONFIG_MTD_DATAFLASH is not set 611# CONFIG_MTD_DATAFLASH is not set
570# CONFIG_MTD_M25P80 is not set 612# CONFIG_MTD_M25P80 is not set
613# CONFIG_MTD_SST25L is not set
571# CONFIG_MTD_SLRAM is not set 614# CONFIG_MTD_SLRAM is not set
572# CONFIG_MTD_PHRAM is not set 615# CONFIG_MTD_PHRAM is not set
573# CONFIG_MTD_MTDRAM is not set 616# CONFIG_MTD_MTDRAM is not set
@@ -583,6 +626,11 @@ CONFIG_MTD_PHYSMAP=m
583# CONFIG_MTD_ONENAND is not set 626# CONFIG_MTD_ONENAND is not set
584 627
585# 628#
629# LPDDR flash memory drivers
630#
631# CONFIG_MTD_LPDDR is not set
632
633#
586# UBI - Unsorted block images 634# UBI - Unsorted block images
587# 635#
588# CONFIG_MTD_UBI is not set 636# CONFIG_MTD_UBI is not set
@@ -599,10 +647,20 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
599# CONFIG_ATA_OVER_ETH is not set 647# CONFIG_ATA_OVER_ETH is not set
600# CONFIG_BLK_DEV_HD is not set 648# CONFIG_BLK_DEV_HD is not set
601CONFIG_MISC_DEVICES=y 649CONFIG_MISC_DEVICES=y
602# CONFIG_EEPROM_93CX6 is not set 650# CONFIG_AD525X_DPOT is not set
603# CONFIG_ICS932S401 is not set 651# CONFIG_ICS932S401 is not set
604# CONFIG_ENCLOSURE_SERVICES is not set 652# CONFIG_ENCLOSURE_SERVICES is not set
653# CONFIG_ISL29003 is not set
605# CONFIG_C2PORT is not set 654# CONFIG_C2PORT is not set
655
656#
657# EEPROM support
658#
659# CONFIG_EEPROM_AT24 is not set
660# CONFIG_EEPROM_AT25 is not set
661# CONFIG_EEPROM_LEGACY is not set
662# CONFIG_EEPROM_MAX6875 is not set
663# CONFIG_EEPROM_93CX6 is not set
606CONFIG_HAVE_IDE=y 664CONFIG_HAVE_IDE=y
607# CONFIG_IDE is not set 665# CONFIG_IDE is not set
608 666
@@ -637,6 +695,9 @@ CONFIG_SMSC_PHY=y
637# CONFIG_BROADCOM_PHY is not set 695# CONFIG_BROADCOM_PHY is not set
638# CONFIG_ICPLUS_PHY is not set 696# CONFIG_ICPLUS_PHY is not set
639# CONFIG_REALTEK_PHY is not set 697# CONFIG_REALTEK_PHY is not set
698# CONFIG_NATIONAL_PHY is not set
699# CONFIG_STE10XP is not set
700# CONFIG_LSI_ET1011C_PHY is not set
640# CONFIG_FIXED_PHY is not set 701# CONFIG_FIXED_PHY is not set
641# CONFIG_MDIO_BITBANG is not set 702# CONFIG_MDIO_BITBANG is not set
642CONFIG_NET_ETHERNET=y 703CONFIG_NET_ETHERNET=y
@@ -647,9 +708,12 @@ CONFIG_BFIN_TX_DESC_NUM=10
647CONFIG_BFIN_RX_DESC_NUM=20 708CONFIG_BFIN_RX_DESC_NUM=20
648# CONFIG_BFIN_MAC_RMII is not set 709# CONFIG_BFIN_MAC_RMII is not set
649# CONFIG_SMC91X is not set 710# CONFIG_SMC91X is not set
650# CONFIG_SMSC911X is not set
651# CONFIG_DM9000 is not set 711# CONFIG_DM9000 is not set
652# CONFIG_ENC28J60 is not set 712# CONFIG_ENC28J60 is not set
713# CONFIG_ETHOC is not set
714# CONFIG_SMSC911X is not set
715# CONFIG_DNET is not set
716# CONFIG_ADF702X is not set
653# CONFIG_IBM_NEW_EMAC_ZMII is not set 717# CONFIG_IBM_NEW_EMAC_ZMII is not set
654# CONFIG_IBM_NEW_EMAC_RGMII is not set 718# CONFIG_IBM_NEW_EMAC_RGMII is not set
655# CONFIG_IBM_NEW_EMAC_TAH is not set 719# CONFIG_IBM_NEW_EMAC_TAH is not set
@@ -658,15 +722,16 @@ CONFIG_BFIN_RX_DESC_NUM=20
658# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set 722# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
659# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 723# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
660# CONFIG_B44 is not set 724# CONFIG_B44 is not set
725# CONFIG_KS8842 is not set
726# CONFIG_KS8851 is not set
727# CONFIG_KS8851_MLL is not set
661# CONFIG_NETDEV_1000 is not set 728# CONFIG_NETDEV_1000 is not set
662# CONFIG_NETDEV_10000 is not set 729# CONFIG_NETDEV_10000 is not set
730# CONFIG_WLAN is not set
663 731
664# 732#
665# Wireless LAN 733# Enable WiMAX (Networking options) to see the WiMAX drivers
666# 734#
667# CONFIG_WLAN_PRE80211 is not set
668# CONFIG_WLAN_80211 is not set
669# CONFIG_IWLWIFI_LEDS is not set
670# CONFIG_WAN is not set 735# CONFIG_WAN is not set
671# CONFIG_PPP is not set 736# CONFIG_PPP is not set
672# CONFIG_SLIP is not set 737# CONFIG_SLIP is not set
@@ -701,7 +766,10 @@ CONFIG_INPUT_EVDEV=m
701# CONFIG_INPUT_TOUCHSCREEN is not set 766# CONFIG_INPUT_TOUCHSCREEN is not set
702CONFIG_INPUT_MISC=y 767CONFIG_INPUT_MISC=y
703# CONFIG_INPUT_UINPUT is not set 768# CONFIG_INPUT_UINPUT is not set
704CONFIG_CONFIG_INPUT_PCF8574=m 769# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
770# CONFIG_INPUT_AD714X is not set
771# CONFIG_INPUT_ADXL34X is not set
772# CONFIG_INPUT_PCF8574 is not set
705 773
706# 774#
707# Hardware I/O ports 775# Hardware I/O ports
@@ -712,16 +780,13 @@ CONFIG_CONFIG_INPUT_PCF8574=m
712# 780#
713# Character devices 781# Character devices
714# 782#
715# CONFIG_AD9960 is not set
716CONFIG_BFIN_DMA_INTERFACE=m 783CONFIG_BFIN_DMA_INTERFACE=m
717# CONFIG_BFIN_PPI is not set 784# CONFIG_BFIN_PPI is not set
718# CONFIG_BFIN_PPIFCD is not set 785# CONFIG_BFIN_PPIFCD is not set
719# CONFIG_BFIN_SIMPLE_TIMER is not set 786# CONFIG_BFIN_SIMPLE_TIMER is not set
720# CONFIG_BFIN_SPI_ADC is not set 787# CONFIG_BFIN_SPI_ADC is not set
721CONFIG_BFIN_SPORT=m 788CONFIG_BFIN_SPORT=m
722# CONFIG_BFIN_TIMER_LATENCY is not set
723# CONFIG_BFIN_TWI_LCD is not set 789# CONFIG_BFIN_TWI_LCD is not set
724CONFIG_SIMPLE_GPIO=m
725# CONFIG_VT is not set 790# CONFIG_VT is not set
726# CONFIG_DEVKMEM is not set 791# CONFIG_DEVKMEM is not set
727CONFIG_BFIN_JTAG_COMM=m 792CONFIG_BFIN_JTAG_COMM=m
@@ -735,6 +800,7 @@ CONFIG_BFIN_JTAG_COMM=m
735# 800#
736# Non-8250 serial port support 801# Non-8250 serial port support
737# 802#
803# CONFIG_SERIAL_MAX3100 is not set
738CONFIG_SERIAL_BFIN=y 804CONFIG_SERIAL_BFIN=y
739CONFIG_SERIAL_BFIN_CONSOLE=y 805CONFIG_SERIAL_BFIN_CONSOLE=y
740CONFIG_SERIAL_BFIN_DMA=y 806CONFIG_SERIAL_BFIN_DMA=y
@@ -746,17 +812,8 @@ CONFIG_SERIAL_CORE=y
746CONFIG_SERIAL_CORE_CONSOLE=y 812CONFIG_SERIAL_CORE_CONSOLE=y
747# CONFIG_SERIAL_BFIN_SPORT is not set 813# CONFIG_SERIAL_BFIN_SPORT is not set
748CONFIG_UNIX98_PTYS=y 814CONFIG_UNIX98_PTYS=y
815# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
749# CONFIG_LEGACY_PTYS is not set 816# CONFIG_LEGACY_PTYS is not set
750
751#
752# CAN, the car bus and industrial fieldbus
753#
754CONFIG_CAN4LINUX=y
755
756#
757# linux embedded drivers
758#
759CONFIG_CAN_BLACKFIN=m
760# CONFIG_IPMI_HANDLER is not set 817# CONFIG_IPMI_HANDLER is not set
761# CONFIG_HW_RANDOM is not set 818# CONFIG_HW_RANDOM is not set
762# CONFIG_R3964 is not set 819# CONFIG_R3964 is not set
@@ -764,6 +821,7 @@ CONFIG_CAN_BLACKFIN=m
764# CONFIG_TCG_TPM is not set 821# CONFIG_TCG_TPM is not set
765CONFIG_I2C=m 822CONFIG_I2C=m
766CONFIG_I2C_BOARDINFO=y 823CONFIG_I2C_BOARDINFO=y
824CONFIG_I2C_COMPAT=y
767CONFIG_I2C_CHARDEV=m 825CONFIG_I2C_CHARDEV=m
768CONFIG_I2C_HELPER_AUTO=y 826CONFIG_I2C_HELPER_AUTO=y
769 827
@@ -796,14 +854,6 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
796# Miscellaneous I2C Chip support 854# Miscellaneous I2C Chip support
797# 855#
798# CONFIG_DS1682 is not set 856# CONFIG_DS1682 is not set
799# CONFIG_EEPROM_AT24 is not set
800CONFIG_SENSORS_AD5252=m
801# CONFIG_EEPROM_LEGACY is not set
802# CONFIG_SENSORS_PCF8574 is not set
803# CONFIG_PCF8575 is not set
804# CONFIG_SENSORS_PCA9539 is not set
805# CONFIG_SENSORS_PCF8591 is not set
806# CONFIG_SENSORS_MAX6875 is not set
807# CONFIG_SENSORS_TSL2550 is not set 857# CONFIG_SENSORS_TSL2550 is not set
808# CONFIG_I2C_DEBUG_CORE is not set 858# CONFIG_I2C_DEBUG_CORE is not set
809# CONFIG_I2C_DEBUG_ALGO is not set 859# CONFIG_I2C_DEBUG_ALGO is not set
@@ -820,13 +870,18 @@ CONFIG_SPI_BFIN=y
820# CONFIG_SPI_BFIN_LOCK is not set 870# CONFIG_SPI_BFIN_LOCK is not set
821# CONFIG_SPI_BFIN_SPORT is not set 871# CONFIG_SPI_BFIN_SPORT is not set
822# CONFIG_SPI_BITBANG is not set 872# CONFIG_SPI_BITBANG is not set
873# CONFIG_SPI_GPIO is not set
823 874
824# 875#
825# SPI Protocol Masters 876# SPI Protocol Masters
826# 877#
827# CONFIG_EEPROM_AT25 is not set
828# CONFIG_SPI_SPIDEV is not set 878# CONFIG_SPI_SPIDEV is not set
829# CONFIG_SPI_TLE62X0 is not set 879# CONFIG_SPI_TLE62X0 is not set
880
881#
882# PPS support
883#
884# CONFIG_PPS is not set
830CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y 885CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
831CONFIG_GPIOLIB=y 886CONFIG_GPIOLIB=y
832# CONFIG_DEBUG_GPIO is not set 887# CONFIG_DEBUG_GPIO is not set
@@ -842,6 +897,7 @@ CONFIG_GPIO_SYSFS=y
842# CONFIG_GPIO_MAX732X is not set 897# CONFIG_GPIO_MAX732X is not set
843# CONFIG_GPIO_PCA953X is not set 898# CONFIG_GPIO_PCA953X is not set
844# CONFIG_GPIO_PCF857X is not set 899# CONFIG_GPIO_PCF857X is not set
900# CONFIG_GPIO_ADP5588 is not set
845 901
846# 902#
847# PCI GPIO expanders: 903# PCI GPIO expanders:
@@ -852,11 +908,15 @@ CONFIG_GPIO_SYSFS=y
852# 908#
853# CONFIG_GPIO_MAX7301 is not set 909# CONFIG_GPIO_MAX7301 is not set
854# CONFIG_GPIO_MCP23S08 is not set 910# CONFIG_GPIO_MCP23S08 is not set
911# CONFIG_GPIO_MC33880 is not set
912
913#
914# AC97 GPIO expanders:
915#
855# CONFIG_W1 is not set 916# CONFIG_W1 is not set
856# CONFIG_POWER_SUPPLY is not set 917# CONFIG_POWER_SUPPLY is not set
857# CONFIG_HWMON is not set 918# CONFIG_HWMON is not set
858# CONFIG_THERMAL is not set 919# CONFIG_THERMAL is not set
859# CONFIG_THERMAL_HWMON is not set
860CONFIG_WATCHDOG=y 920CONFIG_WATCHDOG=y
861# CONFIG_WATCHDOG_NOWAYOUT is not set 921# CONFIG_WATCHDOG_NOWAYOUT is not set
862 922
@@ -878,26 +938,18 @@ CONFIG_SSB_POSSIBLE=y
878# CONFIG_MFD_CORE is not set 938# CONFIG_MFD_CORE is not set
879# CONFIG_MFD_SM501 is not set 939# CONFIG_MFD_SM501 is not set
880# CONFIG_HTC_PASIC3 is not set 940# CONFIG_HTC_PASIC3 is not set
941# CONFIG_UCB1400_CORE is not set
942# CONFIG_TPS65010 is not set
881# CONFIG_MFD_TMIO is not set 943# CONFIG_MFD_TMIO is not set
882# CONFIG_MFD_WM8400 is not set 944# CONFIG_MFD_WM8400 is not set
945# CONFIG_MFD_WM831X is not set
883# CONFIG_MFD_WM8350_I2C is not set 946# CONFIG_MFD_WM8350_I2C is not set
947# CONFIG_MFD_PCF50633 is not set
948# CONFIG_MFD_MC13783 is not set
949# CONFIG_AB3100_CORE is not set
950# CONFIG_EZX_PCAP is not set
884# CONFIG_REGULATOR is not set 951# CONFIG_REGULATOR is not set
885 952# CONFIG_MEDIA_SUPPORT is not set
886#
887# Multimedia devices
888#
889
890#
891# Multimedia core support
892#
893# CONFIG_VIDEO_DEV is not set
894# CONFIG_DVB_CORE is not set
895# CONFIG_VIDEO_MEDIA is not set
896
897#
898# Multimedia drivers
899#
900# CONFIG_DAB is not set
901 953
902# 954#
903# Graphics support 955# Graphics support
@@ -929,9 +981,6 @@ CONFIG_FB_CFB_IMAGEBLIT=m
929# CONFIG_FB_BFIN_T350MCQB is not set 981# CONFIG_FB_BFIN_T350MCQB is not set
930# CONFIG_FB_BFIN_LQ035Q1 is not set 982# CONFIG_FB_BFIN_LQ035Q1 is not set
931CONFIG_FB_BF537_LQ035=m 983CONFIG_FB_BF537_LQ035=m
932CONFIG_LQ035_SLAVE_ADDR=0x58
933# CONFIG_FB_BFIN_LANDSCAPE is not set
934# CONFIG_FB_BFIN_BGR is not set
935CONFIG_FB_BFIN_7393=m 984CONFIG_FB_BFIN_7393=m
936CONFIG_NTSC=y 985CONFIG_NTSC=y
937# CONFIG_PAL is not set 986# CONFIG_PAL is not set
@@ -946,15 +995,18 @@ CONFIG_ADV7393_1XMEM=y
946# CONFIG_FB_VIRTUAL is not set 995# CONFIG_FB_VIRTUAL is not set
947# CONFIG_FB_METRONOME is not set 996# CONFIG_FB_METRONOME is not set
948# CONFIG_FB_MB862XX is not set 997# CONFIG_FB_MB862XX is not set
998# CONFIG_FB_BROADSHEET is not set
949CONFIG_BACKLIGHT_LCD_SUPPORT=y 999CONFIG_BACKLIGHT_LCD_SUPPORT=y
950CONFIG_LCD_CLASS_DEVICE=m 1000CONFIG_LCD_CLASS_DEVICE=m
1001# CONFIG_LCD_LMS283GF05 is not set
951# CONFIG_LCD_LTV350QV is not set 1002# CONFIG_LCD_LTV350QV is not set
952# CONFIG_LCD_ILI9320 is not set 1003# CONFIG_LCD_ILI9320 is not set
953# CONFIG_LCD_TDO24M is not set 1004# CONFIG_LCD_TDO24M is not set
954# CONFIG_LCD_VGG2432A4 is not set 1005# CONFIG_LCD_VGG2432A4 is not set
955# CONFIG_LCD_PLATFORM is not set 1006# CONFIG_LCD_PLATFORM is not set
956CONFIG_BACKLIGHT_CLASS_DEVICE=m 1007CONFIG_BACKLIGHT_CLASS_DEVICE=m
957CONFIG_BACKLIGHT_CORGI=m 1008CONFIG_BACKLIGHT_GENERIC=m
1009# CONFIG_BACKLIGHT_ADP8870 is not set
958 1010
959# 1011#
960# Display device support 1012# Display device support
@@ -963,19 +1015,27 @@ CONFIG_BACKLIGHT_CORGI=m
963# CONFIG_LOGO is not set 1015# CONFIG_LOGO is not set
964CONFIG_SOUND=m 1016CONFIG_SOUND=m
965CONFIG_SOUND_OSS_CORE=y 1017CONFIG_SOUND_OSS_CORE=y
1018CONFIG_SOUND_OSS_CORE_PRECLAIM=y
966CONFIG_SND=m 1019CONFIG_SND=m
967CONFIG_SND_TIMER=m 1020CONFIG_SND_TIMER=m
968CONFIG_SND_PCM=m 1021CONFIG_SND_PCM=m
1022CONFIG_SND_JACK=y
969# CONFIG_SND_SEQUENCER is not set 1023# CONFIG_SND_SEQUENCER is not set
970CONFIG_SND_OSSEMUL=y 1024CONFIG_SND_OSSEMUL=y
971CONFIG_SND_MIXER_OSS=m 1025CONFIG_SND_MIXER_OSS=m
972CONFIG_SND_PCM_OSS=m 1026CONFIG_SND_PCM_OSS=m
973CONFIG_SND_PCM_OSS_PLUGINS=y 1027CONFIG_SND_PCM_OSS_PLUGINS=y
1028# CONFIG_SND_HRTIMER is not set
974# CONFIG_SND_DYNAMIC_MINORS is not set 1029# CONFIG_SND_DYNAMIC_MINORS is not set
975CONFIG_SND_SUPPORT_OLD_API=y 1030CONFIG_SND_SUPPORT_OLD_API=y
976CONFIG_SND_VERBOSE_PROCFS=y 1031CONFIG_SND_VERBOSE_PROCFS=y
977# CONFIG_SND_VERBOSE_PRINTK is not set 1032# CONFIG_SND_VERBOSE_PRINTK is not set
978# CONFIG_SND_DEBUG is not set 1033# CONFIG_SND_DEBUG is not set
1034# CONFIG_SND_RAWMIDI_SEQ is not set
1035# CONFIG_SND_OPL3_LIB_SEQ is not set
1036# CONFIG_SND_OPL4_LIB_SEQ is not set
1037# CONFIG_SND_SBAWE_SEQ is not set
1038# CONFIG_SND_EMU10K1_SEQ is not set
979CONFIG_SND_DRIVERS=y 1039CONFIG_SND_DRIVERS=y
980# CONFIG_SND_DUMMY is not set 1040# CONFIG_SND_DUMMY is not set
981# CONFIG_SND_MTPAV is not set 1041# CONFIG_SND_MTPAV is not set
@@ -986,13 +1046,6 @@ CONFIG_SND_SPI=y
986# 1046#
987# ALSA Blackfin devices 1047# ALSA Blackfin devices
988# 1048#
989CONFIG_SND_BLACKFIN_AD1836=m
990CONFIG_SND_BLACKFIN_AD1836_TDM=y
991# CONFIG_SND_BLACKFIN_AD1836_I2S is not set
992CONFIG_SND_BLACKFIN_AD1836_MULSUB=y
993# CONFIG_SND_BLACKFIN_AD1836_5P1 is not set
994CONFIG_SND_BLACKFIN_SPORT=0
995CONFIG_SND_BLACKFIN_SPI_PFBIT=4
996CONFIG_SND_BFIN_SPORT=0 1049CONFIG_SND_BFIN_SPORT=0
997CONFIG_SND_BFIN_AD73322=m 1050CONFIG_SND_BFIN_AD73322=m
998CONFIG_SND_BFIN_AD73322_SPORT0_SE=10 1051CONFIG_SND_BFIN_AD73322_SPORT0_SE=10
@@ -1003,16 +1056,20 @@ CONFIG_SND_SOC_AC97_BUS=y
1003CONFIG_SND_BF5XX_I2S=m 1056CONFIG_SND_BF5XX_I2S=m
1004# CONFIG_SND_BF5XX_SOC_SSM2602 is not set 1057# CONFIG_SND_BF5XX_SOC_SSM2602 is not set
1005CONFIG_SND_BF5XX_SOC_AD73311=m 1058CONFIG_SND_BF5XX_SOC_AD73311=m
1059# CONFIG_SND_BF5XX_SOC_ADAU1371 is not set
1060# CONFIG_SND_BF5XX_SOC_ADAU1761 is not set
1006CONFIG_SND_BFIN_AD73311_SE=4 1061CONFIG_SND_BFIN_AD73311_SE=4
1062# CONFIG_SND_BF5XX_TDM is not set
1007CONFIG_SND_BF5XX_AC97=m 1063CONFIG_SND_BF5XX_AC97=m
1008CONFIG_SND_BF5XX_MMAP_SUPPORT=y 1064CONFIG_SND_BF5XX_MMAP_SUPPORT=y
1009# CONFIG_SND_BF5XX_MULTICHAN_SUPPORT is not set 1065# CONFIG_SND_BF5XX_MULTICHAN_SUPPORT is not set
1066# CONFIG_SND_BF5XX_HAVE_COLD_RESET is not set
1067CONFIG_SND_BF5XX_SOC_AD1980=m
1010CONFIG_SND_BF5XX_SOC_SPORT=m 1068CONFIG_SND_BF5XX_SOC_SPORT=m
1011CONFIG_SND_BF5XX_SOC_I2S=m 1069CONFIG_SND_BF5XX_SOC_I2S=m
1012CONFIG_SND_BF5XX_SOC_AC97=m 1070CONFIG_SND_BF5XX_SOC_AC97=m
1013CONFIG_SND_BF5XX_SOC_AD1980=m
1014CONFIG_SND_BF5XX_SPORT_NUM=0 1071CONFIG_SND_BF5XX_SPORT_NUM=0
1015# CONFIG_SND_BF5XX_HAVE_COLD_RESET is not set 1072CONFIG_SND_SOC_I2C_AND_SPI=m
1016# CONFIG_SND_SOC_ALL_CODECS is not set 1073# CONFIG_SND_SOC_ALL_CODECS is not set
1017CONFIG_SND_SOC_AD1980=m 1074CONFIG_SND_SOC_AD1980=m
1018CONFIG_SND_SOC_AD73311=m 1075CONFIG_SND_SOC_AD73311=m
@@ -1020,14 +1077,12 @@ CONFIG_SND_SOC_AD73311=m
1020CONFIG_AC97_BUS=m 1077CONFIG_AC97_BUS=m
1021CONFIG_HID_SUPPORT=y 1078CONFIG_HID_SUPPORT=y
1022CONFIG_HID=y 1079CONFIG_HID=y
1023# CONFIG_HID_DEBUG is not set
1024# CONFIG_HIDRAW is not set 1080# CONFIG_HIDRAW is not set
1025# CONFIG_HID_PID is not set 1081# CONFIG_HID_PID is not set
1026 1082
1027# 1083#
1028# Special HID drivers 1084# Special HID drivers
1029# 1085#
1030CONFIG_HID_COMPAT=y
1031# CONFIG_USB_SUPPORT is not set 1086# CONFIG_USB_SUPPORT is not set
1032# CONFIG_MMC is not set 1087# CONFIG_MMC is not set
1033# CONFIG_MEMSTICK is not set 1088# CONFIG_MEMSTICK is not set
@@ -1064,6 +1119,7 @@ CONFIG_RTC_INTF_DEV=y
1064# CONFIG_RTC_DRV_S35390A is not set 1119# CONFIG_RTC_DRV_S35390A is not set
1065# CONFIG_RTC_DRV_FM3130 is not set 1120# CONFIG_RTC_DRV_FM3130 is not set
1066# CONFIG_RTC_DRV_RX8581 is not set 1121# CONFIG_RTC_DRV_RX8581 is not set
1122# CONFIG_RTC_DRV_RX8025 is not set
1067 1123
1068# 1124#
1069# SPI RTC drivers 1125# SPI RTC drivers
@@ -1075,6 +1131,7 @@ CONFIG_RTC_INTF_DEV=y
1075# CONFIG_RTC_DRV_R9701 is not set 1131# CONFIG_RTC_DRV_R9701 is not set
1076# CONFIG_RTC_DRV_RS5C348 is not set 1132# CONFIG_RTC_DRV_RS5C348 is not set
1077# CONFIG_RTC_DRV_DS3234 is not set 1133# CONFIG_RTC_DRV_DS3234 is not set
1134# CONFIG_RTC_DRV_PCF2123 is not set
1078 1135
1079# 1136#
1080# Platform RTC drivers 1137# Platform RTC drivers
@@ -1095,10 +1152,21 @@ CONFIG_RTC_INTF_DEV=y
1095# 1152#
1096CONFIG_RTC_DRV_BFIN=y 1153CONFIG_RTC_DRV_BFIN=y
1097# CONFIG_DMADEVICES is not set 1154# CONFIG_DMADEVICES is not set
1155# CONFIG_AUXDISPLAY is not set
1098# CONFIG_UIO is not set 1156# CONFIG_UIO is not set
1157
1158#
1159# TI VLYNQ
1160#
1099# CONFIG_STAGING is not set 1161# CONFIG_STAGING is not set
1100 1162
1101# 1163#
1164# Firmware Drivers
1165#
1166# CONFIG_FIRMWARE_MEMMAP is not set
1167# CONFIG_SIGMA is not set
1168
1169#
1102# File systems 1170# File systems
1103# 1171#
1104# CONFIG_EXT2_FS is not set 1172# CONFIG_EXT2_FS is not set
@@ -1107,9 +1175,13 @@ CONFIG_RTC_DRV_BFIN=y
1107# CONFIG_REISERFS_FS is not set 1175# CONFIG_REISERFS_FS is not set
1108# CONFIG_JFS_FS is not set 1176# CONFIG_JFS_FS is not set
1109# CONFIG_FS_POSIX_ACL is not set 1177# CONFIG_FS_POSIX_ACL is not set
1110CONFIG_FILE_LOCKING=y
1111# CONFIG_XFS_FS is not set 1178# CONFIG_XFS_FS is not set
1179# CONFIG_GFS2_FS is not set
1112# CONFIG_OCFS2_FS is not set 1180# CONFIG_OCFS2_FS is not set
1181# CONFIG_BTRFS_FS is not set
1182# CONFIG_NILFS2_FS is not set
1183CONFIG_FILE_LOCKING=y
1184CONFIG_FSNOTIFY=y
1113# CONFIG_DNOTIFY is not set 1185# CONFIG_DNOTIFY is not set
1114CONFIG_INOTIFY=y 1186CONFIG_INOTIFY=y
1115CONFIG_INOTIFY_USER=y 1187CONFIG_INOTIFY_USER=y
@@ -1119,6 +1191,11 @@ CONFIG_INOTIFY_USER=y
1119# CONFIG_FUSE_FS is not set 1191# CONFIG_FUSE_FS is not set
1120 1192
1121# 1193#
1194# Caches
1195#
1196# CONFIG_FSCACHE is not set
1197
1198#
1122# CD-ROM/DVD Filesystems 1199# CD-ROM/DVD Filesystems
1123# 1200#
1124# CONFIG_ISO9660_FS is not set 1201# CONFIG_ISO9660_FS is not set
@@ -1137,13 +1214,9 @@ CONFIG_INOTIFY_USER=y
1137CONFIG_PROC_FS=y 1214CONFIG_PROC_FS=y
1138CONFIG_PROC_SYSCTL=y 1215CONFIG_PROC_SYSCTL=y
1139CONFIG_SYSFS=y 1216CONFIG_SYSFS=y
1140# CONFIG_TMPFS is not set
1141# CONFIG_HUGETLB_PAGE is not set 1217# CONFIG_HUGETLB_PAGE is not set
1142# CONFIG_CONFIGFS_FS is not set 1218# CONFIG_CONFIGFS_FS is not set
1143 1219CONFIG_MISC_FILESYSTEMS=y
1144#
1145# Miscellaneous filesystems
1146#
1147# CONFIG_ADFS_FS is not set 1220# CONFIG_ADFS_FS is not set
1148# CONFIG_AFFS_FS is not set 1221# CONFIG_AFFS_FS is not set
1149# CONFIG_HFS_FS is not set 1222# CONFIG_HFS_FS is not set
@@ -1162,17 +1235,8 @@ CONFIG_JFFS2_ZLIB=y
1162# CONFIG_JFFS2_LZO is not set 1235# CONFIG_JFFS2_LZO is not set
1163CONFIG_JFFS2_RTIME=y 1236CONFIG_JFFS2_RTIME=y
1164# CONFIG_JFFS2_RUBIN is not set 1237# CONFIG_JFFS2_RUBIN is not set
1165CONFIG_YAFFS_FS=m
1166CONFIG_YAFFS_YAFFS1=y
1167# CONFIG_YAFFS_9BYTE_TAGS is not set
1168# CONFIG_YAFFS_DOES_ECC is not set
1169CONFIG_YAFFS_YAFFS2=y
1170CONFIG_YAFFS_AUTO_YAFFS2=y
1171# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
1172# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
1173# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
1174CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
1175# CONFIG_CRAMFS is not set 1238# CONFIG_CRAMFS is not set
1239# CONFIG_SQUASHFS is not set
1176# CONFIG_VXFS_FS is not set 1240# CONFIG_VXFS_FS is not set
1177# CONFIG_MINIX_FS is not set 1241# CONFIG_MINIX_FS is not set
1178# CONFIG_OMFS_FS is not set 1242# CONFIG_OMFS_FS is not set
@@ -1191,7 +1255,6 @@ CONFIG_LOCKD=m
1191CONFIG_LOCKD_V4=y 1255CONFIG_LOCKD_V4=y
1192CONFIG_NFS_COMMON=y 1256CONFIG_NFS_COMMON=y
1193CONFIG_SUNRPC=m 1257CONFIG_SUNRPC=m
1194# CONFIG_SUNRPC_REGISTER_V4 is not set
1195# CONFIG_RPCSEC_GSS_KRB5 is not set 1258# CONFIG_RPCSEC_GSS_KRB5 is not set
1196# CONFIG_RPCSEC_GSS_SPKM3 is not set 1259# CONFIG_RPCSEC_GSS_SPKM3 is not set
1197CONFIG_SMB_FS=m 1260CONFIG_SMB_FS=m
@@ -1256,14 +1319,19 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
1256CONFIG_ENABLE_MUST_CHECK=y 1319CONFIG_ENABLE_MUST_CHECK=y
1257CONFIG_FRAME_WARN=1024 1320CONFIG_FRAME_WARN=1024
1258# CONFIG_MAGIC_SYSRQ is not set 1321# CONFIG_MAGIC_SYSRQ is not set
1322# CONFIG_STRIP_ASM_SYMS is not set
1259# CONFIG_UNUSED_SYMBOLS is not set 1323# CONFIG_UNUSED_SYMBOLS is not set
1260CONFIG_DEBUG_FS=y 1324CONFIG_DEBUG_FS=y
1261# CONFIG_HEADERS_CHECK is not set 1325# CONFIG_HEADERS_CHECK is not set
1326CONFIG_DEBUG_SECTION_MISMATCH=y
1262CONFIG_DEBUG_KERNEL=y 1327CONFIG_DEBUG_KERNEL=y
1263CONFIG_DEBUG_SHIRQ=y 1328CONFIG_DEBUG_SHIRQ=y
1264CONFIG_DETECT_SOFTLOCKUP=y 1329CONFIG_DETECT_SOFTLOCKUP=y
1265# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set 1330# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
1266CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 1331CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
1332CONFIG_DETECT_HUNG_TASK=y
1333# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
1334CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
1267CONFIG_SCHED_DEBUG=y 1335CONFIG_SCHED_DEBUG=y
1268# CONFIG_SCHEDSTATS is not set 1336# CONFIG_SCHEDSTATS is not set
1269# CONFIG_TIMER_STATS is not set 1337# CONFIG_TIMER_STATS is not set
@@ -1271,31 +1339,39 @@ CONFIG_SCHED_DEBUG=y
1271# CONFIG_DEBUG_SLAB is not set 1339# CONFIG_DEBUG_SLAB is not set
1272# CONFIG_DEBUG_SPINLOCK is not set 1340# CONFIG_DEBUG_SPINLOCK is not set
1273# CONFIG_DEBUG_MUTEXES is not set 1341# CONFIG_DEBUG_MUTEXES is not set
1342# CONFIG_DEBUG_LOCK_ALLOC is not set
1343# CONFIG_PROVE_LOCKING is not set
1344# CONFIG_LOCK_STAT is not set
1274# CONFIG_DEBUG_SPINLOCK_SLEEP is not set 1345# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1275# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set 1346# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1276# CONFIG_DEBUG_KOBJECT is not set 1347# CONFIG_DEBUG_KOBJECT is not set
1277CONFIG_DEBUG_BUGVERBOSE=y 1348CONFIG_DEBUG_BUGVERBOSE=y
1278CONFIG_DEBUG_INFO=y 1349CONFIG_DEBUG_INFO=y
1279# CONFIG_DEBUG_VM is not set 1350# CONFIG_DEBUG_VM is not set
1351# CONFIG_DEBUG_NOMMU_REGIONS is not set
1280# CONFIG_DEBUG_WRITECOUNT is not set 1352# CONFIG_DEBUG_WRITECOUNT is not set
1281# CONFIG_DEBUG_MEMORY_INIT is not set 1353# CONFIG_DEBUG_MEMORY_INIT is not set
1282# CONFIG_DEBUG_LIST is not set 1354# CONFIG_DEBUG_LIST is not set
1283# CONFIG_DEBUG_SG is not set 1355# CONFIG_DEBUG_SG is not set
1356# CONFIG_DEBUG_NOTIFIERS is not set
1357# CONFIG_DEBUG_CREDENTIALS is not set
1284# CONFIG_FRAME_POINTER is not set 1358# CONFIG_FRAME_POINTER is not set
1285# CONFIG_BOOT_PRINTK_DELAY is not set 1359# CONFIG_BOOT_PRINTK_DELAY is not set
1286# CONFIG_RCU_TORTURE_TEST is not set 1360# CONFIG_RCU_TORTURE_TEST is not set
1287# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1361# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1288# CONFIG_BACKTRACE_SELF_TEST is not set 1362# CONFIG_BACKTRACE_SELF_TEST is not set
1289# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set 1363# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1364# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
1290# CONFIG_FAULT_INJECTION is not set 1365# CONFIG_FAULT_INJECTION is not set
1291 1366# CONFIG_PAGE_POISONING is not set
1292# 1367CONFIG_HAVE_FUNCTION_TRACER=y
1293# Tracers 1368CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
1294# 1369CONFIG_TRACING_SUPPORT=y
1295# CONFIG_SCHED_TRACER is not set 1370# CONFIG_FTRACE is not set
1296# CONFIG_CONTEXT_SWITCH_TRACER is not set 1371# CONFIG_BRANCH_PROFILE_NONE is not set
1297# CONFIG_BOOT_TRACER is not set 1372# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
1298# CONFIG_DYNAMIC_PRINTK_DEBUG is not set 1373# CONFIG_PROFILE_ALL_BRANCHES is not set
1374# CONFIG_DYNAMIC_DEBUG is not set
1299# CONFIG_SAMPLES is not set 1375# CONFIG_SAMPLES is not set
1300CONFIG_HAVE_ARCH_KGDB=y 1376CONFIG_HAVE_ARCH_KGDB=y
1301# CONFIG_KGDB is not set 1377# CONFIG_KGDB is not set
@@ -1320,6 +1396,7 @@ CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y
1320CONFIG_EARLY_PRINTK=y 1396CONFIG_EARLY_PRINTK=y
1321CONFIG_CPLB_INFO=y 1397CONFIG_CPLB_INFO=y
1322CONFIG_ACCESS_CHECK=y 1398CONFIG_ACCESS_CHECK=y
1399# CONFIG_BFIN_ISRAM_SELF_TEST is not set
1323 1400
1324# 1401#
1325# Security options 1402# Security options
@@ -1328,14 +1405,14 @@ CONFIG_ACCESS_CHECK=y
1328CONFIG_SECURITY=y 1405CONFIG_SECURITY=y
1329# CONFIG_SECURITYFS is not set 1406# CONFIG_SECURITYFS is not set
1330# CONFIG_SECURITY_NETWORK is not set 1407# CONFIG_SECURITY_NETWORK is not set
1408# CONFIG_SECURITY_PATH is not set
1331# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1409# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1332CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0 1410# CONFIG_SECURITY_TOMOYO is not set
1333CONFIG_CRYPTO=y 1411CONFIG_CRYPTO=y
1334 1412
1335# 1413#
1336# Crypto core or helper 1414# Crypto core or helper
1337# 1415#
1338# CONFIG_CRYPTO_FIPS is not set
1339# CONFIG_CRYPTO_MANAGER is not set 1416# CONFIG_CRYPTO_MANAGER is not set
1340# CONFIG_CRYPTO_MANAGER2 is not set 1417# CONFIG_CRYPTO_MANAGER2 is not set
1341# CONFIG_CRYPTO_GF128MUL is not set 1418# CONFIG_CRYPTO_GF128MUL is not set
@@ -1367,11 +1444,13 @@ CONFIG_CRYPTO=y
1367# 1444#
1368# CONFIG_CRYPTO_HMAC is not set 1445# CONFIG_CRYPTO_HMAC is not set
1369# CONFIG_CRYPTO_XCBC is not set 1446# CONFIG_CRYPTO_XCBC is not set
1447# CONFIG_CRYPTO_VMAC is not set
1370 1448
1371# 1449#
1372# Digest 1450# Digest
1373# 1451#
1374# CONFIG_CRYPTO_CRC32C is not set 1452# CONFIG_CRYPTO_CRC32C is not set
1453# CONFIG_CRYPTO_GHASH is not set
1375# CONFIG_CRYPTO_MD4 is not set 1454# CONFIG_CRYPTO_MD4 is not set
1376# CONFIG_CRYPTO_MD5 is not set 1455# CONFIG_CRYPTO_MD5 is not set
1377# CONFIG_CRYPTO_MICHAEL_MIC is not set 1456# CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1408,6 +1487,7 @@ CONFIG_CRYPTO=y
1408# Compression 1487# Compression
1409# 1488#
1410# CONFIG_CRYPTO_DEFLATE is not set 1489# CONFIG_CRYPTO_DEFLATE is not set
1490# CONFIG_CRYPTO_ZLIB is not set
1411# CONFIG_CRYPTO_LZO is not set 1491# CONFIG_CRYPTO_LZO is not set
1412 1492
1413# 1493#
@@ -1415,11 +1495,13 @@ CONFIG_CRYPTO=y
1415# 1495#
1416# CONFIG_CRYPTO_ANSI_CPRNG is not set 1496# CONFIG_CRYPTO_ANSI_CPRNG is not set
1417CONFIG_CRYPTO_HW=y 1497CONFIG_CRYPTO_HW=y
1498# CONFIG_BINARY_PRINTF is not set
1418 1499
1419# 1500#
1420# Library routines 1501# Library routines
1421# 1502#
1422CONFIG_BITREVERSE=y 1503CONFIG_BITREVERSE=y
1504CONFIG_GENERIC_FIND_LAST_BIT=y
1423CONFIG_CRC_CCITT=m 1505CONFIG_CRC_CCITT=m
1424# CONFIG_CRC16 is not set 1506# CONFIG_CRC16 is not set
1425# CONFIG_CRC_T10DIF is not set 1507# CONFIG_CRC_T10DIF is not set
@@ -1429,6 +1511,8 @@ CONFIG_CRC32=y
1429# CONFIG_LIBCRC32C is not set 1511# CONFIG_LIBCRC32C is not set
1430CONFIG_ZLIB_INFLATE=y 1512CONFIG_ZLIB_INFLATE=y
1431CONFIG_ZLIB_DEFLATE=m 1513CONFIG_ZLIB_DEFLATE=m
1514CONFIG_DECOMPRESS_GZIP=y
1432CONFIG_HAS_IOMEM=y 1515CONFIG_HAS_IOMEM=y
1433CONFIG_HAS_IOPORT=y 1516CONFIG_HAS_IOPORT=y
1434CONFIG_HAS_DMA=y 1517CONFIG_HAS_DMA=y
1518CONFIG_NLATTR=y
diff --git a/arch/blackfin/configs/BF538-EZKIT_defconfig b/arch/blackfin/configs/BF538-EZKIT_defconfig
index 09ea2499555e..bc1871d89fd5 100644
--- a/arch/blackfin/configs/BF538-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF538-EZKIT_defconfig
@@ -1,22 +1,27 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.28.10 3# Linux kernel version: 2.6.32.2
4# Thu May 21 05:50:01 2009
5# 4#
6# CONFIG_MMU is not set 5# CONFIG_MMU is not set
7# CONFIG_FPU is not set 6# CONFIG_FPU is not set
8CONFIG_RWSEM_GENERIC_SPINLOCK=y 7CONFIG_RWSEM_GENERIC_SPINLOCK=y
9# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set 8# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
10CONFIG_BLACKFIN=y 9CONFIG_BLACKFIN=y
10CONFIG_GENERIC_CSUM=y
11CONFIG_GENERIC_BUG=y
11CONFIG_ZONE_DMA=y 12CONFIG_ZONE_DMA=y
12CONFIG_GENERIC_FIND_NEXT_BIT=y 13CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_IRQ_PROBE=y 15CONFIG_GENERIC_IRQ_PROBE=y
16CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_GPIO=y 17CONFIG_GENERIC_GPIO=y
17CONFIG_FORCE_MAX_ZONEORDER=14 18CONFIG_FORCE_MAX_ZONEORDER=14
18CONFIG_GENERIC_CALIBRATE_DELAY=y 19CONFIG_GENERIC_CALIBRATE_DELAY=y
20CONFIG_LOCKDEP_SUPPORT=y
21CONFIG_STACKTRACE_SUPPORT=y
22CONFIG_TRACE_IRQFLAGS_SUPPORT=y
19CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 23CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
24CONFIG_CONSTRUCTORS=y
20 25
21# 26#
22# General setup 27# General setup
@@ -26,22 +31,41 @@ CONFIG_BROKEN_ON_SMP=y
26CONFIG_INIT_ENV_ARG_LIMIT=32 31CONFIG_INIT_ENV_ARG_LIMIT=32
27CONFIG_LOCALVERSION="" 32CONFIG_LOCALVERSION=""
28CONFIG_LOCALVERSION_AUTO=y 33CONFIG_LOCALVERSION_AUTO=y
34CONFIG_HAVE_KERNEL_GZIP=y
35CONFIG_HAVE_KERNEL_BZIP2=y
36CONFIG_HAVE_KERNEL_LZMA=y
37CONFIG_KERNEL_GZIP=y
38# CONFIG_KERNEL_BZIP2 is not set
39# CONFIG_KERNEL_LZMA is not set
29CONFIG_SYSVIPC=y 40CONFIG_SYSVIPC=y
30CONFIG_SYSVIPC_SYSCTL=y 41CONFIG_SYSVIPC_SYSCTL=y
31# CONFIG_POSIX_MQUEUE is not set 42# CONFIG_POSIX_MQUEUE is not set
32# CONFIG_BSD_PROCESS_ACCT is not set 43# CONFIG_BSD_PROCESS_ACCT is not set
33# CONFIG_TASKSTATS is not set 44# CONFIG_TASKSTATS is not set
34# CONFIG_AUDIT is not set 45# CONFIG_AUDIT is not set
46
47#
48# RCU Subsystem
49#
50CONFIG_TREE_RCU=y
51# CONFIG_TREE_PREEMPT_RCU is not set
52# CONFIG_RCU_TRACE is not set
53CONFIG_RCU_FANOUT=32
54# CONFIG_RCU_FANOUT_EXACT is not set
55# CONFIG_TREE_RCU_TRACE is not set
35CONFIG_IKCONFIG=y 56CONFIG_IKCONFIG=y
36CONFIG_IKCONFIG_PROC=y 57CONFIG_IKCONFIG_PROC=y
37CONFIG_LOG_BUF_SHIFT=14 58CONFIG_LOG_BUF_SHIFT=14
38# CONFIG_CGROUPS is not set
39# CONFIG_GROUP_SCHED is not set 59# CONFIG_GROUP_SCHED is not set
60# CONFIG_CGROUPS is not set
40# CONFIG_SYSFS_DEPRECATED_V2 is not set 61# CONFIG_SYSFS_DEPRECATED_V2 is not set
41# CONFIG_RELAY is not set 62# CONFIG_RELAY is not set
42# CONFIG_NAMESPACES is not set 63# CONFIG_NAMESPACES is not set
43CONFIG_BLK_DEV_INITRD=y 64CONFIG_BLK_DEV_INITRD=y
44CONFIG_INITRAMFS_SOURCE="" 65CONFIG_INITRAMFS_SOURCE=""
66CONFIG_RD_GZIP=y
67# CONFIG_RD_BZIP2 is not set
68# CONFIG_RD_LZMA is not set
45# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 69# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
46CONFIG_SYSCTL=y 70CONFIG_SYSCTL=y
47CONFIG_ANON_INODES=y 71CONFIG_ANON_INODES=y
@@ -62,6 +86,10 @@ CONFIG_EPOLL=y
62# CONFIG_TIMERFD is not set 86# CONFIG_TIMERFD is not set
63# CONFIG_EVENTFD is not set 87# CONFIG_EVENTFD is not set
64# CONFIG_AIO is not set 88# CONFIG_AIO is not set
89
90#
91# Kernel Performance Events And Counters
92#
65CONFIG_VM_EVENT_COUNTERS=y 93CONFIG_VM_EVENT_COUNTERS=y
66CONFIG_COMPAT_BRK=y 94CONFIG_COMPAT_BRK=y
67CONFIG_SLAB=y 95CONFIG_SLAB=y
@@ -69,11 +97,15 @@ CONFIG_SLAB=y
69# CONFIG_SLOB is not set 97# CONFIG_SLOB is not set
70CONFIG_MMAP_ALLOW_UNINITIALIZED=y 98CONFIG_MMAP_ALLOW_UNINITIALIZED=y
71# CONFIG_PROFILING is not set 99# CONFIG_PROFILING is not set
72# CONFIG_MARKERS is not set
73CONFIG_HAVE_OPROFILE=y 100CONFIG_HAVE_OPROFILE=y
101
102#
103# GCOV-based kernel profiling
104#
105# CONFIG_GCOV_KERNEL is not set
106# CONFIG_SLOW_WORK is not set
74# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set 107# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
75CONFIG_SLABINFO=y 108CONFIG_SLABINFO=y
76CONFIG_TINY_SHMEM=y
77CONFIG_BASE_SMALL=0 109CONFIG_BASE_SMALL=0
78CONFIG_MODULES=y 110CONFIG_MODULES=y
79# CONFIG_MODULE_FORCE_LOAD is not set 111# CONFIG_MODULE_FORCE_LOAD is not set
@@ -81,11 +113,8 @@ CONFIG_MODULE_UNLOAD=y
81# CONFIG_MODULE_FORCE_UNLOAD is not set 113# CONFIG_MODULE_FORCE_UNLOAD is not set
82# CONFIG_MODVERSIONS is not set 114# CONFIG_MODVERSIONS is not set
83# CONFIG_MODULE_SRCVERSION_ALL is not set 115# CONFIG_MODULE_SRCVERSION_ALL is not set
84CONFIG_KMOD=y
85CONFIG_BLOCK=y 116CONFIG_BLOCK=y
86# CONFIG_LBD is not set 117# CONFIG_LBDAF is not set
87# CONFIG_BLK_DEV_IO_TRACE is not set
88# CONFIG_LSF is not set
89# CONFIG_BLK_DEV_BSG is not set 118# CONFIG_BLK_DEV_BSG is not set
90# CONFIG_BLK_DEV_INTEGRITY is not set 119# CONFIG_BLK_DEV_INTEGRITY is not set
91 120
@@ -101,7 +130,6 @@ CONFIG_DEFAULT_AS=y
101# CONFIG_DEFAULT_CFQ is not set 130# CONFIG_DEFAULT_CFQ is not set
102# CONFIG_DEFAULT_NOOP is not set 131# CONFIG_DEFAULT_NOOP is not set
103CONFIG_DEFAULT_IOSCHED="anticipatory" 132CONFIG_DEFAULT_IOSCHED="anticipatory"
104CONFIG_CLASSIC_RCU=y
105# CONFIG_PREEMPT_NONE is not set 133# CONFIG_PREEMPT_NONE is not set
106CONFIG_PREEMPT_VOLUNTARY=y 134CONFIG_PREEMPT_VOLUNTARY=y
107# CONFIG_PREEMPT is not set 135# CONFIG_PREEMPT is not set
@@ -132,15 +160,15 @@ CONFIG_PREEMPT_VOLUNTARY=y
132# CONFIG_BF537 is not set 160# CONFIG_BF537 is not set
133CONFIG_BF538=y 161CONFIG_BF538=y
134# CONFIG_BF539 is not set 162# CONFIG_BF539 is not set
135# CONFIG_BF542 is not set 163# CONFIG_BF542_std is not set
136# CONFIG_BF542M is not set 164# CONFIG_BF542M is not set
137# CONFIG_BF544 is not set 165# CONFIG_BF544_std is not set
138# CONFIG_BF544M is not set 166# CONFIG_BF544M is not set
139# CONFIG_BF547 is not set 167# CONFIG_BF547_std is not set
140# CONFIG_BF547M is not set 168# CONFIG_BF547M is not set
141# CONFIG_BF548 is not set 169# CONFIG_BF548_std is not set
142# CONFIG_BF548M is not set 170# CONFIG_BF548M is not set
143# CONFIG_BF549 is not set 171# CONFIG_BF549_std is not set
144# CONFIG_BF549M is not set 172# CONFIG_BF549M is not set
145# CONFIG_BF561 is not set 173# CONFIG_BF561 is not set
146CONFIG_BF_REV_MIN=4 174CONFIG_BF_REV_MIN=4
@@ -246,7 +274,7 @@ CONFIG_GENERIC_TIME=y
246CONFIG_GENERIC_CLOCKEVENTS=y 274CONFIG_GENERIC_CLOCKEVENTS=y
247# CONFIG_TICKSOURCE_GPTMR0 is not set 275# CONFIG_TICKSOURCE_GPTMR0 is not set
248CONFIG_TICKSOURCE_CORETMR=y 276CONFIG_TICKSOURCE_CORETMR=y
249# CONFIG_CYCLES_CLOCKSOURCE is not set 277CONFIG_CYCLES_CLOCKSOURCE=y
250# CONFIG_GPTMR0_CLOCKSOURCE is not set 278# CONFIG_GPTMR0_CLOCKSOURCE is not set
251CONFIG_TICK_ONESHOT=y 279CONFIG_TICK_ONESHOT=y
252# CONFIG_NO_HZ is not set 280# CONFIG_NO_HZ is not set
@@ -298,7 +326,6 @@ CONFIG_FLATMEM=y
298CONFIG_FLAT_NODE_MEM_MAP=y 326CONFIG_FLAT_NODE_MEM_MAP=y
299CONFIG_PAGEFLAGS_EXTENDED=y 327CONFIG_PAGEFLAGS_EXTENDED=y
300CONFIG_SPLIT_PTLOCK_CPUS=4 328CONFIG_SPLIT_PTLOCK_CPUS=4
301# CONFIG_RESOURCES_64BIT is not set
302# CONFIG_PHYS_ADDR_T_64BIT is not set 329# CONFIG_PHYS_ADDR_T_64BIT is not set
303CONFIG_ZONE_DMA_FLAG=1 330CONFIG_ZONE_DMA_FLAG=1
304CONFIG_VIRT_TO_BUS=y 331CONFIG_VIRT_TO_BUS=y
@@ -307,16 +334,18 @@ CONFIG_BFIN_GPTIMERS=m
307# CONFIG_DMA_UNCACHED_4M is not set 334# CONFIG_DMA_UNCACHED_4M is not set
308# CONFIG_DMA_UNCACHED_2M is not set 335# CONFIG_DMA_UNCACHED_2M is not set
309CONFIG_DMA_UNCACHED_1M=y 336CONFIG_DMA_UNCACHED_1M=y
337# CONFIG_DMA_UNCACHED_512K is not set
338# CONFIG_DMA_UNCACHED_256K is not set
339# CONFIG_DMA_UNCACHED_128K is not set
310# CONFIG_DMA_UNCACHED_NONE is not set 340# CONFIG_DMA_UNCACHED_NONE is not set
311 341
312# 342#
313# Cache Support 343# Cache Support
314# 344#
315CONFIG_BFIN_ICACHE=y 345CONFIG_BFIN_ICACHE=y
316# CONFIG_BFIN_ICACHE_LOCK is not set 346CONFIG_BFIN_EXTMEM_ICACHEABLE=y
317CONFIG_BFIN_DCACHE=y 347CONFIG_BFIN_DCACHE=y
318# CONFIG_BFIN_DCACHE_BANKA is not set 348# CONFIG_BFIN_DCACHE_BANKA is not set
319CONFIG_BFIN_EXTMEM_ICACHEABLE=y
320CONFIG_BFIN_EXTMEM_DCACHEABLE=y 349CONFIG_BFIN_EXTMEM_DCACHEABLE=y
321CONFIG_BFIN_EXTMEM_WRITEBACK=y 350CONFIG_BFIN_EXTMEM_WRITEBACK=y
322# CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set 351# CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set
@@ -327,7 +356,7 @@ CONFIG_BFIN_EXTMEM_WRITEBACK=y
327# CONFIG_MPU is not set 356# CONFIG_MPU is not set
328 357
329# 358#
330# Asynchonous Memory Configuration 359# Asynchronous Memory Configuration
331# 360#
332 361
333# 362#
@@ -383,11 +412,6 @@ CONFIG_NET=y
383CONFIG_PACKET=y 412CONFIG_PACKET=y
384# CONFIG_PACKET_MMAP is not set 413# CONFIG_PACKET_MMAP is not set
385CONFIG_UNIX=y 414CONFIG_UNIX=y
386CONFIG_XFRM=y
387# CONFIG_XFRM_USER is not set
388# CONFIG_XFRM_SUB_POLICY is not set
389# CONFIG_XFRM_MIGRATE is not set
390# CONFIG_XFRM_STATISTICS is not set
391# CONFIG_NET_KEY is not set 415# CONFIG_NET_KEY is not set
392CONFIG_INET=y 416CONFIG_INET=y
393# CONFIG_IP_MULTICAST is not set 417# CONFIG_IP_MULTICAST is not set
@@ -411,7 +435,6 @@ CONFIG_IP_PNP=y
411# CONFIG_INET_XFRM_MODE_BEET is not set 435# CONFIG_INET_XFRM_MODE_BEET is not set
412# CONFIG_INET_LRO is not set 436# CONFIG_INET_LRO is not set
413# CONFIG_INET_DIAG is not set 437# CONFIG_INET_DIAG is not set
414CONFIG_INET_TCP_DIAG=y
415# CONFIG_TCP_CONG_ADVANCED is not set 438# CONFIG_TCP_CONG_ADVANCED is not set
416CONFIG_TCP_CONG_CUBIC=y 439CONFIG_TCP_CONG_CUBIC=y
417CONFIG_DEFAULT_TCP_CONG="cubic" 440CONFIG_DEFAULT_TCP_CONG="cubic"
@@ -422,6 +445,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
422# CONFIG_NETFILTER is not set 445# CONFIG_NETFILTER is not set
423# CONFIG_IP_DCCP is not set 446# CONFIG_IP_DCCP is not set
424# CONFIG_IP_SCTP is not set 447# CONFIG_IP_SCTP is not set
448# CONFIG_RDS is not set
425# CONFIG_TIPC is not set 449# CONFIG_TIPC is not set
426# CONFIG_ATM is not set 450# CONFIG_ATM is not set
427# CONFIG_BRIDGE is not set 451# CONFIG_BRIDGE is not set
@@ -435,14 +459,34 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
435# CONFIG_LAPB is not set 459# CONFIG_LAPB is not set
436# CONFIG_ECONET is not set 460# CONFIG_ECONET is not set
437# CONFIG_WAN_ROUTER is not set 461# CONFIG_WAN_ROUTER is not set
462# CONFIG_PHONET is not set
463# CONFIG_IEEE802154 is not set
438# CONFIG_NET_SCHED is not set 464# CONFIG_NET_SCHED is not set
465# CONFIG_DCB is not set
439 466
440# 467#
441# Network testing 468# Network testing
442# 469#
443# CONFIG_NET_PKTGEN is not set 470# CONFIG_NET_PKTGEN is not set
444# CONFIG_HAMRADIO is not set 471# CONFIG_HAMRADIO is not set
445# CONFIG_CAN is not set 472CONFIG_CAN=m
473CONFIG_CAN_RAW=m
474CONFIG_CAN_BCM=m
475
476#
477# CAN Device Drivers
478#
479# CONFIG_CAN_VCAN is not set
480CONFIG_CAN_DEV=m
481# CONFIG_CAN_CALC_BITTIMING is not set
482CONFIG_CAN_BFIN=m
483# CONFIG_CAN_SJA1000 is not set
484
485#
486# CAN USB interfaces
487#
488# CONFIG_CAN_EMS_USB is not set
489# CONFIG_CAN_DEBUG_DEVICES is not set
446CONFIG_IRDA=m 490CONFIG_IRDA=m
447 491
448# 492#
@@ -481,13 +525,8 @@ CONFIG_SIR_BFIN_DMA=y
481# 525#
482# CONFIG_BT is not set 526# CONFIG_BT is not set
483# CONFIG_AF_RXRPC is not set 527# CONFIG_AF_RXRPC is not set
484# CONFIG_PHONET is not set 528# CONFIG_WIRELESS is not set
485CONFIG_WIRELESS=y 529# CONFIG_WIMAX is not set
486# CONFIG_CFG80211 is not set
487CONFIG_WIRELESS_OLD_REGULATORY=y
488# CONFIG_WIRELESS_EXT is not set
489# CONFIG_MAC80211 is not set
490# CONFIG_IEEE80211 is not set
491# CONFIG_RFKILL is not set 530# CONFIG_RFKILL is not set
492# CONFIG_NET_9P is not set 531# CONFIG_NET_9P is not set
493 532
@@ -508,6 +547,7 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
508# CONFIG_CONNECTOR is not set 547# CONFIG_CONNECTOR is not set
509CONFIG_MTD=y 548CONFIG_MTD=y
510# CONFIG_MTD_DEBUG is not set 549# CONFIG_MTD_DEBUG is not set
550# CONFIG_MTD_TESTS is not set
511# CONFIG_MTD_CONCAT is not set 551# CONFIG_MTD_CONCAT is not set
512CONFIG_MTD_PARTITIONS=y 552CONFIG_MTD_PARTITIONS=y
513# CONFIG_MTD_REDBOOT_PARTS is not set 553# CONFIG_MTD_REDBOOT_PARTS is not set
@@ -566,6 +606,7 @@ CONFIG_MTD_PHYSMAP=m
566# 606#
567# CONFIG_MTD_DATAFLASH is not set 607# CONFIG_MTD_DATAFLASH is not set
568# CONFIG_MTD_M25P80 is not set 608# CONFIG_MTD_M25P80 is not set
609# CONFIG_MTD_SST25L is not set
569# CONFIG_MTD_SLRAM is not set 610# CONFIG_MTD_SLRAM is not set
570# CONFIG_MTD_PHRAM is not set 611# CONFIG_MTD_PHRAM is not set
571# CONFIG_MTD_MTDRAM is not set 612# CONFIG_MTD_MTDRAM is not set
@@ -581,11 +622,6 @@ CONFIG_MTD_NAND=m
581# CONFIG_MTD_NAND_VERIFY_WRITE is not set 622# CONFIG_MTD_NAND_VERIFY_WRITE is not set
582# CONFIG_MTD_NAND_ECC_SMC is not set 623# CONFIG_MTD_NAND_ECC_SMC is not set
583# CONFIG_MTD_NAND_MUSEUM_IDS is not set 624# CONFIG_MTD_NAND_MUSEUM_IDS is not set
584CONFIG_MTD_NAND_BFIN=m
585CONFIG_BFIN_NAND_BASE=0x20212000
586CONFIG_BFIN_NAND_CLE=2
587CONFIG_BFIN_NAND_ALE=1
588CONFIG_BFIN_NAND_READY=3
589CONFIG_MTD_NAND_IDS=m 625CONFIG_MTD_NAND_IDS=m
590# CONFIG_MTD_NAND_DISKONCHIP is not set 626# CONFIG_MTD_NAND_DISKONCHIP is not set
591# CONFIG_MTD_NAND_NANDSIM is not set 627# CONFIG_MTD_NAND_NANDSIM is not set
@@ -593,6 +629,11 @@ CONFIG_MTD_NAND_IDS=m
593# CONFIG_MTD_ONENAND is not set 629# CONFIG_MTD_ONENAND is not set
594 630
595# 631#
632# LPDDR flash memory drivers
633#
634# CONFIG_MTD_LPDDR is not set
635
636#
596# UBI - Unsorted block images 637# UBI - Unsorted block images
597# 638#
598# CONFIG_MTD_UBI is not set 639# CONFIG_MTD_UBI is not set
@@ -643,14 +684,20 @@ CONFIG_SMSC_PHY=y
643# CONFIG_BROADCOM_PHY is not set 684# CONFIG_BROADCOM_PHY is not set
644# CONFIG_ICPLUS_PHY is not set 685# CONFIG_ICPLUS_PHY is not set
645# CONFIG_REALTEK_PHY is not set 686# CONFIG_REALTEK_PHY is not set
687# CONFIG_NATIONAL_PHY is not set
688# CONFIG_STE10XP is not set
689# CONFIG_LSI_ET1011C_PHY is not set
646# CONFIG_FIXED_PHY is not set 690# CONFIG_FIXED_PHY is not set
647# CONFIG_MDIO_BITBANG is not set 691# CONFIG_MDIO_BITBANG is not set
648CONFIG_NET_ETHERNET=y 692CONFIG_NET_ETHERNET=y
649CONFIG_MII=y 693CONFIG_MII=y
650CONFIG_SMC91X=y 694CONFIG_SMC91X=y
651# CONFIG_SMSC911X is not set
652# CONFIG_DM9000 is not set 695# CONFIG_DM9000 is not set
653# CONFIG_ENC28J60 is not set 696# CONFIG_ENC28J60 is not set
697# CONFIG_ETHOC is not set
698# CONFIG_SMSC911X is not set
699# CONFIG_DNET is not set
700# CONFIG_ADF702X is not set
654# CONFIG_IBM_NEW_EMAC_ZMII is not set 701# CONFIG_IBM_NEW_EMAC_ZMII is not set
655# CONFIG_IBM_NEW_EMAC_RGMII is not set 702# CONFIG_IBM_NEW_EMAC_RGMII is not set
656# CONFIG_IBM_NEW_EMAC_TAH is not set 703# CONFIG_IBM_NEW_EMAC_TAH is not set
@@ -659,15 +706,16 @@ CONFIG_SMC91X=y
659# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set 706# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
660# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 707# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
661# CONFIG_B44 is not set 708# CONFIG_B44 is not set
709# CONFIG_KS8842 is not set
710# CONFIG_KS8851 is not set
711# CONFIG_KS8851_MLL is not set
662# CONFIG_NETDEV_1000 is not set 712# CONFIG_NETDEV_1000 is not set
663# CONFIG_NETDEV_10000 is not set 713# CONFIG_NETDEV_10000 is not set
714# CONFIG_WLAN is not set
664 715
665# 716#
666# Wireless LAN 717# Enable WiMAX (Networking options) to see the WiMAX drivers
667# 718#
668# CONFIG_WLAN_PRE80211 is not set
669# CONFIG_WLAN_80211 is not set
670# CONFIG_IWLWIFI_LEDS is not set
671# CONFIG_WAN is not set 719# CONFIG_WAN is not set
672# CONFIG_PPP is not set 720# CONFIG_PPP is not set
673# CONFIG_SLIP is not set 721# CONFIG_SLIP is not set
@@ -700,14 +748,17 @@ CONFIG_INPUT_EVDEV=m
700# CONFIG_INPUT_JOYSTICK is not set 748# CONFIG_INPUT_JOYSTICK is not set
701# CONFIG_INPUT_TABLET is not set 749# CONFIG_INPUT_TABLET is not set
702CONFIG_INPUT_TOUCHSCREEN=y 750CONFIG_INPUT_TOUCHSCREEN=y
751# CONFIG_TOUCHSCREEN_ADS7846 is not set
703# CONFIG_TOUCHSCREEN_AD7877 is not set 752# CONFIG_TOUCHSCREEN_AD7877 is not set
704# CONFIG_TOUCHSCREEN_AD7879_I2C is not set 753# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
705CONFIG_TOUCHSCREEN_AD7879_SPI=y 754CONFIG_TOUCHSCREEN_AD7879_SPI=y
706CONFIG_TOUCHSCREEN_AD7879=y 755CONFIG_TOUCHSCREEN_AD7879=y
707# CONFIG_TOUCHSCREEN_ADS7846 is not set 756# CONFIG_TOUCHSCREEN_EETI is not set
708# CONFIG_TOUCHSCREEN_FUJITSU is not set 757# CONFIG_TOUCHSCREEN_FUJITSU is not set
709# CONFIG_TOUCHSCREEN_GUNZE is not set 758# CONFIG_TOUCHSCREEN_GUNZE is not set
710# CONFIG_TOUCHSCREEN_ELO is not set 759# CONFIG_TOUCHSCREEN_ELO is not set
760# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
761# CONFIG_TOUCHSCREEN_MCS5000 is not set
711# CONFIG_TOUCHSCREEN_MTOUCH is not set 762# CONFIG_TOUCHSCREEN_MTOUCH is not set
712# CONFIG_TOUCHSCREEN_INEXIO is not set 763# CONFIG_TOUCHSCREEN_INEXIO is not set
713# CONFIG_TOUCHSCREEN_MK712 is not set 764# CONFIG_TOUCHSCREEN_MK712 is not set
@@ -715,9 +766,13 @@ CONFIG_TOUCHSCREEN_AD7879=y
715# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set 766# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
716# CONFIG_TOUCHSCREEN_TOUCHWIN is not set 767# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
717# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set 768# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
769# CONFIG_TOUCHSCREEN_TSC2007 is not set
718CONFIG_INPUT_MISC=y 770CONFIG_INPUT_MISC=y
719# CONFIG_INPUT_UINPUT is not set 771# CONFIG_INPUT_UINPUT is not set
720# CONFIG_CONFIG_INPUT_PCF8574 is not set 772# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
773# CONFIG_INPUT_AD714X is not set
774# CONFIG_INPUT_ADXL34X is not set
775# CONFIG_INPUT_PCF8574 is not set
721 776
722# 777#
723# Hardware I/O ports 778# Hardware I/O ports
@@ -728,16 +783,13 @@ CONFIG_INPUT_MISC=y
728# 783#
729# Character devices 784# Character devices
730# 785#
731# CONFIG_AD9960 is not set
732CONFIG_BFIN_DMA_INTERFACE=m 786CONFIG_BFIN_DMA_INTERFACE=m
733# CONFIG_BFIN_PPI is not set 787# CONFIG_BFIN_PPI is not set
734# CONFIG_BFIN_PPIFCD is not set 788# CONFIG_BFIN_PPIFCD is not set
735# CONFIG_BFIN_SIMPLE_TIMER is not set 789# CONFIG_BFIN_SIMPLE_TIMER is not set
736# CONFIG_BFIN_SPI_ADC is not set 790# CONFIG_BFIN_SPI_ADC is not set
737CONFIG_BFIN_SPORT=m 791CONFIG_BFIN_SPORT=m
738# CONFIG_BFIN_TIMER_LATENCY is not set
739# CONFIG_BFIN_TWI_LCD is not set 792# CONFIG_BFIN_TWI_LCD is not set
740CONFIG_SIMPLE_GPIO=m
741# CONFIG_VT is not set 793# CONFIG_VT is not set
742# CONFIG_DEVKMEM is not set 794# CONFIG_DEVKMEM is not set
743CONFIG_BFIN_JTAG_COMM=m 795CONFIG_BFIN_JTAG_COMM=m
@@ -751,6 +803,7 @@ CONFIG_BFIN_JTAG_COMM=m
751# 803#
752# Non-8250 serial port support 804# Non-8250 serial port support
753# 805#
806# CONFIG_SERIAL_MAX3100 is not set
754CONFIG_SERIAL_BFIN=y 807CONFIG_SERIAL_BFIN=y
755CONFIG_SERIAL_BFIN_CONSOLE=y 808CONFIG_SERIAL_BFIN_CONSOLE=y
756CONFIG_SERIAL_BFIN_DMA=y 809CONFIG_SERIAL_BFIN_DMA=y
@@ -765,12 +818,8 @@ CONFIG_SERIAL_CORE=y
765CONFIG_SERIAL_CORE_CONSOLE=y 818CONFIG_SERIAL_CORE_CONSOLE=y
766# CONFIG_SERIAL_BFIN_SPORT is not set 819# CONFIG_SERIAL_BFIN_SPORT is not set
767CONFIG_UNIX98_PTYS=y 820CONFIG_UNIX98_PTYS=y
821# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
768# CONFIG_LEGACY_PTYS is not set 822# CONFIG_LEGACY_PTYS is not set
769
770#
771# CAN, the car bus and industrial fieldbus
772#
773# CONFIG_CAN4LINUX is not set
774# CONFIG_IPMI_HANDLER is not set 823# CONFIG_IPMI_HANDLER is not set
775# CONFIG_HW_RANDOM is not set 824# CONFIG_HW_RANDOM is not set
776# CONFIG_R3964 is not set 825# CONFIG_R3964 is not set
@@ -778,6 +827,7 @@ CONFIG_UNIX98_PTYS=y
778# CONFIG_TCG_TPM is not set 827# CONFIG_TCG_TPM is not set
779CONFIG_I2C=m 828CONFIG_I2C=m
780CONFIG_I2C_BOARDINFO=y 829CONFIG_I2C_BOARDINFO=y
830CONFIG_I2C_COMPAT=y
781# CONFIG_I2C_CHARDEV is not set 831# CONFIG_I2C_CHARDEV is not set
782CONFIG_I2C_HELPER_AUTO=y 832CONFIG_I2C_HELPER_AUTO=y
783 833
@@ -810,14 +860,6 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
810# Miscellaneous I2C Chip support 860# Miscellaneous I2C Chip support
811# 861#
812# CONFIG_DS1682 is not set 862# CONFIG_DS1682 is not set
813# CONFIG_EEPROM_AT24 is not set
814# CONFIG_SENSORS_AD5252 is not set
815# CONFIG_EEPROM_LEGACY is not set
816# CONFIG_SENSORS_PCF8574 is not set
817# CONFIG_PCF8575 is not set
818# CONFIG_SENSORS_PCA9539 is not set
819# CONFIG_SENSORS_PCF8591 is not set
820# CONFIG_SENSORS_MAX6875 is not set
821# CONFIG_SENSORS_TSL2550 is not set 863# CONFIG_SENSORS_TSL2550 is not set
822# CONFIG_I2C_DEBUG_CORE is not set 864# CONFIG_I2C_DEBUG_CORE is not set
823# CONFIG_I2C_DEBUG_ALGO is not set 865# CONFIG_I2C_DEBUG_ALGO is not set
@@ -834,13 +876,18 @@ CONFIG_SPI_BFIN=y
834# CONFIG_SPI_BFIN_LOCK is not set 876# CONFIG_SPI_BFIN_LOCK is not set
835# CONFIG_SPI_BFIN_SPORT is not set 877# CONFIG_SPI_BFIN_SPORT is not set
836# CONFIG_SPI_BITBANG is not set 878# CONFIG_SPI_BITBANG is not set
879# CONFIG_SPI_GPIO is not set
837 880
838# 881#
839# SPI Protocol Masters 882# SPI Protocol Masters
840# 883#
841# CONFIG_EEPROM_AT25 is not set
842# CONFIG_SPI_SPIDEV is not set 884# CONFIG_SPI_SPIDEV is not set
843# CONFIG_SPI_TLE62X0 is not set 885# CONFIG_SPI_TLE62X0 is not set
886
887#
888# PPS support
889#
890# CONFIG_PPS is not set
844CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y 891CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
845CONFIG_GPIOLIB=y 892CONFIG_GPIOLIB=y
846# CONFIG_DEBUG_GPIO is not set 893# CONFIG_DEBUG_GPIO is not set
@@ -856,6 +903,7 @@ CONFIG_GPIO_SYSFS=y
856# CONFIG_GPIO_MAX732X is not set 903# CONFIG_GPIO_MAX732X is not set
857# CONFIG_GPIO_PCA953X is not set 904# CONFIG_GPIO_PCA953X is not set
858# CONFIG_GPIO_PCF857X is not set 905# CONFIG_GPIO_PCF857X is not set
906# CONFIG_GPIO_ADP5588 is not set
859 907
860# 908#
861# PCI GPIO expanders: 909# PCI GPIO expanders:
@@ -866,11 +914,15 @@ CONFIG_GPIO_SYSFS=y
866# 914#
867# CONFIG_GPIO_MAX7301 is not set 915# CONFIG_GPIO_MAX7301 is not set
868# CONFIG_GPIO_MCP23S08 is not set 916# CONFIG_GPIO_MCP23S08 is not set
917# CONFIG_GPIO_MC33880 is not set
918
919#
920# AC97 GPIO expanders:
921#
869# CONFIG_W1 is not set 922# CONFIG_W1 is not set
870# CONFIG_POWER_SUPPLY is not set 923# CONFIG_POWER_SUPPLY is not set
871# CONFIG_HWMON is not set 924# CONFIG_HWMON is not set
872# CONFIG_THERMAL is not set 925# CONFIG_THERMAL is not set
873# CONFIG_THERMAL_HWMON is not set
874CONFIG_WATCHDOG=y 926CONFIG_WATCHDOG=y
875# CONFIG_WATCHDOG_NOWAYOUT is not set 927# CONFIG_WATCHDOG_NOWAYOUT is not set
876 928
@@ -892,26 +944,17 @@ CONFIG_SSB_POSSIBLE=y
892# CONFIG_MFD_CORE is not set 944# CONFIG_MFD_CORE is not set
893# CONFIG_MFD_SM501 is not set 945# CONFIG_MFD_SM501 is not set
894# CONFIG_HTC_PASIC3 is not set 946# CONFIG_HTC_PASIC3 is not set
947# CONFIG_TPS65010 is not set
895# CONFIG_MFD_TMIO is not set 948# CONFIG_MFD_TMIO is not set
896# CONFIG_MFD_WM8400 is not set 949# CONFIG_MFD_WM8400 is not set
950# CONFIG_MFD_WM831X is not set
897# CONFIG_MFD_WM8350_I2C is not set 951# CONFIG_MFD_WM8350_I2C is not set
952# CONFIG_MFD_PCF50633 is not set
953# CONFIG_MFD_MC13783 is not set
954# CONFIG_AB3100_CORE is not set
955# CONFIG_EZX_PCAP is not set
898# CONFIG_REGULATOR is not set 956# CONFIG_REGULATOR is not set
899 957# CONFIG_MEDIA_SUPPORT is not set
900#
901# Multimedia devices
902#
903
904#
905# Multimedia core support
906#
907# CONFIG_VIDEO_DEV is not set
908# CONFIG_DVB_CORE is not set
909# CONFIG_VIDEO_MEDIA is not set
910
911#
912# Multimedia drivers
913#
914# CONFIG_DAB is not set
915 958
916# 959#
917# Graphics support 960# Graphics support
@@ -947,6 +990,7 @@ CONFIG_FB_BFIN_LQ035Q1=m
947# CONFIG_FB_VIRTUAL is not set 990# CONFIG_FB_VIRTUAL is not set
948# CONFIG_FB_METRONOME is not set 991# CONFIG_FB_METRONOME is not set
949# CONFIG_FB_MB862XX is not set 992# CONFIG_FB_MB862XX is not set
993# CONFIG_FB_BROADSHEET is not set
950# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 994# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
951 995
952# 996#
@@ -957,14 +1001,12 @@ CONFIG_FB_BFIN_LQ035Q1=m
957# CONFIG_SOUND is not set 1001# CONFIG_SOUND is not set
958CONFIG_HID_SUPPORT=y 1002CONFIG_HID_SUPPORT=y
959CONFIG_HID=y 1003CONFIG_HID=y
960# CONFIG_HID_DEBUG is not set
961# CONFIG_HIDRAW is not set 1004# CONFIG_HIDRAW is not set
962# CONFIG_HID_PID is not set 1005# CONFIG_HID_PID is not set
963 1006
964# 1007#
965# Special HID drivers 1008# Special HID drivers
966# 1009#
967CONFIG_HID_COMPAT=y
968# CONFIG_USB_SUPPORT is not set 1010# CONFIG_USB_SUPPORT is not set
969# CONFIG_MMC is not set 1011# CONFIG_MMC is not set
970# CONFIG_MEMSTICK is not set 1012# CONFIG_MEMSTICK is not set
@@ -1001,6 +1043,7 @@ CONFIG_RTC_INTF_DEV=y
1001# CONFIG_RTC_DRV_S35390A is not set 1043# CONFIG_RTC_DRV_S35390A is not set
1002# CONFIG_RTC_DRV_FM3130 is not set 1044# CONFIG_RTC_DRV_FM3130 is not set
1003# CONFIG_RTC_DRV_RX8581 is not set 1045# CONFIG_RTC_DRV_RX8581 is not set
1046# CONFIG_RTC_DRV_RX8025 is not set
1004 1047
1005# 1048#
1006# SPI RTC drivers 1049# SPI RTC drivers
@@ -1012,6 +1055,7 @@ CONFIG_RTC_INTF_DEV=y
1012# CONFIG_RTC_DRV_R9701 is not set 1055# CONFIG_RTC_DRV_R9701 is not set
1013# CONFIG_RTC_DRV_RS5C348 is not set 1056# CONFIG_RTC_DRV_RS5C348 is not set
1014# CONFIG_RTC_DRV_DS3234 is not set 1057# CONFIG_RTC_DRV_DS3234 is not set
1058# CONFIG_RTC_DRV_PCF2123 is not set
1015 1059
1016# 1060#
1017# Platform RTC drivers 1061# Platform RTC drivers
@@ -1032,10 +1076,21 @@ CONFIG_RTC_INTF_DEV=y
1032# 1076#
1033CONFIG_RTC_DRV_BFIN=y 1077CONFIG_RTC_DRV_BFIN=y
1034# CONFIG_DMADEVICES is not set 1078# CONFIG_DMADEVICES is not set
1079# CONFIG_AUXDISPLAY is not set
1035# CONFIG_UIO is not set 1080# CONFIG_UIO is not set
1081
1082#
1083# TI VLYNQ
1084#
1036# CONFIG_STAGING is not set 1085# CONFIG_STAGING is not set
1037 1086
1038# 1087#
1088# Firmware Drivers
1089#
1090# CONFIG_FIRMWARE_MEMMAP is not set
1091# CONFIG_SIGMA is not set
1092
1093#
1039# File systems 1094# File systems
1040# 1095#
1041# CONFIG_EXT2_FS is not set 1096# CONFIG_EXT2_FS is not set
@@ -1044,9 +1099,13 @@ CONFIG_RTC_DRV_BFIN=y
1044# CONFIG_REISERFS_FS is not set 1099# CONFIG_REISERFS_FS is not set
1045# CONFIG_JFS_FS is not set 1100# CONFIG_JFS_FS is not set
1046# CONFIG_FS_POSIX_ACL is not set 1101# CONFIG_FS_POSIX_ACL is not set
1047CONFIG_FILE_LOCKING=y
1048# CONFIG_XFS_FS is not set 1102# CONFIG_XFS_FS is not set
1103# CONFIG_GFS2_FS is not set
1049# CONFIG_OCFS2_FS is not set 1104# CONFIG_OCFS2_FS is not set
1105# CONFIG_BTRFS_FS is not set
1106# CONFIG_NILFS2_FS is not set
1107CONFIG_FILE_LOCKING=y
1108CONFIG_FSNOTIFY=y
1050# CONFIG_DNOTIFY is not set 1109# CONFIG_DNOTIFY is not set
1051CONFIG_INOTIFY=y 1110CONFIG_INOTIFY=y
1052CONFIG_INOTIFY_USER=y 1111CONFIG_INOTIFY_USER=y
@@ -1056,6 +1115,11 @@ CONFIG_INOTIFY_USER=y
1056# CONFIG_FUSE_FS is not set 1115# CONFIG_FUSE_FS is not set
1057 1116
1058# 1117#
1118# Caches
1119#
1120# CONFIG_FSCACHE is not set
1121
1122#
1059# CD-ROM/DVD Filesystems 1123# CD-ROM/DVD Filesystems
1060# 1124#
1061# CONFIG_ISO9660_FS is not set 1125# CONFIG_ISO9660_FS is not set
@@ -1074,13 +1138,9 @@ CONFIG_INOTIFY_USER=y
1074CONFIG_PROC_FS=y 1138CONFIG_PROC_FS=y
1075CONFIG_PROC_SYSCTL=y 1139CONFIG_PROC_SYSCTL=y
1076CONFIG_SYSFS=y 1140CONFIG_SYSFS=y
1077# CONFIG_TMPFS is not set
1078# CONFIG_HUGETLB_PAGE is not set 1141# CONFIG_HUGETLB_PAGE is not set
1079# CONFIG_CONFIGFS_FS is not set 1142# CONFIG_CONFIGFS_FS is not set
1080 1143CONFIG_MISC_FILESYSTEMS=y
1081#
1082# Miscellaneous filesystems
1083#
1084# CONFIG_ADFS_FS is not set 1144# CONFIG_ADFS_FS is not set
1085# CONFIG_AFFS_FS is not set 1145# CONFIG_AFFS_FS is not set
1086# CONFIG_HFS_FS is not set 1146# CONFIG_HFS_FS is not set
@@ -1099,17 +1159,8 @@ CONFIG_JFFS2_ZLIB=y
1099# CONFIG_JFFS2_LZO is not set 1159# CONFIG_JFFS2_LZO is not set
1100CONFIG_JFFS2_RTIME=y 1160CONFIG_JFFS2_RTIME=y
1101# CONFIG_JFFS2_RUBIN is not set 1161# CONFIG_JFFS2_RUBIN is not set
1102CONFIG_YAFFS_FS=m
1103CONFIG_YAFFS_YAFFS1=y
1104# CONFIG_YAFFS_9BYTE_TAGS is not set
1105# CONFIG_YAFFS_DOES_ECC is not set
1106CONFIG_YAFFS_YAFFS2=y
1107CONFIG_YAFFS_AUTO_YAFFS2=y
1108# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
1109# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
1110# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
1111CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
1112# CONFIG_CRAMFS is not set 1162# CONFIG_CRAMFS is not set
1163# CONFIG_SQUASHFS is not set
1113# CONFIG_VXFS_FS is not set 1164# CONFIG_VXFS_FS is not set
1114# CONFIG_MINIX_FS is not set 1165# CONFIG_MINIX_FS is not set
1115# CONFIG_OMFS_FS is not set 1166# CONFIG_OMFS_FS is not set
@@ -1128,7 +1179,6 @@ CONFIG_LOCKD=m
1128CONFIG_LOCKD_V4=y 1179CONFIG_LOCKD_V4=y
1129CONFIG_NFS_COMMON=y 1180CONFIG_NFS_COMMON=y
1130CONFIG_SUNRPC=m 1181CONFIG_SUNRPC=m
1131# CONFIG_SUNRPC_REGISTER_V4 is not set
1132# CONFIG_RPCSEC_GSS_KRB5 is not set 1182# CONFIG_RPCSEC_GSS_KRB5 is not set
1133# CONFIG_RPCSEC_GSS_SPKM3 is not set 1183# CONFIG_RPCSEC_GSS_SPKM3 is not set
1134CONFIG_SMB_FS=m 1184CONFIG_SMB_FS=m
@@ -1193,14 +1243,19 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
1193CONFIG_ENABLE_MUST_CHECK=y 1243CONFIG_ENABLE_MUST_CHECK=y
1194CONFIG_FRAME_WARN=1024 1244CONFIG_FRAME_WARN=1024
1195# CONFIG_MAGIC_SYSRQ is not set 1245# CONFIG_MAGIC_SYSRQ is not set
1246# CONFIG_STRIP_ASM_SYMS is not set
1196# CONFIG_UNUSED_SYMBOLS is not set 1247# CONFIG_UNUSED_SYMBOLS is not set
1197CONFIG_DEBUG_FS=y 1248CONFIG_DEBUG_FS=y
1198# CONFIG_HEADERS_CHECK is not set 1249# CONFIG_HEADERS_CHECK is not set
1250CONFIG_DEBUG_SECTION_MISMATCH=y
1199CONFIG_DEBUG_KERNEL=y 1251CONFIG_DEBUG_KERNEL=y
1200CONFIG_DEBUG_SHIRQ=y 1252CONFIG_DEBUG_SHIRQ=y
1201CONFIG_DETECT_SOFTLOCKUP=y 1253CONFIG_DETECT_SOFTLOCKUP=y
1202# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set 1254# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
1203CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 1255CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
1256CONFIG_DETECT_HUNG_TASK=y
1257# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
1258CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
1204CONFIG_SCHED_DEBUG=y 1259CONFIG_SCHED_DEBUG=y
1205# CONFIG_SCHEDSTATS is not set 1260# CONFIG_SCHEDSTATS is not set
1206# CONFIG_TIMER_STATS is not set 1261# CONFIG_TIMER_STATS is not set
@@ -1208,31 +1263,39 @@ CONFIG_SCHED_DEBUG=y
1208# CONFIG_DEBUG_SLAB is not set 1263# CONFIG_DEBUG_SLAB is not set
1209# CONFIG_DEBUG_SPINLOCK is not set 1264# CONFIG_DEBUG_SPINLOCK is not set
1210# CONFIG_DEBUG_MUTEXES is not set 1265# CONFIG_DEBUG_MUTEXES is not set
1266# CONFIG_DEBUG_LOCK_ALLOC is not set
1267# CONFIG_PROVE_LOCKING is not set
1268# CONFIG_LOCK_STAT is not set
1211# CONFIG_DEBUG_SPINLOCK_SLEEP is not set 1269# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1212# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set 1270# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1213# CONFIG_DEBUG_KOBJECT is not set 1271# CONFIG_DEBUG_KOBJECT is not set
1214CONFIG_DEBUG_BUGVERBOSE=y 1272CONFIG_DEBUG_BUGVERBOSE=y
1215CONFIG_DEBUG_INFO=y 1273CONFIG_DEBUG_INFO=y
1216# CONFIG_DEBUG_VM is not set 1274# CONFIG_DEBUG_VM is not set
1275# CONFIG_DEBUG_NOMMU_REGIONS is not set
1217# CONFIG_DEBUG_WRITECOUNT is not set 1276# CONFIG_DEBUG_WRITECOUNT is not set
1218# CONFIG_DEBUG_MEMORY_INIT is not set 1277# CONFIG_DEBUG_MEMORY_INIT is not set
1219# CONFIG_DEBUG_LIST is not set 1278# CONFIG_DEBUG_LIST is not set
1220# CONFIG_DEBUG_SG is not set 1279# CONFIG_DEBUG_SG is not set
1280# CONFIG_DEBUG_NOTIFIERS is not set
1281# CONFIG_DEBUG_CREDENTIALS is not set
1221# CONFIG_FRAME_POINTER is not set 1282# CONFIG_FRAME_POINTER is not set
1222# CONFIG_BOOT_PRINTK_DELAY is not set 1283# CONFIG_BOOT_PRINTK_DELAY is not set
1223# CONFIG_RCU_TORTURE_TEST is not set 1284# CONFIG_RCU_TORTURE_TEST is not set
1224# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1285# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1225# CONFIG_BACKTRACE_SELF_TEST is not set 1286# CONFIG_BACKTRACE_SELF_TEST is not set
1226# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set 1287# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1288# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
1227# CONFIG_FAULT_INJECTION is not set 1289# CONFIG_FAULT_INJECTION is not set
1228 1290# CONFIG_PAGE_POISONING is not set
1229# 1291CONFIG_HAVE_FUNCTION_TRACER=y
1230# Tracers 1292CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
1231# 1293CONFIG_TRACING_SUPPORT=y
1232# CONFIG_SCHED_TRACER is not set 1294# CONFIG_FTRACE is not set
1233# CONFIG_CONTEXT_SWITCH_TRACER is not set 1295# CONFIG_BRANCH_PROFILE_NONE is not set
1234# CONFIG_BOOT_TRACER is not set 1296# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
1235# CONFIG_DYNAMIC_PRINTK_DEBUG is not set 1297# CONFIG_PROFILE_ALL_BRANCHES is not set
1298# CONFIG_DYNAMIC_DEBUG is not set
1236# CONFIG_SAMPLES is not set 1299# CONFIG_SAMPLES is not set
1237CONFIG_HAVE_ARCH_KGDB=y 1300CONFIG_HAVE_ARCH_KGDB=y
1238# CONFIG_KGDB is not set 1301# CONFIG_KGDB is not set
@@ -1257,6 +1320,7 @@ CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y
1257CONFIG_EARLY_PRINTK=y 1320CONFIG_EARLY_PRINTK=y
1258CONFIG_CPLB_INFO=y 1321CONFIG_CPLB_INFO=y
1259CONFIG_ACCESS_CHECK=y 1322CONFIG_ACCESS_CHECK=y
1323# CONFIG_BFIN_ISRAM_SELF_TEST is not set
1260 1324
1261# 1325#
1262# Security options 1326# Security options
@@ -1265,14 +1329,14 @@ CONFIG_ACCESS_CHECK=y
1265CONFIG_SECURITY=y 1329CONFIG_SECURITY=y
1266# CONFIG_SECURITYFS is not set 1330# CONFIG_SECURITYFS is not set
1267# CONFIG_SECURITY_NETWORK is not set 1331# CONFIG_SECURITY_NETWORK is not set
1332# CONFIG_SECURITY_PATH is not set
1268# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1333# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1269CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0 1334# CONFIG_SECURITY_TOMOYO is not set
1270CONFIG_CRYPTO=y 1335CONFIG_CRYPTO=y
1271 1336
1272# 1337#
1273# Crypto core or helper 1338# Crypto core or helper
1274# 1339#
1275# CONFIG_CRYPTO_FIPS is not set
1276# CONFIG_CRYPTO_MANAGER is not set 1340# CONFIG_CRYPTO_MANAGER is not set
1277# CONFIG_CRYPTO_MANAGER2 is not set 1341# CONFIG_CRYPTO_MANAGER2 is not set
1278# CONFIG_CRYPTO_GF128MUL is not set 1342# CONFIG_CRYPTO_GF128MUL is not set
@@ -1304,11 +1368,13 @@ CONFIG_CRYPTO=y
1304# 1368#
1305# CONFIG_CRYPTO_HMAC is not set 1369# CONFIG_CRYPTO_HMAC is not set
1306# CONFIG_CRYPTO_XCBC is not set 1370# CONFIG_CRYPTO_XCBC is not set
1371# CONFIG_CRYPTO_VMAC is not set
1307 1372
1308# 1373#
1309# Digest 1374# Digest
1310# 1375#
1311# CONFIG_CRYPTO_CRC32C is not set 1376# CONFIG_CRYPTO_CRC32C is not set
1377# CONFIG_CRYPTO_GHASH is not set
1312# CONFIG_CRYPTO_MD4 is not set 1378# CONFIG_CRYPTO_MD4 is not set
1313# CONFIG_CRYPTO_MD5 is not set 1379# CONFIG_CRYPTO_MD5 is not set
1314# CONFIG_CRYPTO_MICHAEL_MIC is not set 1380# CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1345,6 +1411,7 @@ CONFIG_CRYPTO=y
1345# Compression 1411# Compression
1346# 1412#
1347# CONFIG_CRYPTO_DEFLATE is not set 1413# CONFIG_CRYPTO_DEFLATE is not set
1414# CONFIG_CRYPTO_ZLIB is not set
1348# CONFIG_CRYPTO_LZO is not set 1415# CONFIG_CRYPTO_LZO is not set
1349 1416
1350# 1417#
@@ -1352,11 +1419,13 @@ CONFIG_CRYPTO=y
1352# 1419#
1353# CONFIG_CRYPTO_ANSI_CPRNG is not set 1420# CONFIG_CRYPTO_ANSI_CPRNG is not set
1354CONFIG_CRYPTO_HW=y 1421CONFIG_CRYPTO_HW=y
1422# CONFIG_BINARY_PRINTF is not set
1355 1423
1356# 1424#
1357# Library routines 1425# Library routines
1358# 1426#
1359CONFIG_BITREVERSE=y 1427CONFIG_BITREVERSE=y
1428CONFIG_GENERIC_FIND_LAST_BIT=y
1360CONFIG_CRC_CCITT=m 1429CONFIG_CRC_CCITT=m
1361# CONFIG_CRC16 is not set 1430# CONFIG_CRC16 is not set
1362# CONFIG_CRC_T10DIF is not set 1431# CONFIG_CRC_T10DIF is not set
@@ -1366,6 +1435,8 @@ CONFIG_CRC32=y
1366# CONFIG_LIBCRC32C is not set 1435# CONFIG_LIBCRC32C is not set
1367CONFIG_ZLIB_INFLATE=y 1436CONFIG_ZLIB_INFLATE=y
1368CONFIG_ZLIB_DEFLATE=m 1437CONFIG_ZLIB_DEFLATE=m
1438CONFIG_DECOMPRESS_GZIP=y
1369CONFIG_HAS_IOMEM=y 1439CONFIG_HAS_IOMEM=y
1370CONFIG_HAS_IOPORT=y 1440CONFIG_HAS_IOPORT=y
1371CONFIG_HAS_DMA=y 1441CONFIG_HAS_DMA=y
1442CONFIG_NLATTR=y
diff --git a/arch/blackfin/configs/BF548-EZKIT_defconfig b/arch/blackfin/configs/BF548-EZKIT_defconfig
index eb3e98b6f3f0..ca309cfc6ac4 100644
--- a/arch/blackfin/configs/BF548-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF548-EZKIT_defconfig
@@ -1,7 +1,6 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31.5 3# Linux kernel version: 2.6.32.2
4# Mon Nov 2 22:02:56 2009
5# 4#
6# CONFIG_MMU is not set 5# CONFIG_MMU is not set
7# CONFIG_FPU is not set 6# CONFIG_FPU is not set
@@ -12,7 +11,6 @@ CONFIG_GENERIC_CSUM=y
12CONFIG_GENERIC_BUG=y 11CONFIG_GENERIC_BUG=y
13CONFIG_ZONE_DMA=y 12CONFIG_ZONE_DMA=y
14CONFIG_GENERIC_FIND_NEXT_BIT=y 13CONFIG_GENERIC_FIND_NEXT_BIT=y
15CONFIG_GENERIC_HWEIGHT=y
16CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
17CONFIG_GENERIC_IRQ_PROBE=y 15CONFIG_GENERIC_IRQ_PROBE=y
18CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 16CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
@@ -49,11 +47,12 @@ CONFIG_SYSVIPC_SYSCTL=y
49# 47#
50# RCU Subsystem 48# RCU Subsystem
51# 49#
52CONFIG_CLASSIC_RCU=y 50CONFIG_TREE_RCU=y
53# CONFIG_TREE_RCU is not set 51# CONFIG_TREE_PREEMPT_RCU is not set
54# CONFIG_PREEMPT_RCU is not set 52# CONFIG_RCU_TRACE is not set
53CONFIG_RCU_FANOUT=32
54# CONFIG_RCU_FANOUT_EXACT is not set
55# CONFIG_TREE_RCU_TRACE is not set 55# CONFIG_TREE_RCU_TRACE is not set
56# CONFIG_PREEMPT_RCU_TRACE is not set
57CONFIG_IKCONFIG=y 56CONFIG_IKCONFIG=y
58CONFIG_IKCONFIG_PROC=y 57CONFIG_IKCONFIG_PROC=y
59CONFIG_LOG_BUF_SHIFT=14 58CONFIG_LOG_BUF_SHIFT=14
@@ -89,24 +88,23 @@ CONFIG_EPOLL=y
89# CONFIG_AIO is not set 88# CONFIG_AIO is not set
90 89
91# 90#
92# Performance Counters 91# Kernel Performance Events And Counters
93# 92#
94CONFIG_VM_EVENT_COUNTERS=y 93CONFIG_VM_EVENT_COUNTERS=y
95# CONFIG_STRIP_ASM_SYMS is not set
96CONFIG_COMPAT_BRK=y 94CONFIG_COMPAT_BRK=y
97CONFIG_SLAB=y 95CONFIG_SLAB=y
98# CONFIG_SLUB is not set 96# CONFIG_SLUB is not set
99# CONFIG_SLOB is not set 97# CONFIG_SLOB is not set
100CONFIG_MMAP_ALLOW_UNINITIALIZED=y 98CONFIG_MMAP_ALLOW_UNINITIALIZED=y
101# CONFIG_PROFILING is not set 99# CONFIG_PROFILING is not set
102# CONFIG_MARKERS is not set
103CONFIG_HAVE_OPROFILE=y 100CONFIG_HAVE_OPROFILE=y
104 101
105# 102#
106# GCOV-based kernel profiling 103# GCOV-based kernel profiling
107# 104#
108# CONFIG_GCOV_KERNEL is not set 105# CONFIG_GCOV_KERNEL is not set
109# CONFIG_SLOW_WORK is not set 106CONFIG_SLOW_WORK=y
107# CONFIG_SLOW_WORK_DEBUG is not set
110# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set 108# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
111CONFIG_SLABINFO=y 109CONFIG_SLABINFO=y
112CONFIG_BASE_SMALL=0 110CONFIG_BASE_SMALL=0
@@ -163,15 +161,15 @@ CONFIG_PREEMPT_VOLUNTARY=y
163# CONFIG_BF537 is not set 161# CONFIG_BF537 is not set
164# CONFIG_BF538 is not set 162# CONFIG_BF538 is not set
165# CONFIG_BF539 is not set 163# CONFIG_BF539 is not set
166# CONFIG_BF542 is not set 164# CONFIG_BF542_std is not set
167# CONFIG_BF542M is not set 165# CONFIG_BF542M is not set
168# CONFIG_BF544 is not set 166# CONFIG_BF544_std is not set
169# CONFIG_BF544M is not set 167# CONFIG_BF544M is not set
170# CONFIG_BF547 is not set 168# CONFIG_BF547_std is not set
171# CONFIG_BF547M is not set 169# CONFIG_BF547M is not set
172CONFIG_BF548_std=y 170CONFIG_BF548_std=y
173# CONFIG_BF548M is not set 171# CONFIG_BF548M is not set
174# CONFIG_BF549 is not set 172# CONFIG_BF549_std is not set
175# CONFIG_BF549M is not set 173# CONFIG_BF549M is not set
176# CONFIG_BF561 is not set 174# CONFIG_BF561 is not set
177CONFIG_BF_REV_MIN=0 175CONFIG_BF_REV_MIN=0
@@ -185,7 +183,6 @@ CONFIG_BF_REV_0_2=y
185# CONFIG_BF_REV_0_6 is not set 183# CONFIG_BF_REV_0_6 is not set
186# CONFIG_BF_REV_ANY is not set 184# CONFIG_BF_REV_ANY is not set
187# CONFIG_BF_REV_NONE is not set 185# CONFIG_BF_REV_NONE is not set
188CONFIG_BF54x=y
189CONFIG_IRQ_PLL_WAKEUP=7 186CONFIG_IRQ_PLL_WAKEUP=7
190CONFIG_IRQ_RTC=8 187CONFIG_IRQ_RTC=8
191CONFIG_IRQ_SPORT0_RX=9 188CONFIG_IRQ_SPORT0_RX=9
@@ -221,6 +218,8 @@ CONFIG_IRQ_SPI1=10
221CONFIG_IRQ_SPI2=10 218CONFIG_IRQ_SPI2=10
222CONFIG_IRQ_TWI0=11 219CONFIG_IRQ_TWI0=11
223CONFIG_IRQ_TWI1=11 220CONFIG_IRQ_TWI1=11
221CONFIG_BF548=y
222CONFIG_BF54x=y
224CONFIG_BFIN548_EZKIT=y 223CONFIG_BFIN548_EZKIT=y
225# CONFIG_BFIN548_BLUETECHNIX_CM is not set 224# CONFIG_BFIN548_BLUETECHNIX_CM is not set
226 225
@@ -387,12 +386,14 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
387# CONFIG_PHYS_ADDR_T_64BIT is not set 386# CONFIG_PHYS_ADDR_T_64BIT is not set
388CONFIG_ZONE_DMA_FLAG=1 387CONFIG_ZONE_DMA_FLAG=1
389CONFIG_VIRT_TO_BUS=y 388CONFIG_VIRT_TO_BUS=y
390CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
391CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0 389CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0
392CONFIG_BFIN_GPTIMERS=m 390CONFIG_BFIN_GPTIMERS=m
393# CONFIG_DMA_UNCACHED_4M is not set 391# CONFIG_DMA_UNCACHED_4M is not set
394CONFIG_DMA_UNCACHED_2M=y 392CONFIG_DMA_UNCACHED_2M=y
395# CONFIG_DMA_UNCACHED_1M is not set 393# CONFIG_DMA_UNCACHED_1M is not set
394# CONFIG_DMA_UNCACHED_512K is not set
395# CONFIG_DMA_UNCACHED_256K is not set
396# CONFIG_DMA_UNCACHED_128K is not set
396# CONFIG_DMA_UNCACHED_NONE is not set 397# CONFIG_DMA_UNCACHED_NONE is not set
397 398
398# 399#
@@ -505,6 +506,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
505# CONFIG_NETFILTER is not set 506# CONFIG_NETFILTER is not set
506# CONFIG_IP_DCCP is not set 507# CONFIG_IP_DCCP is not set
507# CONFIG_IP_SCTP is not set 508# CONFIG_IP_SCTP is not set
509# CONFIG_RDS is not set
508# CONFIG_TIPC is not set 510# CONFIG_TIPC is not set
509# CONFIG_ATM is not set 511# CONFIG_ATM is not set
510# CONFIG_BRIDGE is not set 512# CONFIG_BRIDGE is not set
@@ -528,7 +530,24 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
528# 530#
529# CONFIG_NET_PKTGEN is not set 531# CONFIG_NET_PKTGEN is not set
530# CONFIG_HAMRADIO is not set 532# CONFIG_HAMRADIO is not set
531# CONFIG_CAN is not set 533CONFIG_CAN=m
534CONFIG_CAN_RAW=m
535CONFIG_CAN_BCM=m
536
537#
538# CAN Device Drivers
539#
540# CONFIG_CAN_VCAN is not set
541CONFIG_CAN_DEV=m
542# CONFIG_CAN_CALC_BITTIMING is not set
543CONFIG_CAN_BFIN=m
544# CONFIG_CAN_SJA1000 is not set
545
546#
547# CAN USB interfaces
548#
549# CONFIG_CAN_EMS_USB is not set
550# CONFIG_CAN_DEBUG_DEVICES is not set
532CONFIG_IRDA=m 551CONFIG_IRDA=m
533 552
534# 553#
@@ -663,6 +682,7 @@ CONFIG_MTD_PHYSMAP=y
663# CONFIG_MTD_DATAFLASH is not set 682# CONFIG_MTD_DATAFLASH is not set
664CONFIG_MTD_M25P80=y 683CONFIG_MTD_M25P80=y
665CONFIG_M25PXX_USE_FAST_READ=y 684CONFIG_M25PXX_USE_FAST_READ=y
685# CONFIG_MTD_SST25L is not set
666# CONFIG_MTD_SLRAM is not set 686# CONFIG_MTD_SLRAM is not set
667# CONFIG_MTD_PHRAM is not set 687# CONFIG_MTD_PHRAM is not set
668# CONFIG_MTD_MTDRAM is not set 688# CONFIG_MTD_MTDRAM is not set
@@ -711,10 +731,10 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
711# CONFIG_ATA_OVER_ETH is not set 731# CONFIG_ATA_OVER_ETH is not set
712# CONFIG_BLK_DEV_HD is not set 732# CONFIG_BLK_DEV_HD is not set
713CONFIG_MISC_DEVICES=y 733CONFIG_MISC_DEVICES=y
734# CONFIG_AD525X_DPOT is not set
714# CONFIG_ICS932S401 is not set 735# CONFIG_ICS932S401 is not set
715# CONFIG_ENCLOSURE_SERVICES is not set 736# CONFIG_ENCLOSURE_SERVICES is not set
716# CONFIG_ISL29003 is not set 737# CONFIG_ISL29003 is not set
717# CONFIG_AD525X_DPOT is not set
718# CONFIG_C2PORT is not set 738# CONFIG_C2PORT is not set
719 739
720# 740#
@@ -767,7 +787,8 @@ CONFIG_SCSI_WAIT_SCAN=m
767# CONFIG_SCSI_OSD_INITIATOR is not set 787# CONFIG_SCSI_OSD_INITIATOR is not set
768CONFIG_ATA=y 788CONFIG_ATA=y
769# CONFIG_ATA_NONSTANDARD is not set 789# CONFIG_ATA_NONSTANDARD is not set
770CONFIG_SATA_PMP=y 790CONFIG_ATA_VERBOSE_ERROR=y
791# CONFIG_SATA_PMP is not set
771CONFIG_ATA_SFF=y 792CONFIG_ATA_SFF=y
772# CONFIG_SATA_MV is not set 793# CONFIG_SATA_MV is not set
773# CONFIG_PATA_PLATFORM is not set 794# CONFIG_PATA_PLATFORM is not set
@@ -808,6 +829,7 @@ CONFIG_MII=y
808# CONFIG_ETHOC is not set 829# CONFIG_ETHOC is not set
809CONFIG_SMSC911X=y 830CONFIG_SMSC911X=y
810# CONFIG_DNET is not set 831# CONFIG_DNET is not set
832# CONFIG_ADF702X is not set
811# CONFIG_IBM_NEW_EMAC_ZMII is not set 833# CONFIG_IBM_NEW_EMAC_ZMII is not set
812# CONFIG_IBM_NEW_EMAC_RGMII is not set 834# CONFIG_IBM_NEW_EMAC_RGMII is not set
813# CONFIG_IBM_NEW_EMAC_TAH is not set 835# CONFIG_IBM_NEW_EMAC_TAH is not set
@@ -818,12 +840,10 @@ CONFIG_SMSC911X=y
818# CONFIG_B44 is not set 840# CONFIG_B44 is not set
819# CONFIG_KS8842 is not set 841# CONFIG_KS8842 is not set
820# CONFIG_KS8851 is not set 842# CONFIG_KS8851 is not set
843# CONFIG_KS8851_MLL is not set
821# CONFIG_NETDEV_1000 is not set 844# CONFIG_NETDEV_1000 is not set
822# CONFIG_NETDEV_10000 is not set 845# CONFIG_NETDEV_10000 is not set
823 846CONFIG_WLAN=y
824#
825# Wireless LAN
826#
827# CONFIG_WLAN_PRE80211 is not set 847# CONFIG_WLAN_PRE80211 is not set
828CONFIG_WLAN_80211=y 848CONFIG_WLAN_80211=y
829CONFIG_LIBERTAS=m 849CONFIG_LIBERTAS=m
@@ -877,10 +897,12 @@ CONFIG_INPUT_EVBUG=m
877CONFIG_INPUT_KEYBOARD=y 897CONFIG_INPUT_KEYBOARD=y
878# CONFIG_KEYBOARD_ADP5588 is not set 898# CONFIG_KEYBOARD_ADP5588 is not set
879# CONFIG_KEYBOARD_ATKBD is not set 899# CONFIG_KEYBOARD_ATKBD is not set
900# CONFIG_QT2160 is not set
880CONFIG_KEYBOARD_BFIN=y 901CONFIG_KEYBOARD_BFIN=y
881# CONFIG_KEYBOARD_LKKBD is not set 902# CONFIG_KEYBOARD_LKKBD is not set
882# CONFIG_KEYBOARD_GPIO is not set 903# CONFIG_KEYBOARD_GPIO is not set
883# CONFIG_KEYBOARD_MATRIX is not set 904# CONFIG_KEYBOARD_MATRIX is not set
905# CONFIG_KEYBOARD_MAX7359 is not set
884# CONFIG_KEYBOARD_NEWTON is not set 906# CONFIG_KEYBOARD_NEWTON is not set
885# CONFIG_KEYBOARD_OPENCORES is not set 907# CONFIG_KEYBOARD_OPENCORES is not set
886# CONFIG_KEYBOARD_STOWAWAY is not set 908# CONFIG_KEYBOARD_STOWAWAY is not set
@@ -900,6 +922,7 @@ CONFIG_TOUCHSCREEN_AD7877=m
900# CONFIG_TOUCHSCREEN_GUNZE is not set 922# CONFIG_TOUCHSCREEN_GUNZE is not set
901# CONFIG_TOUCHSCREEN_ELO is not set 923# CONFIG_TOUCHSCREEN_ELO is not set
902# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set 924# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
925# CONFIG_TOUCHSCREEN_MCS5000 is not set
903# CONFIG_TOUCHSCREEN_MTOUCH is not set 926# CONFIG_TOUCHSCREEN_MTOUCH is not set
904# CONFIG_TOUCHSCREEN_INEXIO is not set 927# CONFIG_TOUCHSCREEN_INEXIO is not set
905# CONFIG_TOUCHSCREEN_MK712 is not set 928# CONFIG_TOUCHSCREEN_MK712 is not set
@@ -910,7 +933,6 @@ CONFIG_TOUCHSCREEN_AD7877=m
910# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set 933# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
911# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set 934# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
912# CONFIG_TOUCHSCREEN_TSC2007 is not set 935# CONFIG_TOUCHSCREEN_TSC2007 is not set
913# CONFIG_TOUCHSCREEN_W90X900 is not set
914CONFIG_INPUT_MISC=y 936CONFIG_INPUT_MISC=y
915# CONFIG_INPUT_ATI_REMOTE is not set 937# CONFIG_INPUT_ATI_REMOTE is not set
916# CONFIG_INPUT_ATI_REMOTE2 is not set 938# CONFIG_INPUT_ATI_REMOTE2 is not set
@@ -976,11 +998,6 @@ CONFIG_UNIX98_PTYS=y
976# CONFIG_LEGACY_PTYS is not set 998# CONFIG_LEGACY_PTYS is not set
977CONFIG_BFIN_OTP=y 999CONFIG_BFIN_OTP=y
978# CONFIG_BFIN_OTP_WRITE_ENABLE is not set 1000# CONFIG_BFIN_OTP_WRITE_ENABLE is not set
979
980#
981# CAN, the car bus and industrial fieldbus
982#
983# CONFIG_CAN4LINUX is not set
984# CONFIG_IPMI_HANDLER is not set 1001# CONFIG_IPMI_HANDLER is not set
985# CONFIG_HW_RANDOM is not set 1002# CONFIG_HW_RANDOM is not set
986# CONFIG_R3964 is not set 1003# CONFIG_R3964 is not set
@@ -988,6 +1005,7 @@ CONFIG_BFIN_OTP=y
988# CONFIG_TCG_TPM is not set 1005# CONFIG_TCG_TPM is not set
989CONFIG_I2C=y 1006CONFIG_I2C=y
990CONFIG_I2C_BOARDINFO=y 1007CONFIG_I2C_BOARDINFO=y
1008CONFIG_I2C_COMPAT=y
991CONFIG_I2C_CHARDEV=y 1009CONFIG_I2C_CHARDEV=y
992CONFIG_I2C_HELPER_AUTO=y 1010CONFIG_I2C_HELPER_AUTO=y
993 1011
@@ -1021,9 +1039,6 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
1021# Miscellaneous I2C Chip support 1039# Miscellaneous I2C Chip support
1022# 1040#
1023# CONFIG_DS1682 is not set 1041# CONFIG_DS1682 is not set
1024# CONFIG_SENSORS_PCF8574 is not set
1025# CONFIG_PCF8575 is not set
1026# CONFIG_SENSORS_PCA9539 is not set
1027# CONFIG_SENSORS_TSL2550 is not set 1042# CONFIG_SENSORS_TSL2550 is not set
1028# CONFIG_I2C_DEBUG_CORE is not set 1043# CONFIG_I2C_DEBUG_CORE is not set
1029# CONFIG_I2C_DEBUG_ALGO is not set 1044# CONFIG_I2C_DEBUG_ALGO is not set
@@ -1078,11 +1093,15 @@ CONFIG_GPIO_SYSFS=y
1078# 1093#
1079# CONFIG_GPIO_MAX7301 is not set 1094# CONFIG_GPIO_MAX7301 is not set
1080# CONFIG_GPIO_MCP23S08 is not set 1095# CONFIG_GPIO_MCP23S08 is not set
1096# CONFIG_GPIO_MC33880 is not set
1097
1098#
1099# AC97 GPIO expanders:
1100#
1081# CONFIG_W1 is not set 1101# CONFIG_W1 is not set
1082# CONFIG_POWER_SUPPLY is not set 1102# CONFIG_POWER_SUPPLY is not set
1083# CONFIG_HWMON is not set 1103# CONFIG_HWMON is not set
1084# CONFIG_THERMAL is not set 1104# CONFIG_THERMAL is not set
1085# CONFIG_THERMAL_HWMON is not set
1086CONFIG_WATCHDOG=y 1105CONFIG_WATCHDOG=y
1087# CONFIG_WATCHDOG_NOWAYOUT is not set 1106# CONFIG_WATCHDOG_NOWAYOUT is not set
1088 1107
@@ -1116,8 +1135,10 @@ CONFIG_SSB_POSSIBLE=y
1116# CONFIG_PMIC_DA903X is not set 1135# CONFIG_PMIC_DA903X is not set
1117# CONFIG_PMIC_ADP5520 is not set 1136# CONFIG_PMIC_ADP5520 is not set
1118# CONFIG_MFD_WM8400 is not set 1137# CONFIG_MFD_WM8400 is not set
1138# CONFIG_MFD_WM831X is not set
1119# CONFIG_MFD_WM8350_I2C is not set 1139# CONFIG_MFD_WM8350_I2C is not set
1120# CONFIG_MFD_PCF50633 is not set 1140# CONFIG_MFD_PCF50633 is not set
1141# CONFIG_MFD_MC13783 is not set
1121# CONFIG_AB3100_CORE is not set 1142# CONFIG_AB3100_CORE is not set
1122# CONFIG_EZX_PCAP is not set 1143# CONFIG_EZX_PCAP is not set
1123# CONFIG_REGULATOR is not set 1144# CONFIG_REGULATOR is not set
@@ -1192,6 +1213,7 @@ CONFIG_LOGO=y
1192CONFIG_LOGO_BLACKFIN_CLUT224=y 1213CONFIG_LOGO_BLACKFIN_CLUT224=y
1193CONFIG_SOUND=y 1214CONFIG_SOUND=y
1194CONFIG_SOUND_OSS_CORE=y 1215CONFIG_SOUND_OSS_CORE=y
1216CONFIG_SOUND_OSS_CORE_PRECLAIM=y
1195CONFIG_SND=y 1217CONFIG_SND=y
1196CONFIG_SND_TIMER=y 1218CONFIG_SND_TIMER=y
1197CONFIG_SND_PCM=y 1219CONFIG_SND_PCM=y
@@ -1245,7 +1267,6 @@ CONFIG_SND_SOC_AD1980=y
1245CONFIG_AC97_BUS=y 1267CONFIG_AC97_BUS=y
1246CONFIG_HID_SUPPORT=y 1268CONFIG_HID_SUPPORT=y
1247CONFIG_HID=y 1269CONFIG_HID=y
1248# CONFIG_HID_DEBUG is not set
1249# CONFIG_HIDRAW is not set 1270# CONFIG_HIDRAW is not set
1250 1271
1251# 1272#
@@ -1268,6 +1289,7 @@ CONFIG_HID_CYPRESS=y
1268CONFIG_HID_EZKEY=y 1289CONFIG_HID_EZKEY=y
1269# CONFIG_HID_KYE is not set 1290# CONFIG_HID_KYE is not set
1270CONFIG_HID_GYRATION=y 1291CONFIG_HID_GYRATION=y
1292# CONFIG_HID_TWINHAN is not set
1271# CONFIG_HID_KENSINGTON is not set 1293# CONFIG_HID_KENSINGTON is not set
1272CONFIG_HID_LOGITECH=y 1294CONFIG_HID_LOGITECH=y
1273# CONFIG_LOGITECH_FF is not set 1295# CONFIG_LOGITECH_FF is not set
@@ -1422,10 +1444,11 @@ CONFIG_MMC_BLOCK_BOUNCE=y
1422# MMC/SD/SDIO Host Controller Drivers 1444# MMC/SD/SDIO Host Controller Drivers
1423# 1445#
1424# CONFIG_MMC_SDHCI is not set 1446# CONFIG_MMC_SDHCI is not set
1447# CONFIG_MMC_AT91 is not set
1448# CONFIG_MMC_ATMELMCI is not set
1449# CONFIG_MMC_SPI is not set
1425CONFIG_SDH_BFIN=y 1450CONFIG_SDH_BFIN=y
1426# CONFIG_SDH_BFIN_MISSING_CMD_PULLUP_WORKAROUND is not set 1451# CONFIG_SDH_BFIN_MISSING_CMD_PULLUP_WORKAROUND is not set
1427# CONFIG_SDH_BFIN_ENABLE_SDIO_IRQ is not set
1428# CONFIG_MMC_SPI is not set
1429# CONFIG_MEMSTICK is not set 1452# CONFIG_MEMSTICK is not set
1430# CONFIG_NEW_LEDS is not set 1453# CONFIG_NEW_LEDS is not set
1431# CONFIG_ACCESSIBILITY is not set 1454# CONFIG_ACCESSIBILITY is not set
@@ -1472,6 +1495,7 @@ CONFIG_RTC_INTF_DEV=y
1472# CONFIG_RTC_DRV_R9701 is not set 1495# CONFIG_RTC_DRV_R9701 is not set
1473# CONFIG_RTC_DRV_RS5C348 is not set 1496# CONFIG_RTC_DRV_RS5C348 is not set
1474# CONFIG_RTC_DRV_DS3234 is not set 1497# CONFIG_RTC_DRV_DS3234 is not set
1498# CONFIG_RTC_DRV_PCF2123 is not set
1475 1499
1476# 1500#
1477# Platform RTC drivers 1501# Platform RTC drivers
@@ -1522,6 +1546,7 @@ CONFIG_FS_MBCACHE=y
1522# CONFIG_XFS_FS is not set 1546# CONFIG_XFS_FS is not set
1523# CONFIG_OCFS2_FS is not set 1547# CONFIG_OCFS2_FS is not set
1524# CONFIG_BTRFS_FS is not set 1548# CONFIG_BTRFS_FS is not set
1549# CONFIG_NILFS2_FS is not set
1525CONFIG_FILE_LOCKING=y 1550CONFIG_FILE_LOCKING=y
1526CONFIG_FSNOTIFY=y 1551CONFIG_FSNOTIFY=y
1527# CONFIG_DNOTIFY is not set 1552# CONFIG_DNOTIFY is not set
@@ -1563,7 +1588,6 @@ CONFIG_NTFS_RW=y
1563CONFIG_PROC_FS=y 1588CONFIG_PROC_FS=y
1564CONFIG_PROC_SYSCTL=y 1589CONFIG_PROC_SYSCTL=y
1565CONFIG_SYSFS=y 1590CONFIG_SYSFS=y
1566# CONFIG_TMPFS is not set
1567# CONFIG_HUGETLB_PAGE is not set 1591# CONFIG_HUGETLB_PAGE is not set
1568# CONFIG_CONFIGFS_FS is not set 1592# CONFIG_CONFIGFS_FS is not set
1569CONFIG_MISC_FILESYSTEMS=y 1593CONFIG_MISC_FILESYSTEMS=y
@@ -1595,7 +1619,6 @@ CONFIG_JFFS2_RTIME=y
1595# CONFIG_ROMFS_FS is not set 1619# CONFIG_ROMFS_FS is not set
1596# CONFIG_SYSV_FS is not set 1620# CONFIG_SYSV_FS is not set
1597# CONFIG_UFS_FS is not set 1621# CONFIG_UFS_FS is not set
1598# CONFIG_NILFS2_FS is not set
1599CONFIG_NETWORK_FILESYSTEMS=y 1622CONFIG_NETWORK_FILESYSTEMS=y
1600CONFIG_NFS_FS=m 1623CONFIG_NFS_FS=m
1601CONFIG_NFS_V3=y 1624CONFIG_NFS_V3=y
@@ -1680,6 +1703,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
1680CONFIG_ENABLE_MUST_CHECK=y 1703CONFIG_ENABLE_MUST_CHECK=y
1681CONFIG_FRAME_WARN=1024 1704CONFIG_FRAME_WARN=1024
1682# CONFIG_MAGIC_SYSRQ is not set 1705# CONFIG_MAGIC_SYSRQ is not set
1706# CONFIG_STRIP_ASM_SYMS is not set
1683# CONFIG_UNUSED_SYMBOLS is not set 1707# CONFIG_UNUSED_SYMBOLS is not set
1684CONFIG_DEBUG_FS=y 1708CONFIG_DEBUG_FS=y
1685# CONFIG_HEADERS_CHECK is not set 1709# CONFIG_HEADERS_CHECK is not set
@@ -1714,12 +1738,14 @@ CONFIG_DEBUG_INFO=y
1714# CONFIG_DEBUG_LIST is not set 1738# CONFIG_DEBUG_LIST is not set
1715# CONFIG_DEBUG_SG is not set 1739# CONFIG_DEBUG_SG is not set
1716# CONFIG_DEBUG_NOTIFIERS is not set 1740# CONFIG_DEBUG_NOTIFIERS is not set
1741# CONFIG_DEBUG_CREDENTIALS is not set
1717# CONFIG_FRAME_POINTER is not set 1742# CONFIG_FRAME_POINTER is not set
1718# CONFIG_BOOT_PRINTK_DELAY is not set 1743# CONFIG_BOOT_PRINTK_DELAY is not set
1719# CONFIG_RCU_TORTURE_TEST is not set 1744# CONFIG_RCU_TORTURE_TEST is not set
1720# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1745# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1721# CONFIG_BACKTRACE_SELF_TEST is not set 1746# CONFIG_BACKTRACE_SELF_TEST is not set
1722# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set 1747# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1748# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
1723# CONFIG_FAULT_INJECTION is not set 1749# CONFIG_FAULT_INJECTION is not set
1724# CONFIG_PAGE_POISONING is not set 1750# CONFIG_PAGE_POISONING is not set
1725CONFIG_HAVE_FUNCTION_TRACER=y 1751CONFIG_HAVE_FUNCTION_TRACER=y
@@ -1730,7 +1756,6 @@ CONFIG_TRACING_SUPPORT=y
1730# CONFIG_SAMPLES is not set 1756# CONFIG_SAMPLES is not set
1731CONFIG_HAVE_ARCH_KGDB=y 1757CONFIG_HAVE_ARCH_KGDB=y
1732# CONFIG_KGDB is not set 1758# CONFIG_KGDB is not set
1733# CONFIG_KMEMCHECK is not set
1734# CONFIG_DEBUG_STACKOVERFLOW is not set 1759# CONFIG_DEBUG_STACKOVERFLOW is not set
1735# CONFIG_DEBUG_STACK_USAGE is not set 1760# CONFIG_DEBUG_STACK_USAGE is not set
1736CONFIG_DEBUG_VERBOSE=y 1761CONFIG_DEBUG_VERBOSE=y
@@ -1766,7 +1791,6 @@ CONFIG_CRYPTO=y
1766# 1791#
1767# Crypto core or helper 1792# Crypto core or helper
1768# 1793#
1769# CONFIG_CRYPTO_FIPS is not set
1770# CONFIG_CRYPTO_MANAGER is not set 1794# CONFIG_CRYPTO_MANAGER is not set
1771# CONFIG_CRYPTO_MANAGER2 is not set 1795# CONFIG_CRYPTO_MANAGER2 is not set
1772# CONFIG_CRYPTO_GF128MUL is not set 1796# CONFIG_CRYPTO_GF128MUL is not set
@@ -1798,11 +1822,13 @@ CONFIG_CRYPTO=y
1798# 1822#
1799# CONFIG_CRYPTO_HMAC is not set 1823# CONFIG_CRYPTO_HMAC is not set
1800# CONFIG_CRYPTO_XCBC is not set 1824# CONFIG_CRYPTO_XCBC is not set
1825# CONFIG_CRYPTO_VMAC is not set
1801 1826
1802# 1827#
1803# Digest 1828# Digest
1804# 1829#
1805# CONFIG_CRYPTO_CRC32C is not set 1830# CONFIG_CRYPTO_CRC32C is not set
1831# CONFIG_CRYPTO_GHASH is not set
1806# CONFIG_CRYPTO_MD4 is not set 1832# CONFIG_CRYPTO_MD4 is not set
1807# CONFIG_CRYPTO_MD5 is not set 1833# CONFIG_CRYPTO_MD5 is not set
1808# CONFIG_CRYPTO_MICHAEL_MIC is not set 1834# CONFIG_CRYPTO_MICHAEL_MIC is not set
diff --git a/arch/blackfin/configs/BF561-ACVILON_defconfig b/arch/blackfin/configs/BF561-ACVILON_defconfig
index b9b0f93d0bd3..6a776ce75e9c 100644
--- a/arch/blackfin/configs/BF561-ACVILON_defconfig
+++ b/arch/blackfin/configs/BF561-ACVILON_defconfig
@@ -114,7 +114,7 @@ CONFIG_MODULE_UNLOAD=y
114# CONFIG_MODVERSIONS is not set 114# CONFIG_MODVERSIONS is not set
115# CONFIG_MODULE_SRCVERSION_ALL is not set 115# CONFIG_MODULE_SRCVERSION_ALL is not set
116CONFIG_BLOCK=y 116CONFIG_BLOCK=y
117CONFIG_LBDAF=y 117# CONFIG_LBDAF is not set
118# CONFIG_BLK_DEV_BSG is not set 118# CONFIG_BLK_DEV_BSG is not set
119# CONFIG_BLK_DEV_INTEGRITY is not set 119# CONFIG_BLK_DEV_INTEGRITY is not set
120 120
@@ -1486,19 +1486,10 @@ CONFIG_DEBUG_INFO=y
1486CONFIG_HAVE_FUNCTION_TRACER=y 1486CONFIG_HAVE_FUNCTION_TRACER=y
1487CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 1487CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
1488CONFIG_TRACING_SUPPORT=y 1488CONFIG_TRACING_SUPPORT=y
1489CONFIG_FTRACE=y 1489# CONFIG_FTRACE is not set
1490# CONFIG_FUNCTION_TRACER is not set 1490# CONFIG_BRANCH_PROFILE_NONE is not set
1491# CONFIG_IRQSOFF_TRACER is not set
1492# CONFIG_SCHED_TRACER is not set
1493# CONFIG_ENABLE_DEFAULT_TRACERS is not set
1494# CONFIG_BOOT_TRACER is not set
1495CONFIG_BRANCH_PROFILE_NONE=y
1496# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set 1491# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
1497# CONFIG_PROFILE_ALL_BRANCHES is not set 1492# CONFIG_PROFILE_ALL_BRANCHES is not set
1498# CONFIG_STACK_TRACER is not set
1499# CONFIG_KMEMTRACE is not set
1500# CONFIG_WORKQUEUE_TRACER is not set
1501# CONFIG_BLK_DEV_IO_TRACE is not set
1502# CONFIG_DYNAMIC_DEBUG is not set 1493# CONFIG_DYNAMIC_DEBUG is not set
1503# CONFIG_SAMPLES is not set 1494# CONFIG_SAMPLES is not set
1504CONFIG_HAVE_ARCH_KGDB=y 1495CONFIG_HAVE_ARCH_KGDB=y
diff --git a/arch/blackfin/configs/BF561-EZKIT_defconfig b/arch/blackfin/configs/BF561-EZKIT_defconfig
index e3ecdcc3e76b..792ff0938835 100644
--- a/arch/blackfin/configs/BF561-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF561-EZKIT_defconfig
@@ -1,7 +1,6 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31.5 3# Linux kernel version: 2.6.32.2
4# Mon Nov 2 21:59:31 2009
5# 4#
6# CONFIG_MMU is not set 5# CONFIG_MMU is not set
7# CONFIG_FPU is not set 6# CONFIG_FPU is not set
@@ -12,7 +11,6 @@ CONFIG_GENERIC_CSUM=y
12CONFIG_GENERIC_BUG=y 11CONFIG_GENERIC_BUG=y
13CONFIG_ZONE_DMA=y 12CONFIG_ZONE_DMA=y
14CONFIG_GENERIC_FIND_NEXT_BIT=y 13CONFIG_GENERIC_FIND_NEXT_BIT=y
15CONFIG_GENERIC_HWEIGHT=y
16CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
17CONFIG_GENERIC_IRQ_PROBE=y 15CONFIG_GENERIC_IRQ_PROBE=y
18CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 16CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
@@ -49,11 +47,12 @@ CONFIG_SYSVIPC_SYSCTL=y
49# 47#
50# RCU Subsystem 48# RCU Subsystem
51# 49#
52CONFIG_CLASSIC_RCU=y 50CONFIG_TREE_RCU=y
53# CONFIG_TREE_RCU is not set 51# CONFIG_TREE_PREEMPT_RCU is not set
54# CONFIG_PREEMPT_RCU is not set 52# CONFIG_RCU_TRACE is not set
53CONFIG_RCU_FANOUT=32
54# CONFIG_RCU_FANOUT_EXACT is not set
55# CONFIG_TREE_RCU_TRACE is not set 55# CONFIG_TREE_RCU_TRACE is not set
56# CONFIG_PREEMPT_RCU_TRACE is not set
57CONFIG_IKCONFIG=y 56CONFIG_IKCONFIG=y
58CONFIG_IKCONFIG_PROC=y 57CONFIG_IKCONFIG_PROC=y
59CONFIG_LOG_BUF_SHIFT=14 58CONFIG_LOG_BUF_SHIFT=14
@@ -89,17 +88,15 @@ CONFIG_EPOLL=y
89# CONFIG_AIO is not set 88# CONFIG_AIO is not set
90 89
91# 90#
92# Performance Counters 91# Kernel Performance Events And Counters
93# 92#
94CONFIG_VM_EVENT_COUNTERS=y 93CONFIG_VM_EVENT_COUNTERS=y
95# CONFIG_STRIP_ASM_SYMS is not set
96CONFIG_COMPAT_BRK=y 94CONFIG_COMPAT_BRK=y
97CONFIG_SLAB=y 95CONFIG_SLAB=y
98# CONFIG_SLUB is not set 96# CONFIG_SLUB is not set
99# CONFIG_SLOB is not set 97# CONFIG_SLOB is not set
100CONFIG_MMAP_ALLOW_UNINITIALIZED=y 98CONFIG_MMAP_ALLOW_UNINITIALIZED=y
101# CONFIG_PROFILING is not set 99# CONFIG_PROFILING is not set
102# CONFIG_MARKERS is not set
103CONFIG_HAVE_OPROFILE=y 100CONFIG_HAVE_OPROFILE=y
104 101
105# 102#
@@ -163,15 +160,15 @@ CONFIG_PREEMPT_VOLUNTARY=y
163# CONFIG_BF537 is not set 160# CONFIG_BF537 is not set
164# CONFIG_BF538 is not set 161# CONFIG_BF538 is not set
165# CONFIG_BF539 is not set 162# CONFIG_BF539 is not set
166# CONFIG_BF542 is not set 163# CONFIG_BF542_std is not set
167# CONFIG_BF542M is not set 164# CONFIG_BF542M is not set
168# CONFIG_BF544 is not set 165# CONFIG_BF544_std is not set
169# CONFIG_BF544M is not set 166# CONFIG_BF544M is not set
170# CONFIG_BF547 is not set 167# CONFIG_BF547_std is not set
171# CONFIG_BF547M is not set 168# CONFIG_BF547M is not set
172# CONFIG_BF548 is not set 169# CONFIG_BF548_std is not set
173# CONFIG_BF548M is not set 170# CONFIG_BF548M is not set
174# CONFIG_BF549 is not set 171# CONFIG_BF549_std is not set
175# CONFIG_BF549M is not set 172# CONFIG_BF549M is not set
176CONFIG_BF561=y 173CONFIG_BF561=y
177# CONFIG_SMP is not set 174# CONFIG_SMP is not set
@@ -180,9 +177,9 @@ CONFIG_BF_REV_MAX=5
180# CONFIG_BF_REV_0_0 is not set 177# CONFIG_BF_REV_0_0 is not set
181# CONFIG_BF_REV_0_1 is not set 178# CONFIG_BF_REV_0_1 is not set
182# CONFIG_BF_REV_0_2 is not set 179# CONFIG_BF_REV_0_2 is not set
183# CONFIG_BF_REV_0_3 is not set 180CONFIG_BF_REV_0_3=y
184# CONFIG_BF_REV_0_4 is not set 181# CONFIG_BF_REV_0_4 is not set
185CONFIG_BF_REV_0_5=y 182# CONFIG_BF_REV_0_5 is not set
186# CONFIG_BF_REV_0_6 is not set 183# CONFIG_BF_REV_0_6 is not set
187# CONFIG_BF_REV_ANY is not set 184# CONFIG_BF_REV_ANY is not set
188# CONFIG_BF_REV_NONE is not set 185# CONFIG_BF_REV_NONE is not set
@@ -298,7 +295,7 @@ CONFIG_GENERIC_TIME=y
298CONFIG_GENERIC_CLOCKEVENTS=y 295CONFIG_GENERIC_CLOCKEVENTS=y
299# CONFIG_TICKSOURCE_GPTMR0 is not set 296# CONFIG_TICKSOURCE_GPTMR0 is not set
300CONFIG_TICKSOURCE_CORETMR=y 297CONFIG_TICKSOURCE_CORETMR=y
301# CONFIG_CYCLES_CLOCKSOURCE is not set 298CONFIG_CYCLES_CLOCKSOURCE=y
302# CONFIG_GPTMR0_CLOCKSOURCE is not set 299# CONFIG_GPTMR0_CLOCKSOURCE is not set
303CONFIG_TICK_ONESHOT=y 300CONFIG_TICK_ONESHOT=y
304# CONFIG_NO_HZ is not set 301# CONFIG_NO_HZ is not set
@@ -353,12 +350,14 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
353# CONFIG_PHYS_ADDR_T_64BIT is not set 350# CONFIG_PHYS_ADDR_T_64BIT is not set
354CONFIG_ZONE_DMA_FLAG=1 351CONFIG_ZONE_DMA_FLAG=1
355CONFIG_VIRT_TO_BUS=y 352CONFIG_VIRT_TO_BUS=y
356CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
357CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0 353CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0
358CONFIG_BFIN_GPTIMERS=m 354CONFIG_BFIN_GPTIMERS=m
359# CONFIG_DMA_UNCACHED_4M is not set 355# CONFIG_DMA_UNCACHED_4M is not set
360# CONFIG_DMA_UNCACHED_2M is not set 356# CONFIG_DMA_UNCACHED_2M is not set
361CONFIG_DMA_UNCACHED_1M=y 357CONFIG_DMA_UNCACHED_1M=y
358# CONFIG_DMA_UNCACHED_512K is not set
359# CONFIG_DMA_UNCACHED_256K is not set
360# CONFIG_DMA_UNCACHED_128K is not set
362# CONFIG_DMA_UNCACHED_NONE is not set 361# CONFIG_DMA_UNCACHED_NONE is not set
363 362
364# 363#
@@ -370,9 +369,11 @@ CONFIG_BFIN_EXTMEM_ICACHEABLE=y
370CONFIG_BFIN_DCACHE=y 369CONFIG_BFIN_DCACHE=y
371# CONFIG_BFIN_DCACHE_BANKA is not set 370# CONFIG_BFIN_DCACHE_BANKA is not set
372CONFIG_BFIN_EXTMEM_DCACHEABLE=y 371CONFIG_BFIN_EXTMEM_DCACHEABLE=y
373CONFIG_BFIN_EXTMEM_WRITEBACK=y 372# CONFIG_BFIN_EXTMEM_WRITEBACK is not set
374# CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set 373CONFIG_BFIN_EXTMEM_WRITETHROUGH=y
375# CONFIG_BFIN_L2_DCACHEABLE is not set 374CONFIG_BFIN_L2_DCACHEABLE=y
375# CONFIG_BFIN_L2_WRITEBACK is not set
376CONFIG_BFIN_L2_WRITETHROUGH=y
376 377
377# 378#
378# Memory Protection Unit 379# Memory Protection Unit
@@ -472,6 +473,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
472# CONFIG_NETFILTER is not set 473# CONFIG_NETFILTER is not set
473# CONFIG_IP_DCCP is not set 474# CONFIG_IP_DCCP is not set
474# CONFIG_IP_SCTP is not set 475# CONFIG_IP_SCTP is not set
476# CONFIG_RDS is not set
475# CONFIG_TIPC is not set 477# CONFIG_TIPC is not set
476# CONFIG_ATM is not set 478# CONFIG_ATM is not set
477# CONFIG_BRIDGE is not set 479# CONFIG_BRIDGE is not set
@@ -613,6 +615,7 @@ CONFIG_MTD_PHYSMAP=m
613# 615#
614# CONFIG_MTD_DATAFLASH is not set 616# CONFIG_MTD_DATAFLASH is not set
615# CONFIG_MTD_M25P80 is not set 617# CONFIG_MTD_M25P80 is not set
618# CONFIG_MTD_SST25L is not set
616# CONFIG_MTD_SLRAM is not set 619# CONFIG_MTD_SLRAM is not set
617# CONFIG_MTD_PHRAM is not set 620# CONFIG_MTD_PHRAM is not set
618# CONFIG_MTD_MTDRAM is not set 621# CONFIG_MTD_MTDRAM is not set
@@ -685,6 +688,7 @@ CONFIG_SMC91X=y
685# CONFIG_ETHOC is not set 688# CONFIG_ETHOC is not set
686# CONFIG_SMSC911X is not set 689# CONFIG_SMSC911X is not set
687# CONFIG_DNET is not set 690# CONFIG_DNET is not set
691# CONFIG_ADF702X is not set
688# CONFIG_IBM_NEW_EMAC_ZMII is not set 692# CONFIG_IBM_NEW_EMAC_ZMII is not set
689# CONFIG_IBM_NEW_EMAC_RGMII is not set 693# CONFIG_IBM_NEW_EMAC_RGMII is not set
690# CONFIG_IBM_NEW_EMAC_TAH is not set 694# CONFIG_IBM_NEW_EMAC_TAH is not set
@@ -695,14 +699,10 @@ CONFIG_SMC91X=y
695# CONFIG_B44 is not set 699# CONFIG_B44 is not set
696# CONFIG_KS8842 is not set 700# CONFIG_KS8842 is not set
697# CONFIG_KS8851 is not set 701# CONFIG_KS8851 is not set
702# CONFIG_KS8851_MLL is not set
698# CONFIG_NETDEV_1000 is not set 703# CONFIG_NETDEV_1000 is not set
699# CONFIG_NETDEV_10000 is not set 704# CONFIG_NETDEV_10000 is not set
700 705# CONFIG_WLAN is not set
701#
702# Wireless LAN
703#
704# CONFIG_WLAN_PRE80211 is not set
705# CONFIG_WLAN_80211 is not set
706 706
707# 707#
708# Enable WiMAX (Networking options) to see the WiMAX drivers 708# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -782,11 +782,6 @@ CONFIG_SERIAL_CORE_CONSOLE=y
782CONFIG_UNIX98_PTYS=y 782CONFIG_UNIX98_PTYS=y
783# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 783# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
784# CONFIG_LEGACY_PTYS is not set 784# CONFIG_LEGACY_PTYS is not set
785
786#
787# CAN, the car bus and industrial fieldbus
788#
789# CONFIG_CAN4LINUX is not set
790# CONFIG_IPMI_HANDLER is not set 785# CONFIG_IPMI_HANDLER is not set
791# CONFIG_HW_RANDOM is not set 786# CONFIG_HW_RANDOM is not set
792# CONFIG_R3964 is not set 787# CONFIG_R3964 is not set
@@ -838,11 +833,15 @@ CONFIG_GPIO_SYSFS=y
838# 833#
839# CONFIG_GPIO_MAX7301 is not set 834# CONFIG_GPIO_MAX7301 is not set
840# CONFIG_GPIO_MCP23S08 is not set 835# CONFIG_GPIO_MCP23S08 is not set
836# CONFIG_GPIO_MC33880 is not set
837
838#
839# AC97 GPIO expanders:
840#
841# CONFIG_W1 is not set 841# CONFIG_W1 is not set
842# CONFIG_POWER_SUPPLY is not set 842# CONFIG_POWER_SUPPLY is not set
843# CONFIG_HWMON is not set 843# CONFIG_HWMON is not set
844# CONFIG_THERMAL is not set 844# CONFIG_THERMAL is not set
845# CONFIG_THERMAL_HWMON is not set
846CONFIG_WATCHDOG=y 845CONFIG_WATCHDOG=y
847# CONFIG_WATCHDOG_NOWAYOUT is not set 846# CONFIG_WATCHDOG_NOWAYOUT is not set
848 847
@@ -865,6 +864,7 @@ CONFIG_SSB_POSSIBLE=y
865# CONFIG_MFD_SM501 is not set 864# CONFIG_MFD_SM501 is not set
866# CONFIG_HTC_PASIC3 is not set 865# CONFIG_HTC_PASIC3 is not set
867# CONFIG_MFD_TMIO is not set 866# CONFIG_MFD_TMIO is not set
867# CONFIG_MFD_MC13783 is not set
868# CONFIG_EZX_PCAP is not set 868# CONFIG_EZX_PCAP is not set
869# CONFIG_REGULATOR is not set 869# CONFIG_REGULATOR is not set
870# CONFIG_MEDIA_SUPPORT is not set 870# CONFIG_MEDIA_SUPPORT is not set
@@ -884,7 +884,6 @@ CONFIG_SSB_POSSIBLE=y
884# CONFIG_SOUND is not set 884# CONFIG_SOUND is not set
885CONFIG_HID_SUPPORT=y 885CONFIG_HID_SUPPORT=y
886CONFIG_HID=m 886CONFIG_HID=m
887# CONFIG_HID_DEBUG is not set
888# CONFIG_HIDRAW is not set 887# CONFIG_HIDRAW is not set
889# CONFIG_HID_PID is not set 888# CONFIG_HID_PID is not set
890 889
@@ -923,6 +922,7 @@ CONFIG_HID=m
923# CONFIG_XFS_FS is not set 922# CONFIG_XFS_FS is not set
924# CONFIG_OCFS2_FS is not set 923# CONFIG_OCFS2_FS is not set
925# CONFIG_BTRFS_FS is not set 924# CONFIG_BTRFS_FS is not set
925# CONFIG_NILFS2_FS is not set
926CONFIG_FILE_LOCKING=y 926CONFIG_FILE_LOCKING=y
927CONFIG_FSNOTIFY=y 927CONFIG_FSNOTIFY=y
928# CONFIG_DNOTIFY is not set 928# CONFIG_DNOTIFY is not set
@@ -957,7 +957,6 @@ CONFIG_INOTIFY_USER=y
957CONFIG_PROC_FS=y 957CONFIG_PROC_FS=y
958CONFIG_PROC_SYSCTL=y 958CONFIG_PROC_SYSCTL=y
959CONFIG_SYSFS=y 959CONFIG_SYSFS=y
960# CONFIG_TMPFS is not set
961# CONFIG_HUGETLB_PAGE is not set 960# CONFIG_HUGETLB_PAGE is not set
962# CONFIG_CONFIGFS_FS is not set 961# CONFIG_CONFIGFS_FS is not set
963CONFIG_MISC_FILESYSTEMS=y 962CONFIG_MISC_FILESYSTEMS=y
@@ -989,7 +988,6 @@ CONFIG_JFFS2_RTIME=y
989# CONFIG_ROMFS_FS is not set 988# CONFIG_ROMFS_FS is not set
990# CONFIG_SYSV_FS is not set 989# CONFIG_SYSV_FS is not set
991# CONFIG_UFS_FS is not set 990# CONFIG_UFS_FS is not set
992# CONFIG_NILFS2_FS is not set
993CONFIG_NETWORK_FILESYSTEMS=y 991CONFIG_NETWORK_FILESYSTEMS=y
994CONFIG_NFS_FS=m 992CONFIG_NFS_FS=m
995CONFIG_NFS_V3=y 993CONFIG_NFS_V3=y
@@ -1064,6 +1062,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
1064CONFIG_ENABLE_MUST_CHECK=y 1062CONFIG_ENABLE_MUST_CHECK=y
1065CONFIG_FRAME_WARN=1024 1063CONFIG_FRAME_WARN=1024
1066# CONFIG_MAGIC_SYSRQ is not set 1064# CONFIG_MAGIC_SYSRQ is not set
1065# CONFIG_STRIP_ASM_SYMS is not set
1067# CONFIG_UNUSED_SYMBOLS is not set 1066# CONFIG_UNUSED_SYMBOLS is not set
1068CONFIG_DEBUG_FS=y 1067CONFIG_DEBUG_FS=y
1069# CONFIG_HEADERS_CHECK is not set 1068# CONFIG_HEADERS_CHECK is not set
@@ -1098,26 +1097,24 @@ CONFIG_DEBUG_INFO=y
1098# CONFIG_DEBUG_LIST is not set 1097# CONFIG_DEBUG_LIST is not set
1099# CONFIG_DEBUG_SG is not set 1098# CONFIG_DEBUG_SG is not set
1100# CONFIG_DEBUG_NOTIFIERS is not set 1099# CONFIG_DEBUG_NOTIFIERS is not set
1100# CONFIG_DEBUG_CREDENTIALS is not set
1101# CONFIG_FRAME_POINTER is not set 1101# CONFIG_FRAME_POINTER is not set
1102# CONFIG_BOOT_PRINTK_DELAY is not set 1102# CONFIG_BOOT_PRINTK_DELAY is not set
1103# CONFIG_RCU_TORTURE_TEST is not set 1103# CONFIG_RCU_TORTURE_TEST is not set
1104# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1104# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1105# CONFIG_BACKTRACE_SELF_TEST is not set 1105# CONFIG_BACKTRACE_SELF_TEST is not set
1106# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set 1106# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1107# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
1107# CONFIG_FAULT_INJECTION is not set 1108# CONFIG_FAULT_INJECTION is not set
1108# CONFIG_PAGE_POISONING is not set 1109# CONFIG_PAGE_POISONING is not set
1109CONFIG_HAVE_FUNCTION_TRACER=y 1110CONFIG_HAVE_FUNCTION_TRACER=y
1110CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 1111CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
1111CONFIG_TRACING_SUPPORT=y 1112CONFIG_TRACING_SUPPORT=y
1112# CONFIG_FTRACE is not set 1113# CONFIG_FTRACE is not set
1113# CONFIG_BRANCH_PROFILE_NONE is not set
1114# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
1115# CONFIG_PROFILE_ALL_BRANCHES is not set
1116# CONFIG_DYNAMIC_DEBUG is not set 1114# CONFIG_DYNAMIC_DEBUG is not set
1117# CONFIG_SAMPLES is not set 1115# CONFIG_SAMPLES is not set
1118CONFIG_HAVE_ARCH_KGDB=y 1116CONFIG_HAVE_ARCH_KGDB=y
1119# CONFIG_KGDB is not set 1117# CONFIG_KGDB is not set
1120# CONFIG_KMEMCHECK is not set
1121# CONFIG_DEBUG_STACKOVERFLOW is not set 1118# CONFIG_DEBUG_STACKOVERFLOW is not set
1122# CONFIG_DEBUG_STACK_USAGE is not set 1119# CONFIG_DEBUG_STACK_USAGE is not set
1123CONFIG_DEBUG_VERBOSE=y 1120CONFIG_DEBUG_VERBOSE=y
@@ -1153,7 +1150,6 @@ CONFIG_CRYPTO=y
1153# 1150#
1154# Crypto core or helper 1151# Crypto core or helper
1155# 1152#
1156# CONFIG_CRYPTO_FIPS is not set
1157# CONFIG_CRYPTO_MANAGER is not set 1153# CONFIG_CRYPTO_MANAGER is not set
1158# CONFIG_CRYPTO_MANAGER2 is not set 1154# CONFIG_CRYPTO_MANAGER2 is not set
1159# CONFIG_CRYPTO_GF128MUL is not set 1155# CONFIG_CRYPTO_GF128MUL is not set
@@ -1185,11 +1181,13 @@ CONFIG_CRYPTO=y
1185# 1181#
1186# CONFIG_CRYPTO_HMAC is not set 1182# CONFIG_CRYPTO_HMAC is not set
1187# CONFIG_CRYPTO_XCBC is not set 1183# CONFIG_CRYPTO_XCBC is not set
1184# CONFIG_CRYPTO_VMAC is not set
1188 1185
1189# 1186#
1190# Digest 1187# Digest
1191# 1188#
1192# CONFIG_CRYPTO_CRC32C is not set 1189# CONFIG_CRYPTO_CRC32C is not set
1190# CONFIG_CRYPTO_GHASH is not set
1193# CONFIG_CRYPTO_MD4 is not set 1191# CONFIG_CRYPTO_MD4 is not set
1194# CONFIG_CRYPTO_MD5 is not set 1192# CONFIG_CRYPTO_MD5 is not set
1195# CONFIG_CRYPTO_MICHAEL_MIC is not set 1193# CONFIG_CRYPTO_MICHAEL_MIC is not set
diff --git a/arch/blackfin/configs/H8606_defconfig b/arch/blackfin/configs/H8606_defconfig
index bc7fae3d8b83..ed0a7ebeb85c 100644
--- a/arch/blackfin/configs/H8606_defconfig
+++ b/arch/blackfin/configs/H8606_defconfig
@@ -834,13 +834,6 @@ CONFIG_SND_VERBOSE_PROCFS=y
834# 834#
835# ALSA Blackfin devices 835# ALSA Blackfin devices
836# 836#
837CONFIG_SND_BLACKFIN_AD1836=m
838CONFIG_SND_BLACKFIN_AD1836_TDM=y
839# CONFIG_SND_BLACKFIN_AD1836_I2S is not set
840CONFIG_SND_BLACKFIN_AD1836_MULSUB=y
841# CONFIG_SND_BLACKFIN_AD1836_5P1 is not set
842CONFIG_SND_BLACKFIN_SPORT=0
843CONFIG_SND_BLACKFIN_SPI_PFBIT=4
844# CONFIG_SND_BFIN_AD73311 is not set 837# CONFIG_SND_BFIN_AD73311 is not set
845 838
846# 839#
diff --git a/arch/blackfin/configs/PNAV-10_defconfig b/arch/blackfin/configs/PNAV-10_defconfig
index 67d12768602a..ad58fede1f41 100644
--- a/arch/blackfin/configs/PNAV-10_defconfig
+++ b/arch/blackfin/configs/PNAV-10_defconfig
@@ -1,21 +1,27 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.28.10 3# Linux kernel version: 2.6.32.2
4# 4#
5# CONFIG_MMU is not set 5# CONFIG_MMU is not set
6# CONFIG_FPU is not set 6# CONFIG_FPU is not set
7CONFIG_RWSEM_GENERIC_SPINLOCK=y 7CONFIG_RWSEM_GENERIC_SPINLOCK=y
8# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set 8# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
9CONFIG_BLACKFIN=y 9CONFIG_BLACKFIN=y
10CONFIG_GENERIC_CSUM=y
11CONFIG_GENERIC_BUG=y
10CONFIG_ZONE_DMA=y 12CONFIG_ZONE_DMA=y
11CONFIG_GENERIC_FIND_NEXT_BIT=y 13CONFIG_GENERIC_FIND_NEXT_BIT=y
12CONFIG_GENERIC_HWEIGHT=y
13CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
14CONFIG_GENERIC_IRQ_PROBE=y 15CONFIG_GENERIC_IRQ_PROBE=y
16CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
15CONFIG_GENERIC_GPIO=y 17CONFIG_GENERIC_GPIO=y
16CONFIG_FORCE_MAX_ZONEORDER=14 18CONFIG_FORCE_MAX_ZONEORDER=14
17CONFIG_GENERIC_CALIBRATE_DELAY=y 19CONFIG_GENERIC_CALIBRATE_DELAY=y
20CONFIG_LOCKDEP_SUPPORT=y
21CONFIG_STACKTRACE_SUPPORT=y
22CONFIG_TRACE_IRQFLAGS_SUPPORT=y
18CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 23CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
24CONFIG_CONSTRUCTORS=y
19 25
20# 26#
21# General setup 27# General setup
@@ -25,16 +31,32 @@ CONFIG_BROKEN_ON_SMP=y
25CONFIG_INIT_ENV_ARG_LIMIT=32 31CONFIG_INIT_ENV_ARG_LIMIT=32
26CONFIG_LOCALVERSION="" 32CONFIG_LOCALVERSION=""
27CONFIG_LOCALVERSION_AUTO=y 33CONFIG_LOCALVERSION_AUTO=y
34CONFIG_HAVE_KERNEL_GZIP=y
35CONFIG_HAVE_KERNEL_BZIP2=y
36CONFIG_HAVE_KERNEL_LZMA=y
37CONFIG_KERNEL_GZIP=y
38# CONFIG_KERNEL_BZIP2 is not set
39# CONFIG_KERNEL_LZMA is not set
28CONFIG_SYSVIPC=y 40CONFIG_SYSVIPC=y
29CONFIG_SYSVIPC_SYSCTL=y 41CONFIG_SYSVIPC_SYSCTL=y
30# CONFIG_POSIX_MQUEUE is not set 42# CONFIG_POSIX_MQUEUE is not set
31# CONFIG_BSD_PROCESS_ACCT is not set 43# CONFIG_BSD_PROCESS_ACCT is not set
32# CONFIG_TASKSTATS is not set 44# CONFIG_TASKSTATS is not set
33# CONFIG_AUDIT is not set 45# CONFIG_AUDIT is not set
46
47#
48# RCU Subsystem
49#
50CONFIG_TREE_RCU=y
51# CONFIG_TREE_PREEMPT_RCU is not set
52# CONFIG_RCU_TRACE is not set
53CONFIG_RCU_FANOUT=32
54# CONFIG_RCU_FANOUT_EXACT is not set
55# CONFIG_TREE_RCU_TRACE is not set
34# CONFIG_IKCONFIG is not set 56# CONFIG_IKCONFIG is not set
35CONFIG_LOG_BUF_SHIFT=14 57CONFIG_LOG_BUF_SHIFT=14
36# CONFIG_CGROUPS is not set
37# CONFIG_GROUP_SCHED is not set 58# CONFIG_GROUP_SCHED is not set
59# CONFIG_CGROUPS is not set
38# CONFIG_SYSFS_DEPRECATED_V2 is not set 60# CONFIG_SYSFS_DEPRECATED_V2 is not set
39# CONFIG_RELAY is not set 61# CONFIG_RELAY is not set
40# CONFIG_NAMESPACES is not set 62# CONFIG_NAMESPACES is not set
@@ -58,6 +80,10 @@ CONFIG_SIGNALFD=y
58CONFIG_TIMERFD=y 80CONFIG_TIMERFD=y
59CONFIG_EVENTFD=y 81CONFIG_EVENTFD=y
60# CONFIG_AIO is not set 82# CONFIG_AIO is not set
83
84#
85# Kernel Performance Events And Counters
86#
61CONFIG_VM_EVENT_COUNTERS=y 87CONFIG_VM_EVENT_COUNTERS=y
62CONFIG_COMPAT_BRK=y 88CONFIG_COMPAT_BRK=y
63CONFIG_SLAB=y 89CONFIG_SLAB=y
@@ -65,11 +91,14 @@ CONFIG_SLAB=y
65# CONFIG_SLOB is not set 91# CONFIG_SLOB is not set
66CONFIG_MMAP_ALLOW_UNINITIALIZED=y 92CONFIG_MMAP_ALLOW_UNINITIALIZED=y
67# CONFIG_PROFILING is not set 93# CONFIG_PROFILING is not set
68# CONFIG_MARKERS is not set
69CONFIG_HAVE_OPROFILE=y 94CONFIG_HAVE_OPROFILE=y
95
96#
97# GCOV-based kernel profiling
98#
99# CONFIG_SLOW_WORK is not set
70# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set 100# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
71CONFIG_SLABINFO=y 101CONFIG_SLABINFO=y
72CONFIG_TINY_SHMEM=y
73CONFIG_BASE_SMALL=0 102CONFIG_BASE_SMALL=0
74CONFIG_MODULES=y 103CONFIG_MODULES=y
75# CONFIG_MODULE_FORCE_LOAD is not set 104# CONFIG_MODULE_FORCE_LOAD is not set
@@ -77,11 +106,8 @@ CONFIG_MODULE_UNLOAD=y
77# CONFIG_MODULE_FORCE_UNLOAD is not set 106# CONFIG_MODULE_FORCE_UNLOAD is not set
78# CONFIG_MODVERSIONS is not set 107# CONFIG_MODVERSIONS is not set
79# CONFIG_MODULE_SRCVERSION_ALL is not set 108# CONFIG_MODULE_SRCVERSION_ALL is not set
80CONFIG_KMOD=y
81CONFIG_BLOCK=y 109CONFIG_BLOCK=y
82# CONFIG_LBD is not set 110# CONFIG_LBDAF is not set
83# CONFIG_BLK_DEV_IO_TRACE is not set
84# CONFIG_LSF is not set
85# CONFIG_BLK_DEV_BSG is not set 111# CONFIG_BLK_DEV_BSG is not set
86# CONFIG_BLK_DEV_INTEGRITY is not set 112# CONFIG_BLK_DEV_INTEGRITY is not set
87 113
@@ -97,7 +123,6 @@ CONFIG_DEFAULT_AS=y
97# CONFIG_DEFAULT_CFQ is not set 123# CONFIG_DEFAULT_CFQ is not set
98# CONFIG_DEFAULT_NOOP is not set 124# CONFIG_DEFAULT_NOOP is not set
99CONFIG_DEFAULT_IOSCHED="anticipatory" 125CONFIG_DEFAULT_IOSCHED="anticipatory"
100CONFIG_CLASSIC_RCU=y
101# CONFIG_PREEMPT_NONE is not set 126# CONFIG_PREEMPT_NONE is not set
102CONFIG_PREEMPT_VOLUNTARY=y 127CONFIG_PREEMPT_VOLUNTARY=y
103# CONFIG_PREEMPT is not set 128# CONFIG_PREEMPT is not set
@@ -128,15 +153,15 @@ CONFIG_PREEMPT_VOLUNTARY=y
128CONFIG_BF537=y 153CONFIG_BF537=y
129# CONFIG_BF538 is not set 154# CONFIG_BF538 is not set
130# CONFIG_BF539 is not set 155# CONFIG_BF539 is not set
131# CONFIG_BF542 is not set 156# CONFIG_BF542_std is not set
132# CONFIG_BF542M is not set 157# CONFIG_BF542M is not set
133# CONFIG_BF544 is not set 158# CONFIG_BF544_std is not set
134# CONFIG_BF544M is not set 159# CONFIG_BF544M is not set
135# CONFIG_BF547 is not set 160# CONFIG_BF547_std is not set
136# CONFIG_BF547M is not set 161# CONFIG_BF547M is not set
137# CONFIG_BF548 is not set 162# CONFIG_BF548_std is not set
138# CONFIG_BF548M is not set 163# CONFIG_BF548M is not set
139# CONFIG_BF549 is not set 164# CONFIG_BF549_std is not set
140# CONFIG_BF549M is not set 165# CONFIG_BF549M is not set
141# CONFIG_BF561 is not set 166# CONFIG_BF561 is not set
142CONFIG_BF_REV_MIN=2 167CONFIG_BF_REV_MIN=2
@@ -180,7 +205,8 @@ CONFIG_IRQ_MEM_DMA1=13
180CONFIG_IRQ_WATCH=13 205CONFIG_IRQ_WATCH=13
181CONFIG_IRQ_SPI=10 206CONFIG_IRQ_SPI=10
182# CONFIG_BFIN537_STAMP is not set 207# CONFIG_BFIN537_STAMP is not set
183# CONFIG_BFIN537_BLUETECHNIX_CM is not set 208# CONFIG_BFIN537_BLUETECHNIX_CM_E is not set
209# CONFIG_BFIN537_BLUETECHNIX_CM_U is not set
184# CONFIG_BFIN537_BLUETECHNIX_TCM is not set 210# CONFIG_BFIN537_BLUETECHNIX_TCM is not set
185CONFIG_PNAV10=y 211CONFIG_PNAV10=y
186# CONFIG_CAMSIG_MINOTAUR is not set 212# CONFIG_CAMSIG_MINOTAUR is not set
@@ -282,7 +308,6 @@ CONFIG_FLATMEM=y
282CONFIG_FLAT_NODE_MEM_MAP=y 308CONFIG_FLAT_NODE_MEM_MAP=y
283CONFIG_PAGEFLAGS_EXTENDED=y 309CONFIG_PAGEFLAGS_EXTENDED=y
284CONFIG_SPLIT_PTLOCK_CPUS=4 310CONFIG_SPLIT_PTLOCK_CPUS=4
285# CONFIG_RESOURCES_64BIT is not set
286# CONFIG_PHYS_ADDR_T_64BIT is not set 311# CONFIG_PHYS_ADDR_T_64BIT is not set
287CONFIG_ZONE_DMA_FLAG=1 312CONFIG_ZONE_DMA_FLAG=1
288CONFIG_VIRT_TO_BUS=y 313CONFIG_VIRT_TO_BUS=y
@@ -291,16 +316,18 @@ CONFIG_BFIN_GPTIMERS=y
291# CONFIG_DMA_UNCACHED_4M is not set 316# CONFIG_DMA_UNCACHED_4M is not set
292# CONFIG_DMA_UNCACHED_2M is not set 317# CONFIG_DMA_UNCACHED_2M is not set
293CONFIG_DMA_UNCACHED_1M=y 318CONFIG_DMA_UNCACHED_1M=y
319# CONFIG_DMA_UNCACHED_512K is not set
320# CONFIG_DMA_UNCACHED_256K is not set
321# CONFIG_DMA_UNCACHED_128K is not set
294# CONFIG_DMA_UNCACHED_NONE is not set 322# CONFIG_DMA_UNCACHED_NONE is not set
295 323
296# 324#
297# Cache Support 325# Cache Support
298# 326#
299CONFIG_BFIN_ICACHE=y 327CONFIG_BFIN_ICACHE=y
300# CONFIG_BFIN_ICACHE_LOCK is not set 328CONFIG_BFIN_EXTMEM_ICACHEABLE=y
301CONFIG_BFIN_DCACHE=y 329CONFIG_BFIN_DCACHE=y
302# CONFIG_BFIN_DCACHE_BANKA is not set 330# CONFIG_BFIN_DCACHE_BANKA is not set
303CONFIG_BFIN_EXTMEM_ICACHEABLE=y
304CONFIG_BFIN_EXTMEM_DCACHEABLE=y 331CONFIG_BFIN_EXTMEM_DCACHEABLE=y
305CONFIG_BFIN_EXTMEM_WRITEBACK=y 332CONFIG_BFIN_EXTMEM_WRITEBACK=y
306# CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set 333# CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set
@@ -311,7 +338,7 @@ CONFIG_BFIN_EXTMEM_WRITEBACK=y
311# CONFIG_MPU is not set 338# CONFIG_MPU is not set
312 339
313# 340#
314# Asynchonous Memory Configuration 341# Asynchronous Memory Configuration
315# 342#
316 343
317# 344#
@@ -367,11 +394,6 @@ CONFIG_NET=y
367CONFIG_PACKET=y 394CONFIG_PACKET=y
368# CONFIG_PACKET_MMAP is not set 395# CONFIG_PACKET_MMAP is not set
369CONFIG_UNIX=y 396CONFIG_UNIX=y
370CONFIG_XFRM=y
371# CONFIG_XFRM_USER is not set
372# CONFIG_XFRM_SUB_POLICY is not set
373# CONFIG_XFRM_MIGRATE is not set
374# CONFIG_XFRM_STATISTICS is not set
375# CONFIG_NET_KEY is not set 397# CONFIG_NET_KEY is not set
376CONFIG_INET=y 398CONFIG_INET=y
377# CONFIG_IP_MULTICAST is not set 399# CONFIG_IP_MULTICAST is not set
@@ -395,7 +417,6 @@ CONFIG_IP_PNP=y
395# CONFIG_INET_XFRM_MODE_BEET is not set 417# CONFIG_INET_XFRM_MODE_BEET is not set
396# CONFIG_INET_LRO is not set 418# CONFIG_INET_LRO is not set
397# CONFIG_INET_DIAG is not set 419# CONFIG_INET_DIAG is not set
398CONFIG_INET_TCP_DIAG=y
399# CONFIG_TCP_CONG_ADVANCED is not set 420# CONFIG_TCP_CONG_ADVANCED is not set
400CONFIG_TCP_CONG_CUBIC=y 421CONFIG_TCP_CONG_CUBIC=y
401CONFIG_DEFAULT_TCP_CONG="cubic" 422CONFIG_DEFAULT_TCP_CONG="cubic"
@@ -406,6 +427,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
406# CONFIG_NETFILTER is not set 427# CONFIG_NETFILTER is not set
407# CONFIG_IP_DCCP is not set 428# CONFIG_IP_DCCP is not set
408# CONFIG_IP_SCTP is not set 429# CONFIG_IP_SCTP is not set
430# CONFIG_RDS is not set
409# CONFIG_TIPC is not set 431# CONFIG_TIPC is not set
410# CONFIG_ATM is not set 432# CONFIG_ATM is not set
411# CONFIG_BRIDGE is not set 433# CONFIG_BRIDGE is not set
@@ -419,7 +441,10 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
419# CONFIG_LAPB is not set 441# CONFIG_LAPB is not set
420# CONFIG_ECONET is not set 442# CONFIG_ECONET is not set
421# CONFIG_WAN_ROUTER is not set 443# CONFIG_WAN_ROUTER is not set
444# CONFIG_PHONET is not set
445# CONFIG_IEEE802154 is not set
422# CONFIG_NET_SCHED is not set 446# CONFIG_NET_SCHED is not set
447# CONFIG_DCB is not set
423 448
424# 449#
425# Network testing 450# Network testing
@@ -430,13 +455,8 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
430# CONFIG_IRDA is not set 455# CONFIG_IRDA is not set
431# CONFIG_BT is not set 456# CONFIG_BT is not set
432# CONFIG_AF_RXRPC is not set 457# CONFIG_AF_RXRPC is not set
433# CONFIG_PHONET is not set 458# CONFIG_WIRELESS is not set
434CONFIG_WIRELESS=y 459# CONFIG_WIMAX is not set
435# CONFIG_CFG80211 is not set
436CONFIG_WIRELESS_OLD_REGULATORY=y
437# CONFIG_WIRELESS_EXT is not set
438# CONFIG_MAC80211 is not set
439# CONFIG_IEEE80211 is not set
440# CONFIG_RFKILL is not set 460# CONFIG_RFKILL is not set
441# CONFIG_NET_9P is not set 461# CONFIG_NET_9P is not set
442 462
@@ -455,6 +475,7 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
455# CONFIG_CONNECTOR is not set 475# CONFIG_CONNECTOR is not set
456CONFIG_MTD=y 476CONFIG_MTD=y
457# CONFIG_MTD_DEBUG is not set 477# CONFIG_MTD_DEBUG is not set
478# CONFIG_MTD_TESTS is not set
458# CONFIG_MTD_CONCAT is not set 479# CONFIG_MTD_CONCAT is not set
459CONFIG_MTD_PARTITIONS=y 480CONFIG_MTD_PARTITIONS=y
460# CONFIG_MTD_REDBOOT_PARTS is not set 481# CONFIG_MTD_REDBOOT_PARTS is not set
@@ -506,6 +527,7 @@ CONFIG_MTD_UCLINUX=y
506# 527#
507# CONFIG_MTD_DATAFLASH is not set 528# CONFIG_MTD_DATAFLASH is not set
508# CONFIG_MTD_M25P80 is not set 529# CONFIG_MTD_M25P80 is not set
530# CONFIG_MTD_SST25L is not set
509# CONFIG_MTD_SLRAM is not set 531# CONFIG_MTD_SLRAM is not set
510# CONFIG_MTD_PHRAM is not set 532# CONFIG_MTD_PHRAM is not set
511# CONFIG_MTD_MTDRAM is not set 533# CONFIG_MTD_MTDRAM is not set
@@ -521,11 +543,6 @@ CONFIG_MTD_NAND=y
521# CONFIG_MTD_NAND_VERIFY_WRITE is not set 543# CONFIG_MTD_NAND_VERIFY_WRITE is not set
522# CONFIG_MTD_NAND_ECC_SMC is not set 544# CONFIG_MTD_NAND_ECC_SMC is not set
523# CONFIG_MTD_NAND_MUSEUM_IDS is not set 545# CONFIG_MTD_NAND_MUSEUM_IDS is not set
524CONFIG_MTD_NAND_BFIN=y
525CONFIG_BFIN_NAND_BASE=0x20100000
526CONFIG_BFIN_NAND_CLE=2
527CONFIG_BFIN_NAND_ALE=1
528CONFIG_BFIN_NAND_READY=44
529CONFIG_MTD_NAND_IDS=y 546CONFIG_MTD_NAND_IDS=y
530# CONFIG_MTD_NAND_DISKONCHIP is not set 547# CONFIG_MTD_NAND_DISKONCHIP is not set
531# CONFIG_MTD_NAND_NANDSIM is not set 548# CONFIG_MTD_NAND_NANDSIM is not set
@@ -533,6 +550,11 @@ CONFIG_MTD_NAND_IDS=y
533# CONFIG_MTD_ONENAND is not set 550# CONFIG_MTD_ONENAND is not set
534 551
535# 552#
553# LPDDR flash memory drivers
554#
555# CONFIG_MTD_LPDDR is not set
556
557#
536# UBI - Unsorted block images 558# UBI - Unsorted block images
537# 559#
538# CONFIG_MTD_UBI is not set 560# CONFIG_MTD_UBI is not set
@@ -549,10 +571,20 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
549# CONFIG_ATA_OVER_ETH is not set 571# CONFIG_ATA_OVER_ETH is not set
550# CONFIG_BLK_DEV_HD is not set 572# CONFIG_BLK_DEV_HD is not set
551CONFIG_MISC_DEVICES=y 573CONFIG_MISC_DEVICES=y
552# CONFIG_EEPROM_93CX6 is not set 574# CONFIG_AD525X_DPOT is not set
553# CONFIG_ICS932S401 is not set 575# CONFIG_ICS932S401 is not set
554# CONFIG_ENCLOSURE_SERVICES is not set 576# CONFIG_ENCLOSURE_SERVICES is not set
577# CONFIG_ISL29003 is not set
555# CONFIG_C2PORT is not set 578# CONFIG_C2PORT is not set
579
580#
581# EEPROM support
582#
583# CONFIG_EEPROM_AT24 is not set
584# CONFIG_EEPROM_AT25 is not set
585# CONFIG_EEPROM_LEGACY is not set
586# CONFIG_EEPROM_MAX6875 is not set
587# CONFIG_EEPROM_93CX6 is not set
556CONFIG_HAVE_IDE=y 588CONFIG_HAVE_IDE=y
557# CONFIG_IDE is not set 589# CONFIG_IDE is not set
558 590
@@ -587,6 +619,9 @@ CONFIG_PHYLIB=y
587# CONFIG_BROADCOM_PHY is not set 619# CONFIG_BROADCOM_PHY is not set
588# CONFIG_ICPLUS_PHY is not set 620# CONFIG_ICPLUS_PHY is not set
589# CONFIG_REALTEK_PHY is not set 621# CONFIG_REALTEK_PHY is not set
622# CONFIG_NATIONAL_PHY is not set
623# CONFIG_STE10XP is not set
624# CONFIG_LSI_ET1011C_PHY is not set
590# CONFIG_FIXED_PHY is not set 625# CONFIG_FIXED_PHY is not set
591# CONFIG_MDIO_BITBANG is not set 626# CONFIG_MDIO_BITBANG is not set
592CONFIG_NET_ETHERNET=y 627CONFIG_NET_ETHERNET=y
@@ -597,9 +632,12 @@ CONFIG_BFIN_TX_DESC_NUM=100
597CONFIG_BFIN_RX_DESC_NUM=100 632CONFIG_BFIN_RX_DESC_NUM=100
598CONFIG_BFIN_MAC_RMII=y 633CONFIG_BFIN_MAC_RMII=y
599# CONFIG_SMC91X is not set 634# CONFIG_SMC91X is not set
600# CONFIG_SMSC911X is not set
601# CONFIG_DM9000 is not set 635# CONFIG_DM9000 is not set
602# CONFIG_ENC28J60 is not set 636# CONFIG_ENC28J60 is not set
637# CONFIG_ETHOC is not set
638# CONFIG_SMSC911X is not set
639# CONFIG_DNET is not set
640# CONFIG_ADF702X is not set
603# CONFIG_IBM_NEW_EMAC_ZMII is not set 641# CONFIG_IBM_NEW_EMAC_ZMII is not set
604# CONFIG_IBM_NEW_EMAC_RGMII is not set 642# CONFIG_IBM_NEW_EMAC_RGMII is not set
605# CONFIG_IBM_NEW_EMAC_TAH is not set 643# CONFIG_IBM_NEW_EMAC_TAH is not set
@@ -608,15 +646,16 @@ CONFIG_BFIN_MAC_RMII=y
608# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set 646# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
609# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 647# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
610# CONFIG_B44 is not set 648# CONFIG_B44 is not set
649# CONFIG_KS8842 is not set
650# CONFIG_KS8851 is not set
651# CONFIG_KS8851_MLL is not set
611# CONFIG_NETDEV_1000 is not set 652# CONFIG_NETDEV_1000 is not set
612# CONFIG_NETDEV_10000 is not set 653# CONFIG_NETDEV_10000 is not set
654# CONFIG_WLAN is not set
613 655
614# 656#
615# Wireless LAN 657# Enable WiMAX (Networking options) to see the WiMAX drivers
616# 658#
617# CONFIG_WLAN_PRE80211 is not set
618# CONFIG_WLAN_80211 is not set
619# CONFIG_IWLWIFI_LEDS is not set
620# CONFIG_WAN is not set 659# CONFIG_WAN is not set
621# CONFIG_PPP is not set 660# CONFIG_PPP is not set
622# CONFIG_SLIP is not set 661# CONFIG_SLIP is not set
@@ -649,14 +688,17 @@ CONFIG_INPUT_EVDEV=y
649# CONFIG_INPUT_JOYSTICK is not set 688# CONFIG_INPUT_JOYSTICK is not set
650# CONFIG_INPUT_TABLET is not set 689# CONFIG_INPUT_TABLET is not set
651CONFIG_INPUT_TOUCHSCREEN=y 690CONFIG_INPUT_TOUCHSCREEN=y
691# CONFIG_TOUCHSCREEN_ADS7846 is not set
652CONFIG_TOUCHSCREEN_AD7877=y 692CONFIG_TOUCHSCREEN_AD7877=y
653# CONFIG_TOUCHSCREEN_AD7879_I2C is not set 693# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
654# CONFIG_TOUCHSCREEN_AD7879_SPI is not set 694# CONFIG_TOUCHSCREEN_AD7879_SPI is not set
655# CONFIG_TOUCHSCREEN_AD7879 is not set 695# CONFIG_TOUCHSCREEN_AD7879 is not set
656# CONFIG_TOUCHSCREEN_ADS7846 is not set 696# CONFIG_TOUCHSCREEN_EETI is not set
657# CONFIG_TOUCHSCREEN_FUJITSU is not set 697# CONFIG_TOUCHSCREEN_FUJITSU is not set
658# CONFIG_TOUCHSCREEN_GUNZE is not set 698# CONFIG_TOUCHSCREEN_GUNZE is not set
659# CONFIG_TOUCHSCREEN_ELO is not set 699# CONFIG_TOUCHSCREEN_ELO is not set
700# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
701# CONFIG_TOUCHSCREEN_MCS5000 is not set
660# CONFIG_TOUCHSCREEN_MTOUCH is not set 702# CONFIG_TOUCHSCREEN_MTOUCH is not set
661# CONFIG_TOUCHSCREEN_INEXIO is not set 703# CONFIG_TOUCHSCREEN_INEXIO is not set
662# CONFIG_TOUCHSCREEN_MK712 is not set 704# CONFIG_TOUCHSCREEN_MK712 is not set
@@ -665,6 +707,7 @@ CONFIG_TOUCHSCREEN_AD7877=y
665# CONFIG_TOUCHSCREEN_TOUCHWIN is not set 707# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
666# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set 708# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
667# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set 709# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
710# CONFIG_TOUCHSCREEN_TSC2007 is not set
668CONFIG_INPUT_MISC=y 711CONFIG_INPUT_MISC=y
669# CONFIG_INPUT_ATI_REMOTE is not set 712# CONFIG_INPUT_ATI_REMOTE is not set
670# CONFIG_INPUT_ATI_REMOTE2 is not set 713# CONFIG_INPUT_ATI_REMOTE2 is not set
@@ -673,7 +716,9 @@ CONFIG_INPUT_MISC=y
673# CONFIG_INPUT_YEALINK is not set 716# CONFIG_INPUT_YEALINK is not set
674# CONFIG_INPUT_CM109 is not set 717# CONFIG_INPUT_CM109 is not set
675CONFIG_INPUT_UINPUT=y 718CONFIG_INPUT_UINPUT=y
676# CONFIG_CONFIG_INPUT_PCF8574 is not set 719# CONFIG_INPUT_AD714X is not set
720# CONFIG_INPUT_ADXL34X is not set
721# CONFIG_INPUT_PCF8574 is not set
677 722
678# 723#
679# Hardware I/O ports 724# Hardware I/O ports
@@ -684,16 +729,13 @@ CONFIG_INPUT_UINPUT=y
684# 729#
685# Character devices 730# Character devices
686# 731#
687# CONFIG_AD9960 is not set
688CONFIG_BFIN_DMA_INTERFACE=m 732CONFIG_BFIN_DMA_INTERFACE=m
689# CONFIG_BFIN_PPI is not set 733# CONFIG_BFIN_PPI is not set
690# CONFIG_BFIN_PPIFCD is not set 734# CONFIG_BFIN_PPIFCD is not set
691# CONFIG_BFIN_SIMPLE_TIMER is not set 735# CONFIG_BFIN_SIMPLE_TIMER is not set
692# CONFIG_BFIN_SPI_ADC is not set 736# CONFIG_BFIN_SPI_ADC is not set
693CONFIG_BFIN_SPORT=y 737CONFIG_BFIN_SPORT=y
694# CONFIG_BFIN_TIMER_LATENCY is not set
695# CONFIG_BFIN_TWI_LCD is not set 738# CONFIG_BFIN_TWI_LCD is not set
696# CONFIG_SIMPLE_GPIO is not set
697# CONFIG_VT is not set 739# CONFIG_VT is not set
698CONFIG_DEVKMEM=y 740CONFIG_DEVKMEM=y
699# CONFIG_BFIN_JTAG_COMM is not set 741# CONFIG_BFIN_JTAG_COMM is not set
@@ -707,6 +749,7 @@ CONFIG_DEVKMEM=y
707# 749#
708# Non-8250 serial port support 750# Non-8250 serial port support
709# 751#
752# CONFIG_SERIAL_MAX3100 is not set
710CONFIG_SERIAL_BFIN=y 753CONFIG_SERIAL_BFIN=y
711CONFIG_SERIAL_BFIN_CONSOLE=y 754CONFIG_SERIAL_BFIN_CONSOLE=y
712CONFIG_SERIAL_BFIN_DMA=y 755CONFIG_SERIAL_BFIN_DMA=y
@@ -719,24 +762,17 @@ CONFIG_SERIAL_CORE=y
719CONFIG_SERIAL_CORE_CONSOLE=y 762CONFIG_SERIAL_CORE_CONSOLE=y
720# CONFIG_SERIAL_BFIN_SPORT is not set 763# CONFIG_SERIAL_BFIN_SPORT is not set
721CONFIG_UNIX98_PTYS=y 764CONFIG_UNIX98_PTYS=y
765# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
722# CONFIG_LEGACY_PTYS is not set 766# CONFIG_LEGACY_PTYS is not set
723
724#
725# CAN, the car bus and industrial fieldbus
726#
727CONFIG_CAN4LINUX=y
728
729#
730# linux embedded drivers
731#
732CONFIG_CAN_BLACKFIN=m
733# CONFIG_IPMI_HANDLER is not set 767# CONFIG_IPMI_HANDLER is not set
734CONFIG_HW_RANDOM=y 768CONFIG_HW_RANDOM=y
769# CONFIG_HW_RANDOM_TIMERIOMEM is not set
735# CONFIG_R3964 is not set 770# CONFIG_R3964 is not set
736# CONFIG_RAW_DRIVER is not set 771# CONFIG_RAW_DRIVER is not set
737# CONFIG_TCG_TPM is not set 772# CONFIG_TCG_TPM is not set
738CONFIG_I2C=y 773CONFIG_I2C=y
739CONFIG_I2C_BOARDINFO=y 774CONFIG_I2C_BOARDINFO=y
775CONFIG_I2C_COMPAT=y
740CONFIG_I2C_CHARDEV=y 776CONFIG_I2C_CHARDEV=y
741CONFIG_I2C_HELPER_AUTO=y 777CONFIG_I2C_HELPER_AUTO=y
742 778
@@ -769,14 +805,6 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
769# Miscellaneous I2C Chip support 805# Miscellaneous I2C Chip support
770# 806#
771# CONFIG_DS1682 is not set 807# CONFIG_DS1682 is not set
772# CONFIG_EEPROM_AT24 is not set
773# CONFIG_SENSORS_AD5252 is not set
774# CONFIG_EEPROM_LEGACY is not set
775CONFIG_SENSORS_PCF8574=m
776# CONFIG_PCF8575 is not set
777# CONFIG_SENSORS_PCA9539 is not set
778# CONFIG_SENSORS_PCF8591 is not set
779# CONFIG_SENSORS_MAX6875 is not set
780# CONFIG_SENSORS_TSL2550 is not set 808# CONFIG_SENSORS_TSL2550 is not set
781# CONFIG_I2C_DEBUG_CORE is not set 809# CONFIG_I2C_DEBUG_CORE is not set
782# CONFIG_I2C_DEBUG_ALGO is not set 810# CONFIG_I2C_DEBUG_ALGO is not set
@@ -792,20 +820,29 @@ CONFIG_SPI_BFIN=y
792# CONFIG_SPI_BFIN_LOCK is not set 820# CONFIG_SPI_BFIN_LOCK is not set
793# CONFIG_SPI_BFIN_SPORT is not set 821# CONFIG_SPI_BFIN_SPORT is not set
794# CONFIG_SPI_BITBANG is not set 822# CONFIG_SPI_BITBANG is not set
823# CONFIG_SPI_GPIO is not set
795 824
796# 825#
797# SPI Protocol Masters 826# SPI Protocol Masters
798# 827#
799# CONFIG_EEPROM_AT25 is not set
800# CONFIG_SPI_SPIDEV is not set 828# CONFIG_SPI_SPIDEV is not set
801# CONFIG_SPI_TLE62X0 is not set 829# CONFIG_SPI_TLE62X0 is not set
830
831#
832# PPS support
833#
834# CONFIG_PPS is not set
802CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y 835CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
803# CONFIG_GPIOLIB is not set 836# CONFIG_GPIOLIB is not set
804# CONFIG_W1 is not set 837# CONFIG_W1 is not set
805# CONFIG_POWER_SUPPLY is not set 838# CONFIG_POWER_SUPPLY is not set
806CONFIG_HWMON=y 839CONFIG_HWMON=y
807# CONFIG_HWMON_VID is not set 840# CONFIG_HWMON_VID is not set
808# CONFIG_SENSORS_AD5252 is not set 841# CONFIG_HWMON_DEBUG_CHIP is not set
842
843#
844# Native drivers
845#
809# CONFIG_SENSORS_AD7414 is not set 846# CONFIG_SENSORS_AD7414 is not set
810# CONFIG_SENSORS_AD7418 is not set 847# CONFIG_SENSORS_AD7418 is not set
811# CONFIG_SENSORS_ADCXX is not set 848# CONFIG_SENSORS_ADCXX is not set
@@ -818,11 +855,13 @@ CONFIG_HWMON=y
818# CONFIG_SENSORS_ADT7462 is not set 855# CONFIG_SENSORS_ADT7462 is not set
819# CONFIG_SENSORS_ADT7470 is not set 856# CONFIG_SENSORS_ADT7470 is not set
820# CONFIG_SENSORS_ADT7473 is not set 857# CONFIG_SENSORS_ADT7473 is not set
858# CONFIG_SENSORS_ADT7475 is not set
821# CONFIG_SENSORS_ATXP1 is not set 859# CONFIG_SENSORS_ATXP1 is not set
822# CONFIG_SENSORS_DS1621 is not set 860# CONFIG_SENSORS_DS1621 is not set
823# CONFIG_SENSORS_F71805F is not set 861# CONFIG_SENSORS_F71805F is not set
824# CONFIG_SENSORS_F71882FG is not set 862# CONFIG_SENSORS_F71882FG is not set
825# CONFIG_SENSORS_F75375S is not set 863# CONFIG_SENSORS_F75375S is not set
864# CONFIG_SENSORS_G760A is not set
826# CONFIG_SENSORS_GL518SM is not set 865# CONFIG_SENSORS_GL518SM is not set
827# CONFIG_SENSORS_GL520SM is not set 866# CONFIG_SENSORS_GL520SM is not set
828# CONFIG_SENSORS_IT87 is not set 867# CONFIG_SENSORS_IT87 is not set
@@ -838,17 +877,24 @@ CONFIG_HWMON=y
838# CONFIG_SENSORS_LM90 is not set 877# CONFIG_SENSORS_LM90 is not set
839# CONFIG_SENSORS_LM92 is not set 878# CONFIG_SENSORS_LM92 is not set
840# CONFIG_SENSORS_LM93 is not set 879# CONFIG_SENSORS_LM93 is not set
880# CONFIG_SENSORS_LTC4215 is not set
881# CONFIG_SENSORS_LTC4245 is not set
882# CONFIG_SENSORS_LM95241 is not set
841# CONFIG_SENSORS_MAX1111 is not set 883# CONFIG_SENSORS_MAX1111 is not set
842# CONFIG_SENSORS_MAX1619 is not set 884# CONFIG_SENSORS_MAX1619 is not set
843# CONFIG_SENSORS_MAX6650 is not set 885# CONFIG_SENSORS_MAX6650 is not set
844# CONFIG_SENSORS_PC87360 is not set 886# CONFIG_SENSORS_PC87360 is not set
845# CONFIG_SENSORS_PC87427 is not set 887# CONFIG_SENSORS_PC87427 is not set
888# CONFIG_SENSORS_PCF8591 is not set
889# CONFIG_SENSORS_SHT15 is not set
846# CONFIG_SENSORS_DME1737 is not set 890# CONFIG_SENSORS_DME1737 is not set
847# CONFIG_SENSORS_SMSC47M1 is not set 891# CONFIG_SENSORS_SMSC47M1 is not set
848# CONFIG_SENSORS_SMSC47M192 is not set 892# CONFIG_SENSORS_SMSC47M192 is not set
849# CONFIG_SENSORS_SMSC47B397 is not set 893# CONFIG_SENSORS_SMSC47B397 is not set
850# CONFIG_SENSORS_ADS7828 is not set 894# CONFIG_SENSORS_ADS7828 is not set
851# CONFIG_SENSORS_THMC50 is not set 895# CONFIG_SENSORS_THMC50 is not set
896# CONFIG_SENSORS_TMP401 is not set
897# CONFIG_SENSORS_TMP421 is not set
852# CONFIG_SENSORS_VT1211 is not set 898# CONFIG_SENSORS_VT1211 is not set
853# CONFIG_SENSORS_W83781D is not set 899# CONFIG_SENSORS_W83781D is not set
854# CONFIG_SENSORS_W83791D is not set 900# CONFIG_SENSORS_W83791D is not set
@@ -858,9 +904,8 @@ CONFIG_HWMON=y
858# CONFIG_SENSORS_W83L786NG is not set 904# CONFIG_SENSORS_W83L786NG is not set
859# CONFIG_SENSORS_W83627HF is not set 905# CONFIG_SENSORS_W83627HF is not set
860# CONFIG_SENSORS_W83627EHF is not set 906# CONFIG_SENSORS_W83627EHF is not set
861# CONFIG_HWMON_DEBUG_CHIP is not set 907# CONFIG_SENSORS_LIS3_SPI is not set
862# CONFIG_THERMAL is not set 908# CONFIG_THERMAL is not set
863# CONFIG_THERMAL_HWMON is not set
864# CONFIG_WATCHDOG is not set 909# CONFIG_WATCHDOG is not set
865CONFIG_SSB_POSSIBLE=y 910CONFIG_SSB_POSSIBLE=y
866 911
@@ -875,28 +920,19 @@ CONFIG_SSB_POSSIBLE=y
875# CONFIG_MFD_CORE is not set 920# CONFIG_MFD_CORE is not set
876# CONFIG_MFD_SM501 is not set 921# CONFIG_MFD_SM501 is not set
877# CONFIG_HTC_PASIC3 is not set 922# CONFIG_HTC_PASIC3 is not set
923# CONFIG_TWL4030_CORE is not set
878# CONFIG_MFD_TMIO is not set 924# CONFIG_MFD_TMIO is not set
879# CONFIG_PMIC_DA903X is not set 925# CONFIG_PMIC_DA903X is not set
880# CONFIG_PMIC_ADP5520 is not set 926# CONFIG_PMIC_ADP5520 is not set
881# CONFIG_MFD_WM8400 is not set 927# CONFIG_MFD_WM8400 is not set
928# CONFIG_MFD_WM831X is not set
882# CONFIG_MFD_WM8350_I2C is not set 929# CONFIG_MFD_WM8350_I2C is not set
930# CONFIG_MFD_PCF50633 is not set
931# CONFIG_MFD_MC13783 is not set
932# CONFIG_AB3100_CORE is not set
933# CONFIG_EZX_PCAP is not set
883# CONFIG_REGULATOR is not set 934# CONFIG_REGULATOR is not set
884 935# CONFIG_MEDIA_SUPPORT is not set
885#
886# Multimedia devices
887#
888
889#
890# Multimedia core support
891#
892# CONFIG_VIDEO_DEV is not set
893# CONFIG_DVB_CORE is not set
894# CONFIG_VIDEO_MEDIA is not set
895
896#
897# Multimedia drivers
898#
899CONFIG_DAB=y
900 936
901# 937#
902# Graphics support 938# Graphics support
@@ -928,24 +964,24 @@ CONFIG_FB_CFB_IMAGEBLIT=y
928# CONFIG_FB_BFIN_T350MCQB is not set 964# CONFIG_FB_BFIN_T350MCQB is not set
929# CONFIG_FB_BFIN_LQ035Q1 is not set 965# CONFIG_FB_BFIN_LQ035Q1 is not set
930CONFIG_FB_BF537_LQ035=y 966CONFIG_FB_BF537_LQ035=y
931CONFIG_LQ035_SLAVE_ADDR=0x58
932CONFIG_FB_BFIN_LANDSCAPE=y
933# CONFIG_FB_BFIN_BGR is not set
934# CONFIG_FB_BFIN_7393 is not set 967# CONFIG_FB_BFIN_7393 is not set
935# CONFIG_FB_HITACHI_TX09 is not set 968# CONFIG_FB_HITACHI_TX09 is not set
936# CONFIG_FB_S1D13XXX is not set 969# CONFIG_FB_S1D13XXX is not set
937# CONFIG_FB_VIRTUAL is not set 970# CONFIG_FB_VIRTUAL is not set
938# CONFIG_FB_METRONOME is not set 971# CONFIG_FB_METRONOME is not set
939# CONFIG_FB_MB862XX is not set 972# CONFIG_FB_MB862XX is not set
973# CONFIG_FB_BROADSHEET is not set
940CONFIG_BACKLIGHT_LCD_SUPPORT=y 974CONFIG_BACKLIGHT_LCD_SUPPORT=y
941CONFIG_LCD_CLASS_DEVICE=y 975CONFIG_LCD_CLASS_DEVICE=y
976# CONFIG_LCD_LMS283GF05 is not set
942# CONFIG_LCD_LTV350QV is not set 977# CONFIG_LCD_LTV350QV is not set
943# CONFIG_LCD_ILI9320 is not set 978# CONFIG_LCD_ILI9320 is not set
944# CONFIG_LCD_TDO24M is not set 979# CONFIG_LCD_TDO24M is not set
945# CONFIG_LCD_VGG2432A4 is not set 980# CONFIG_LCD_VGG2432A4 is not set
946# CONFIG_LCD_PLATFORM is not set 981# CONFIG_LCD_PLATFORM is not set
947CONFIG_BACKLIGHT_CLASS_DEVICE=y 982CONFIG_BACKLIGHT_CLASS_DEVICE=y
948# CONFIG_BACKLIGHT_CORGI is not set 983CONFIG_BACKLIGHT_GENERIC=y
984# CONFIG_BACKLIGHT_ADP8870 is not set
949 985
950# 986#
951# Display device support 987# Display device support
@@ -954,6 +990,7 @@ CONFIG_BACKLIGHT_CLASS_DEVICE=y
954# CONFIG_LOGO is not set 990# CONFIG_LOGO is not set
955CONFIG_SOUND=y 991CONFIG_SOUND=y
956CONFIG_SOUND_OSS_CORE=y 992CONFIG_SOUND_OSS_CORE=y
993CONFIG_SOUND_OSS_CORE_PRECLAIM=y
957CONFIG_SND=m 994CONFIG_SND=m
958# CONFIG_SND_SEQUENCER is not set 995# CONFIG_SND_SEQUENCER is not set
959# CONFIG_SND_MIXER_OSS is not set 996# CONFIG_SND_MIXER_OSS is not set
@@ -963,6 +1000,11 @@ CONFIG_SND=m
963# CONFIG_SND_VERBOSE_PROCFS is not set 1000# CONFIG_SND_VERBOSE_PROCFS is not set
964# CONFIG_SND_VERBOSE_PRINTK is not set 1001# CONFIG_SND_VERBOSE_PRINTK is not set
965# CONFIG_SND_DEBUG is not set 1002# CONFIG_SND_DEBUG is not set
1003# CONFIG_SND_RAWMIDI_SEQ is not set
1004# CONFIG_SND_OPL3_LIB_SEQ is not set
1005# CONFIG_SND_OPL4_LIB_SEQ is not set
1006# CONFIG_SND_SBAWE_SEQ is not set
1007# CONFIG_SND_EMU10K1_SEQ is not set
966CONFIG_SND_DRIVERS=y 1008CONFIG_SND_DRIVERS=y
967# CONFIG_SND_DUMMY is not set 1009# CONFIG_SND_DUMMY is not set
968# CONFIG_SND_MTPAV is not set 1010# CONFIG_SND_MTPAV is not set
@@ -973,7 +1015,6 @@ CONFIG_SND_SPI=y
973# 1015#
974# ALSA Blackfin devices 1016# ALSA Blackfin devices
975# 1017#
976# CONFIG_SND_BLACKFIN_AD1836 is not set
977# CONFIG_SND_BFIN_AD73322 is not set 1018# CONFIG_SND_BFIN_AD73322 is not set
978# CONFIG_SND_SOC is not set 1019# CONFIG_SND_SOC is not set
979CONFIG_SOUND_PRIME=y 1020CONFIG_SOUND_PRIME=y
@@ -993,9 +1034,13 @@ CONFIG_USB_ARCH_HAS_HCD=y
993# 1034#
994 1035
995# 1036#
996# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; 1037# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
997# 1038#
998# CONFIG_USB_GADGET is not set 1039# CONFIG_USB_GADGET is not set
1040
1041#
1042# OTG and related infrastructure
1043#
999# CONFIG_MMC is not set 1044# CONFIG_MMC is not set
1000# CONFIG_MEMSTICK is not set 1045# CONFIG_MEMSTICK is not set
1001# CONFIG_NEW_LEDS is not set 1046# CONFIG_NEW_LEDS is not set
@@ -1031,6 +1076,7 @@ CONFIG_RTC_INTF_DEV=y
1031# CONFIG_RTC_DRV_S35390A is not set 1076# CONFIG_RTC_DRV_S35390A is not set
1032# CONFIG_RTC_DRV_FM3130 is not set 1077# CONFIG_RTC_DRV_FM3130 is not set
1033# CONFIG_RTC_DRV_RX8581 is not set 1078# CONFIG_RTC_DRV_RX8581 is not set
1079# CONFIG_RTC_DRV_RX8025 is not set
1034 1080
1035# 1081#
1036# SPI RTC drivers 1082# SPI RTC drivers
@@ -1042,6 +1088,7 @@ CONFIG_RTC_INTF_DEV=y
1042# CONFIG_RTC_DRV_R9701 is not set 1088# CONFIG_RTC_DRV_R9701 is not set
1043# CONFIG_RTC_DRV_RS5C348 is not set 1089# CONFIG_RTC_DRV_RS5C348 is not set
1044# CONFIG_RTC_DRV_DS3234 is not set 1090# CONFIG_RTC_DRV_DS3234 is not set
1091# CONFIG_RTC_DRV_PCF2123 is not set
1045 1092
1046# 1093#
1047# Platform RTC drivers 1094# Platform RTC drivers
@@ -1062,10 +1109,21 @@ CONFIG_RTC_INTF_DEV=y
1062# 1109#
1063CONFIG_RTC_DRV_BFIN=y 1110CONFIG_RTC_DRV_BFIN=y
1064# CONFIG_DMADEVICES is not set 1111# CONFIG_DMADEVICES is not set
1112# CONFIG_AUXDISPLAY is not set
1065# CONFIG_UIO is not set 1113# CONFIG_UIO is not set
1114
1115#
1116# TI VLYNQ
1117#
1066# CONFIG_STAGING is not set 1118# CONFIG_STAGING is not set
1067 1119
1068# 1120#
1121# Firmware Drivers
1122#
1123# CONFIG_FIRMWARE_MEMMAP is not set
1124# CONFIG_SIGMA is not set
1125
1126#
1069# File systems 1127# File systems
1070# 1128#
1071CONFIG_EXT2_FS=y 1129CONFIG_EXT2_FS=y
@@ -1078,9 +1136,13 @@ CONFIG_FS_MBCACHE=y
1078# CONFIG_REISERFS_FS is not set 1136# CONFIG_REISERFS_FS is not set
1079# CONFIG_JFS_FS is not set 1137# CONFIG_JFS_FS is not set
1080# CONFIG_FS_POSIX_ACL is not set 1138# CONFIG_FS_POSIX_ACL is not set
1081CONFIG_FILE_LOCKING=y
1082# CONFIG_XFS_FS is not set 1139# CONFIG_XFS_FS is not set
1140# CONFIG_GFS2_FS is not set
1083# CONFIG_OCFS2_FS is not set 1141# CONFIG_OCFS2_FS is not set
1142# CONFIG_BTRFS_FS is not set
1143# CONFIG_NILFS2_FS is not set
1144CONFIG_FILE_LOCKING=y
1145CONFIG_FSNOTIFY=y
1084# CONFIG_DNOTIFY is not set 1146# CONFIG_DNOTIFY is not set
1085CONFIG_INOTIFY=y 1147CONFIG_INOTIFY=y
1086CONFIG_INOTIFY_USER=y 1148CONFIG_INOTIFY_USER=y
@@ -1090,6 +1152,11 @@ CONFIG_INOTIFY_USER=y
1090# CONFIG_FUSE_FS is not set 1152# CONFIG_FUSE_FS is not set
1091 1153
1092# 1154#
1155# Caches
1156#
1157# CONFIG_FSCACHE is not set
1158
1159#
1093# CD-ROM/DVD Filesystems 1160# CD-ROM/DVD Filesystems
1094# 1161#
1095# CONFIG_ISO9660_FS is not set 1162# CONFIG_ISO9660_FS is not set
@@ -1108,13 +1175,9 @@ CONFIG_INOTIFY_USER=y
1108CONFIG_PROC_FS=y 1175CONFIG_PROC_FS=y
1109CONFIG_PROC_SYSCTL=y 1176CONFIG_PROC_SYSCTL=y
1110CONFIG_SYSFS=y 1177CONFIG_SYSFS=y
1111# CONFIG_TMPFS is not set
1112# CONFIG_HUGETLB_PAGE is not set 1178# CONFIG_HUGETLB_PAGE is not set
1113# CONFIG_CONFIGFS_FS is not set 1179# CONFIG_CONFIGFS_FS is not set
1114 1180CONFIG_MISC_FILESYSTEMS=y
1115#
1116# Miscellaneous filesystems
1117#
1118# CONFIG_ADFS_FS is not set 1181# CONFIG_ADFS_FS is not set
1119# CONFIG_AFFS_FS is not set 1182# CONFIG_AFFS_FS is not set
1120# CONFIG_HFS_FS is not set 1183# CONFIG_HFS_FS is not set
@@ -1123,17 +1186,8 @@ CONFIG_SYSFS=y
1123# CONFIG_BFS_FS is not set 1186# CONFIG_BFS_FS is not set
1124# CONFIG_EFS_FS is not set 1187# CONFIG_EFS_FS is not set
1125# CONFIG_JFFS2_FS is not set 1188# CONFIG_JFFS2_FS is not set
1126CONFIG_YAFFS_FS=y
1127CONFIG_YAFFS_YAFFS1=y
1128# CONFIG_YAFFS_9BYTE_TAGS is not set
1129# CONFIG_YAFFS_DOES_ECC is not set
1130CONFIG_YAFFS_YAFFS2=y
1131CONFIG_YAFFS_AUTO_YAFFS2=y
1132# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
1133# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
1134# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
1135CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
1136# CONFIG_CRAMFS is not set 1189# CONFIG_CRAMFS is not set
1190# CONFIG_SQUASHFS is not set
1137# CONFIG_VXFS_FS is not set 1191# CONFIG_VXFS_FS is not set
1138# CONFIG_MINIX_FS is not set 1192# CONFIG_MINIX_FS is not set
1139# CONFIG_OMFS_FS is not set 1193# CONFIG_OMFS_FS is not set
@@ -1152,7 +1206,6 @@ CONFIG_LOCKD=m
1152CONFIG_LOCKD_V4=y 1206CONFIG_LOCKD_V4=y
1153CONFIG_NFS_COMMON=y 1207CONFIG_NFS_COMMON=y
1154CONFIG_SUNRPC=m 1208CONFIG_SUNRPC=m
1155# CONFIG_SUNRPC_REGISTER_V4 is not set
1156# CONFIG_RPCSEC_GSS_KRB5 is not set 1209# CONFIG_RPCSEC_GSS_KRB5 is not set
1157# CONFIG_RPCSEC_GSS_SPKM3 is not set 1210# CONFIG_RPCSEC_GSS_SPKM3 is not set
1158CONFIG_SMB_FS=m 1211CONFIG_SMB_FS=m
@@ -1217,18 +1270,19 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
1217CONFIG_ENABLE_MUST_CHECK=y 1270CONFIG_ENABLE_MUST_CHECK=y
1218CONFIG_FRAME_WARN=1024 1271CONFIG_FRAME_WARN=1024
1219# CONFIG_MAGIC_SYSRQ is not set 1272# CONFIG_MAGIC_SYSRQ is not set
1273# CONFIG_STRIP_ASM_SYMS is not set
1220# CONFIG_UNUSED_SYMBOLS is not set 1274# CONFIG_UNUSED_SYMBOLS is not set
1221# CONFIG_DEBUG_FS is not set 1275# CONFIG_DEBUG_FS is not set
1222# CONFIG_HEADERS_CHECK is not set 1276# CONFIG_HEADERS_CHECK is not set
1277CONFIG_DEBUG_SECTION_MISMATCH=y
1223# CONFIG_DEBUG_KERNEL is not set 1278# CONFIG_DEBUG_KERNEL is not set
1224# CONFIG_DEBUG_BUGVERBOSE is not set 1279# CONFIG_DEBUG_BUGVERBOSE is not set
1225# CONFIG_DEBUG_MEMORY_INIT is not set 1280# CONFIG_DEBUG_MEMORY_INIT is not set
1226# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1281# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1227 1282CONFIG_HAVE_FUNCTION_TRACER=y
1228# 1283CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
1229# Tracers 1284CONFIG_TRACING_SUPPORT=y
1230# 1285# CONFIG_FTRACE is not set
1231# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
1232# CONFIG_SAMPLES is not set 1286# CONFIG_SAMPLES is not set
1233CONFIG_HAVE_ARCH_KGDB=y 1287CONFIG_HAVE_ARCH_KGDB=y
1234CONFIG_DEBUG_VERBOSE=y 1288CONFIG_DEBUG_VERBOSE=y
@@ -1245,6 +1299,7 @@ CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
1245# CONFIG_EARLY_PRINTK is not set 1299# CONFIG_EARLY_PRINTK is not set
1246# CONFIG_CPLB_INFO is not set 1300# CONFIG_CPLB_INFO is not set
1247# CONFIG_ACCESS_CHECK is not set 1301# CONFIG_ACCESS_CHECK is not set
1302# CONFIG_BFIN_ISRAM_SELF_TEST is not set
1248 1303
1249# 1304#
1250# Security options 1305# Security options
@@ -1253,14 +1308,14 @@ CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
1253CONFIG_SECURITY=y 1308CONFIG_SECURITY=y
1254# CONFIG_SECURITYFS is not set 1309# CONFIG_SECURITYFS is not set
1255# CONFIG_SECURITY_NETWORK is not set 1310# CONFIG_SECURITY_NETWORK is not set
1311# CONFIG_SECURITY_PATH is not set
1256# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1312# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1257CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0 1313# CONFIG_SECURITY_TOMOYO is not set
1258CONFIG_CRYPTO=y 1314CONFIG_CRYPTO=y
1259 1315
1260# 1316#
1261# Crypto core or helper 1317# Crypto core or helper
1262# 1318#
1263# CONFIG_CRYPTO_FIPS is not set
1264# CONFIG_CRYPTO_MANAGER is not set 1319# CONFIG_CRYPTO_MANAGER is not set
1265# CONFIG_CRYPTO_MANAGER2 is not set 1320# CONFIG_CRYPTO_MANAGER2 is not set
1266# CONFIG_CRYPTO_GF128MUL is not set 1321# CONFIG_CRYPTO_GF128MUL is not set
@@ -1292,11 +1347,13 @@ CONFIG_CRYPTO=y
1292# 1347#
1293# CONFIG_CRYPTO_HMAC is not set 1348# CONFIG_CRYPTO_HMAC is not set
1294# CONFIG_CRYPTO_XCBC is not set 1349# CONFIG_CRYPTO_XCBC is not set
1350# CONFIG_CRYPTO_VMAC is not set
1295 1351
1296# 1352#
1297# Digest 1353# Digest
1298# 1354#
1299# CONFIG_CRYPTO_CRC32C is not set 1355# CONFIG_CRYPTO_CRC32C is not set
1356# CONFIG_CRYPTO_GHASH is not set
1300# CONFIG_CRYPTO_MD4 is not set 1357# CONFIG_CRYPTO_MD4 is not set
1301# CONFIG_CRYPTO_MD5 is not set 1358# CONFIG_CRYPTO_MD5 is not set
1302# CONFIG_CRYPTO_MICHAEL_MIC is not set 1359# CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1333,6 +1390,7 @@ CONFIG_CRYPTO=y
1333# Compression 1390# Compression
1334# 1391#
1335# CONFIG_CRYPTO_DEFLATE is not set 1392# CONFIG_CRYPTO_DEFLATE is not set
1393# CONFIG_CRYPTO_ZLIB is not set
1336# CONFIG_CRYPTO_LZO is not set 1394# CONFIG_CRYPTO_LZO is not set
1337 1395
1338# 1396#
@@ -1340,11 +1398,13 @@ CONFIG_CRYPTO=y
1340# 1398#
1341# CONFIG_CRYPTO_ANSI_CPRNG is not set 1399# CONFIG_CRYPTO_ANSI_CPRNG is not set
1342CONFIG_CRYPTO_HW=y 1400CONFIG_CRYPTO_HW=y
1401# CONFIG_BINARY_PRINTF is not set
1343 1402
1344# 1403#
1345# Library routines 1404# Library routines
1346# 1405#
1347CONFIG_BITREVERSE=y 1406CONFIG_BITREVERSE=y
1407CONFIG_GENERIC_FIND_LAST_BIT=y
1348CONFIG_CRC_CCITT=m 1408CONFIG_CRC_CCITT=m
1349# CONFIG_CRC16 is not set 1409# CONFIG_CRC16 is not set
1350# CONFIG_CRC_T10DIF is not set 1410# CONFIG_CRC_T10DIF is not set
@@ -1356,3 +1416,4 @@ CONFIG_ZLIB_INFLATE=y
1356CONFIG_HAS_IOMEM=y 1416CONFIG_HAS_IOMEM=y
1357CONFIG_HAS_IOPORT=y 1417CONFIG_HAS_IOPORT=y
1358CONFIG_HAS_DMA=y 1418CONFIG_HAS_DMA=y
1419CONFIG_NLATTR=y
diff --git a/arch/blackfin/configs/TCM-BF518_defconfig b/arch/blackfin/configs/TCM-BF518_defconfig
new file mode 100644
index 000000000000..4d31e2a4ed46
--- /dev/null
+++ b/arch/blackfin/configs/TCM-BF518_defconfig
@@ -0,0 +1,1375 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.32.3
4#
5# CONFIG_MMU is not set
6# CONFIG_FPU is not set
7CONFIG_RWSEM_GENERIC_SPINLOCK=y
8# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
9CONFIG_BLACKFIN=y
10CONFIG_GENERIC_CSUM=y
11CONFIG_GENERIC_BUG=y
12CONFIG_ZONE_DMA=y
13CONFIG_GENERIC_FIND_NEXT_BIT=y
14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_IRQ_PROBE=y
16CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
17CONFIG_GENERIC_GPIO=y
18CONFIG_FORCE_MAX_ZONEORDER=14
19CONFIG_GENERIC_CALIBRATE_DELAY=y
20CONFIG_LOCKDEP_SUPPORT=y
21CONFIG_STACKTRACE_SUPPORT=y
22CONFIG_TRACE_IRQFLAGS_SUPPORT=y
23CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
24CONFIG_CONSTRUCTORS=y
25
26#
27# General setup
28#
29CONFIG_EXPERIMENTAL=y
30CONFIG_BROKEN_ON_SMP=y
31CONFIG_INIT_ENV_ARG_LIMIT=32
32CONFIG_LOCALVERSION=""
33CONFIG_LOCALVERSION_AUTO=y
34CONFIG_HAVE_KERNEL_GZIP=y
35CONFIG_HAVE_KERNEL_BZIP2=y
36CONFIG_HAVE_KERNEL_LZMA=y
37# CONFIG_KERNEL_GZIP is not set
38# CONFIG_KERNEL_BZIP2 is not set
39CONFIG_KERNEL_LZMA=y
40CONFIG_SYSVIPC=y
41CONFIG_SYSVIPC_SYSCTL=y
42# CONFIG_POSIX_MQUEUE is not set
43# CONFIG_BSD_PROCESS_ACCT is not set
44# CONFIG_TASKSTATS is not set
45# CONFIG_AUDIT is not set
46
47#
48# RCU Subsystem
49#
50CONFIG_TREE_RCU=y
51# CONFIG_TREE_PREEMPT_RCU is not set
52# CONFIG_RCU_TRACE is not set
53CONFIG_RCU_FANOUT=32
54# CONFIG_RCU_FANOUT_EXACT is not set
55# CONFIG_TREE_RCU_TRACE is not set
56CONFIG_IKCONFIG=y
57CONFIG_IKCONFIG_PROC=y
58CONFIG_LOG_BUF_SHIFT=14
59# CONFIG_GROUP_SCHED is not set
60# CONFIG_CGROUPS is not set
61# CONFIG_SYSFS_DEPRECATED_V2 is not set
62# CONFIG_RELAY is not set
63# CONFIG_NAMESPACES is not set
64CONFIG_BLK_DEV_INITRD=y
65CONFIG_INITRAMFS_SOURCE=""
66# CONFIG_RD_GZIP is not set
67# CONFIG_RD_BZIP2 is not set
68CONFIG_RD_LZMA=y
69CONFIG_CC_OPTIMIZE_FOR_SIZE=y
70CONFIG_SYSCTL=y
71CONFIG_ANON_INODES=y
72CONFIG_EMBEDDED=y
73CONFIG_UID16=y
74# CONFIG_SYSCTL_SYSCALL is not set
75CONFIG_KALLSYMS=y
76# CONFIG_KALLSYMS_ALL is not set
77# CONFIG_KALLSYMS_EXTRA_PASS is not set
78CONFIG_HOTPLUG=y
79CONFIG_PRINTK=y
80CONFIG_BUG=y
81# CONFIG_ELF_CORE is not set
82CONFIG_BASE_FULL=y
83# CONFIG_FUTEX is not set
84CONFIG_EPOLL=y
85# CONFIG_SIGNALFD is not set
86# CONFIG_TIMERFD is not set
87# CONFIG_EVENTFD is not set
88# CONFIG_AIO is not set
89
90#
91# Kernel Performance Events And Counters
92#
93CONFIG_VM_EVENT_COUNTERS=y
94CONFIG_COMPAT_BRK=y
95CONFIG_SLAB=y
96# CONFIG_SLUB is not set
97# CONFIG_SLOB is not set
98CONFIG_MMAP_ALLOW_UNINITIALIZED=y
99# CONFIG_PROFILING is not set
100CONFIG_HAVE_OPROFILE=y
101
102#
103# GCOV-based kernel profiling
104#
105# CONFIG_GCOV_KERNEL is not set
106# CONFIG_SLOW_WORK is not set
107# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
108CONFIG_SLABINFO=y
109CONFIG_BASE_SMALL=0
110CONFIG_MODULES=y
111# CONFIG_MODULE_FORCE_LOAD is not set
112CONFIG_MODULE_UNLOAD=y
113# CONFIG_MODULE_FORCE_UNLOAD is not set
114# CONFIG_MODVERSIONS is not set
115# CONFIG_MODULE_SRCVERSION_ALL is not set
116CONFIG_BLOCK=y
117# CONFIG_LBDAF is not set
118# CONFIG_BLK_DEV_BSG is not set
119# CONFIG_BLK_DEV_INTEGRITY is not set
120
121#
122# IO Schedulers
123#
124CONFIG_IOSCHED_NOOP=y
125# CONFIG_IOSCHED_AS is not set
126# CONFIG_IOSCHED_DEADLINE is not set
127# CONFIG_IOSCHED_CFQ is not set
128# CONFIG_DEFAULT_AS is not set
129# CONFIG_DEFAULT_DEADLINE is not set
130# CONFIG_DEFAULT_CFQ is not set
131CONFIG_DEFAULT_NOOP=y
132CONFIG_DEFAULT_IOSCHED="noop"
133# CONFIG_PREEMPT_NONE is not set
134CONFIG_PREEMPT_VOLUNTARY=y
135# CONFIG_PREEMPT is not set
136# CONFIG_FREEZER is not set
137
138#
139# Blackfin Processor Options
140#
141
142#
143# Processor and Board Settings
144#
145# CONFIG_BF512 is not set
146# CONFIG_BF514 is not set
147# CONFIG_BF516 is not set
148CONFIG_BF518=y
149# CONFIG_BF522 is not set
150# CONFIG_BF523 is not set
151# CONFIG_BF524 is not set
152# CONFIG_BF525 is not set
153# CONFIG_BF526 is not set
154# CONFIG_BF527 is not set
155# CONFIG_BF531 is not set
156# CONFIG_BF532 is not set
157# CONFIG_BF533 is not set
158# CONFIG_BF534 is not set
159# CONFIG_BF536 is not set
160# CONFIG_BF537 is not set
161# CONFIG_BF538 is not set
162# CONFIG_BF539 is not set
163# CONFIG_BF542_std is not set
164# CONFIG_BF542M is not set
165# CONFIG_BF544_std is not set
166# CONFIG_BF544M is not set
167# CONFIG_BF547_std is not set
168# CONFIG_BF547M is not set
169# CONFIG_BF548_std is not set
170# CONFIG_BF548M is not set
171# CONFIG_BF549_std is not set
172# CONFIG_BF549M is not set
173# CONFIG_BF561 is not set
174CONFIG_BF_REV_MIN=0
175CONFIG_BF_REV_MAX=2
176# CONFIG_BF_REV_0_0 is not set
177CONFIG_BF_REV_0_1=y
178# CONFIG_BF_REV_0_2 is not set
179# CONFIG_BF_REV_0_3 is not set
180# CONFIG_BF_REV_0_4 is not set
181# CONFIG_BF_REV_0_5 is not set
182# CONFIG_BF_REV_0_6 is not set
183# CONFIG_BF_REV_ANY is not set
184# CONFIG_BF_REV_NONE is not set
185CONFIG_BF51x=y
186# CONFIG_BFIN518F_EZBRD is not set
187CONFIG_BFIN518F_TCM=y
188
189#
190# BF518 Specific Configuration
191#
192
193#
194# Alternative Multiplexing Scheme
195#
196# CONFIG_BF518_SPORT0_PORTF is not set
197CONFIG_BF518_SPORT0_PORTG=y
198CONFIG_BF518_SPORT0_TSCLK_PG10=y
199# CONFIG_BF518_SPORT0_TSCLK_PG14 is not set
200CONFIG_BF518_UART1_PORTF=y
201# CONFIG_BF518_UART1_PORTG is not set
202
203#
204# Interrupt Priority Assignment
205#
206
207#
208# Priority
209#
210CONFIG_IRQ_PLL_WAKEUP=7
211CONFIG_IRQ_DMA0_ERROR=7
212CONFIG_IRQ_DMAR0_BLK=7
213CONFIG_IRQ_DMAR1_BLK=7
214CONFIG_IRQ_DMAR0_OVR=7
215CONFIG_IRQ_DMAR1_OVR=7
216CONFIG_IRQ_PPI_ERROR=7
217CONFIG_IRQ_MAC_ERROR=7
218CONFIG_IRQ_SPORT0_ERROR=7
219CONFIG_IRQ_SPORT1_ERROR=7
220CONFIG_IRQ_PTP_ERROR=7
221CONFIG_IRQ_UART0_ERROR=7
222CONFIG_IRQ_UART1_ERROR=7
223CONFIG_IRQ_RTC=8
224CONFIG_IRQ_PPI=8
225CONFIG_IRQ_SPORT0_RX=9
226CONFIG_IRQ_SPORT0_TX=9
227CONFIG_IRQ_SPORT1_RX=9
228CONFIG_IRQ_SPORT1_TX=9
229CONFIG_IRQ_TWI=10
230CONFIG_IRQ_SPI0=10
231CONFIG_IRQ_UART0_RX=10
232CONFIG_IRQ_UART0_TX=10
233CONFIG_IRQ_UART1_RX=10
234CONFIG_IRQ_UART1_TX=10
235CONFIG_IRQ_OPTSEC=11
236CONFIG_IRQ_CNT=11
237CONFIG_IRQ_MAC_RX=11
238CONFIG_IRQ_PORTH_INTA=11
239CONFIG_IRQ_MAC_TX=11
240CONFIG_IRQ_PORTH_INTB=11
241CONFIG_IRQ_TIMER0=12
242CONFIG_IRQ_TIMER1=12
243CONFIG_IRQ_TIMER2=12
244CONFIG_IRQ_TIMER3=12
245CONFIG_IRQ_TIMER4=12
246CONFIG_IRQ_TIMER5=12
247CONFIG_IRQ_TIMER6=12
248CONFIG_IRQ_TIMER7=12
249CONFIG_IRQ_PORTG_INTA=12
250CONFIG_IRQ_PORTG_INTB=12
251CONFIG_IRQ_MEM_DMA0=13
252CONFIG_IRQ_MEM_DMA1=13
253CONFIG_IRQ_WATCH=13
254CONFIG_IRQ_PORTF_INTA=13
255CONFIG_IRQ_PORTF_INTB=13
256CONFIG_IRQ_SPI0_ERROR=7
257CONFIG_IRQ_SPI1_ERROR=7
258CONFIG_IRQ_RSI_INT0=7
259CONFIG_IRQ_RSI_INT1=7
260CONFIG_IRQ_PWM_TRIP=10
261CONFIG_IRQ_PWM_SYNC=10
262CONFIG_IRQ_PTP_STAT=10
263
264#
265# Board customizations
266#
267# CONFIG_CMDLINE_BOOL is not set
268CONFIG_BOOT_LOAD=0x1000
269
270#
271# Clock/PLL Setup
272#
273CONFIG_CLKIN_HZ=25000000
274# CONFIG_BFIN_KERNEL_CLOCK is not set
275CONFIG_MAX_VCO_HZ=400000000
276CONFIG_MIN_VCO_HZ=50000000
277CONFIG_MAX_SCLK_HZ=133333333
278CONFIG_MIN_SCLK_HZ=27000000
279
280#
281# Kernel Timer/Scheduler
282#
283# CONFIG_HZ_100 is not set
284CONFIG_HZ_250=y
285# CONFIG_HZ_300 is not set
286# CONFIG_HZ_1000 is not set
287CONFIG_HZ=250
288# CONFIG_SCHED_HRTICK is not set
289CONFIG_GENERIC_TIME=y
290CONFIG_GENERIC_CLOCKEVENTS=y
291
292#
293# Clock event device
294#
295# CONFIG_TICKSOURCE_GPTMR0 is not set
296CONFIG_TICKSOURCE_CORETMR=y
297
298#
299# Clock souce
300#
301# CONFIG_CYCLES_CLOCKSOURCE is not set
302# CONFIG_GPTMR0_CLOCKSOURCE is not set
303# CONFIG_NO_HZ is not set
304# CONFIG_HIGH_RES_TIMERS is not set
305CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
306
307#
308# Misc
309#
310CONFIG_BFIN_SCRATCH_REG_RETN=y
311# CONFIG_BFIN_SCRATCH_REG_RETE is not set
312# CONFIG_BFIN_SCRATCH_REG_CYCLES is not set
313
314#
315# Blackfin Kernel Optimizations
316#
317
318#
319# Memory Optimizations
320#
321CONFIG_I_ENTRY_L1=y
322CONFIG_EXCPT_IRQ_SYSC_L1=y
323CONFIG_DO_IRQ_L1=y
324CONFIG_CORE_TIMER_IRQ_L1=y
325CONFIG_IDLE_L1=y
326# CONFIG_SCHEDULE_L1 is not set
327CONFIG_ARITHMETIC_OPS_L1=y
328CONFIG_ACCESS_OK_L1=y
329# CONFIG_MEMSET_L1 is not set
330# CONFIG_MEMCPY_L1 is not set
331# CONFIG_SYS_BFIN_SPINLOCK_L1 is not set
332# CONFIG_IP_CHECKSUM_L1 is not set
333CONFIG_CACHELINE_ALIGNED_L1=y
334# CONFIG_SYSCALL_TAB_L1 is not set
335# CONFIG_CPLB_SWITCH_TAB_L1 is not set
336CONFIG_APP_STACK_L1=y
337
338#
339# Speed Optimizations
340#
341CONFIG_BFIN_INS_LOWOVERHEAD=y
342CONFIG_RAMKERNEL=y
343# CONFIG_ROMKERNEL is not set
344CONFIG_SELECT_MEMORY_MODEL=y
345CONFIG_FLATMEM_MANUAL=y
346# CONFIG_DISCONTIGMEM_MANUAL is not set
347# CONFIG_SPARSEMEM_MANUAL is not set
348CONFIG_FLATMEM=y
349CONFIG_FLAT_NODE_MEM_MAP=y
350CONFIG_PAGEFLAGS_EXTENDED=y
351CONFIG_SPLIT_PTLOCK_CPUS=4
352# CONFIG_PHYS_ADDR_T_64BIT is not set
353CONFIG_ZONE_DMA_FLAG=1
354CONFIG_VIRT_TO_BUS=y
355CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0
356CONFIG_BFIN_GPTIMERS=m
357# CONFIG_DMA_UNCACHED_4M is not set
358# CONFIG_DMA_UNCACHED_2M is not set
359CONFIG_DMA_UNCACHED_1M=y
360# CONFIG_DMA_UNCACHED_512K is not set
361# CONFIG_DMA_UNCACHED_256K is not set
362# CONFIG_DMA_UNCACHED_128K is not set
363# CONFIG_DMA_UNCACHED_NONE is not set
364
365#
366# Cache Support
367#
368CONFIG_BFIN_ICACHE=y
369CONFIG_BFIN_EXTMEM_ICACHEABLE=y
370CONFIG_BFIN_DCACHE=y
371# CONFIG_BFIN_DCACHE_BANKA is not set
372CONFIG_BFIN_EXTMEM_DCACHEABLE=y
373CONFIG_BFIN_EXTMEM_WRITEBACK=y
374# CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set
375
376#
377# Memory Protection Unit
378#
379# CONFIG_MPU is not set
380
381#
382# Asynchronous Memory Configuration
383#
384
385#
386# EBIU_AMGCTL Global Control
387#
388CONFIG_C_AMCKEN=y
389CONFIG_C_CDPRIO=y
390# CONFIG_C_AMBEN is not set
391# CONFIG_C_AMBEN_B0 is not set
392# CONFIG_C_AMBEN_B0_B1 is not set
393# CONFIG_C_AMBEN_B0_B1_B2 is not set
394CONFIG_C_AMBEN_ALL=y
395
396#
397# EBIU_AMBCTL Control
398#
399CONFIG_BANK_0=0x7BB0
400CONFIG_BANK_1=0x7BB0
401CONFIG_BANK_2=0x7BB0
402CONFIG_BANK_3=0x99B2
403
404#
405# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
406#
407# CONFIG_ARCH_SUPPORTS_MSI is not set
408# CONFIG_PCCARD is not set
409
410#
411# Executable file formats
412#
413CONFIG_BINFMT_ELF_FDPIC=y
414CONFIG_BINFMT_FLAT=y
415CONFIG_BINFMT_ZFLAT=y
416# CONFIG_BINFMT_SHARED_FLAT is not set
417# CONFIG_HAVE_AOUT is not set
418# CONFIG_BINFMT_MISC is not set
419
420#
421# Power management options
422#
423# CONFIG_PM is not set
424CONFIG_ARCH_SUSPEND_POSSIBLE=y
425
426#
427# CPU Frequency scaling
428#
429# CONFIG_CPU_FREQ is not set
430CONFIG_NET=y
431
432#
433# Networking options
434#
435CONFIG_PACKET=y
436# CONFIG_PACKET_MMAP is not set
437CONFIG_UNIX=y
438# CONFIG_NET_KEY is not set
439CONFIG_INET=y
440# CONFIG_IP_MULTICAST is not set
441# CONFIG_IP_ADVANCED_ROUTER is not set
442CONFIG_IP_FIB_HASH=y
443CONFIG_IP_PNP=y
444# CONFIG_IP_PNP_DHCP is not set
445# CONFIG_IP_PNP_BOOTP is not set
446# CONFIG_IP_PNP_RARP is not set
447# CONFIG_NET_IPIP is not set
448# CONFIG_NET_IPGRE is not set
449# CONFIG_ARPD is not set
450# CONFIG_SYN_COOKIES is not set
451# CONFIG_INET_AH is not set
452# CONFIG_INET_ESP is not set
453# CONFIG_INET_IPCOMP is not set
454# CONFIG_INET_XFRM_TUNNEL is not set
455# CONFIG_INET_TUNNEL is not set
456# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
457# CONFIG_INET_XFRM_MODE_TUNNEL is not set
458# CONFIG_INET_XFRM_MODE_BEET is not set
459# CONFIG_INET_LRO is not set
460# CONFIG_INET_DIAG is not set
461# CONFIG_TCP_CONG_ADVANCED is not set
462CONFIG_TCP_CONG_CUBIC=y
463CONFIG_DEFAULT_TCP_CONG="cubic"
464# CONFIG_TCP_MD5SIG is not set
465# CONFIG_IPV6 is not set
466# CONFIG_NETLABEL is not set
467# CONFIG_NETWORK_SECMARK is not set
468# CONFIG_NETFILTER is not set
469# CONFIG_IP_DCCP is not set
470# CONFIG_IP_SCTP is not set
471# CONFIG_RDS is not set
472# CONFIG_TIPC is not set
473# CONFIG_ATM is not set
474# CONFIG_BRIDGE is not set
475# CONFIG_NET_DSA is not set
476# CONFIG_VLAN_8021Q is not set
477# CONFIG_DECNET is not set
478# CONFIG_LLC2 is not set
479# CONFIG_IPX is not set
480# CONFIG_ATALK is not set
481# CONFIG_X25 is not set
482# CONFIG_LAPB is not set
483# CONFIG_ECONET is not set
484# CONFIG_WAN_ROUTER is not set
485# CONFIG_PHONET is not set
486# CONFIG_IEEE802154 is not set
487# CONFIG_NET_SCHED is not set
488# CONFIG_DCB is not set
489
490#
491# Network testing
492#
493# CONFIG_NET_PKTGEN is not set
494# CONFIG_HAMRADIO is not set
495# CONFIG_CAN is not set
496# CONFIG_IRDA is not set
497# CONFIG_BT is not set
498# CONFIG_AF_RXRPC is not set
499# CONFIG_WIRELESS is not set
500# CONFIG_WIMAX is not set
501# CONFIG_RFKILL is not set
502# CONFIG_NET_9P is not set
503
504#
505# Device Drivers
506#
507
508#
509# Generic Driver Options
510#
511CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
512CONFIG_STANDALONE=y
513CONFIG_PREVENT_FIRMWARE_BUILD=y
514# CONFIG_FW_LOADER is not set
515# CONFIG_DEBUG_DRIVER is not set
516# CONFIG_DEBUG_DEVRES is not set
517# CONFIG_SYS_HYPERVISOR is not set
518# CONFIG_CONNECTOR is not set
519CONFIG_MTD=y
520# CONFIG_MTD_DEBUG is not set
521# CONFIG_MTD_TESTS is not set
522# CONFIG_MTD_CONCAT is not set
523CONFIG_MTD_PARTITIONS=y
524# CONFIG_MTD_REDBOOT_PARTS is not set
525CONFIG_MTD_CMDLINE_PARTS=y
526# CONFIG_MTD_AR7_PARTS is not set
527
528#
529# User Modules And Translation Layers
530#
531CONFIG_MTD_CHAR=y
532CONFIG_MTD_BLKDEVS=y
533CONFIG_MTD_BLOCK=y
534# CONFIG_FTL is not set
535# CONFIG_NFTL is not set
536# CONFIG_INFTL is not set
537# CONFIG_RFD_FTL is not set
538# CONFIG_SSFDC is not set
539# CONFIG_MTD_OOPS is not set
540
541#
542# RAM/ROM/Flash chip drivers
543#
544CONFIG_MTD_CFI=y
545# CONFIG_MTD_JEDECPROBE is not set
546CONFIG_MTD_GEN_PROBE=y
547CONFIG_MTD_CFI_ADV_OPTIONS=y
548CONFIG_MTD_CFI_NOSWAP=y
549# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
550# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
551CONFIG_MTD_CFI_GEOMETRY=y
552# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
553CONFIG_MTD_MAP_BANK_WIDTH_2=y
554# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
555# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
556# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
557# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
558CONFIG_MTD_CFI_I1=y
559# CONFIG_MTD_CFI_I2 is not set
560# CONFIG_MTD_CFI_I4 is not set
561# CONFIG_MTD_CFI_I8 is not set
562# CONFIG_MTD_OTP is not set
563CONFIG_MTD_CFI_INTELEXT=y
564# CONFIG_MTD_CFI_AMDSTD is not set
565# CONFIG_MTD_CFI_STAA is not set
566CONFIG_MTD_CFI_UTIL=y
567CONFIG_MTD_RAM=y
568CONFIG_MTD_ROM=m
569# CONFIG_MTD_ABSENT is not set
570
571#
572# Mapping drivers for chip access
573#
574# CONFIG_MTD_COMPLEX_MAPPINGS is not set
575CONFIG_MTD_PHYSMAP=y
576# CONFIG_MTD_PHYSMAP_COMPAT is not set
577# CONFIG_MTD_UCLINUX is not set
578# CONFIG_MTD_PLATRAM is not set
579
580#
581# Self-contained MTD device drivers
582#
583# CONFIG_MTD_DATAFLASH is not set
584# CONFIG_MTD_M25P80 is not set
585# CONFIG_MTD_SST25L is not set
586# CONFIG_MTD_SLRAM is not set
587# CONFIG_MTD_PHRAM is not set
588# CONFIG_MTD_MTDRAM is not set
589# CONFIG_MTD_BLOCK2MTD is not set
590
591#
592# Disk-On-Chip Device Drivers
593#
594# CONFIG_MTD_DOC2000 is not set
595# CONFIG_MTD_DOC2001 is not set
596# CONFIG_MTD_DOC2001PLUS is not set
597# CONFIG_MTD_NAND is not set
598# CONFIG_MTD_ONENAND is not set
599
600#
601# LPDDR flash memory drivers
602#
603# CONFIG_MTD_LPDDR is not set
604
605#
606# UBI - Unsorted block images
607#
608# CONFIG_MTD_UBI is not set
609# CONFIG_PARPORT is not set
610CONFIG_BLK_DEV=y
611# CONFIG_BLK_DEV_COW_COMMON is not set
612# CONFIG_BLK_DEV_LOOP is not set
613# CONFIG_BLK_DEV_NBD is not set
614CONFIG_BLK_DEV_RAM=y
615CONFIG_BLK_DEV_RAM_COUNT=16
616CONFIG_BLK_DEV_RAM_SIZE=4096
617# CONFIG_BLK_DEV_XIP is not set
618# CONFIG_CDROM_PKTCDVD is not set
619# CONFIG_ATA_OVER_ETH is not set
620# CONFIG_BLK_DEV_HD is not set
621CONFIG_MISC_DEVICES=y
622# CONFIG_AD525X_DPOT is not set
623# CONFIG_ICS932S401 is not set
624# CONFIG_ENCLOSURE_SERVICES is not set
625# CONFIG_ISL29003 is not set
626# CONFIG_C2PORT is not set
627
628#
629# EEPROM support
630#
631# CONFIG_EEPROM_AT24 is not set
632# CONFIG_EEPROM_AT25 is not set
633# CONFIG_EEPROM_LEGACY is not set
634# CONFIG_EEPROM_MAX6875 is not set
635# CONFIG_EEPROM_93CX6 is not set
636CONFIG_HAVE_IDE=y
637# CONFIG_IDE is not set
638
639#
640# SCSI device support
641#
642# CONFIG_RAID_ATTRS is not set
643# CONFIG_SCSI is not set
644# CONFIG_SCSI_DMA is not set
645# CONFIG_SCSI_NETLINK is not set
646# CONFIG_ATA is not set
647# CONFIG_MD is not set
648CONFIG_NETDEVICES=y
649# CONFIG_DUMMY is not set
650# CONFIG_BONDING is not set
651# CONFIG_MACVLAN is not set
652# CONFIG_EQUALIZER is not set
653# CONFIG_TUN is not set
654# CONFIG_VETH is not set
655CONFIG_PHYLIB=y
656
657#
658# MII PHY device drivers
659#
660# CONFIG_MARVELL_PHY is not set
661# CONFIG_DAVICOM_PHY is not set
662# CONFIG_QSEMI_PHY is not set
663# CONFIG_LXT_PHY is not set
664# CONFIG_CICADA_PHY is not set
665# CONFIG_VITESSE_PHY is not set
666# CONFIG_SMSC_PHY is not set
667# CONFIG_BROADCOM_PHY is not set
668# CONFIG_ICPLUS_PHY is not set
669# CONFIG_REALTEK_PHY is not set
670# CONFIG_NATIONAL_PHY is not set
671# CONFIG_STE10XP is not set
672# CONFIG_LSI_ET1011C_PHY is not set
673# CONFIG_FIXED_PHY is not set
674# CONFIG_MDIO_BITBANG is not set
675CONFIG_NET_ETHERNET=y
676CONFIG_MII=y
677CONFIG_BFIN_MAC=y
678CONFIG_BFIN_TX_DESC_NUM=10
679CONFIG_BFIN_RX_DESC_NUM=20
680# CONFIG_BFIN_MAC_RMII is not set
681CONFIG_BFIN_MAC_USE_HWSTAMP=y
682# CONFIG_SMC91X is not set
683# CONFIG_DM9000 is not set
684# CONFIG_ENC28J60 is not set
685# CONFIG_ETHOC is not set
686# CONFIG_SMSC911X is not set
687# CONFIG_DNET is not set
688# CONFIG_ADF702X is not set
689# CONFIG_IBM_NEW_EMAC_ZMII is not set
690# CONFIG_IBM_NEW_EMAC_RGMII is not set
691# CONFIG_IBM_NEW_EMAC_TAH is not set
692# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
693# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
694# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
695# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
696# CONFIG_B44 is not set
697# CONFIG_KS8842 is not set
698# CONFIG_KS8851 is not set
699# CONFIG_KS8851_MLL is not set
700# CONFIG_NETDEV_1000 is not set
701# CONFIG_NETDEV_10000 is not set
702# CONFIG_WLAN is not set
703
704#
705# Enable WiMAX (Networking options) to see the WiMAX drivers
706#
707# CONFIG_WAN is not set
708# CONFIG_PPP is not set
709# CONFIG_SLIP is not set
710# CONFIG_NETCONSOLE is not set
711# CONFIG_NETPOLL is not set
712# CONFIG_NET_POLL_CONTROLLER is not set
713# CONFIG_ISDN is not set
714# CONFIG_PHONE is not set
715
716#
717# Input device support
718#
719CONFIG_INPUT=y
720# CONFIG_INPUT_FF_MEMLESS is not set
721# CONFIG_INPUT_POLLDEV is not set
722
723#
724# Userland interfaces
725#
726# CONFIG_INPUT_MOUSEDEV is not set
727# CONFIG_INPUT_JOYDEV is not set
728# CONFIG_INPUT_EVDEV is not set
729# CONFIG_INPUT_EVBUG is not set
730
731#
732# Input Device Drivers
733#
734# CONFIG_INPUT_KEYBOARD is not set
735# CONFIG_INPUT_MOUSE is not set
736# CONFIG_INPUT_JOYSTICK is not set
737# CONFIG_INPUT_TABLET is not set
738# CONFIG_INPUT_TOUCHSCREEN is not set
739CONFIG_INPUT_MISC=y
740# CONFIG_INPUT_UINPUT is not set
741# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
742# CONFIG_INPUT_AD714X is not set
743# CONFIG_INPUT_ADXL34X is not set
744# CONFIG_INPUT_PCF8574 is not set
745
746#
747# Hardware I/O ports
748#
749# CONFIG_SERIO is not set
750# CONFIG_GAMEPORT is not set
751
752#
753# Character devices
754#
755CONFIG_BFIN_DMA_INTERFACE=m
756# CONFIG_BFIN_PPI is not set
757# CONFIG_BFIN_PPIFCD is not set
758# CONFIG_BFIN_SIMPLE_TIMER is not set
759# CONFIG_BFIN_SPI_ADC is not set
760# CONFIG_BFIN_SPORT is not set
761# CONFIG_BFIN_TWI_LCD is not set
762CONFIG_VT=y
763CONFIG_CONSOLE_TRANSLATIONS=y
764CONFIG_VT_CONSOLE=y
765CONFIG_HW_CONSOLE=y
766# CONFIG_VT_HW_CONSOLE_BINDING is not set
767# CONFIG_DEVKMEM is not set
768CONFIG_BFIN_JTAG_COMM=m
769# CONFIG_SERIAL_NONSTANDARD is not set
770
771#
772# Serial drivers
773#
774# CONFIG_SERIAL_8250 is not set
775
776#
777# Non-8250 serial port support
778#
779# CONFIG_SERIAL_MAX3100 is not set
780CONFIG_SERIAL_BFIN=y
781CONFIG_SERIAL_BFIN_CONSOLE=y
782CONFIG_SERIAL_BFIN_DMA=y
783# CONFIG_SERIAL_BFIN_PIO is not set
784CONFIG_SERIAL_BFIN_UART0=y
785# CONFIG_BFIN_UART0_CTSRTS is not set
786# CONFIG_SERIAL_BFIN_UART1 is not set
787CONFIG_SERIAL_CORE=y
788CONFIG_SERIAL_CORE_CONSOLE=y
789# CONFIG_SERIAL_BFIN_SPORT is not set
790CONFIG_UNIX98_PTYS=y
791# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
792# CONFIG_LEGACY_PTYS is not set
793CONFIG_BFIN_OTP=y
794# CONFIG_BFIN_OTP_WRITE_ENABLE is not set
795# CONFIG_IPMI_HANDLER is not set
796# CONFIG_HW_RANDOM is not set
797# CONFIG_R3964 is not set
798# CONFIG_RAW_DRIVER is not set
799# CONFIG_TCG_TPM is not set
800CONFIG_I2C=y
801CONFIG_I2C_BOARDINFO=y
802CONFIG_I2C_COMPAT=y
803CONFIG_I2C_CHARDEV=y
804CONFIG_I2C_HELPER_AUTO=y
805
806#
807# I2C Hardware Bus support
808#
809
810#
811# I2C system bus drivers (mostly embedded / system-on-chip)
812#
813CONFIG_I2C_BLACKFIN_TWI=y
814CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
815# CONFIG_I2C_GPIO is not set
816# CONFIG_I2C_OCORES is not set
817# CONFIG_I2C_SIMTEC is not set
818
819#
820# External I2C/SMBus adapter drivers
821#
822# CONFIG_I2C_PARPORT_LIGHT is not set
823# CONFIG_I2C_TAOS_EVM is not set
824
825#
826# Other I2C/SMBus bus drivers
827#
828# CONFIG_I2C_PCA_PLATFORM is not set
829# CONFIG_I2C_STUB is not set
830
831#
832# Miscellaneous I2C Chip support
833#
834# CONFIG_DS1682 is not set
835# CONFIG_SENSORS_TSL2550 is not set
836# CONFIG_I2C_DEBUG_CORE is not set
837# CONFIG_I2C_DEBUG_ALGO is not set
838# CONFIG_I2C_DEBUG_BUS is not set
839# CONFIG_I2C_DEBUG_CHIP is not set
840CONFIG_SPI=y
841# CONFIG_SPI_DEBUG is not set
842CONFIG_SPI_MASTER=y
843
844#
845# SPI Master Controller Drivers
846#
847CONFIG_SPI_BFIN=y
848CONFIG_SPI_BFIN_LOCK=y
849# CONFIG_SPI_BFIN_SPORT is not set
850# CONFIG_SPI_BITBANG is not set
851# CONFIG_SPI_GPIO is not set
852
853#
854# SPI Protocol Masters
855#
856# CONFIG_SPI_SPIDEV is not set
857# CONFIG_SPI_TLE62X0 is not set
858
859#
860# PPS support
861#
862# CONFIG_PPS is not set
863CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
864CONFIG_GPIOLIB=y
865# CONFIG_DEBUG_GPIO is not set
866CONFIG_GPIO_SYSFS=y
867
868#
869# Memory mapped GPIO expanders:
870#
871
872#
873# I2C GPIO expanders:
874#
875# CONFIG_GPIO_MAX732X is not set
876# CONFIG_GPIO_PCA953X is not set
877# CONFIG_GPIO_PCF857X is not set
878# CONFIG_GPIO_ADP5588 is not set
879
880#
881# PCI GPIO expanders:
882#
883
884#
885# SPI GPIO expanders:
886#
887# CONFIG_GPIO_MAX7301 is not set
888# CONFIG_GPIO_MCP23S08 is not set
889# CONFIG_GPIO_MC33880 is not set
890
891#
892# AC97 GPIO expanders:
893#
894# CONFIG_W1 is not set
895# CONFIG_POWER_SUPPLY is not set
896# CONFIG_HWMON is not set
897# CONFIG_THERMAL is not set
898CONFIG_WATCHDOG=y
899# CONFIG_WATCHDOG_NOWAYOUT is not set
900
901#
902# Watchdog Device Drivers
903#
904# CONFIG_SOFT_WATCHDOG is not set
905CONFIG_BFIN_WDT=y
906CONFIG_SSB_POSSIBLE=y
907
908#
909# Sonics Silicon Backplane
910#
911# CONFIG_SSB is not set
912
913#
914# Multifunction device drivers
915#
916# CONFIG_MFD_CORE is not set
917# CONFIG_MFD_SM501 is not set
918# CONFIG_HTC_PASIC3 is not set
919# CONFIG_TPS65010 is not set
920# CONFIG_TWL4030_CORE is not set
921# CONFIG_MFD_TMIO is not set
922# CONFIG_PMIC_DA903X is not set
923# CONFIG_PMIC_ADP5520 is not set
924# CONFIG_MFD_WM8400 is not set
925# CONFIG_MFD_WM831X is not set
926# CONFIG_MFD_WM8350_I2C is not set
927# CONFIG_MFD_PCF50633 is not set
928# CONFIG_MFD_MC13783 is not set
929# CONFIG_AB3100_CORE is not set
930# CONFIG_EZX_PCAP is not set
931# CONFIG_REGULATOR is not set
932# CONFIG_MEDIA_SUPPORT is not set
933
934#
935# Graphics support
936#
937# CONFIG_VGASTATE is not set
938# CONFIG_VIDEO_OUTPUT_CONTROL is not set
939# CONFIG_FB is not set
940# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
941
942#
943# Display device support
944#
945# CONFIG_DISPLAY_SUPPORT is not set
946
947#
948# Console display driver support
949#
950CONFIG_DUMMY_CONSOLE=y
951# CONFIG_SOUND is not set
952# CONFIG_HID_SUPPORT is not set
953# CONFIG_USB_SUPPORT is not set
954CONFIG_MMC=y
955CONFIG_MMC_DEBUG=y
956# CONFIG_MMC_UNSAFE_RESUME is not set
957
958#
959# MMC/SD/SDIO Card Drivers
960#
961CONFIG_MMC_BLOCK=y
962CONFIG_MMC_BLOCK_BOUNCE=y
963# CONFIG_SDIO_UART is not set
964# CONFIG_MMC_TEST is not set
965
966#
967# MMC/SD/SDIO Host Controller Drivers
968#
969# CONFIG_MMC_SDHCI is not set
970# CONFIG_MMC_AT91 is not set
971# CONFIG_MMC_ATMELMCI is not set
972CONFIG_MMC_SPI=y
973# CONFIG_SDH_BFIN is not set
974# CONFIG_MEMSTICK is not set
975# CONFIG_NEW_LEDS is not set
976# CONFIG_ACCESSIBILITY is not set
977CONFIG_RTC_LIB=y
978CONFIG_RTC_CLASS=y
979CONFIG_RTC_HCTOSYS=y
980CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
981# CONFIG_RTC_DEBUG is not set
982
983#
984# RTC interfaces
985#
986CONFIG_RTC_INTF_SYSFS=y
987CONFIG_RTC_INTF_PROC=y
988CONFIG_RTC_INTF_DEV=y
989# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
990# CONFIG_RTC_DRV_TEST is not set
991
992#
993# I2C RTC drivers
994#
995# CONFIG_RTC_DRV_DS1307 is not set
996# CONFIG_RTC_DRV_DS1374 is not set
997# CONFIG_RTC_DRV_DS1672 is not set
998# CONFIG_RTC_DRV_MAX6900 is not set
999# CONFIG_RTC_DRV_RS5C372 is not set
1000# CONFIG_RTC_DRV_ISL1208 is not set
1001# CONFIG_RTC_DRV_X1205 is not set
1002# CONFIG_RTC_DRV_PCF8563 is not set
1003# CONFIG_RTC_DRV_PCF8583 is not set
1004# CONFIG_RTC_DRV_M41T80 is not set
1005# CONFIG_RTC_DRV_S35390A is not set
1006# CONFIG_RTC_DRV_FM3130 is not set
1007# CONFIG_RTC_DRV_RX8581 is not set
1008# CONFIG_RTC_DRV_RX8025 is not set
1009
1010#
1011# SPI RTC drivers
1012#
1013# CONFIG_RTC_DRV_M41T94 is not set
1014# CONFIG_RTC_DRV_DS1305 is not set
1015# CONFIG_RTC_DRV_DS1390 is not set
1016# CONFIG_RTC_DRV_MAX6902 is not set
1017# CONFIG_RTC_DRV_R9701 is not set
1018# CONFIG_RTC_DRV_RS5C348 is not set
1019# CONFIG_RTC_DRV_DS3234 is not set
1020# CONFIG_RTC_DRV_PCF2123 is not set
1021
1022#
1023# Platform RTC drivers
1024#
1025# CONFIG_RTC_DRV_DS1286 is not set
1026# CONFIG_RTC_DRV_DS1511 is not set
1027# CONFIG_RTC_DRV_DS1553 is not set
1028# CONFIG_RTC_DRV_DS1742 is not set
1029# CONFIG_RTC_DRV_STK17TA8 is not set
1030# CONFIG_RTC_DRV_M48T86 is not set
1031# CONFIG_RTC_DRV_M48T35 is not set
1032# CONFIG_RTC_DRV_M48T59 is not set
1033# CONFIG_RTC_DRV_BQ4802 is not set
1034# CONFIG_RTC_DRV_V3020 is not set
1035
1036#
1037# on-CPU RTC drivers
1038#
1039CONFIG_RTC_DRV_BFIN=y
1040# CONFIG_DMADEVICES is not set
1041# CONFIG_AUXDISPLAY is not set
1042# CONFIG_UIO is not set
1043
1044#
1045# TI VLYNQ
1046#
1047# CONFIG_STAGING is not set
1048
1049#
1050# Firmware Drivers
1051#
1052# CONFIG_FIRMWARE_MEMMAP is not set
1053# CONFIG_SIGMA is not set
1054
1055#
1056# File systems
1057#
1058CONFIG_EXT2_FS=y
1059# CONFIG_EXT2_FS_XATTR is not set
1060# CONFIG_EXT3_FS is not set
1061# CONFIG_EXT4_FS is not set
1062# CONFIG_REISERFS_FS is not set
1063# CONFIG_JFS_FS is not set
1064# CONFIG_FS_POSIX_ACL is not set
1065# CONFIG_XFS_FS is not set
1066# CONFIG_OCFS2_FS is not set
1067# CONFIG_BTRFS_FS is not set
1068# CONFIG_NILFS2_FS is not set
1069CONFIG_FILE_LOCKING=y
1070CONFIG_FSNOTIFY=y
1071# CONFIG_DNOTIFY is not set
1072CONFIG_INOTIFY=y
1073CONFIG_INOTIFY_USER=y
1074# CONFIG_QUOTA is not set
1075# CONFIG_AUTOFS_FS is not set
1076# CONFIG_AUTOFS4_FS is not set
1077# CONFIG_FUSE_FS is not set
1078
1079#
1080# Caches
1081#
1082# CONFIG_FSCACHE is not set
1083
1084#
1085# CD-ROM/DVD Filesystems
1086#
1087# CONFIG_ISO9660_FS is not set
1088# CONFIG_UDF_FS is not set
1089
1090#
1091# DOS/FAT/NT Filesystems
1092#
1093CONFIG_FAT_FS=m
1094# CONFIG_MSDOS_FS is not set
1095CONFIG_VFAT_FS=m
1096CONFIG_FAT_DEFAULT_CODEPAGE=437
1097CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1098# CONFIG_NTFS_FS is not set
1099
1100#
1101# Pseudo filesystems
1102#
1103CONFIG_PROC_FS=y
1104CONFIG_PROC_SYSCTL=y
1105CONFIG_SYSFS=y
1106# CONFIG_HUGETLB_PAGE is not set
1107# CONFIG_CONFIGFS_FS is not set
1108# CONFIG_MISC_FILESYSTEMS is not set
1109CONFIG_NETWORK_FILESYSTEMS=y
1110CONFIG_NFS_FS=y
1111CONFIG_NFS_V3=y
1112# CONFIG_NFS_V3_ACL is not set
1113# CONFIG_NFS_V4 is not set
1114CONFIG_ROOT_NFS=y
1115# CONFIG_NFSD is not set
1116CONFIG_LOCKD=y
1117CONFIG_LOCKD_V4=y
1118CONFIG_NFS_COMMON=y
1119CONFIG_SUNRPC=y
1120# CONFIG_RPCSEC_GSS_KRB5 is not set
1121# CONFIG_RPCSEC_GSS_SPKM3 is not set
1122# CONFIG_SMB_FS is not set
1123# CONFIG_CIFS is not set
1124# CONFIG_NCP_FS is not set
1125# CONFIG_CODA_FS is not set
1126# CONFIG_AFS_FS is not set
1127
1128#
1129# Partition Types
1130#
1131# CONFIG_PARTITION_ADVANCED is not set
1132CONFIG_MSDOS_PARTITION=y
1133CONFIG_NLS=m
1134CONFIG_NLS_DEFAULT="iso8859-1"
1135CONFIG_NLS_CODEPAGE_437=m
1136# CONFIG_NLS_CODEPAGE_737 is not set
1137# CONFIG_NLS_CODEPAGE_775 is not set
1138# CONFIG_NLS_CODEPAGE_850 is not set
1139# CONFIG_NLS_CODEPAGE_852 is not set
1140# CONFIG_NLS_CODEPAGE_855 is not set
1141# CONFIG_NLS_CODEPAGE_857 is not set
1142# CONFIG_NLS_CODEPAGE_860 is not set
1143# CONFIG_NLS_CODEPAGE_861 is not set
1144# CONFIG_NLS_CODEPAGE_862 is not set
1145# CONFIG_NLS_CODEPAGE_863 is not set
1146# CONFIG_NLS_CODEPAGE_864 is not set
1147# CONFIG_NLS_CODEPAGE_865 is not set
1148# CONFIG_NLS_CODEPAGE_866 is not set
1149# CONFIG_NLS_CODEPAGE_869 is not set
1150# CONFIG_NLS_CODEPAGE_936 is not set
1151# CONFIG_NLS_CODEPAGE_950 is not set
1152# CONFIG_NLS_CODEPAGE_932 is not set
1153# CONFIG_NLS_CODEPAGE_949 is not set
1154# CONFIG_NLS_CODEPAGE_874 is not set
1155# CONFIG_NLS_ISO8859_8 is not set
1156# CONFIG_NLS_CODEPAGE_1250 is not set
1157# CONFIG_NLS_CODEPAGE_1251 is not set
1158# CONFIG_NLS_ASCII is not set
1159CONFIG_NLS_ISO8859_1=m
1160# CONFIG_NLS_ISO8859_2 is not set
1161# CONFIG_NLS_ISO8859_3 is not set
1162# CONFIG_NLS_ISO8859_4 is not set
1163# CONFIG_NLS_ISO8859_5 is not set
1164# CONFIG_NLS_ISO8859_6 is not set
1165# CONFIG_NLS_ISO8859_7 is not set
1166# CONFIG_NLS_ISO8859_9 is not set
1167# CONFIG_NLS_ISO8859_13 is not set
1168# CONFIG_NLS_ISO8859_14 is not set
1169# CONFIG_NLS_ISO8859_15 is not set
1170# CONFIG_NLS_KOI8_R is not set
1171# CONFIG_NLS_KOI8_U is not set
1172CONFIG_NLS_UTF8=m
1173# CONFIG_DLM is not set
1174
1175#
1176# Kernel hacking
1177#
1178# CONFIG_PRINTK_TIME is not set
1179CONFIG_ENABLE_WARN_DEPRECATED=y
1180CONFIG_ENABLE_MUST_CHECK=y
1181CONFIG_FRAME_WARN=1024
1182# CONFIG_MAGIC_SYSRQ is not set
1183# CONFIG_STRIP_ASM_SYMS is not set
1184# CONFIG_UNUSED_SYMBOLS is not set
1185CONFIG_DEBUG_FS=y
1186# CONFIG_HEADERS_CHECK is not set
1187CONFIG_DEBUG_SECTION_MISMATCH=y
1188CONFIG_DEBUG_KERNEL=y
1189CONFIG_DEBUG_SHIRQ=y
1190CONFIG_DETECT_SOFTLOCKUP=y
1191# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
1192CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
1193CONFIG_DETECT_HUNG_TASK=y
1194# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
1195CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
1196CONFIG_SCHED_DEBUG=y
1197# CONFIG_SCHEDSTATS is not set
1198# CONFIG_TIMER_STATS is not set
1199# CONFIG_DEBUG_OBJECTS is not set
1200# CONFIG_DEBUG_SLAB is not set
1201# CONFIG_DEBUG_SPINLOCK is not set
1202# CONFIG_DEBUG_MUTEXES is not set
1203# CONFIG_DEBUG_LOCK_ALLOC is not set
1204# CONFIG_PROVE_LOCKING is not set
1205# CONFIG_LOCK_STAT is not set
1206# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1207# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1208# CONFIG_DEBUG_KOBJECT is not set
1209CONFIG_DEBUG_BUGVERBOSE=y
1210CONFIG_DEBUG_INFO=y
1211# CONFIG_DEBUG_VM is not set
1212# CONFIG_DEBUG_NOMMU_REGIONS is not set
1213# CONFIG_DEBUG_WRITECOUNT is not set
1214# CONFIG_DEBUG_MEMORY_INIT is not set
1215# CONFIG_DEBUG_LIST is not set
1216# CONFIG_DEBUG_SG is not set
1217# CONFIG_DEBUG_NOTIFIERS is not set
1218# CONFIG_DEBUG_CREDENTIALS is not set
1219# CONFIG_FRAME_POINTER is not set
1220# CONFIG_BOOT_PRINTK_DELAY is not set
1221# CONFIG_RCU_TORTURE_TEST is not set
1222# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1223# CONFIG_BACKTRACE_SELF_TEST is not set
1224# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1225# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
1226# CONFIG_FAULT_INJECTION is not set
1227# CONFIG_PAGE_POISONING is not set
1228CONFIG_HAVE_FUNCTION_TRACER=y
1229CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
1230CONFIG_TRACING_SUPPORT=y
1231# CONFIG_FTRACE is not set
1232# CONFIG_DYNAMIC_DEBUG is not set
1233# CONFIG_SAMPLES is not set
1234CONFIG_HAVE_ARCH_KGDB=y
1235# CONFIG_KGDB is not set
1236# CONFIG_DEBUG_STACKOVERFLOW is not set
1237# CONFIG_DEBUG_STACK_USAGE is not set
1238CONFIG_DEBUG_VERBOSE=y
1239CONFIG_DEBUG_MMRS=y
1240CONFIG_DEBUG_HWERR=y
1241CONFIG_EXACT_HWERR=y
1242CONFIG_DEBUG_DOUBLEFAULT=y
1243CONFIG_DEBUG_DOUBLEFAULT_PRINT=y
1244# CONFIG_DEBUG_DOUBLEFAULT_RESET is not set
1245# CONFIG_DEBUG_ICACHE_CHECK is not set
1246CONFIG_DEBUG_HUNT_FOR_ZERO=y
1247CONFIG_DEBUG_BFIN_HWTRACE_ON=y
1248# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF is not set
1249CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y
1250# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set
1251CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=1
1252# CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
1253CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y
1254CONFIG_EARLY_PRINTK=y
1255CONFIG_CPLB_INFO=y
1256CONFIG_ACCESS_CHECK=y
1257# CONFIG_BFIN_ISRAM_SELF_TEST is not set
1258
1259#
1260# Security options
1261#
1262# CONFIG_KEYS is not set
1263CONFIG_SECURITY=y
1264# CONFIG_SECURITYFS is not set
1265# CONFIG_SECURITY_NETWORK is not set
1266# CONFIG_SECURITY_PATH is not set
1267# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1268# CONFIG_SECURITY_TOMOYO is not set
1269CONFIG_CRYPTO=y
1270
1271#
1272# Crypto core or helper
1273#
1274# CONFIG_CRYPTO_MANAGER is not set
1275# CONFIG_CRYPTO_MANAGER2 is not set
1276# CONFIG_CRYPTO_GF128MUL is not set
1277# CONFIG_CRYPTO_NULL is not set
1278# CONFIG_CRYPTO_CRYPTD is not set
1279# CONFIG_CRYPTO_AUTHENC is not set
1280# CONFIG_CRYPTO_TEST is not set
1281
1282#
1283# Authenticated Encryption with Associated Data
1284#
1285# CONFIG_CRYPTO_CCM is not set
1286# CONFIG_CRYPTO_GCM is not set
1287# CONFIG_CRYPTO_SEQIV is not set
1288
1289#
1290# Block modes
1291#
1292# CONFIG_CRYPTO_CBC is not set
1293# CONFIG_CRYPTO_CTR is not set
1294# CONFIG_CRYPTO_CTS is not set
1295# CONFIG_CRYPTO_ECB is not set
1296# CONFIG_CRYPTO_LRW is not set
1297# CONFIG_CRYPTO_PCBC is not set
1298# CONFIG_CRYPTO_XTS is not set
1299
1300#
1301# Hash modes
1302#
1303# CONFIG_CRYPTO_HMAC is not set
1304# CONFIG_CRYPTO_XCBC is not set
1305# CONFIG_CRYPTO_VMAC is not set
1306
1307#
1308# Digest
1309#
1310# CONFIG_CRYPTO_CRC32C is not set
1311# CONFIG_CRYPTO_GHASH is not set
1312# CONFIG_CRYPTO_MD4 is not set
1313# CONFIG_CRYPTO_MD5 is not set
1314# CONFIG_CRYPTO_MICHAEL_MIC is not set
1315# CONFIG_CRYPTO_RMD128 is not set
1316# CONFIG_CRYPTO_RMD160 is not set
1317# CONFIG_CRYPTO_RMD256 is not set
1318# CONFIG_CRYPTO_RMD320 is not set
1319# CONFIG_CRYPTO_SHA1 is not set
1320# CONFIG_CRYPTO_SHA256 is not set
1321# CONFIG_CRYPTO_SHA512 is not set
1322# CONFIG_CRYPTO_TGR192 is not set
1323# CONFIG_CRYPTO_WP512 is not set
1324
1325#
1326# Ciphers
1327#
1328# CONFIG_CRYPTO_AES is not set
1329# CONFIG_CRYPTO_ANUBIS is not set
1330# CONFIG_CRYPTO_ARC4 is not set
1331# CONFIG_CRYPTO_BLOWFISH is not set
1332# CONFIG_CRYPTO_CAMELLIA is not set
1333# CONFIG_CRYPTO_CAST5 is not set
1334# CONFIG_CRYPTO_CAST6 is not set
1335# CONFIG_CRYPTO_DES is not set
1336# CONFIG_CRYPTO_FCRYPT is not set
1337# CONFIG_CRYPTO_KHAZAD is not set
1338# CONFIG_CRYPTO_SALSA20 is not set
1339# CONFIG_CRYPTO_SEED is not set
1340# CONFIG_CRYPTO_SERPENT is not set
1341# CONFIG_CRYPTO_TEA is not set
1342# CONFIG_CRYPTO_TWOFISH is not set
1343
1344#
1345# Compression
1346#
1347# CONFIG_CRYPTO_DEFLATE is not set
1348# CONFIG_CRYPTO_ZLIB is not set
1349# CONFIG_CRYPTO_LZO is not set
1350
1351#
1352# Random Number Generation
1353#
1354# CONFIG_CRYPTO_ANSI_CPRNG is not set
1355CONFIG_CRYPTO_HW=y
1356# CONFIG_BINARY_PRINTF is not set
1357
1358#
1359# Library routines
1360#
1361CONFIG_BITREVERSE=y
1362CONFIG_GENERIC_FIND_LAST_BIT=y
1363CONFIG_CRC_CCITT=m
1364# CONFIG_CRC16 is not set
1365# CONFIG_CRC_T10DIF is not set
1366CONFIG_CRC_ITU_T=y
1367CONFIG_CRC32=y
1368CONFIG_CRC7=y
1369# CONFIG_LIBCRC32C is not set
1370CONFIG_ZLIB_INFLATE=y
1371CONFIG_DECOMPRESS_LZMA=y
1372CONFIG_HAS_IOMEM=y
1373CONFIG_HAS_IOPORT=y
1374CONFIG_HAS_DMA=y
1375CONFIG_NLATTR=y
diff --git a/arch/blackfin/include/asm/bfin-global.h b/arch/blackfin/include/asm/bfin-global.h
index e6485c305ea6..121cc04d877d 100644
--- a/arch/blackfin/include/asm/bfin-global.h
+++ b/arch/blackfin/include/asm/bfin-global.h
@@ -39,9 +39,15 @@ extern unsigned long sclk_to_usecs(unsigned long sclk);
39extern unsigned long usecs_to_sclk(unsigned long usecs); 39extern unsigned long usecs_to_sclk(unsigned long usecs);
40 40
41struct pt_regs; 41struct pt_regs;
42#if defined(CONFIG_DEBUG_VERBOSE)
42extern void dump_bfin_process(struct pt_regs *regs); 43extern void dump_bfin_process(struct pt_regs *regs);
43extern void dump_bfin_mem(struct pt_regs *regs); 44extern void dump_bfin_mem(struct pt_regs *regs);
44extern void dump_bfin_trace_buffer(void); 45extern void dump_bfin_trace_buffer(void);
46#else
47#define dump_bfin_process(regs)
48#define dump_bfin_mem(regs)
49#define dump_bfin_trace_buffer()
50#endif
45 51
46/* init functions only */ 52/* init functions only */
47extern int init_arch_irq(void); 53extern int init_arch_irq(void);
diff --git a/arch/blackfin/include/asm/bfin-lq035q1.h b/arch/blackfin/include/asm/bfin-lq035q1.h
index 57bc21ac2296..836895156b5b 100644
--- a/arch/blackfin/include/asm/bfin-lq035q1.h
+++ b/arch/blackfin/include/asm/bfin-lq035q1.h
@@ -8,6 +8,9 @@
8#ifndef BFIN_LQ035Q1_H 8#ifndef BFIN_LQ035Q1_H
9#define BFIN_LQ035Q1_H 9#define BFIN_LQ035Q1_H
10 10
11/*
12 * LCD Modes
13 */
11#define LQ035_RL (0 << 8) /* Right -> Left Scan */ 14#define LQ035_RL (0 << 8) /* Right -> Left Scan */
12#define LQ035_LR (1 << 8) /* Left -> Right Scan */ 15#define LQ035_LR (1 << 8) /* Left -> Right Scan */
13#define LQ035_TB (1 << 9) /* Top -> Botton Scan */ 16#define LQ035_TB (1 << 9) /* Top -> Botton Scan */
@@ -17,9 +20,18 @@
17#define LQ035_NORM (1 << 13) /* Reversal */ 20#define LQ035_NORM (1 << 13) /* Reversal */
18#define LQ035_REV (0 << 13) /* Reversal */ 21#define LQ035_REV (0 << 13) /* Reversal */
19 22
23/*
24 * PPI Modes
25 */
26
27#define USE_RGB565_16_BIT_PPI 1
28#define USE_RGB565_8_BIT_PPI 2
29#define USE_RGB888_8_BIT_PPI 3
30
20struct bfin_lq035q1fb_disp_info { 31struct bfin_lq035q1fb_disp_info {
21 32
22 unsigned mode; 33 unsigned mode;
34 unsigned ppi_mode;
23 /* GPIOs */ 35 /* GPIOs */
24 int use_bl; 36 int use_bl;
25 unsigned gpio_bl; 37 unsigned gpio_bl;
diff --git a/arch/blackfin/include/asm/bfin_can.h b/arch/blackfin/include/asm/bfin_can.h
new file mode 100644
index 000000000000..eec0076a385b
--- /dev/null
+++ b/arch/blackfin/include/asm/bfin_can.h
@@ -0,0 +1,725 @@
1/*
2 * bfin_can.h - interface to Blackfin CANs
3 *
4 * Copyright 2004-2009 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9#ifndef __ASM_BFIN_CAN_H__
10#define __ASM_BFIN_CAN_H__
11
12/*
13 * transmit and receive channels
14 */
15#define TRANSMIT_CHL 24
16#define RECEIVE_STD_CHL 0
17#define RECEIVE_EXT_CHL 4
18#define RECEIVE_RTR_CHL 8
19#define RECEIVE_EXT_RTR_CHL 12
20#define MAX_CHL_NUMBER 32
21
22/*
23 * All Blackfin system MMRs are padded to 32bits even if the register
24 * itself is only 16bits. So use a helper macro to streamline this.
25 */
26#define __BFP(m) u16 m; u16 __pad_##m
27
28/*
29 * bfin can registers layout
30 */
31struct bfin_can_mask_regs {
32 __BFP(aml);
33 __BFP(amh);
34};
35
36struct bfin_can_channel_regs {
37 u16 data[8];
38 __BFP(dlc);
39 __BFP(tsv);
40 __BFP(id0);
41 __BFP(id1);
42};
43
44struct bfin_can_regs {
45 /*
46 * global control and status registers
47 */
48 __BFP(mc1); /* offset 0x00 */
49 __BFP(md1); /* offset 0x04 */
50 __BFP(trs1); /* offset 0x08 */
51 __BFP(trr1); /* offset 0x0c */
52 __BFP(ta1); /* offset 0x10 */
53 __BFP(aa1); /* offset 0x14 */
54 __BFP(rmp1); /* offset 0x18 */
55 __BFP(rml1); /* offset 0x1c */
56 __BFP(mbtif1); /* offset 0x20 */
57 __BFP(mbrif1); /* offset 0x24 */
58 __BFP(mbim1); /* offset 0x28 */
59 __BFP(rfh1); /* offset 0x2c */
60 __BFP(opss1); /* offset 0x30 */
61 u32 __pad1[3];
62 __BFP(mc2); /* offset 0x40 */
63 __BFP(md2); /* offset 0x44 */
64 __BFP(trs2); /* offset 0x48 */
65 __BFP(trr2); /* offset 0x4c */
66 __BFP(ta2); /* offset 0x50 */
67 __BFP(aa2); /* offset 0x54 */
68 __BFP(rmp2); /* offset 0x58 */
69 __BFP(rml2); /* offset 0x5c */
70 __BFP(mbtif2); /* offset 0x60 */
71 __BFP(mbrif2); /* offset 0x64 */
72 __BFP(mbim2); /* offset 0x68 */
73 __BFP(rfh2); /* offset 0x6c */
74 __BFP(opss2); /* offset 0x70 */
75 u32 __pad2[3];
76 __BFP(clock); /* offset 0x80 */
77 __BFP(timing); /* offset 0x84 */
78 __BFP(debug); /* offset 0x88 */
79 __BFP(status); /* offset 0x8c */
80 __BFP(cec); /* offset 0x90 */
81 __BFP(gis); /* offset 0x94 */
82 __BFP(gim); /* offset 0x98 */
83 __BFP(gif); /* offset 0x9c */
84 __BFP(control); /* offset 0xa0 */
85 __BFP(intr); /* offset 0xa4 */
86 u32 __pad3[1];
87 __BFP(mbtd); /* offset 0xac */
88 __BFP(ewr); /* offset 0xb0 */
89 __BFP(esr); /* offset 0xb4 */
90 u32 __pad4[2];
91 __BFP(ucreg); /* offset 0xc0 */
92 __BFP(uccnt); /* offset 0xc4 */
93 __BFP(ucrc); /* offset 0xc8 */
94 __BFP(uccnf); /* offset 0xcc */
95 u32 __pad5[12];
96
97 /*
98 * channel(mailbox) mask and message registers
99 */
100 struct bfin_can_mask_regs msk[MAX_CHL_NUMBER]; /* offset 0x100 */
101 struct bfin_can_channel_regs chl[MAX_CHL_NUMBER]; /* offset 0x200 */
102};
103
104#undef __BFP
105
106/* CAN_CONTROL Masks */
107#define SRS 0x0001 /* Software Reset */
108#define DNM 0x0002 /* Device Net Mode */
109#define ABO 0x0004 /* Auto-Bus On Enable */
110#define TXPRIO 0x0008 /* TX Priority (Priority/Mailbox*) */
111#define WBA 0x0010 /* Wake-Up On CAN Bus Activity Enable */
112#define SMR 0x0020 /* Sleep Mode Request */
113#define CSR 0x0040 /* CAN Suspend Mode Request */
114#define CCR 0x0080 /* CAN Configuration Mode Request */
115
116/* CAN_STATUS Masks */
117#define WT 0x0001 /* TX Warning Flag */
118#define WR 0x0002 /* RX Warning Flag */
119#define EP 0x0004 /* Error Passive Mode */
120#define EBO 0x0008 /* Error Bus Off Mode */
121#define SMA 0x0020 /* Sleep Mode Acknowledge */
122#define CSA 0x0040 /* Suspend Mode Acknowledge */
123#define CCA 0x0080 /* Configuration Mode Acknowledge */
124#define MBPTR 0x1F00 /* Mailbox Pointer */
125#define TRM 0x4000 /* Transmit Mode */
126#define REC 0x8000 /* Receive Mode */
127
128/* CAN_CLOCK Masks */
129#define BRP 0x03FF /* Bit-Rate Pre-Scaler */
130
131/* CAN_TIMING Masks */
132#define TSEG1 0x000F /* Time Segment 1 */
133#define TSEG2 0x0070 /* Time Segment 2 */
134#define SAM 0x0080 /* Sampling */
135#define SJW 0x0300 /* Synchronization Jump Width */
136
137/* CAN_DEBUG Masks */
138#define DEC 0x0001 /* Disable CAN Error Counters */
139#define DRI 0x0002 /* Disable CAN RX Input */
140#define DTO 0x0004 /* Disable CAN TX Output */
141#define DIL 0x0008 /* Disable CAN Internal Loop */
142#define MAA 0x0010 /* Mode Auto-Acknowledge Enable */
143#define MRB 0x0020 /* Mode Read Back Enable */
144#define CDE 0x8000 /* CAN Debug Enable */
145
146/* CAN_CEC Masks */
147#define RXECNT 0x00FF /* Receive Error Counter */
148#define TXECNT 0xFF00 /* Transmit Error Counter */
149
150/* CAN_INTR Masks */
151#define MBRIRQ 0x0001 /* Mailbox Receive Interrupt */
152#define MBTIRQ 0x0002 /* Mailbox Transmit Interrupt */
153#define GIRQ 0x0004 /* Global Interrupt */
154#define SMACK 0x0008 /* Sleep Mode Acknowledge */
155#define CANTX 0x0040 /* CAN TX Bus Value */
156#define CANRX 0x0080 /* CAN RX Bus Value */
157
158/* CAN_MBxx_ID1 and CAN_MBxx_ID0 Masks */
159#define DFC 0xFFFF /* Data Filtering Code (If Enabled) (ID0) */
160#define EXTID_LO 0xFFFF /* Lower 16 Bits of Extended Identifier (ID0) */
161#define EXTID_HI 0x0003 /* Upper 2 Bits of Extended Identifier (ID1) */
162#define BASEID 0x1FFC /* Base Identifier */
163#define IDE 0x2000 /* Identifier Extension */
164#define RTR 0x4000 /* Remote Frame Transmission Request */
165#define AME 0x8000 /* Acceptance Mask Enable */
166
167/* CAN_MBxx_TIMESTAMP Masks */
168#define TSV 0xFFFF /* Timestamp */
169
170/* CAN_MBxx_LENGTH Masks */
171#define DLC 0x000F /* Data Length Code */
172
173/* CAN_AMxxH and CAN_AMxxL Masks */
174#define DFM 0xFFFF /* Data Field Mask (If Enabled) (CAN_AMxxL) */
175#define EXTID_LO 0xFFFF /* Lower 16 Bits of Extended Identifier (CAN_AMxxL) */
176#define EXTID_HI 0x0003 /* Upper 2 Bits of Extended Identifier (CAN_AMxxH) */
177#define BASEID 0x1FFC /* Base Identifier */
178#define AMIDE 0x2000 /* Acceptance Mask ID Extension Enable */
179#define FMD 0x4000 /* Full Mask Data Field Enable */
180#define FDF 0x8000 /* Filter On Data Field Enable */
181
182/* CAN_MC1 Masks */
183#define MC0 0x0001 /* Enable Mailbox 0 */
184#define MC1 0x0002 /* Enable Mailbox 1 */
185#define MC2 0x0004 /* Enable Mailbox 2 */
186#define MC3 0x0008 /* Enable Mailbox 3 */
187#define MC4 0x0010 /* Enable Mailbox 4 */
188#define MC5 0x0020 /* Enable Mailbox 5 */
189#define MC6 0x0040 /* Enable Mailbox 6 */
190#define MC7 0x0080 /* Enable Mailbox 7 */
191#define MC8 0x0100 /* Enable Mailbox 8 */
192#define MC9 0x0200 /* Enable Mailbox 9 */
193#define MC10 0x0400 /* Enable Mailbox 10 */
194#define MC11 0x0800 /* Enable Mailbox 11 */
195#define MC12 0x1000 /* Enable Mailbox 12 */
196#define MC13 0x2000 /* Enable Mailbox 13 */
197#define MC14 0x4000 /* Enable Mailbox 14 */
198#define MC15 0x8000 /* Enable Mailbox 15 */
199
200/* CAN_MC2 Masks */
201#define MC16 0x0001 /* Enable Mailbox 16 */
202#define MC17 0x0002 /* Enable Mailbox 17 */
203#define MC18 0x0004 /* Enable Mailbox 18 */
204#define MC19 0x0008 /* Enable Mailbox 19 */
205#define MC20 0x0010 /* Enable Mailbox 20 */
206#define MC21 0x0020 /* Enable Mailbox 21 */
207#define MC22 0x0040 /* Enable Mailbox 22 */
208#define MC23 0x0080 /* Enable Mailbox 23 */
209#define MC24 0x0100 /* Enable Mailbox 24 */
210#define MC25 0x0200 /* Enable Mailbox 25 */
211#define MC26 0x0400 /* Enable Mailbox 26 */
212#define MC27 0x0800 /* Enable Mailbox 27 */
213#define MC28 0x1000 /* Enable Mailbox 28 */
214#define MC29 0x2000 /* Enable Mailbox 29 */
215#define MC30 0x4000 /* Enable Mailbox 30 */
216#define MC31 0x8000 /* Enable Mailbox 31 */
217
218/* CAN_MD1 Masks */
219#define MD0 0x0001 /* Enable Mailbox 0 For Receive */
220#define MD1 0x0002 /* Enable Mailbox 1 For Receive */
221#define MD2 0x0004 /* Enable Mailbox 2 For Receive */
222#define MD3 0x0008 /* Enable Mailbox 3 For Receive */
223#define MD4 0x0010 /* Enable Mailbox 4 For Receive */
224#define MD5 0x0020 /* Enable Mailbox 5 For Receive */
225#define MD6 0x0040 /* Enable Mailbox 6 For Receive */
226#define MD7 0x0080 /* Enable Mailbox 7 For Receive */
227#define MD8 0x0100 /* Enable Mailbox 8 For Receive */
228#define MD9 0x0200 /* Enable Mailbox 9 For Receive */
229#define MD10 0x0400 /* Enable Mailbox 10 For Receive */
230#define MD11 0x0800 /* Enable Mailbox 11 For Receive */
231#define MD12 0x1000 /* Enable Mailbox 12 For Receive */
232#define MD13 0x2000 /* Enable Mailbox 13 For Receive */
233#define MD14 0x4000 /* Enable Mailbox 14 For Receive */
234#define MD15 0x8000 /* Enable Mailbox 15 For Receive */
235
236/* CAN_MD2 Masks */
237#define MD16 0x0001 /* Enable Mailbox 16 For Receive */
238#define MD17 0x0002 /* Enable Mailbox 17 For Receive */
239#define MD18 0x0004 /* Enable Mailbox 18 For Receive */
240#define MD19 0x0008 /* Enable Mailbox 19 For Receive */
241#define MD20 0x0010 /* Enable Mailbox 20 For Receive */
242#define MD21 0x0020 /* Enable Mailbox 21 For Receive */
243#define MD22 0x0040 /* Enable Mailbox 22 For Receive */
244#define MD23 0x0080 /* Enable Mailbox 23 For Receive */
245#define MD24 0x0100 /* Enable Mailbox 24 For Receive */
246#define MD25 0x0200 /* Enable Mailbox 25 For Receive */
247#define MD26 0x0400 /* Enable Mailbox 26 For Receive */
248#define MD27 0x0800 /* Enable Mailbox 27 For Receive */
249#define MD28 0x1000 /* Enable Mailbox 28 For Receive */
250#define MD29 0x2000 /* Enable Mailbox 29 For Receive */
251#define MD30 0x4000 /* Enable Mailbox 30 For Receive */
252#define MD31 0x8000 /* Enable Mailbox 31 For Receive */
253
254/* CAN_RMP1 Masks */
255#define RMP0 0x0001 /* RX Message Pending In Mailbox 0 */
256#define RMP1 0x0002 /* RX Message Pending In Mailbox 1 */
257#define RMP2 0x0004 /* RX Message Pending In Mailbox 2 */
258#define RMP3 0x0008 /* RX Message Pending In Mailbox 3 */
259#define RMP4 0x0010 /* RX Message Pending In Mailbox 4 */
260#define RMP5 0x0020 /* RX Message Pending In Mailbox 5 */
261#define RMP6 0x0040 /* RX Message Pending In Mailbox 6 */
262#define RMP7 0x0080 /* RX Message Pending In Mailbox 7 */
263#define RMP8 0x0100 /* RX Message Pending In Mailbox 8 */
264#define RMP9 0x0200 /* RX Message Pending In Mailbox 9 */
265#define RMP10 0x0400 /* RX Message Pending In Mailbox 10 */
266#define RMP11 0x0800 /* RX Message Pending In Mailbox 11 */
267#define RMP12 0x1000 /* RX Message Pending In Mailbox 12 */
268#define RMP13 0x2000 /* RX Message Pending In Mailbox 13 */
269#define RMP14 0x4000 /* RX Message Pending In Mailbox 14 */
270#define RMP15 0x8000 /* RX Message Pending In Mailbox 15 */
271
272/* CAN_RMP2 Masks */
273#define RMP16 0x0001 /* RX Message Pending In Mailbox 16 */
274#define RMP17 0x0002 /* RX Message Pending In Mailbox 17 */
275#define RMP18 0x0004 /* RX Message Pending In Mailbox 18 */
276#define RMP19 0x0008 /* RX Message Pending In Mailbox 19 */
277#define RMP20 0x0010 /* RX Message Pending In Mailbox 20 */
278#define RMP21 0x0020 /* RX Message Pending In Mailbox 21 */
279#define RMP22 0x0040 /* RX Message Pending In Mailbox 22 */
280#define RMP23 0x0080 /* RX Message Pending In Mailbox 23 */
281#define RMP24 0x0100 /* RX Message Pending In Mailbox 24 */
282#define RMP25 0x0200 /* RX Message Pending In Mailbox 25 */
283#define RMP26 0x0400 /* RX Message Pending In Mailbox 26 */
284#define RMP27 0x0800 /* RX Message Pending In Mailbox 27 */
285#define RMP28 0x1000 /* RX Message Pending In Mailbox 28 */
286#define RMP29 0x2000 /* RX Message Pending In Mailbox 29 */
287#define RMP30 0x4000 /* RX Message Pending In Mailbox 30 */
288#define RMP31 0x8000 /* RX Message Pending In Mailbox 31 */
289
290/* CAN_RML1 Masks */
291#define RML0 0x0001 /* RX Message Lost In Mailbox 0 */
292#define RML1 0x0002 /* RX Message Lost In Mailbox 1 */
293#define RML2 0x0004 /* RX Message Lost In Mailbox 2 */
294#define RML3 0x0008 /* RX Message Lost In Mailbox 3 */
295#define RML4 0x0010 /* RX Message Lost In Mailbox 4 */
296#define RML5 0x0020 /* RX Message Lost In Mailbox 5 */
297#define RML6 0x0040 /* RX Message Lost In Mailbox 6 */
298#define RML7 0x0080 /* RX Message Lost In Mailbox 7 */
299#define RML8 0x0100 /* RX Message Lost In Mailbox 8 */
300#define RML9 0x0200 /* RX Message Lost In Mailbox 9 */
301#define RML10 0x0400 /* RX Message Lost In Mailbox 10 */
302#define RML11 0x0800 /* RX Message Lost In Mailbox 11 */
303#define RML12 0x1000 /* RX Message Lost In Mailbox 12 */
304#define RML13 0x2000 /* RX Message Lost In Mailbox 13 */
305#define RML14 0x4000 /* RX Message Lost In Mailbox 14 */
306#define RML15 0x8000 /* RX Message Lost In Mailbox 15 */
307
308/* CAN_RML2 Masks */
309#define RML16 0x0001 /* RX Message Lost In Mailbox 16 */
310#define RML17 0x0002 /* RX Message Lost In Mailbox 17 */
311#define RML18 0x0004 /* RX Message Lost In Mailbox 18 */
312#define RML19 0x0008 /* RX Message Lost In Mailbox 19 */
313#define RML20 0x0010 /* RX Message Lost In Mailbox 20 */
314#define RML21 0x0020 /* RX Message Lost In Mailbox 21 */
315#define RML22 0x0040 /* RX Message Lost In Mailbox 22 */
316#define RML23 0x0080 /* RX Message Lost In Mailbox 23 */
317#define RML24 0x0100 /* RX Message Lost In Mailbox 24 */
318#define RML25 0x0200 /* RX Message Lost In Mailbox 25 */
319#define RML26 0x0400 /* RX Message Lost In Mailbox 26 */
320#define RML27 0x0800 /* RX Message Lost In Mailbox 27 */
321#define RML28 0x1000 /* RX Message Lost In Mailbox 28 */
322#define RML29 0x2000 /* RX Message Lost In Mailbox 29 */
323#define RML30 0x4000 /* RX Message Lost In Mailbox 30 */
324#define RML31 0x8000 /* RX Message Lost In Mailbox 31 */
325
326/* CAN_OPSS1 Masks */
327#define OPSS0 0x0001 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 0 */
328#define OPSS1 0x0002 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 1 */
329#define OPSS2 0x0004 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 2 */
330#define OPSS3 0x0008 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 3 */
331#define OPSS4 0x0010 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 4 */
332#define OPSS5 0x0020 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 5 */
333#define OPSS6 0x0040 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 6 */
334#define OPSS7 0x0080 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 7 */
335#define OPSS8 0x0100 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 8 */
336#define OPSS9 0x0200 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 9 */
337#define OPSS10 0x0400 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 10 */
338#define OPSS11 0x0800 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 11 */
339#define OPSS12 0x1000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 12 */
340#define OPSS13 0x2000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 13 */
341#define OPSS14 0x4000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 14 */
342#define OPSS15 0x8000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 15 */
343
344/* CAN_OPSS2 Masks */
345#define OPSS16 0x0001 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 16 */
346#define OPSS17 0x0002 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 17 */
347#define OPSS18 0x0004 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 18 */
348#define OPSS19 0x0008 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 19 */
349#define OPSS20 0x0010 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 20 */
350#define OPSS21 0x0020 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 21 */
351#define OPSS22 0x0040 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 22 */
352#define OPSS23 0x0080 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 23 */
353#define OPSS24 0x0100 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 24 */
354#define OPSS25 0x0200 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 25 */
355#define OPSS26 0x0400 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 26 */
356#define OPSS27 0x0800 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 27 */
357#define OPSS28 0x1000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 28 */
358#define OPSS29 0x2000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 29 */
359#define OPSS30 0x4000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 30 */
360#define OPSS31 0x8000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 31 */
361
362/* CAN_TRR1 Masks */
363#define TRR0 0x0001 /* Deny But Don't Lock Access To Mailbox 0 */
364#define TRR1 0x0002 /* Deny But Don't Lock Access To Mailbox 1 */
365#define TRR2 0x0004 /* Deny But Don't Lock Access To Mailbox 2 */
366#define TRR3 0x0008 /* Deny But Don't Lock Access To Mailbox 3 */
367#define TRR4 0x0010 /* Deny But Don't Lock Access To Mailbox 4 */
368#define TRR5 0x0020 /* Deny But Don't Lock Access To Mailbox 5 */
369#define TRR6 0x0040 /* Deny But Don't Lock Access To Mailbox 6 */
370#define TRR7 0x0080 /* Deny But Don't Lock Access To Mailbox 7 */
371#define TRR8 0x0100 /* Deny But Don't Lock Access To Mailbox 8 */
372#define TRR9 0x0200 /* Deny But Don't Lock Access To Mailbox 9 */
373#define TRR10 0x0400 /* Deny But Don't Lock Access To Mailbox 10 */
374#define TRR11 0x0800 /* Deny But Don't Lock Access To Mailbox 11 */
375#define TRR12 0x1000 /* Deny But Don't Lock Access To Mailbox 12 */
376#define TRR13 0x2000 /* Deny But Don't Lock Access To Mailbox 13 */
377#define TRR14 0x4000 /* Deny But Don't Lock Access To Mailbox 14 */
378#define TRR15 0x8000 /* Deny But Don't Lock Access To Mailbox 15 */
379
380/* CAN_TRR2 Masks */
381#define TRR16 0x0001 /* Deny But Don't Lock Access To Mailbox 16 */
382#define TRR17 0x0002 /* Deny But Don't Lock Access To Mailbox 17 */
383#define TRR18 0x0004 /* Deny But Don't Lock Access To Mailbox 18 */
384#define TRR19 0x0008 /* Deny But Don't Lock Access To Mailbox 19 */
385#define TRR20 0x0010 /* Deny But Don't Lock Access To Mailbox 20 */
386#define TRR21 0x0020 /* Deny But Don't Lock Access To Mailbox 21 */
387#define TRR22 0x0040 /* Deny But Don't Lock Access To Mailbox 22 */
388#define TRR23 0x0080 /* Deny But Don't Lock Access To Mailbox 23 */
389#define TRR24 0x0100 /* Deny But Don't Lock Access To Mailbox 24 */
390#define TRR25 0x0200 /* Deny But Don't Lock Access To Mailbox 25 */
391#define TRR26 0x0400 /* Deny But Don't Lock Access To Mailbox 26 */
392#define TRR27 0x0800 /* Deny But Don't Lock Access To Mailbox 27 */
393#define TRR28 0x1000 /* Deny But Don't Lock Access To Mailbox 28 */
394#define TRR29 0x2000 /* Deny But Don't Lock Access To Mailbox 29 */
395#define TRR30 0x4000 /* Deny But Don't Lock Access To Mailbox 30 */
396#define TRR31 0x8000 /* Deny But Don't Lock Access To Mailbox 31 */
397
398/* CAN_TRS1 Masks */
399#define TRS0 0x0001 /* Remote Frame Request For Mailbox 0 */
400#define TRS1 0x0002 /* Remote Frame Request For Mailbox 1 */
401#define TRS2 0x0004 /* Remote Frame Request For Mailbox 2 */
402#define TRS3 0x0008 /* Remote Frame Request For Mailbox 3 */
403#define TRS4 0x0010 /* Remote Frame Request For Mailbox 4 */
404#define TRS5 0x0020 /* Remote Frame Request For Mailbox 5 */
405#define TRS6 0x0040 /* Remote Frame Request For Mailbox 6 */
406#define TRS7 0x0080 /* Remote Frame Request For Mailbox 7 */
407#define TRS8 0x0100 /* Remote Frame Request For Mailbox 8 */
408#define TRS9 0x0200 /* Remote Frame Request For Mailbox 9 */
409#define TRS10 0x0400 /* Remote Frame Request For Mailbox 10 */
410#define TRS11 0x0800 /* Remote Frame Request For Mailbox 11 */
411#define TRS12 0x1000 /* Remote Frame Request For Mailbox 12 */
412#define TRS13 0x2000 /* Remote Frame Request For Mailbox 13 */
413#define TRS14 0x4000 /* Remote Frame Request For Mailbox 14 */
414#define TRS15 0x8000 /* Remote Frame Request For Mailbox 15 */
415
416/* CAN_TRS2 Masks */
417#define TRS16 0x0001 /* Remote Frame Request For Mailbox 16 */
418#define TRS17 0x0002 /* Remote Frame Request For Mailbox 17 */
419#define TRS18 0x0004 /* Remote Frame Request For Mailbox 18 */
420#define TRS19 0x0008 /* Remote Frame Request For Mailbox 19 */
421#define TRS20 0x0010 /* Remote Frame Request For Mailbox 20 */
422#define TRS21 0x0020 /* Remote Frame Request For Mailbox 21 */
423#define TRS22 0x0040 /* Remote Frame Request For Mailbox 22 */
424#define TRS23 0x0080 /* Remote Frame Request For Mailbox 23 */
425#define TRS24 0x0100 /* Remote Frame Request For Mailbox 24 */
426#define TRS25 0x0200 /* Remote Frame Request For Mailbox 25 */
427#define TRS26 0x0400 /* Remote Frame Request For Mailbox 26 */
428#define TRS27 0x0800 /* Remote Frame Request For Mailbox 27 */
429#define TRS28 0x1000 /* Remote Frame Request For Mailbox 28 */
430#define TRS29 0x2000 /* Remote Frame Request For Mailbox 29 */
431#define TRS30 0x4000 /* Remote Frame Request For Mailbox 30 */
432#define TRS31 0x8000 /* Remote Frame Request For Mailbox 31 */
433
434/* CAN_AA1 Masks */
435#define AA0 0x0001 /* Aborted Message In Mailbox 0 */
436#define AA1 0x0002 /* Aborted Message In Mailbox 1 */
437#define AA2 0x0004 /* Aborted Message In Mailbox 2 */
438#define AA3 0x0008 /* Aborted Message In Mailbox 3 */
439#define AA4 0x0010 /* Aborted Message In Mailbox 4 */
440#define AA5 0x0020 /* Aborted Message In Mailbox 5 */
441#define AA6 0x0040 /* Aborted Message In Mailbox 6 */
442#define AA7 0x0080 /* Aborted Message In Mailbox 7 */
443#define AA8 0x0100 /* Aborted Message In Mailbox 8 */
444#define AA9 0x0200 /* Aborted Message In Mailbox 9 */
445#define AA10 0x0400 /* Aborted Message In Mailbox 10 */
446#define AA11 0x0800 /* Aborted Message In Mailbox 11 */
447#define AA12 0x1000 /* Aborted Message In Mailbox 12 */
448#define AA13 0x2000 /* Aborted Message In Mailbox 13 */
449#define AA14 0x4000 /* Aborted Message In Mailbox 14 */
450#define AA15 0x8000 /* Aborted Message In Mailbox 15 */
451
452/* CAN_AA2 Masks */
453#define AA16 0x0001 /* Aborted Message In Mailbox 16 */
454#define AA17 0x0002 /* Aborted Message In Mailbox 17 */
455#define AA18 0x0004 /* Aborted Message In Mailbox 18 */
456#define AA19 0x0008 /* Aborted Message In Mailbox 19 */
457#define AA20 0x0010 /* Aborted Message In Mailbox 20 */
458#define AA21 0x0020 /* Aborted Message In Mailbox 21 */
459#define AA22 0x0040 /* Aborted Message In Mailbox 22 */
460#define AA23 0x0080 /* Aborted Message In Mailbox 23 */
461#define AA24 0x0100 /* Aborted Message In Mailbox 24 */
462#define AA25 0x0200 /* Aborted Message In Mailbox 25 */
463#define AA26 0x0400 /* Aborted Message In Mailbox 26 */
464#define AA27 0x0800 /* Aborted Message In Mailbox 27 */
465#define AA28 0x1000 /* Aborted Message In Mailbox 28 */
466#define AA29 0x2000 /* Aborted Message In Mailbox 29 */
467#define AA30 0x4000 /* Aborted Message In Mailbox 30 */
468#define AA31 0x8000 /* Aborted Message In Mailbox 31 */
469
470/* CAN_TA1 Masks */
471#define TA0 0x0001 /* Transmit Successful From Mailbox 0 */
472#define TA1 0x0002 /* Transmit Successful From Mailbox 1 */
473#define TA2 0x0004 /* Transmit Successful From Mailbox 2 */
474#define TA3 0x0008 /* Transmit Successful From Mailbox 3 */
475#define TA4 0x0010 /* Transmit Successful From Mailbox 4 */
476#define TA5 0x0020 /* Transmit Successful From Mailbox 5 */
477#define TA6 0x0040 /* Transmit Successful From Mailbox 6 */
478#define TA7 0x0080 /* Transmit Successful From Mailbox 7 */
479#define TA8 0x0100 /* Transmit Successful From Mailbox 8 */
480#define TA9 0x0200 /* Transmit Successful From Mailbox 9 */
481#define TA10 0x0400 /* Transmit Successful From Mailbox 10 */
482#define TA11 0x0800 /* Transmit Successful From Mailbox 11 */
483#define TA12 0x1000 /* Transmit Successful From Mailbox 12 */
484#define TA13 0x2000 /* Transmit Successful From Mailbox 13 */
485#define TA14 0x4000 /* Transmit Successful From Mailbox 14 */
486#define TA15 0x8000 /* Transmit Successful From Mailbox 15 */
487
488/* CAN_TA2 Masks */
489#define TA16 0x0001 /* Transmit Successful From Mailbox 16 */
490#define TA17 0x0002 /* Transmit Successful From Mailbox 17 */
491#define TA18 0x0004 /* Transmit Successful From Mailbox 18 */
492#define TA19 0x0008 /* Transmit Successful From Mailbox 19 */
493#define TA20 0x0010 /* Transmit Successful From Mailbox 20 */
494#define TA21 0x0020 /* Transmit Successful From Mailbox 21 */
495#define TA22 0x0040 /* Transmit Successful From Mailbox 22 */
496#define TA23 0x0080 /* Transmit Successful From Mailbox 23 */
497#define TA24 0x0100 /* Transmit Successful From Mailbox 24 */
498#define TA25 0x0200 /* Transmit Successful From Mailbox 25 */
499#define TA26 0x0400 /* Transmit Successful From Mailbox 26 */
500#define TA27 0x0800 /* Transmit Successful From Mailbox 27 */
501#define TA28 0x1000 /* Transmit Successful From Mailbox 28 */
502#define TA29 0x2000 /* Transmit Successful From Mailbox 29 */
503#define TA30 0x4000 /* Transmit Successful From Mailbox 30 */
504#define TA31 0x8000 /* Transmit Successful From Mailbox 31 */
505
506/* CAN_MBTD Masks */
507#define TDPTR 0x001F /* Mailbox To Temporarily Disable */
508#define TDA 0x0040 /* Temporary Disable Acknowledge */
509#define TDR 0x0080 /* Temporary Disable Request */
510
511/* CAN_RFH1 Masks */
512#define RFH0 0x0001 /* Enable Automatic Remote Frame Handling For Mailbox 0 */
513#define RFH1 0x0002 /* Enable Automatic Remote Frame Handling For Mailbox 1 */
514#define RFH2 0x0004 /* Enable Automatic Remote Frame Handling For Mailbox 2 */
515#define RFH3 0x0008 /* Enable Automatic Remote Frame Handling For Mailbox 3 */
516#define RFH4 0x0010 /* Enable Automatic Remote Frame Handling For Mailbox 4 */
517#define RFH5 0x0020 /* Enable Automatic Remote Frame Handling For Mailbox 5 */
518#define RFH6 0x0040 /* Enable Automatic Remote Frame Handling For Mailbox 6 */
519#define RFH7 0x0080 /* Enable Automatic Remote Frame Handling For Mailbox 7 */
520#define RFH8 0x0100 /* Enable Automatic Remote Frame Handling For Mailbox 8 */
521#define RFH9 0x0200 /* Enable Automatic Remote Frame Handling For Mailbox 9 */
522#define RFH10 0x0400 /* Enable Automatic Remote Frame Handling For Mailbox 10 */
523#define RFH11 0x0800 /* Enable Automatic Remote Frame Handling For Mailbox 11 */
524#define RFH12 0x1000 /* Enable Automatic Remote Frame Handling For Mailbox 12 */
525#define RFH13 0x2000 /* Enable Automatic Remote Frame Handling For Mailbox 13 */
526#define RFH14 0x4000 /* Enable Automatic Remote Frame Handling For Mailbox 14 */
527#define RFH15 0x8000 /* Enable Automatic Remote Frame Handling For Mailbox 15 */
528
529/* CAN_RFH2 Masks */
530#define RFH16 0x0001 /* Enable Automatic Remote Frame Handling For Mailbox 16 */
531#define RFH17 0x0002 /* Enable Automatic Remote Frame Handling For Mailbox 17 */
532#define RFH18 0x0004 /* Enable Automatic Remote Frame Handling For Mailbox 18 */
533#define RFH19 0x0008 /* Enable Automatic Remote Frame Handling For Mailbox 19 */
534#define RFH20 0x0010 /* Enable Automatic Remote Frame Handling For Mailbox 20 */
535#define RFH21 0x0020 /* Enable Automatic Remote Frame Handling For Mailbox 21 */
536#define RFH22 0x0040 /* Enable Automatic Remote Frame Handling For Mailbox 22 */
537#define RFH23 0x0080 /* Enable Automatic Remote Frame Handling For Mailbox 23 */
538#define RFH24 0x0100 /* Enable Automatic Remote Frame Handling For Mailbox 24 */
539#define RFH25 0x0200 /* Enable Automatic Remote Frame Handling For Mailbox 25 */
540#define RFH26 0x0400 /* Enable Automatic Remote Frame Handling For Mailbox 26 */
541#define RFH27 0x0800 /* Enable Automatic Remote Frame Handling For Mailbox 27 */
542#define RFH28 0x1000 /* Enable Automatic Remote Frame Handling For Mailbox 28 */
543#define RFH29 0x2000 /* Enable Automatic Remote Frame Handling For Mailbox 29 */
544#define RFH30 0x4000 /* Enable Automatic Remote Frame Handling For Mailbox 30 */
545#define RFH31 0x8000 /* Enable Automatic Remote Frame Handling For Mailbox 31 */
546
547/* CAN_MBTIF1 Masks */
548#define MBTIF0 0x0001 /* TX Interrupt Active In Mailbox 0 */
549#define MBTIF1 0x0002 /* TX Interrupt Active In Mailbox 1 */
550#define MBTIF2 0x0004 /* TX Interrupt Active In Mailbox 2 */
551#define MBTIF3 0x0008 /* TX Interrupt Active In Mailbox 3 */
552#define MBTIF4 0x0010 /* TX Interrupt Active In Mailbox 4 */
553#define MBTIF5 0x0020 /* TX Interrupt Active In Mailbox 5 */
554#define MBTIF6 0x0040 /* TX Interrupt Active In Mailbox 6 */
555#define MBTIF7 0x0080 /* TX Interrupt Active In Mailbox 7 */
556#define MBTIF8 0x0100 /* TX Interrupt Active In Mailbox 8 */
557#define MBTIF9 0x0200 /* TX Interrupt Active In Mailbox 9 */
558#define MBTIF10 0x0400 /* TX Interrupt Active In Mailbox 10 */
559#define MBTIF11 0x0800 /* TX Interrupt Active In Mailbox 11 */
560#define MBTIF12 0x1000 /* TX Interrupt Active In Mailbox 12 */
561#define MBTIF13 0x2000 /* TX Interrupt Active In Mailbox 13 */
562#define MBTIF14 0x4000 /* TX Interrupt Active In Mailbox 14 */
563#define MBTIF15 0x8000 /* TX Interrupt Active In Mailbox 15 */
564
565/* CAN_MBTIF2 Masks */
566#define MBTIF16 0x0001 /* TX Interrupt Active In Mailbox 16 */
567#define MBTIF17 0x0002 /* TX Interrupt Active In Mailbox 17 */
568#define MBTIF18 0x0004 /* TX Interrupt Active In Mailbox 18 */
569#define MBTIF19 0x0008 /* TX Interrupt Active In Mailbox 19 */
570#define MBTIF20 0x0010 /* TX Interrupt Active In Mailbox 20 */
571#define MBTIF21 0x0020 /* TX Interrupt Active In Mailbox 21 */
572#define MBTIF22 0x0040 /* TX Interrupt Active In Mailbox 22 */
573#define MBTIF23 0x0080 /* TX Interrupt Active In Mailbox 23 */
574#define MBTIF24 0x0100 /* TX Interrupt Active In Mailbox 24 */
575#define MBTIF25 0x0200 /* TX Interrupt Active In Mailbox 25 */
576#define MBTIF26 0x0400 /* TX Interrupt Active In Mailbox 26 */
577#define MBTIF27 0x0800 /* TX Interrupt Active In Mailbox 27 */
578#define MBTIF28 0x1000 /* TX Interrupt Active In Mailbox 28 */
579#define MBTIF29 0x2000 /* TX Interrupt Active In Mailbox 29 */
580#define MBTIF30 0x4000 /* TX Interrupt Active In Mailbox 30 */
581#define MBTIF31 0x8000 /* TX Interrupt Active In Mailbox 31 */
582
583/* CAN_MBRIF1 Masks */
584#define MBRIF0 0x0001 /* RX Interrupt Active In Mailbox 0 */
585#define MBRIF1 0x0002 /* RX Interrupt Active In Mailbox 1 */
586#define MBRIF2 0x0004 /* RX Interrupt Active In Mailbox 2 */
587#define MBRIF3 0x0008 /* RX Interrupt Active In Mailbox 3 */
588#define MBRIF4 0x0010 /* RX Interrupt Active In Mailbox 4 */
589#define MBRIF5 0x0020 /* RX Interrupt Active In Mailbox 5 */
590#define MBRIF6 0x0040 /* RX Interrupt Active In Mailbox 6 */
591#define MBRIF7 0x0080 /* RX Interrupt Active In Mailbox 7 */
592#define MBRIF8 0x0100 /* RX Interrupt Active In Mailbox 8 */
593#define MBRIF9 0x0200 /* RX Interrupt Active In Mailbox 9 */
594#define MBRIF10 0x0400 /* RX Interrupt Active In Mailbox 10 */
595#define MBRIF11 0x0800 /* RX Interrupt Active In Mailbox 11 */
596#define MBRIF12 0x1000 /* RX Interrupt Active In Mailbox 12 */
597#define MBRIF13 0x2000 /* RX Interrupt Active In Mailbox 13 */
598#define MBRIF14 0x4000 /* RX Interrupt Active In Mailbox 14 */
599#define MBRIF15 0x8000 /* RX Interrupt Active In Mailbox 15 */
600
601/* CAN_MBRIF2 Masks */
602#define MBRIF16 0x0001 /* RX Interrupt Active In Mailbox 16 */
603#define MBRIF17 0x0002 /* RX Interrupt Active In Mailbox 17 */
604#define MBRIF18 0x0004 /* RX Interrupt Active In Mailbox 18 */
605#define MBRIF19 0x0008 /* RX Interrupt Active In Mailbox 19 */
606#define MBRIF20 0x0010 /* RX Interrupt Active In Mailbox 20 */
607#define MBRIF21 0x0020 /* RX Interrupt Active In Mailbox 21 */
608#define MBRIF22 0x0040 /* RX Interrupt Active In Mailbox 22 */
609#define MBRIF23 0x0080 /* RX Interrupt Active In Mailbox 23 */
610#define MBRIF24 0x0100 /* RX Interrupt Active In Mailbox 24 */
611#define MBRIF25 0x0200 /* RX Interrupt Active In Mailbox 25 */
612#define MBRIF26 0x0400 /* RX Interrupt Active In Mailbox 26 */
613#define MBRIF27 0x0800 /* RX Interrupt Active In Mailbox 27 */
614#define MBRIF28 0x1000 /* RX Interrupt Active In Mailbox 28 */
615#define MBRIF29 0x2000 /* RX Interrupt Active In Mailbox 29 */
616#define MBRIF30 0x4000 /* RX Interrupt Active In Mailbox 30 */
617#define MBRIF31 0x8000 /* RX Interrupt Active In Mailbox 31 */
618
619/* CAN_MBIM1 Masks */
620#define MBIM0 0x0001 /* Enable Interrupt For Mailbox 0 */
621#define MBIM1 0x0002 /* Enable Interrupt For Mailbox 1 */
622#define MBIM2 0x0004 /* Enable Interrupt For Mailbox 2 */
623#define MBIM3 0x0008 /* Enable Interrupt For Mailbox 3 */
624#define MBIM4 0x0010 /* Enable Interrupt For Mailbox 4 */
625#define MBIM5 0x0020 /* Enable Interrupt For Mailbox 5 */
626#define MBIM6 0x0040 /* Enable Interrupt For Mailbox 6 */
627#define MBIM7 0x0080 /* Enable Interrupt For Mailbox 7 */
628#define MBIM8 0x0100 /* Enable Interrupt For Mailbox 8 */
629#define MBIM9 0x0200 /* Enable Interrupt For Mailbox 9 */
630#define MBIM10 0x0400 /* Enable Interrupt For Mailbox 10 */
631#define MBIM11 0x0800 /* Enable Interrupt For Mailbox 11 */
632#define MBIM12 0x1000 /* Enable Interrupt For Mailbox 12 */
633#define MBIM13 0x2000 /* Enable Interrupt For Mailbox 13 */
634#define MBIM14 0x4000 /* Enable Interrupt For Mailbox 14 */
635#define MBIM15 0x8000 /* Enable Interrupt For Mailbox 15 */
636
637/* CAN_MBIM2 Masks */
638#define MBIM16 0x0001 /* Enable Interrupt For Mailbox 16 */
639#define MBIM17 0x0002 /* Enable Interrupt For Mailbox 17 */
640#define MBIM18 0x0004 /* Enable Interrupt For Mailbox 18 */
641#define MBIM19 0x0008 /* Enable Interrupt For Mailbox 19 */
642#define MBIM20 0x0010 /* Enable Interrupt For Mailbox 20 */
643#define MBIM21 0x0020 /* Enable Interrupt For Mailbox 21 */
644#define MBIM22 0x0040 /* Enable Interrupt For Mailbox 22 */
645#define MBIM23 0x0080 /* Enable Interrupt For Mailbox 23 */
646#define MBIM24 0x0100 /* Enable Interrupt For Mailbox 24 */
647#define MBIM25 0x0200 /* Enable Interrupt For Mailbox 25 */
648#define MBIM26 0x0400 /* Enable Interrupt For Mailbox 26 */
649#define MBIM27 0x0800 /* Enable Interrupt For Mailbox 27 */
650#define MBIM28 0x1000 /* Enable Interrupt For Mailbox 28 */
651#define MBIM29 0x2000 /* Enable Interrupt For Mailbox 29 */
652#define MBIM30 0x4000 /* Enable Interrupt For Mailbox 30 */
653#define MBIM31 0x8000 /* Enable Interrupt For Mailbox 31 */
654
655/* CAN_GIM Masks */
656#define EWTIM 0x0001 /* Enable TX Error Count Interrupt */
657#define EWRIM 0x0002 /* Enable RX Error Count Interrupt */
658#define EPIM 0x0004 /* Enable Error-Passive Mode Interrupt */
659#define BOIM 0x0008 /* Enable Bus Off Interrupt */
660#define WUIM 0x0010 /* Enable Wake-Up Interrupt */
661#define UIAIM 0x0020 /* Enable Access To Unimplemented Address Interrupt */
662#define AAIM 0x0040 /* Enable Abort Acknowledge Interrupt */
663#define RMLIM 0x0080 /* Enable RX Message Lost Interrupt */
664#define UCEIM 0x0100 /* Enable Universal Counter Overflow Interrupt */
665#define EXTIM 0x0200 /* Enable External Trigger Output Interrupt */
666#define ADIM 0x0400 /* Enable Access Denied Interrupt */
667
668/* CAN_GIS Masks */
669#define EWTIS 0x0001 /* TX Error Count IRQ Status */
670#define EWRIS 0x0002 /* RX Error Count IRQ Status */
671#define EPIS 0x0004 /* Error-Passive Mode IRQ Status */
672#define BOIS 0x0008 /* Bus Off IRQ Status */
673#define WUIS 0x0010 /* Wake-Up IRQ Status */
674#define UIAIS 0x0020 /* Access To Unimplemented Address IRQ Status */
675#define AAIS 0x0040 /* Abort Acknowledge IRQ Status */
676#define RMLIS 0x0080 /* RX Message Lost IRQ Status */
677#define UCEIS 0x0100 /* Universal Counter Overflow IRQ Status */
678#define EXTIS 0x0200 /* External Trigger Output IRQ Status */
679#define ADIS 0x0400 /* Access Denied IRQ Status */
680
681/* CAN_GIF Masks */
682#define EWTIF 0x0001 /* TX Error Count IRQ Flag */
683#define EWRIF 0x0002 /* RX Error Count IRQ Flag */
684#define EPIF 0x0004 /* Error-Passive Mode IRQ Flag */
685#define BOIF 0x0008 /* Bus Off IRQ Flag */
686#define WUIF 0x0010 /* Wake-Up IRQ Flag */
687#define UIAIF 0x0020 /* Access To Unimplemented Address IRQ Flag */
688#define AAIF 0x0040 /* Abort Acknowledge IRQ Flag */
689#define RMLIF 0x0080 /* RX Message Lost IRQ Flag */
690#define UCEIF 0x0100 /* Universal Counter Overflow IRQ Flag */
691#define EXTIF 0x0200 /* External Trigger Output IRQ Flag */
692#define ADIF 0x0400 /* Access Denied IRQ Flag */
693
694/* CAN_UCCNF Masks */
695#define UCCNF 0x000F /* Universal Counter Mode */
696#define UC_STAMP 0x0001 /* Timestamp Mode */
697#define UC_WDOG 0x0002 /* Watchdog Mode */
698#define UC_AUTOTX 0x0003 /* Auto-Transmit Mode */
699#define UC_ERROR 0x0006 /* CAN Error Frame Count */
700#define UC_OVER 0x0007 /* CAN Overload Frame Count */
701#define UC_LOST 0x0008 /* Arbitration Lost During TX Count */
702#define UC_AA 0x0009 /* TX Abort Count */
703#define UC_TA 0x000A /* TX Successful Count */
704#define UC_REJECT 0x000B /* RX Message Rejected Count */
705#define UC_RML 0x000C /* RX Message Lost Count */
706#define UC_RX 0x000D /* Total Successful RX Messages Count */
707#define UC_RMP 0x000E /* Successful RX W/Matching ID Count */
708#define UC_ALL 0x000F /* Correct Message On CAN Bus Line Count */
709#define UCRC 0x0020 /* Universal Counter Reload/Clear */
710#define UCCT 0x0040 /* Universal Counter CAN Trigger */
711#define UCE 0x0080 /* Universal Counter Enable */
712
713/* CAN_ESR Masks */
714#define ACKE 0x0004 /* Acknowledge Error */
715#define SER 0x0008 /* Stuff Error */
716#define CRCE 0x0010 /* CRC Error */
717#define SA0 0x0020 /* Stuck At Dominant Error */
718#define BEF 0x0040 /* Bit Error Flag */
719#define FER 0x0080 /* Form Error Flag */
720
721/* CAN_EWR Masks */
722#define EWLREC 0x00FF /* RX Error Count Limit (For EWRIS) */
723#define EWLTEC 0xFF00 /* TX Error Count Limit (For EWTIS) */
724
725#endif
diff --git a/arch/blackfin/include/asm/bfin_sport.h b/arch/blackfin/include/asm/bfin_sport.h
index b558908e1c79..9626cf7e4251 100644
--- a/arch/blackfin/include/asm/bfin_sport.h
+++ b/arch/blackfin/include/asm/bfin_sport.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * bfin_sport.h - userspace header for bfin sport driver 2 * bfin_sport.h - interface to Blackfin SPORTs
3 * 3 *
4 * Copyright 2004-2008 Analog Devices Inc. 4 * Copyright 2004-2009 Analog Devices Inc.
5 * 5 *
6 * Licensed under the GPL-2 or later. 6 * Licensed under the GPL-2 or later.
7 */ 7 */
@@ -9,16 +9,6 @@
9#ifndef __BFIN_SPORT_H__ 9#ifndef __BFIN_SPORT_H__
10#define __BFIN_SPORT_H__ 10#define __BFIN_SPORT_H__
11 11
12#ifdef __KERNEL__
13#include <linux/cdev.h>
14#include <linux/mutex.h>
15#include <linux/sched.h>
16#include <linux/wait.h>
17#endif
18
19#define SPORT_MAJOR 237
20#define SPORT_NR_DEVS 2
21
22/* Sport mode: it can be set to TDM, i2s or others */ 12/* Sport mode: it can be set to TDM, i2s or others */
23#define NORM_MODE 0x0 13#define NORM_MODE 0x0
24#define TDM_MODE 0x1 14#define TDM_MODE 0x1
@@ -35,7 +25,7 @@ struct sport_config {
35 unsigned int mode:3; 25 unsigned int mode:3;
36 26
37 /* if TDM mode is selected, channels must be set */ 27 /* if TDM mode is selected, channels must be set */
38 int channels; /* Must be in 8 units */ 28 int channels; /* Must be in 8 units */
39 unsigned int frame_delay:4; /* Delay between frame sync pulse and first bit */ 29 unsigned int frame_delay:4; /* Delay between frame sync pulse and first bit */
40 30
41 /* I2S mode */ 31 /* I2S mode */
@@ -69,94 +59,137 @@ struct sport_config {
69 59
70#ifdef __KERNEL__ 60#ifdef __KERNEL__
71 61
72struct sport_register { 62#include <linux/types.h>
73 unsigned short tcr1;
74 unsigned short reserved0;
75 unsigned short tcr2;
76 unsigned short reserved1;
77 unsigned short tclkdiv;
78 unsigned short reserved2;
79 unsigned short tfsdiv;
80 unsigned short reserved3;
81 unsigned long tx;
82 unsigned long reserved_l0;
83 unsigned long rx;
84 unsigned long reserved_l1;
85 unsigned short rcr1;
86 unsigned short reserved4;
87 unsigned short rcr2;
88 unsigned short reserved5;
89 unsigned short rclkdiv;
90 unsigned short reserved6;
91 unsigned short rfsdiv;
92 unsigned short reserved7;
93 unsigned short stat;
94 unsigned short reserved8;
95 unsigned short chnl;
96 unsigned short reserved9;
97 unsigned short mcmc1;
98 unsigned short reserved10;
99 unsigned short mcmc2;
100 unsigned short reserved11;
101 unsigned long mtcs0;
102 unsigned long mtcs1;
103 unsigned long mtcs2;
104 unsigned long mtcs3;
105 unsigned long mrcs0;
106 unsigned long mrcs1;
107 unsigned long mrcs2;
108 unsigned long mrcs3;
109};
110
111struct sport_dev {
112 struct cdev cdev; /* Char device structure */
113
114 int sport_num;
115 63
116 int dma_rx_chan; 64/*
117 int dma_tx_chan; 65 * All Blackfin system MMRs are padded to 32bits even if the register
118 66 * itself is only 16bits. So use a helper macro to streamline this.
119 int rx_irq; 67 */
120 unsigned char *rx_buf; /* Buffer store the received data */ 68#define __BFP(m) u16 m; u16 __pad_##m
121 int rx_len; /* How many bytes will be received */ 69struct sport_register {
122 int rx_received; /* How many bytes has been received */ 70 __BFP(tcr1);
123 71 __BFP(tcr2);
124 int tx_irq; 72 __BFP(tclkdiv);
125 const unsigned char *tx_buf; 73 __BFP(tfsdiv);
126 int tx_len; 74 union {
127 int tx_sent; 75 u32 tx32;
128 76 u16 tx16;
129 int err_irq; 77 };
130 78 u32 __pad_tx;
131 struct mutex mutex; /* mutual exclusion semaphore */ 79 union {
132 struct task_struct *task; 80 u32 rx32; /* use the anomaly wrapper below */
133 81 u16 rx16;
134 wait_queue_head_t waitq; 82 };
135 int wait_con; 83 u32 __pad_rx;
136 struct sport_register *regs; 84 __BFP(rcr1);
137 struct sport_config config; 85 __BFP(rcr2);
86 __BFP(rclkdiv);
87 __BFP(rfsdiv);
88 __BFP(stat);
89 __BFP(chnl);
90 __BFP(mcmc1);
91 __BFP(mcmc2);
92 u32 mtcs0;
93 u32 mtcs1;
94 u32 mtcs2;
95 u32 mtcs3;
96 u32 mrcs0;
97 u32 mrcs1;
98 u32 mrcs2;
99 u32 mrcs3;
138}; 100};
101#undef __BFP
102
103#define bfin_read_sport_rx32(base) \
104({ \
105 struct sport_register *__mmrs = (void *)base; \
106 u32 __ret; \
107 unsigned long flags; \
108 if (ANOMALY_05000473) \
109 local_irq_save(flags); \
110 __ret = __mmrs->rx32; \
111 if (ANOMALY_05000473) \
112 local_irq_restore(flags); \
113 __ret; \
114})
139 115
140#endif 116#endif
141 117
142#define SPORT_TCR1 0 118/* Workaround defBF*.h SPORT MMRs till they get cleansed */
143#define SPORT_TCR2 1 119#undef DTYPE_NORM
144#define SPORT_TCLKDIV 2 120#undef SLEN
145#define SPORT_TFSDIV 3 121#undef SP_WOFF
146#define SPORT_RCR1 8 122#undef SP_WSIZE
147#define SPORT_RCR2 9 123
148#define SPORT_RCLKDIV 10 124/* SPORT_TCR1 Masks */
149#define SPORT_RFSDIV 11 125#define TSPEN 0x0001 /* TX enable */
150#define SPORT_CHANNEL 13 126#define ITCLK 0x0002 /* Internal TX Clock Select */
151#define SPORT_MCMC1 14 127#define TDTYPE 0x000C /* TX Data Formatting Select */
152#define SPORT_MCMC2 15 128#define DTYPE_NORM 0x0000 /* Data Format Normal */
153#define SPORT_MTCS0 16 129#define DTYPE_ULAW 0x0008 /* Compand Using u-Law */
154#define SPORT_MTCS1 17 130#define DTYPE_ALAW 0x000C /* Compand Using A-Law */
155#define SPORT_MTCS2 18 131#define TLSBIT 0x0010 /* TX Bit Order */
156#define SPORT_MTCS3 19 132#define ITFS 0x0200 /* Internal TX Frame Sync Select */
157#define SPORT_MRCS0 20 133#define TFSR 0x0400 /* TX Frame Sync Required Select */
158#define SPORT_MRCS1 21 134#define DITFS 0x0800 /* Data Independent TX Frame Sync Select */
159#define SPORT_MRCS2 22 135#define LTFS 0x1000 /* Low TX Frame Sync Select */
160#define SPORT_MRCS3 23 136#define LATFS 0x2000 /* Late TX Frame Sync Select */
137#define TCKFE 0x4000 /* TX Clock Falling Edge Select */
138
139/* SPORT_TCR2 Masks */
140#define SLEN 0x001F /* SPORT TX Word Length (2 - 31) */
141#define DP_SLEN(x) BFIN_DEPOSIT(SLEN, x)
142#define EX_SLEN(x) BFIN_EXTRACT(SLEN, x)
143#define TXSE 0x0100 /* TX Secondary Enable */
144#define TSFSE 0x0200 /* TX Stereo Frame Sync Enable */
145#define TRFST 0x0400 /* TX Right-First Data Order */
146
147/* SPORT_RCR1 Masks */
148#define RSPEN 0x0001 /* RX enable */
149#define IRCLK 0x0002 /* Internal RX Clock Select */
150#define RDTYPE 0x000C /* RX Data Formatting Select */
151/* DTYPE_* defined above */
152#define RLSBIT 0x0010 /* RX Bit Order */
153#define IRFS 0x0200 /* Internal RX Frame Sync Select */
154#define RFSR 0x0400 /* RX Frame Sync Required Select */
155#define LRFS 0x1000 /* Low RX Frame Sync Select */
156#define LARFS 0x2000 /* Late RX Frame Sync Select */
157#define RCKFE 0x4000 /* RX Clock Falling Edge Select */
158
159/* SPORT_RCR2 Masks */
160/* SLEN defined above */
161#define RXSE 0x0100 /* RX Secondary Enable */
162#define RSFSE 0x0200 /* RX Stereo Frame Sync Enable */
163#define RRFST 0x0400 /* Right-First Data Order */
164
165/* SPORT_STAT Masks */
166#define RXNE 0x0001 /* RX FIFO Not Empty Status */
167#define RUVF 0x0002 /* RX Underflow Status */
168#define ROVF 0x0004 /* RX Overflow Status */
169#define TXF 0x0008 /* TX FIFO Full Status */
170#define TUVF 0x0010 /* TX Underflow Status */
171#define TOVF 0x0020 /* TX Overflow Status */
172#define TXHRE 0x0040 /* TX Hold Register Empty */
173
174/* SPORT_MCMC1 Masks */
175#define SP_WOFF 0x03FF /* Multichannel Window Offset Field */
176#define DP_SP_WOFF(x) BFIN_DEPOSIT(SP_WOFF, x)
177#define EX_SP_WOFF(x) BFIN_EXTRACT(SP_WOFF, x)
178#define SP_WSIZE 0xF000 /* Multichannel Window Size Field */
179#define DP_SP_WSIZE(x) BFIN_DEPOSIT(SP_WSIZE, x)
180#define EX_SP_WSIZE(x) BFIN_EXTRACT(SP_WSIZE, x)
181
182/* SPORT_MCMC2 Masks */
183#define MCCRM 0x0003 /* Multichannel Clock Recovery Mode */
184#define REC_BYPASS 0x0000 /* Bypass Mode (No Clock Recovery) */
185#define REC_2FROM4 0x0002 /* Recover 2 MHz Clock from 4 MHz Clock */
186#define REC_8FROM16 0x0003 /* Recover 8 MHz Clock from 16 MHz Clock */
187#define MCDTXPE 0x0004 /* Multichannel DMA Transmit Packing */
188#define MCDRXPE 0x0008 /* Multichannel DMA Receive Packing */
189#define MCMEN 0x0010 /* Multichannel Frame Mode Enable */
190#define FSDR 0x0080 /* Multichannel Frame Sync to Data Relationship */
191#define MFD 0xF000 /* Multichannel Frame Delay */
192#define DP_MFD(x) BFIN_DEPOSIT(MFD, x)
193#define EX_MFD(x) BFIN_EXTRACT(MFD, x)
161 194
162#endif 195#endif
diff --git a/arch/blackfin/include/asm/bfin_watchdog.h b/arch/blackfin/include/asm/bfin_watchdog.h
new file mode 100644
index 000000000000..dce09829a095
--- /dev/null
+++ b/arch/blackfin/include/asm/bfin_watchdog.h
@@ -0,0 +1,30 @@
1/*
2 * bfin_watchdog.h - Blackfin watchdog definitions
3 *
4 * Copyright 2006-2010 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9#ifndef _BFIN_WATCHDOG_H
10#define _BFIN_WATCHDOG_H
11
12/* Bit in SWRST that indicates boot caused by watchdog */
13#define SWRST_RESET_WDOG 0x4000
14
15/* Bit in WDOG_CTL that indicates watchdog has expired (WDR0) */
16#define WDOG_EXPIRED 0x8000
17
18/* Masks for WDEV field in WDOG_CTL register */
19#define ICTL_RESET 0x0
20#define ICTL_NMI 0x2
21#define ICTL_GPI 0x4
22#define ICTL_NONE 0x6
23#define ICTL_MASK 0x6
24
25/* Masks for WDEN field in WDOG_CTL register */
26#define WDEN_MASK 0x0FF0
27#define WDEN_ENABLE 0x0000
28#define WDEN_DISABLE 0x0AD0
29
30#endif
diff --git a/arch/blackfin/include/asm/bitops.h b/arch/blackfin/include/asm/bitops.h
index a2ff3fb3568d..605ba8e9b2e4 100644
--- a/arch/blackfin/include/asm/bitops.h
+++ b/arch/blackfin/include/asm/bitops.h
@@ -7,22 +7,41 @@
7#ifndef _BLACKFIN_BITOPS_H 7#ifndef _BLACKFIN_BITOPS_H
8#define _BLACKFIN_BITOPS_H 8#define _BLACKFIN_BITOPS_H
9 9
10#ifndef CONFIG_SMP 10#include <linux/compiler.h>
11# include <asm-generic/bitops.h> 11
12#else 12#include <asm-generic/bitops/__ffs.h>
13#include <asm-generic/bitops/ffz.h>
14#include <asm-generic/bitops/fls.h>
15#include <asm-generic/bitops/__fls.h>
16#include <asm-generic/bitops/fls64.h>
17#include <asm-generic/bitops/find.h>
13 18
14#ifndef _LINUX_BITOPS_H 19#ifndef _LINUX_BITOPS_H
15#error only <linux/bitops.h> can be included directly 20#error only <linux/bitops.h> can be included directly
16#endif 21#endif
17 22
18#include <linux/compiler.h>
19#include <asm/byteorder.h> /* swab32 */
20
21#include <asm-generic/bitops/ffs.h>
22#include <asm-generic/bitops/__ffs.h>
23#include <asm-generic/bitops/sched.h> 23#include <asm-generic/bitops/sched.h>
24#include <asm-generic/bitops/ffz.h> 24#include <asm-generic/bitops/ffs.h>
25#include <asm-generic/bitops/lock.h>
26#include <asm-generic/bitops/ext2-non-atomic.h>
27#include <asm-generic/bitops/ext2-atomic.h>
28#include <asm-generic/bitops/minix.h>
29
30#ifndef CONFIG_SMP
31#include <linux/irqflags.h>
32
33/*
34 * clear_bit may not imply a memory barrier
35 */
36#ifndef smp_mb__before_clear_bit
37#define smp_mb__before_clear_bit() smp_mb()
38#define smp_mb__after_clear_bit() smp_mb()
39#endif
40#include <asm-generic/bitops/atomic.h>
41#include <asm-generic/bitops/non-atomic.h>
42#else
25 43
44#include <asm/byteorder.h> /* swab32 */
26#include <linux/linkage.h> 45#include <linux/linkage.h>
27 46
28asmlinkage int __raw_bit_set_asm(volatile unsigned long *addr, int nr); 47asmlinkage int __raw_bit_set_asm(volatile unsigned long *addr, int nr);
@@ -89,19 +108,36 @@ static inline int test_and_change_bit(int nr, volatile unsigned long *addr)
89 108
90#include <asm-generic/bitops/non-atomic.h> 109#include <asm-generic/bitops/non-atomic.h>
91 110
92#include <asm-generic/bitops/find.h> 111#endif /* CONFIG_SMP */
93#include <asm-generic/bitops/hweight.h>
94#include <asm-generic/bitops/lock.h>
95 112
96#include <asm-generic/bitops/ext2-atomic.h> 113/*
97#include <asm-generic/bitops/ext2-non-atomic.h> 114 * hweightN: returns the hamming weight (i.e. the number
115 * of bits set) of a N-bit word
116 */
98 117
99#include <asm-generic/bitops/minix.h> 118static inline unsigned int hweight32(unsigned int w)
119{
120 unsigned int res;
100 121
101#include <asm-generic/bitops/fls.h> 122 __asm__ ("%0.l = ONES %0;"
102#include <asm-generic/bitops/__fls.h> 123 "%0 = %0.l (Z);"
103#include <asm-generic/bitops/fls64.h> 124 : "=d" (res) : "d" (w));
125 return res;
126}
104 127
105#endif /* CONFIG_SMP */ 128static inline unsigned int hweight64(__u64 w)
129{
130 return hweight32((unsigned int)(w >> 32)) + hweight32((unsigned int)w);
131}
132
133static inline unsigned int hweight16(unsigned int w)
134{
135 return hweight32(w & 0xffff);
136}
137
138static inline unsigned int hweight8(unsigned int w)
139{
140 return hweight32(w & 0xff);
141}
106 142
107#endif /* _BLACKFIN_BITOPS_H */ 143#endif /* _BLACKFIN_BITOPS_H */
diff --git a/arch/blackfin/include/asm/bug.h b/arch/blackfin/include/asm/bug.h
index 75f6dc336d46..8d9b1eba89c4 100644
--- a/arch/blackfin/include/asm/bug.h
+++ b/arch/blackfin/include/asm/bug.h
@@ -9,7 +9,12 @@
9 9
10#ifdef CONFIG_BUG 10#ifdef CONFIG_BUG
11 11
12#define BFIN_BUG_OPCODE 0xefcd 12/*
13 * This can be any undefined 16-bit opcode, meaning
14 * ((opcode & 0xc000) != 0xc000)
15 * Anything from 0x0001 to 0x000A (inclusive) will work
16 */
17#define BFIN_BUG_OPCODE 0x0001
13 18
14#ifdef CONFIG_DEBUG_BUGVERBOSE 19#ifdef CONFIG_DEBUG_BUGVERBOSE
15 20
diff --git a/arch/blackfin/include/asm/cache.h b/arch/blackfin/include/asm/cache.h
index 8542bc31f63c..93f6c634fdf4 100644
--- a/arch/blackfin/include/asm/cache.h
+++ b/arch/blackfin/include/asm/cache.h
@@ -15,6 +15,8 @@
15#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) 15#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
16#define SMP_CACHE_BYTES L1_CACHE_BYTES 16#define SMP_CACHE_BYTES L1_CACHE_BYTES
17 17
18#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES
19
18#ifdef CONFIG_SMP 20#ifdef CONFIG_SMP
19#define __cacheline_aligned 21#define __cacheline_aligned
20#else 22#else
diff --git a/arch/blackfin/include/asm/context.S b/arch/blackfin/include/asm/context.S
index 5dffaf582a22..1f9060395a0a 100644
--- a/arch/blackfin/include/asm/context.S
+++ b/arch/blackfin/include/asm/context.S
@@ -73,6 +73,11 @@
73#else 73#else
74 cli r0; 74 cli r0;
75#endif 75#endif
76#ifdef CONFIG_TRACE_IRQFLAGS
77 sp += -12;
78 call _trace_hardirqs_off;
79 sp += 12;
80#endif
76 [--sp] = RETI; /*orig_pc*/ 81 [--sp] = RETI; /*orig_pc*/
77 /* Clear all L registers. */ 82 /* Clear all L registers. */
78 r0 = 0 (x); 83 r0 = 0 (x);
@@ -279,6 +284,13 @@
279 RETN = [sp++]; 284 RETN = [sp++];
280 RETX = [sp++]; 285 RETX = [sp++];
281 RETI = [sp++]; 286 RETI = [sp++];
287
288#ifdef CONFIG_TRACE_IRQFLAGS
289 sp += -12;
290 call _trace_hardirqs_on;
291 sp += 12;
292#endif
293
282 RETS = [sp++]; 294 RETS = [sp++];
283 295
284#ifdef CONFIG_SMP 296#ifdef CONFIG_SMP
@@ -374,3 +386,13 @@
374 386
375 (R7:0, P5:0) = [SP++]; 387 (R7:0, P5:0) = [SP++];
376.endm 388.endm
389
390.macro pseudo_long_call func:req, scratch:req
391#ifdef CONFIG_ROMKERNEL
392 \scratch\().l = \func;
393 \scratch\().h = \func;
394 call (\scratch);
395#else
396 call \func;
397#endif
398.endm
diff --git a/arch/blackfin/include/asm/cpu.h b/arch/blackfin/include/asm/cpu.h
index b191dc662bd8..16883e582e3c 100644
--- a/arch/blackfin/include/asm/cpu.h
+++ b/arch/blackfin/include/asm/cpu.h
@@ -17,8 +17,6 @@ struct blackfin_cpudata {
17 struct task_struct *idle; 17 struct task_struct *idle;
18 unsigned int imemctl; 18 unsigned int imemctl;
19 unsigned int dmemctl; 19 unsigned int dmemctl;
20 unsigned long dcache_invld_count;
21 unsigned long icache_invld_count;
22}; 20};
23 21
24DECLARE_PER_CPU(struct blackfin_cpudata, cpu_data); 22DECLARE_PER_CPU(struct blackfin_cpudata, cpu_data);
diff --git a/arch/blackfin/include/asm/def_LPBlackfin.h b/arch/blackfin/include/asm/def_LPBlackfin.h
index 25906468622f..f342ff0319df 100644
--- a/arch/blackfin/include/asm/def_LPBlackfin.h
+++ b/arch/blackfin/include/asm/def_LPBlackfin.h
@@ -12,6 +12,8 @@
12#include <mach/anomaly.h> 12#include <mach/anomaly.h>
13 13
14#define MK_BMSK_(x) (1<<x) 14#define MK_BMSK_(x) (1<<x)
15#define BFIN_DEPOSIT(mask, x) (((x) << __ffs(mask)) & (mask))
16#define BFIN_EXTRACT(mask, x) (((x) & (mask)) >> __ffs(mask))
15 17
16#ifndef __ASSEMBLY__ 18#ifndef __ASSEMBLY__
17 19
@@ -23,62 +25,30 @@
23# define NOP_PAD_ANOMALY_05000198 25# define NOP_PAD_ANOMALY_05000198
24#endif 26#endif
25 27
26#define bfin_read8(addr) ({ \ 28#define _bfin_readX(addr, size, asm_size, asm_ext) ({ \
27 uint32_t __v; \ 29 u32 __v; \
28 __asm__ __volatile__( \ 30 __asm__ __volatile__( \
29 NOP_PAD_ANOMALY_05000198 \ 31 NOP_PAD_ANOMALY_05000198 \
30 "%0 = b[%1] (z);" \ 32 "%0 = " #asm_size "[%1]" #asm_ext ";" \
31 : "=d" (__v) \ 33 : "=d" (__v) \
32 : "a" (addr) \ 34 : "a" (addr) \
33 ); \ 35 ); \
34 __v; }) 36 __v; })
35 37#define _bfin_writeX(addr, val, size, asm_size) \
36#define bfin_read16(addr) ({ \
37 uint32_t __v; \
38 __asm__ __volatile__( \
39 NOP_PAD_ANOMALY_05000198 \
40 "%0 = w[%1] (z);" \
41 : "=d" (__v) \
42 : "a" (addr) \
43 ); \
44 __v; })
45
46#define bfin_read32(addr) ({ \
47 uint32_t __v; \
48 __asm__ __volatile__( \
49 NOP_PAD_ANOMALY_05000198 \
50 "%0 = [%1];" \
51 : "=d" (__v) \
52 : "a" (addr) \
53 ); \
54 __v; })
55
56#define bfin_write8(addr, val) \
57 __asm__ __volatile__( \ 38 __asm__ __volatile__( \
58 NOP_PAD_ANOMALY_05000198 \ 39 NOP_PAD_ANOMALY_05000198 \
59 "b[%0] = %1;" \ 40 #asm_size "[%0] = %1;" \
60 : \ 41 : \
61 : "a" (addr), "d" ((uint8_t)(val)) \ 42 : "a" (addr), "d" ((u##size)(val)) \
62 : "memory" \ 43 : "memory" \
63 ) 44 )
64 45
65#define bfin_write16(addr, val) \ 46#define bfin_read8(addr) _bfin_readX(addr, 8, b, (z))
66 __asm__ __volatile__( \ 47#define bfin_read16(addr) _bfin_readX(addr, 16, w, (z))
67 NOP_PAD_ANOMALY_05000198 \ 48#define bfin_read32(addr) _bfin_readX(addr, 32, , )
68 "w[%0] = %1;" \ 49#define bfin_write8(addr, val) _bfin_writeX(addr, val, 8, b)
69 : \ 50#define bfin_write16(addr, val) _bfin_writeX(addr, val, 16, w)
70 : "a" (addr), "d" ((uint16_t)(val)) \ 51#define bfin_write32(addr, val) _bfin_writeX(addr, val, 32, )
71 : "memory" \
72 )
73
74#define bfin_write32(addr, val) \
75 __asm__ __volatile__( \
76 NOP_PAD_ANOMALY_05000198 \
77 "[%0] = %1;" \
78 : \
79 : "a" (addr), "d" (val) \
80 : "memory" \
81 )
82 52
83#endif /* __ASSEMBLY__ */ 53#endif /* __ASSEMBLY__ */
84 54
diff --git a/arch/blackfin/include/asm/delay.h b/arch/blackfin/include/asm/delay.h
index c31f91cc1d5d..171d8deb04a5 100644
--- a/arch/blackfin/include/asm/delay.h
+++ b/arch/blackfin/include/asm/delay.h
@@ -30,10 +30,22 @@ __asm__ __volatile__ (
30 30
31#define HZSCALE (268435456 / (1000000/HZ)) 31#define HZSCALE (268435456 / (1000000/HZ))
32 32
33static inline void udelay(unsigned long usecs) 33static inline unsigned long __to_delay(unsigned long scale)
34{ 34{
35 extern unsigned long loops_per_jiffy; 35 extern unsigned long loops_per_jiffy;
36 __delay((((usecs * HZSCALE) >> 11) * (loops_per_jiffy >> 11)) >> 6); 36 return (((scale * HZSCALE) >> 11) * (loops_per_jiffy >> 11)) >> 6;
37}
38
39static inline void udelay(unsigned long usecs)
40{
41 __delay(__to_delay(usecs));
37} 42}
38 43
44static inline void ndelay(unsigned long nsecs)
45{
46 __delay(__to_delay(1) * nsecs / 1000);
47}
48
49#define ndelay ndelay
50
39#endif 51#endif
diff --git a/arch/blackfin/include/asm/dma-mapping.h b/arch/blackfin/include/asm/dma-mapping.h
index f9172ff30e5c..212cb80fd74b 100644
--- a/arch/blackfin/include/asm/dma-mapping.h
+++ b/arch/blackfin/include/asm/dma-mapping.h
@@ -44,13 +44,8 @@ dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
44extern void 44extern void
45__dma_sync(dma_addr_t addr, size_t size, enum dma_data_direction dir); 45__dma_sync(dma_addr_t addr, size_t size, enum dma_data_direction dir);
46static inline void 46static inline void
47_dma_sync(dma_addr_t addr, size_t size, enum dma_data_direction dir) 47__dma_sync_inline(dma_addr_t addr, size_t size, enum dma_data_direction dir)
48{ 48{
49 if (!__builtin_constant_p(dir)) {
50 __dma_sync(addr, size, dir);
51 return;
52 }
53
54 switch (dir) { 49 switch (dir) {
55 case DMA_NONE: 50 case DMA_NONE:
56 BUG(); 51 BUG();
@@ -64,14 +59,15 @@ _dma_sync(dma_addr_t addr, size_t size, enum dma_data_direction dir)
64 break; 59 break;
65 } 60 }
66} 61}
62static inline void
63_dma_sync(dma_addr_t addr, size_t size, enum dma_data_direction dir)
64{
65 if (__builtin_constant_p(dir))
66 __dma_sync_inline(addr, size, dir);
67 else
68 __dma_sync(addr, size, dir);
69}
67 70
68/*
69 * Map a single buffer of the indicated size for DMA in streaming mode.
70 * The 32-bit bus address to use is returned.
71 *
72 * Once the device is given the dma address, the device owns this memory
73 * until either pci_unmap_single or pci_dma_sync_single is performed.
74 */
75static inline dma_addr_t 71static inline dma_addr_t
76dma_map_single(struct device *dev, void *ptr, size_t size, 72dma_map_single(struct device *dev, void *ptr, size_t size,
77 enum dma_data_direction dir) 73 enum dma_data_direction dir)
@@ -88,14 +84,6 @@ dma_map_page(struct device *dev, struct page *page,
88 return dma_map_single(dev, page_address(page) + offset, size, dir); 84 return dma_map_single(dev, page_address(page) + offset, size, dir);
89} 85}
90 86
91/*
92 * Unmap a single streaming mode DMA translation. The dma_addr and size
93 * must match what was provided for in a previous pci_map_single call. All
94 * other usages are undefined.
95 *
96 * After this call, reads by the cpu to the buffer are guarenteed to see
97 * whatever the device wrote there.
98 */
99static inline void 87static inline void
100dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, 88dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
101 enum dma_data_direction dir) 89 enum dma_data_direction dir)
@@ -110,30 +98,9 @@ dma_unmap_page(struct device *dev, dma_addr_t dma_addr, size_t size,
110 dma_unmap_single(dev, dma_addr, size, dir); 98 dma_unmap_single(dev, dma_addr, size, dir);
111} 99}
112 100
113/*
114 * Map a set of buffers described by scatterlist in streaming
115 * mode for DMA. This is the scather-gather version of the
116 * above pci_map_single interface. Here the scatter gather list
117 * elements are each tagged with the appropriate dma address
118 * and length. They are obtained via sg_dma_{address,length}(SG).
119 *
120 * NOTE: An implementation may be able to use a smaller number of
121 * DMA address/length pairs than there are SG table elements.
122 * (for example via virtual mapping capabilities)
123 * The routine returns the number of addr/length pairs actually
124 * used, at most nents.
125 *
126 * Device ownership issues as mentioned above for pci_map_single are
127 * the same here.
128 */
129extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, 101extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
130 enum dma_data_direction dir); 102 enum dma_data_direction dir);
131 103
132/*
133 * Unmap a set of streaming mode DMA translations.
134 * Again, cpu read rules concerning calls here are the same as for
135 * pci_unmap_single() above.
136 */
137static inline void 104static inline void
138dma_unmap_sg(struct device *dev, struct scatterlist *sg, 105dma_unmap_sg(struct device *dev, struct scatterlist *sg,
139 int nhwentries, enum dma_data_direction dir) 106 int nhwentries, enum dma_data_direction dir)
diff --git a/arch/blackfin/include/asm/dma.h b/arch/blackfin/include/asm/dma.h
index bd2e62243abe..2c09b1d50ec9 100644
--- a/arch/blackfin/include/asm/dma.h
+++ b/arch/blackfin/include/asm/dma.h
@@ -262,6 +262,10 @@ static inline void dma_disable_irq(unsigned int channel)
262{ 262{
263 disable_irq(dma_ch[channel].irq); 263 disable_irq(dma_ch[channel].irq);
264} 264}
265static inline void dma_disable_irq_nosync(unsigned int channel)
266{
267 disable_irq_nosync(dma_ch[channel].irq);
268}
265static inline void dma_enable_irq(unsigned int channel) 269static inline void dma_enable_irq(unsigned int channel)
266{ 270{
267 enable_irq(dma_ch[channel].irq); 271 enable_irq(dma_ch[channel].irq);
diff --git a/arch/blackfin/include/asm/dpmc.h b/arch/blackfin/include/asm/dpmc.h
index 1597ae5041ee..efcc3aebeae4 100644
--- a/arch/blackfin/include/asm/dpmc.h
+++ b/arch/blackfin/include/asm/dpmc.h
@@ -75,7 +75,7 @@
75 75
76#define VLEV 0x00F0 /* Internal Voltage Level */ 76#define VLEV 0x00F0 /* Internal Voltage Level */
77#ifdef __ADSPBF52x__ 77#ifdef __ADSPBF52x__
78#define VLEV_085 0x0040 /* VLEV = 0.85 V (-5% - +10% Accuracy) */ 78#define VLEV_085 0x0040 /* VLEV = 0.85 V (-5% - +10% Accuracy) */
79#define VLEV_090 0x0050 /* VLEV = 0.90 V (-5% - +10% Accuracy) */ 79#define VLEV_090 0x0050 /* VLEV = 0.90 V (-5% - +10% Accuracy) */
80#define VLEV_095 0x0060 /* VLEV = 0.95 V (-5% - +10% Accuracy) */ 80#define VLEV_095 0x0060 /* VLEV = 0.95 V (-5% - +10% Accuracy) */
81#define VLEV_100 0x0070 /* VLEV = 1.00 V (-5% - +10% Accuracy) */ 81#define VLEV_100 0x0070 /* VLEV = 1.00 V (-5% - +10% Accuracy) */
@@ -84,7 +84,7 @@
84#define VLEV_115 0x00A0 /* VLEV = 1.15 V (-5% - +10% Accuracy) */ 84#define VLEV_115 0x00A0 /* VLEV = 1.15 V (-5% - +10% Accuracy) */
85#define VLEV_120 0x00B0 /* VLEV = 1.20 V (-5% - +10% Accuracy) */ 85#define VLEV_120 0x00B0 /* VLEV = 1.20 V (-5% - +10% Accuracy) */
86#else 86#else
87#define VLEV_085 0x0060 /* VLEV = 0.85 V (-5% - +10% Accuracy) */ 87#define VLEV_085 0x0060 /* VLEV = 0.85 V (-5% - +10% Accuracy) */
88#define VLEV_090 0x0070 /* VLEV = 0.90 V (-5% - +10% Accuracy) */ 88#define VLEV_090 0x0070 /* VLEV = 0.90 V (-5% - +10% Accuracy) */
89#define VLEV_095 0x0080 /* VLEV = 0.95 V (-5% - +10% Accuracy) */ 89#define VLEV_095 0x0080 /* VLEV = 0.95 V (-5% - +10% Accuracy) */
90#define VLEV_100 0x0090 /* VLEV = 1.00 V (-5% - +10% Accuracy) */ 90#define VLEV_100 0x0090 /* VLEV = 1.00 V (-5% - +10% Accuracy) */
diff --git a/arch/blackfin/include/asm/elf.h b/arch/blackfin/include/asm/elf.h
index 5b50f0ecacf8..117713adea7f 100644
--- a/arch/blackfin/include/asm/elf.h
+++ b/arch/blackfin/include/asm/elf.h
@@ -22,12 +22,15 @@
22#define EF_BFIN_CODE_IN_L2 0x00000040 /* --code-in-l2 */ 22#define EF_BFIN_CODE_IN_L2 0x00000040 /* --code-in-l2 */
23#define EF_BFIN_DATA_IN_L2 0x00000080 /* --data-in-l2 */ 23#define EF_BFIN_DATA_IN_L2 0x00000080 /* --data-in-l2 */
24 24
25#if 1 /* core dumps not supported, but linux/elfcore.h needs these */
25typedef unsigned long elf_greg_t; 26typedef unsigned long elf_greg_t;
26 27
27#define ELF_NGREG 40 /* (sizeof(struct user_regs_struct) / sizeof(elf_greg_t)) */ 28#define ELF_NGREG (sizeof(struct pt_regs) / sizeof(elf_greg_t))
28typedef elf_greg_t elf_gregset_t[ELF_NGREG]; 29typedef elf_greg_t elf_gregset_t[ELF_NGREG];
29 30
30typedef struct { } elf_fpregset_t; 31typedef struct { } elf_fpregset_t;
32#endif
33
31/* 34/*
32 * This is used to ensure we don't load something for the wrong architecture. 35 * This is used to ensure we don't load something for the wrong architecture.
33 */ 36 */
@@ -55,6 +58,9 @@ do { \
55 _regs->p2 = _dynamic_addr; \ 58 _regs->p2 = _dynamic_addr; \
56} while(0) 59} while(0)
57 60
61#if 0
62#define CORE_DUMP_USE_REGSET
63#endif
58#define ELF_FDPIC_CORE_EFLAGS EF_BFIN_FDPIC 64#define ELF_FDPIC_CORE_EFLAGS EF_BFIN_FDPIC
59#define ELF_EXEC_PAGESIZE 4096 65#define ELF_EXEC_PAGESIZE 4096
60 66
diff --git a/arch/blackfin/include/asm/ftrace.h b/arch/blackfin/include/asm/ftrace.h
index 90c9b400ba6d..4cfe2d9ba7e8 100644
--- a/arch/blackfin/include/asm/ftrace.h
+++ b/arch/blackfin/include/asm/ftrace.h
@@ -10,4 +10,57 @@
10 10
11#define MCOUNT_INSN_SIZE 6 /* sizeof "[++sp] = rets; call __mcount;" */ 11#define MCOUNT_INSN_SIZE 6 /* sizeof "[++sp] = rets; call __mcount;" */
12 12
13#ifndef __ASSEMBLY__
14
15#ifdef CONFIG_FRAME_POINTER
16#include <linux/mm.h>
17
18extern inline void *return_address(unsigned int level)
19{
20 unsigned long *endstack, *fp, *ret_addr;
21 unsigned int current_level = 0;
22
23 if (level == 0)
24 return __builtin_return_address(0);
25
26 fp = (unsigned long *)__builtin_frame_address(0);
27 endstack = (unsigned long *)PAGE_ALIGN((unsigned long)&level);
28
29 while (((unsigned long)fp & 0x3) == 0 && fp &&
30 (fp + 1) < endstack && current_level < level) {
31 fp = (unsigned long *)*fp;
32 current_level++;
33 }
34
35 if (((unsigned long)fp & 0x3) == 0 && fp &&
36 (fp + 1) < endstack)
37 ret_addr = (unsigned long *)*(fp + 1);
38 else
39 ret_addr = NULL;
40
41 return ret_addr;
42}
43
44#else
45
46extern inline void *return_address(unsigned int level)
47{
48 return NULL;
49}
50
51#endif /* CONFIG_FRAME_POINTER */
52
53#define HAVE_ARCH_CALLER_ADDR
54
55/* inline function or macro may lead to unexpected result */
56#define CALLER_ADDR0 ((unsigned long)__builtin_return_address(0))
57#define CALLER_ADDR1 ((unsigned long)return_address(1))
58#define CALLER_ADDR2 ((unsigned long)return_address(2))
59#define CALLER_ADDR3 ((unsigned long)return_address(3))
60#define CALLER_ADDR4 ((unsigned long)return_address(4))
61#define CALLER_ADDR5 ((unsigned long)return_address(5))
62#define CALLER_ADDR6 ((unsigned long)return_address(6))
63
64#endif /* __ASSEMBLY__ */
65
13#endif 66#endif
diff --git a/arch/blackfin/include/asm/gpio.h b/arch/blackfin/include/asm/gpio.h
index 539468a05057..01b19d0cf509 100644
--- a/arch/blackfin/include/asm/gpio.h
+++ b/arch/blackfin/include/asm/gpio.h
@@ -70,6 +70,8 @@
70 70
71#ifndef __ASSEMBLY__ 71#ifndef __ASSEMBLY__
72 72
73#include <linux/compiler.h>
74
73/*********************************************************** 75/***********************************************************
74* 76*
75* FUNCTIONS: Blackfin General Purpose Ports Access Functions 77* FUNCTIONS: Blackfin General Purpose Ports Access Functions
@@ -165,23 +167,23 @@ int bfin_special_gpio_request(unsigned gpio, const char *label);
165#endif 167#endif
166 168
167#ifdef CONFIG_PM 169#ifdef CONFIG_PM
170int bfin_pm_standby_ctrl(unsigned ctrl);
168 171
169unsigned int bfin_pm_standby_setup(void); 172static inline int bfin_pm_standby_setup(void)
170void bfin_pm_standby_restore(void); 173{
174 return bfin_pm_standby_ctrl(1);
175}
176
177static inline void bfin_pm_standby_restore(void)
178{
179 bfin_pm_standby_ctrl(0);
180}
171 181
172void bfin_gpio_pm_hibernate_restore(void); 182void bfin_gpio_pm_hibernate_restore(void);
173void bfin_gpio_pm_hibernate_suspend(void); 183void bfin_gpio_pm_hibernate_suspend(void);
174 184
175#ifndef CONFIG_BF54x 185#ifndef CONFIG_BF54x
176#define PM_WAKE_RISING 0x1 186int gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl);
177#define PM_WAKE_FALLING 0x2
178#define PM_WAKE_HIGH 0x4
179#define PM_WAKE_LOW 0x8
180#define PM_WAKE_BOTH_EDGES (PM_WAKE_RISING | PM_WAKE_FALLING)
181#define PM_WAKE_IGNORE 0xF0
182
183int gpio_pm_wakeup_request(unsigned gpio, unsigned char type);
184void gpio_pm_wakeup_free(unsigned gpio);
185 187
186struct gpio_port_s { 188struct gpio_port_s {
187 unsigned short data; 189 unsigned short data;
@@ -223,6 +225,9 @@ int bfin_gpio_direction_output(unsigned gpio, int value);
223int bfin_gpio_get_value(unsigned gpio); 225int bfin_gpio_get_value(unsigned gpio);
224void bfin_gpio_set_value(unsigned gpio, int value); 226void bfin_gpio_set_value(unsigned gpio, int value);
225 227
228#include <asm/irq.h>
229#include <asm/errno.h>
230
226#ifdef CONFIG_GPIOLIB 231#ifdef CONFIG_GPIOLIB
227#include <asm-generic/gpio.h> /* cansleep wrappers */ 232#include <asm-generic/gpio.h> /* cansleep wrappers */
228 233
@@ -247,6 +252,11 @@ static inline int gpio_cansleep(unsigned int gpio)
247 return __gpio_cansleep(gpio); 252 return __gpio_cansleep(gpio);
248} 253}
249 254
255static inline int gpio_to_irq(unsigned gpio)
256{
257 return __gpio_to_irq(gpio);
258}
259
250#else /* !CONFIG_GPIOLIB */ 260#else /* !CONFIG_GPIOLIB */
251 261
252static inline int gpio_request(unsigned gpio, const char *label) 262static inline int gpio_request(unsigned gpio, const char *label)
@@ -279,10 +289,6 @@ static inline void gpio_set_value(unsigned gpio, int value)
279 return bfin_gpio_set_value(gpio, value); 289 return bfin_gpio_set_value(gpio, value);
280} 290}
281 291
282#include <asm-generic/gpio.h> /* cansleep wrappers */
283#endif /* !CONFIG_GPIOLIB */
284#include <asm/irq.h>
285
286static inline int gpio_to_irq(unsigned gpio) 292static inline int gpio_to_irq(unsigned gpio)
287{ 293{
288 if (likely(gpio < MAX_BLACKFIN_GPIOS)) 294 if (likely(gpio < MAX_BLACKFIN_GPIOS))
@@ -291,6 +297,9 @@ static inline int gpio_to_irq(unsigned gpio)
291 return -EINVAL; 297 return -EINVAL;
292} 298}
293 299
300#include <asm-generic/gpio.h> /* cansleep wrappers */
301#endif /* !CONFIG_GPIOLIB */
302
294static inline int irq_to_gpio(unsigned irq) 303static inline int irq_to_gpio(unsigned irq)
295{ 304{
296 return (irq - GPIO_IRQ_BASE); 305 return (irq - GPIO_IRQ_BASE);
diff --git a/arch/blackfin/include/asm/irq.h b/arch/blackfin/include/asm/irq.h
index e7c0623f9091..12f4060a31b0 100644
--- a/arch/blackfin/include/asm/irq.h
+++ b/arch/blackfin/include/asm/irq.h
@@ -12,6 +12,9 @@
12 12
13#include <linux/irqflags.h> 13#include <linux/irqflags.h>
14 14
15/* IRQs that may be used by external irq_chip controllers */
16#define NR_SPARE_IRQS 32
17
15#include <mach/anomaly.h> 18#include <mach/anomaly.h>
16 19
17/* SYS_IRQS and NR_IRQS are defined in <mach-bf5xx/irq.h> */ 20/* SYS_IRQS and NR_IRQS are defined in <mach-bf5xx/irq.h> */
@@ -35,4 +38,8 @@
35 38
36#include <asm-generic/irq.h> 39#include <asm-generic/irq.h>
37 40
41#ifdef CONFIG_NMI_WATCHDOG
42# define ARCH_HAS_NMI_WATCHDOG
43#endif
44
38#endif /* _BFIN_IRQ_H_ */ 45#endif /* _BFIN_IRQ_H_ */
diff --git a/arch/blackfin/include/asm/mmu_context.h b/arch/blackfin/include/asm/mmu_context.h
index ae8ef4ffd806..e1a9b4624f91 100644
--- a/arch/blackfin/include/asm/mmu_context.h
+++ b/arch/blackfin/include/asm/mmu_context.h
@@ -7,12 +7,13 @@
7#ifndef __BLACKFIN_MMU_CONTEXT_H__ 7#ifndef __BLACKFIN_MMU_CONTEXT_H__
8#define __BLACKFIN_MMU_CONTEXT_H__ 8#define __BLACKFIN_MMU_CONTEXT_H__
9 9
10#include <linux/gfp.h> 10#include <linux/slab.h>
11#include <linux/sched.h> 11#include <linux/sched.h>
12#include <asm/setup.h> 12#include <asm/setup.h>
13#include <asm/page.h> 13#include <asm/page.h>
14#include <asm/pgalloc.h> 14#include <asm/pgalloc.h>
15#include <asm/cplbinit.h> 15#include <asm/cplbinit.h>
16#include <asm/sections.h>
16 17
17/* Note: L1 stacks are CPU-private things, so we bluntly disable this 18/* Note: L1 stacks are CPU-private things, so we bluntly disable this
18 feature in SMP mode, and use the per-CPU scratch SRAM bank only to 19 feature in SMP mode, and use the per-CPU scratch SRAM bank only to
@@ -117,9 +118,16 @@ static inline void protect_page(struct mm_struct *mm, unsigned long addr,
117 unsigned long flags) 118 unsigned long flags)
118{ 119{
119 unsigned long *mask = mm->context.page_rwx_mask; 120 unsigned long *mask = mm->context.page_rwx_mask;
120 unsigned long page = addr >> 12; 121 unsigned long page;
121 unsigned long idx = page >> 5; 122 unsigned long idx;
122 unsigned long bit = 1 << (page & 31); 123 unsigned long bit;
124
125 if (unlikely(addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE))
126 page = (addr - (ASYNC_BANK0_BASE - _ramend)) >> 12;
127 else
128 page = addr >> 12;
129 idx = page >> 5;
130 bit = 1 << (page & 31);
123 131
124 if (flags & VM_READ) 132 if (flags & VM_READ)
125 mask[idx] |= bit; 133 mask[idx] |= bit;
diff --git a/arch/blackfin/include/asm/nand.h b/arch/blackfin/include/asm/nand.h
index 3ae8b569edfc..3a1e79dfc8d9 100644
--- a/arch/blackfin/include/asm/nand.h
+++ b/arch/blackfin/include/asm/nand.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * BF5XX - NAND flash controller platfrom_device info 2 * BF5XX - NAND flash controller platform_device info
3 * 3 *
4 * Copyright 2007-2008 Analog Devices, Inc. 4 * Copyright 2007-2008 Analog Devices, Inc.
5 * 5 *
@@ -8,7 +8,7 @@
8 8
9/* struct bf5xx_nand_platform 9/* struct bf5xx_nand_platform
10 * 10 *
11 * define a interface between platfrom board specific code and 11 * define a interface between platform board specific code and
12 * bf54x NFC driver. 12 * bf54x NFC driver.
13 * 13 *
14 * nr_partitions = number of partitions pointed to be partitoons (or zero) 14 * nr_partitions = number of partitions pointed to be partitoons (or zero)
diff --git a/arch/blackfin/include/asm/nmi.h b/arch/blackfin/include/asm/nmi.h
new file mode 100644
index 000000000000..b9caac4fcfd8
--- /dev/null
+++ b/arch/blackfin/include/asm/nmi.h
@@ -0,0 +1,12 @@
1/*
2 * Copyright 2010 Analog Devices Inc.
3 *
4 * Licensed under the GPL-2
5 */
6
7#ifndef _BFIN_NMI_H_
8#define _BFIN_NMI_H_
9
10#include <linux/nmi.h>
11
12#endif
diff --git a/arch/blackfin/include/asm/page.h b/arch/blackfin/include/asm/page.h
index 1d04e4078340..d0ce975bcd48 100644
--- a/arch/blackfin/include/asm/page.h
+++ b/arch/blackfin/include/asm/page.h
@@ -15,4 +15,7 @@
15 ((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0 ) | \ 15 ((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0 ) | \
16 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) 16 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
17 17
18#include <asm-generic/memory_model.h>
19#include <asm-generic/getorder.h>
20
18#endif 21#endif
diff --git a/arch/blackfin/include/asm/pgtable.h b/arch/blackfin/include/asm/pgtable.h
index 821c699c2238..dcca3e6d6e80 100644
--- a/arch/blackfin/include/asm/pgtable.h
+++ b/arch/blackfin/include/asm/pgtable.h
@@ -80,7 +80,8 @@ PTE_BIT_FUNC(mkyoung, |= _PAGE_ACCESSED);
80 * ZERO_PAGE is a global shared page that is always zero: used 80 * ZERO_PAGE is a global shared page that is always zero: used
81 * for zero-mapped memory areas etc.. 81 * for zero-mapped memory areas etc..
82 */ 82 */
83#define ZERO_PAGE(vaddr) (virt_to_page(0)) 83#define ZERO_PAGE(vaddr) virt_to_page(empty_zero_page)
84extern char empty_zero_page[];
84 85
85extern unsigned int kobjsize(const void *objp); 86extern unsigned int kobjsize(const void *objp);
86 87
diff --git a/arch/blackfin/include/asm/pseudo_instructions.h b/arch/blackfin/include/asm/pseudo_instructions.h
new file mode 100644
index 000000000000..b00adfa08169
--- /dev/null
+++ b/arch/blackfin/include/asm/pseudo_instructions.h
@@ -0,0 +1,18 @@
1/*
2 * header file for pseudo instructions
3 *
4 * Copyright 2010 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9#ifndef _BLACKFIN_PSEUDO_
10#define _BLACKFIN_PSEUDO_
11
12#include <linux/types.h>
13#include <asm/ptrace.h>
14
15extern bool execute_pseudodbg_assert(struct pt_regs *fp, unsigned int opcode);
16extern bool execute_pseudodbg(struct pt_regs *fp, unsigned int opcode);
17
18#endif
diff --git a/arch/blackfin/include/asm/ptrace.h b/arch/blackfin/include/asm/ptrace.h
index b33a4488f498..aaa1c6c2bc19 100644
--- a/arch/blackfin/include/asm/ptrace.h
+++ b/arch/blackfin/include/asm/ptrace.h
@@ -24,6 +24,8 @@
24 24
25#ifndef __ASSEMBLY__ 25#ifndef __ASSEMBLY__
26 26
27struct task_struct;
28
27/* this struct defines the way the registers are stored on the 29/* this struct defines the way the registers are stored on the
28 stack during a system call. */ 30 stack during a system call. */
29 31
@@ -101,9 +103,30 @@ struct pt_regs {
101 master interrupt enable. */ 103 master interrupt enable. */
102#define user_mode(regs) (!(((regs)->ipend & ~0x10) & (((regs)->ipend & ~0x10) - 1))) 104#define user_mode(regs) (!(((regs)->ipend & ~0x10) & (((regs)->ipend & ~0x10) - 1)))
103#define instruction_pointer(regs) ((regs)->pc) 105#define instruction_pointer(regs) ((regs)->pc)
106#define user_stack_pointer(regs) ((regs)->usp)
104#define profile_pc(regs) instruction_pointer(regs) 107#define profile_pc(regs) instruction_pointer(regs)
105extern void show_regs(struct pt_regs *); 108extern void show_regs(struct pt_regs *);
106 109
110#define arch_has_single_step() (1)
111extern void user_enable_single_step(struct task_struct *child);
112extern void user_disable_single_step(struct task_struct *child);
113/* common code demands this function */
114#define ptrace_disable(child) user_disable_single_step(child)
115
116/*
117 * Get the address of the live pt_regs for the specified task.
118 * These are saved onto the top kernel stack when the process
119 * is not running.
120 *
121 * Note: if a user thread is execve'd from kernel space, the
122 * kernel stack will not be empty on entry to the kernel, so
123 * ptracing these tasks will fail.
124 */
125#define task_pt_regs(task) \
126 (struct pt_regs *) \
127 ((unsigned long)task_stack_page(task) + \
128 (THREAD_SIZE - sizeof(struct pt_regs)))
129
107#endif /* __KERNEL__ */ 130#endif /* __KERNEL__ */
108 131
109#endif /* __ASSEMBLY__ */ 132#endif /* __ASSEMBLY__ */
@@ -173,4 +196,6 @@ extern void show_regs(struct pt_regs *);
173#define PT_FDPIC_EXEC 232 196#define PT_FDPIC_EXEC 232
174#define PT_FDPIC_INTERP 236 197#define PT_FDPIC_INTERP 236
175 198
199#define PT_LAST_PSEUDO PT_FDPIC_INTERP
200
176#endif /* _BFIN_PTRACE_H */ 201#endif /* _BFIN_PTRACE_H */
diff --git a/arch/blackfin/include/asm/scatterlist.h b/arch/blackfin/include/asm/scatterlist.h
index 04f448711cd0..64d41d34ab0b 100644
--- a/arch/blackfin/include/asm/scatterlist.h
+++ b/arch/blackfin/include/asm/scatterlist.h
@@ -1,27 +1,7 @@
1#ifndef _BLACKFIN_SCATTERLIST_H 1#ifndef _BLACKFIN_SCATTERLIST_H
2#define _BLACKFIN_SCATTERLIST_H 2#define _BLACKFIN_SCATTERLIST_H
3 3
4#include <linux/mm.h> 4#include <asm-generic/scatterlist.h>
5
6struct scatterlist {
7#ifdef CONFIG_DEBUG_SG
8 unsigned long sg_magic;
9#endif
10 unsigned long page_link;
11 unsigned int offset;
12 dma_addr_t dma_address;
13 unsigned int length;
14};
15
16/*
17 * These macros should be used after a pci_map_sg call has been done
18 * to get bus addresses of each of the SG entries and their lengths.
19 * You should only work with the number of sg entries pci_map_sg
20 * returns, or alternatively stop on the first sg_dma_len(sg) which
21 * is 0.
22 */
23#define sg_dma_address(sg) ((sg)->dma_address)
24#define sg_dma_len(sg) ((sg)->length)
25 5
26#define ISA_DMA_THRESHOLD (0xffffffff) 6#define ISA_DMA_THRESHOLD (0xffffffff)
27 7
diff --git a/arch/blackfin/include/asm/sections.h b/arch/blackfin/include/asm/sections.h
index 42f6c53c59c6..14a3e66d9167 100644
--- a/arch/blackfin/include/asm/sections.h
+++ b/arch/blackfin/include/asm/sections.h
@@ -21,6 +21,9 @@ extern unsigned long memory_start, memory_end, physical_mem_end;
21extern char _stext_l1[], _etext_l1[], _text_l1_lma[], __weak _text_l1_len[]; 21extern char _stext_l1[], _etext_l1[], _text_l1_lma[], __weak _text_l1_len[];
22extern char _sdata_l1[], _edata_l1[], _sbss_l1[], _ebss_l1[], 22extern char _sdata_l1[], _edata_l1[], _sbss_l1[], _ebss_l1[],
23 _data_l1_lma[], __weak _data_l1_len[]; 23 _data_l1_lma[], __weak _data_l1_len[];
24#ifdef CONFIG_ROMKERNEL
25extern char _data_lma[], _data_len[], _sinitdata[], _einitdata[], _init_data_lma[], _init_data_len[];
26#endif
24extern char _sdata_b_l1[], _edata_b_l1[], _sbss_b_l1[], _ebss_b_l1[], 27extern char _sdata_b_l1[], _edata_b_l1[], _sbss_b_l1[], _ebss_b_l1[],
25 _data_b_l1_lma[], __weak _data_b_l1_len[]; 28 _data_b_l1_lma[], __weak _data_b_l1_len[];
26extern char _stext_l2[], _etext_l2[], _sdata_l2[], _edata_l2[], 29extern char _stext_l2[], _etext_l2[], _sdata_l2[], _edata_l2[],
diff --git a/arch/blackfin/include/asm/smp.h b/arch/blackfin/include/asm/smp.h
index 6a0fe94b84a6..f5b537967116 100644
--- a/arch/blackfin/include/asm/smp.h
+++ b/arch/blackfin/include/asm/smp.h
@@ -22,8 +22,23 @@ extern char coreb_trampoline_start, coreb_trampoline_end;
22struct corelock_slot { 22struct corelock_slot {
23 int lock; 23 int lock;
24}; 24};
25extern struct corelock_slot corelock;
26
27#ifdef __ARCH_SYNC_CORE_ICACHE
28extern unsigned long icache_invld_count[NR_CPUS];
29#endif
30#ifdef __ARCH_SYNC_CORE_DCACHE
31extern unsigned long dcache_invld_count[NR_CPUS];
32#endif
25 33
26void smp_icache_flush_range_others(unsigned long start, 34void smp_icache_flush_range_others(unsigned long start,
27 unsigned long end); 35 unsigned long end);
36#ifdef CONFIG_HOTPLUG_CPU
37void coreb_sleep(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2);
38void cpu_die(void);
39void platform_cpu_die(void);
40int __cpu_disable(void);
41int __cpu_die(unsigned int cpu);
42#endif
28 43
29#endif /* !__ASM_BLACKFIN_SMP_H */ 44#endif /* !__ASM_BLACKFIN_SMP_H */
diff --git a/arch/blackfin/include/asm/string.h b/arch/blackfin/include/asm/string.h
index d7f0ccb418c3..423c099aa988 100644
--- a/arch/blackfin/include/asm/string.h
+++ b/arch/blackfin/include/asm/string.h
@@ -12,121 +12,16 @@
12#ifdef __KERNEL__ /* only set these up for kernel code */ 12#ifdef __KERNEL__ /* only set these up for kernel code */
13 13
14#define __HAVE_ARCH_STRCPY 14#define __HAVE_ARCH_STRCPY
15extern inline char *strcpy(char *dest, const char *src) 15extern char *strcpy(char *dest, const char *src);
16{
17 char *xdest = dest;
18 char temp = 0;
19
20 __asm__ __volatile__ (
21 "1:"
22 "%2 = B [%1++] (Z);"
23 "B [%0++] = %2;"
24 "CC = %2;"
25 "if cc jump 1b (bp);"
26 : "+&a" (dest), "+&a" (src), "=&d" (temp)
27 :
28 : "memory", "CC");
29
30 return xdest;
31}
32 16
33#define __HAVE_ARCH_STRNCPY 17#define __HAVE_ARCH_STRNCPY
34extern inline char *strncpy(char *dest, const char *src, size_t n) 18extern char *strncpy(char *dest, const char *src, size_t n);
35{
36 char *xdest = dest;
37 char temp = 0;
38
39 if (n == 0)
40 return xdest;
41
42 __asm__ __volatile__ (
43 "1:"
44 "%3 = B [%1++] (Z);"
45 "B [%0++] = %3;"
46 "CC = %3;"
47 "if ! cc jump 2f;"
48 "%2 += -1;"
49 "CC = %2 == 0;"
50 "if ! cc jump 1b (bp);"
51 "jump 4f;"
52 "2:"
53 /* if src is shorter than n, we need to null pad bytes now */
54 "%3 = 0;"
55 "3:"
56 "%2 += -1;"
57 "CC = %2 == 0;"
58 "if cc jump 4f;"
59 "B [%0++] = %3;"
60 "jump 3b;"
61 "4:"
62 : "+&a" (dest), "+&a" (src), "+&da" (n), "=&d" (temp)
63 :
64 : "memory", "CC");
65
66 return xdest;
67}
68 19
69#define __HAVE_ARCH_STRCMP 20#define __HAVE_ARCH_STRCMP
70extern inline int strcmp(const char *cs, const char *ct) 21extern int strcmp(const char *cs, const char *ct);
71{
72 /* need to use int's here so the char's in the assembly don't get
73 * sign extended incorrectly when we don't want them to be
74 */
75 int __res1, __res2;
76
77 __asm__ __volatile__ (
78 "1:"
79 "%2 = B[%0++] (Z);" /* get *cs */
80 "%3 = B[%1++] (Z);" /* get *ct */
81 "CC = %2 == %3;" /* compare a byte */
82 "if ! cc jump 2f;" /* not equal, break out */
83 "CC = %2;" /* at end of cs? */
84 "if cc jump 1b (bp);" /* no, keep going */
85 "jump.s 3f;" /* strings are equal */
86 "2:"
87 "%2 = %2 - %3;" /* *cs - *ct */
88 "3:"
89 : "+&a" (cs), "+&a" (ct), "=&d" (__res1), "=&d" (__res2)
90 :
91 : "memory", "CC");
92
93 return __res1;
94}
95 22
96#define __HAVE_ARCH_STRNCMP 23#define __HAVE_ARCH_STRNCMP
97extern inline int strncmp(const char *cs, const char *ct, size_t count) 24extern int strncmp(const char *cs, const char *ct, size_t count);
98{
99 /* need to use int's here so the char's in the assembly don't get
100 * sign extended incorrectly when we don't want them to be
101 */
102 int __res1, __res2;
103
104 if (!count)
105 return 0;
106
107 __asm__ __volatile__ (
108 "1:"
109 "%3 = B[%0++] (Z);" /* get *cs */
110 "%4 = B[%1++] (Z);" /* get *ct */
111 "CC = %3 == %4;" /* compare a byte */
112 "if ! cc jump 3f;" /* not equal, break out */
113 "CC = %3;" /* at end of cs? */
114 "if ! cc jump 4f;" /* yes, all done */
115 "%2 += -1;" /* no, adjust count */
116 "CC = %2 == 0;"
117 "if ! cc jump 1b;" /* more to do, keep going */
118 "2:"
119 "%3 = 0;" /* strings are equal */
120 "jump.s 4f;"
121 "3:"
122 "%3 = %3 - %4;" /* *cs - *ct */
123 "4:"
124 : "+&a" (cs), "+&a" (ct), "+&da" (count), "=&d" (__res1), "=&d" (__res2)
125 :
126 : "memory", "CC");
127
128 return __res1;
129}
130 25
131#define __HAVE_ARCH_MEMSET 26#define __HAVE_ARCH_MEMSET
132extern void *memset(void *s, int c, size_t count); 27extern void *memset(void *s, int c, size_t count);
diff --git a/arch/blackfin/include/asm/syscall.h b/arch/blackfin/include/asm/syscall.h
new file mode 100644
index 000000000000..4921a4815cce
--- /dev/null
+++ b/arch/blackfin/include/asm/syscall.h
@@ -0,0 +1,96 @@
1/*
2 * Magic syscall break down functions
3 *
4 * Copyright 2010 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9#ifndef __ASM_BLACKFIN_SYSCALL_H__
10#define __ASM_BLACKFIN_SYSCALL_H__
11
12/*
13 * Blackfin syscalls are simple:
14 * enter:
15 * p0: syscall number
16 * r{0,1,2,3,4,5}: syscall args 0,1,2,3,4,5
17 * exit:
18 * r0: return/error value
19 */
20
21#include <linux/err.h>
22#include <linux/sched.h>
23#include <asm/ptrace.h>
24
25static inline long
26syscall_get_nr(struct task_struct *task, struct pt_regs *regs)
27{
28 return regs->p0;
29}
30
31static inline void
32syscall_rollback(struct task_struct *task, struct pt_regs *regs)
33{
34 regs->p0 = regs->orig_p0;
35}
36
37static inline long
38syscall_get_error(struct task_struct *task, struct pt_regs *regs)
39{
40 return IS_ERR_VALUE(regs->r0) ? regs->r0 : 0;
41}
42
43static inline long
44syscall_get_return_value(struct task_struct *task, struct pt_regs *regs)
45{
46 return regs->r0;
47}
48
49static inline void
50syscall_set_return_value(struct task_struct *task, struct pt_regs *regs,
51 int error, long val)
52{
53 regs->r0 = error ? -error : val;
54}
55
56/**
57 * syscall_get_arguments()
58 * @task: unused
59 * @regs: the register layout to extract syscall arguments from
60 * @i: first syscall argument to extract
61 * @n: number of syscall arguments to extract
62 * @args: array to return the syscall arguments in
63 *
64 * args[0] gets i'th argument, args[n - 1] gets the i+n-1'th argument
65 */
66static inline void
67syscall_get_arguments(struct task_struct *task, struct pt_regs *regs,
68 unsigned int i, unsigned int n, unsigned long *args)
69{
70 /*
71 * Assume the ptrace layout doesn't change -- r5 is first in memory,
72 * then r4, ..., then r0. So we simply reverse the ptrace register
73 * array in memory to store into the args array.
74 */
75 long *aregs = &regs->r0 - i;
76
77 BUG_ON(i > 5 || i + n > 6);
78
79 while (n--)
80 *args++ = *aregs--;
81}
82
83/* See syscall_get_arguments() comments */
84static inline void
85syscall_set_arguments(struct task_struct *task, struct pt_regs *regs,
86 unsigned int i, unsigned int n, const unsigned long *args)
87{
88 long *aregs = &regs->r0 - i;
89
90 BUG_ON(i > 5 || i + n > 6);
91
92 while (n--)
93 *aregs-- = *args++;
94}
95
96#endif
diff --git a/arch/blackfin/include/asm/thread_info.h b/arch/blackfin/include/asm/thread_info.h
index a40d9368c38a..02560fd8a121 100644
--- a/arch/blackfin/include/asm/thread_info.h
+++ b/arch/blackfin/include/asm/thread_info.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright 2004-2009 Analog Devices Inc. 2 * Copyright 2004-2010 Analog Devices Inc.
3 * 3 *
4 * Licensed under the GPL-2 or later. 4 * Licensed under the GPL-2 or later.
5 */ 5 */
@@ -17,7 +17,7 @@
17/* Thread Align Mask to reach to the top of the stack 17/* Thread Align Mask to reach to the top of the stack
18 * for any process 18 * for any process
19 */ 19 */
20#define ALIGN_PAGE_MASK 0xffffe000 20#define ALIGN_PAGE_MASK 0xffffe000
21 21
22/* 22/*
23 * Size of kernel stack for each process. This must be a power of 2... 23 * Size of kernel stack for each process. This must be a power of 2...
@@ -57,7 +57,7 @@ struct thread_info {
57 .exec_domain = &default_exec_domain, \ 57 .exec_domain = &default_exec_domain, \
58 .flags = 0, \ 58 .flags = 0, \
59 .cpu = 0, \ 59 .cpu = 0, \
60 .preempt_count = INIT_PREEMPT_COUNT, \ 60 .preempt_count = INIT_PREEMPT_COUNT, \
61 .restart_block = { \ 61 .restart_block = { \
62 .fn = do_no_restart_syscall, \ 62 .fn = do_no_restart_syscall, \
63 }, \ 63 }, \
@@ -73,8 +73,7 @@ __attribute_const__
73static inline struct thread_info *current_thread_info(void) 73static inline struct thread_info *current_thread_info(void)
74{ 74{
75 struct thread_info *ti; 75 struct thread_info *ti;
76 __asm__("%0 = sp;" : "=da"(ti) : 76 __asm__("%0 = sp;" : "=da"(ti));
77 );
78 return (struct thread_info *)((long)ti & ~((long)THREAD_SIZE-1)); 77 return (struct thread_info *)((long)ti & ~((long)THREAD_SIZE-1));
79} 78}
80 79
@@ -99,21 +98,23 @@ static inline struct thread_info *current_thread_info(void)
99#define TIF_NEED_RESCHED 2 /* rescheduling necessary */ 98#define TIF_NEED_RESCHED 2 /* rescheduling necessary */
100#define TIF_POLLING_NRFLAG 3 /* true if poll_idle() is polling 99#define TIF_POLLING_NRFLAG 3 /* true if poll_idle() is polling
101 TIF_NEED_RESCHED */ 100 TIF_NEED_RESCHED */
102#define TIF_MEMDIE 4 101#define TIF_MEMDIE 4 /* is terminating due to OOM killer */
103#define TIF_RESTORE_SIGMASK 5 /* restore signal mask in do_signal() */ 102#define TIF_RESTORE_SIGMASK 5 /* restore signal mask in do_signal() */
104#define TIF_FREEZE 6 /* is freezing for suspend */ 103#define TIF_FREEZE 6 /* is freezing for suspend */
105#define TIF_IRQ_SYNC 7 /* sync pipeline stage */ 104#define TIF_IRQ_SYNC 7 /* sync pipeline stage */
106#define TIF_NOTIFY_RESUME 8 /* callback before returning to user */ 105#define TIF_NOTIFY_RESUME 8 /* callback before returning to user */
106#define TIF_SINGLESTEP 9
107 107
108/* as above, but as bit values */ 108/* as above, but as bit values */
109#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) 109#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
110#define _TIF_SIGPENDING (1<<TIF_SIGPENDING) 110#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
111#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) 111#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
112#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
113#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) 112#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
114#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) 113#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK)
115#define _TIF_FREEZE (1<<TIF_FREEZE) 114#define _TIF_FREEZE (1<<TIF_FREEZE)
116#define _TIF_IRQ_SYNC (1<<TIF_IRQ_SYNC) 115#define _TIF_IRQ_SYNC (1<<TIF_IRQ_SYNC)
116#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
117#define _TIF_SINGLESTEP (1<<TIF_SINGLESTEP)
117 118
118#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */ 119#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */
119 120
diff --git a/arch/blackfin/include/asm/time.h b/arch/blackfin/include/asm/time.h
index 589e937ed1eb..9ca7db844d10 100644
--- a/arch/blackfin/include/asm/time.h
+++ b/arch/blackfin/include/asm/time.h
@@ -23,9 +23,7 @@
23 */ 23 */
24 24
25#ifndef CONFIG_CPU_FREQ 25#ifndef CONFIG_CPU_FREQ
26#define TIME_SCALE 1 26# define TIME_SCALE 1
27#define __bfin_cycles_off (0)
28#define __bfin_cycles_mod (0)
29#else 27#else
30/* 28/*
31 * Blackfin CPU frequency scaling supports max Core Clock 1, 1/2 and 1/4 . 29 * Blackfin CPU frequency scaling supports max Core Clock 1, 1/2 and 1/4 .
@@ -33,9 +31,16 @@
33 * adjust the Core Timer Presale Register. This way we don't lose time. 31 * adjust the Core Timer Presale Register. This way we don't lose time.
34 */ 32 */
35#define TIME_SCALE 4 33#define TIME_SCALE 4
34
35# ifdef CONFIG_CYCLES_CLOCKSOURCE
36extern unsigned long long __bfin_cycles_off; 36extern unsigned long long __bfin_cycles_off;
37extern unsigned int __bfin_cycles_mod; 37extern unsigned int __bfin_cycles_mod;
38# endif
39#endif
40
41#if defined(CONFIG_TICKSOURCE_CORETMR)
42extern void bfin_coretmr_init(void);
43extern void bfin_coretmr_clockevent_init(void);
38#endif 44#endif
39 45
40extern void __init setup_core_timer(void);
41#endif 46#endif
diff --git a/arch/blackfin/include/asm/tlbflush.h b/arch/blackfin/include/asm/tlbflush.h
index f1a06c006ed0..7c368682c0a3 100644
--- a/arch/blackfin/include/asm/tlbflush.h
+++ b/arch/blackfin/include/asm/tlbflush.h
@@ -1 +1,2 @@
1#include <asm-generic/tlbflush.h> 1#include <asm-generic/tlbflush.h>
2#define flush_tlb_kernel_range(s, e) do { } while (0)
diff --git a/arch/blackfin/include/asm/trace.h b/arch/blackfin/include/asm/trace.h
index dc0aa55ae773..33589a29b8d8 100644
--- a/arch/blackfin/include/asm/trace.h
+++ b/arch/blackfin/include/asm/trace.h
@@ -23,6 +23,13 @@
23#ifndef __ASSEMBLY__ 23#ifndef __ASSEMBLY__
24extern unsigned long trace_buff_offset; 24extern unsigned long trace_buff_offset;
25extern unsigned long software_trace_buff[]; 25extern unsigned long software_trace_buff[];
26#if defined(CONFIG_DEBUG_VERBOSE)
27extern void decode_address(char *buf, unsigned long address);
28extern bool get_instruction(unsigned int *val, unsigned short *address);
29#else
30static inline void decode_address(char *buf, unsigned long address) { }
31static inline bool get_instruction(unsigned int *val, unsigned short *address) { return false; }
32#endif
26 33
27/* Trace Macros for C files */ 34/* Trace Macros for C files */
28 35
diff --git a/arch/blackfin/kernel/Makefile b/arch/blackfin/kernel/Makefile
index a8ddbc8ed5af..30d0d1f01dc7 100644
--- a/arch/blackfin/kernel/Makefile
+++ b/arch/blackfin/kernel/Makefile
@@ -7,7 +7,8 @@ extra-y := init_task.o vmlinux.lds
7obj-y := \ 7obj-y := \
8 entry.o process.o bfin_ksyms.o ptrace.o setup.o signal.o \ 8 entry.o process.o bfin_ksyms.o ptrace.o setup.o signal.o \
9 sys_bfin.o traps.o irqchip.o dma-mapping.o flat.o \ 9 sys_bfin.o traps.o irqchip.o dma-mapping.o flat.o \
10 fixed_code.o reboot.o bfin_gpio.o bfin_dma_5xx.o 10 fixed_code.o reboot.o bfin_gpio.o bfin_dma_5xx.o \
11 exception.o dumpstack.o
11 12
12ifeq ($(CONFIG_GENERIC_CLOCKEVENTS),y) 13ifeq ($(CONFIG_GENERIC_CLOCKEVENTS),y)
13 obj-y += time-ts.o 14 obj-y += time-ts.o
@@ -25,9 +26,12 @@ obj-$(CONFIG_CPLB_INFO) += cplbinfo.o
25obj-$(CONFIG_MODULES) += module.o 26obj-$(CONFIG_MODULES) += module.o
26obj-$(CONFIG_KGDB) += kgdb.o 27obj-$(CONFIG_KGDB) += kgdb.o
27obj-$(CONFIG_KGDB_TESTS) += kgdb_test.o 28obj-$(CONFIG_KGDB_TESTS) += kgdb_test.o
29obj-$(CONFIG_NMI_WATCHDOG) += nmi.o
28obj-$(CONFIG_EARLY_PRINTK) += early_printk.o 30obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
29obj-$(CONFIG_EARLY_PRINTK) += shadow_console.o 31obj-$(CONFIG_EARLY_PRINTK) += shadow_console.o
30obj-$(CONFIG_STACKTRACE) += stacktrace.o 32obj-$(CONFIG_STACKTRACE) += stacktrace.o
33obj-$(CONFIG_DEBUG_VERBOSE) += trace.o
34obj-$(CONFIG_BFIN_PSEUDODBG_INSNS) += pseudodbg.o
31 35
32# the kgdb test puts code into L2 and without linker 36# the kgdb test puts code into L2 and without linker
33# relaxation, we need to force long calls to/from it 37# relaxation, we need to force long calls to/from it
diff --git a/arch/blackfin/kernel/bfin_dma_5xx.c b/arch/blackfin/kernel/bfin_dma_5xx.c
index 924c00286bab..26403d1c9e65 100644
--- a/arch/blackfin/kernel/bfin_dma_5xx.c
+++ b/arch/blackfin/kernel/bfin_dma_5xx.c
@@ -91,7 +91,7 @@ late_initcall(proc_dma_init);
91 */ 91 */
92int request_dma(unsigned int channel, const char *device_id) 92int request_dma(unsigned int channel, const char *device_id)
93{ 93{
94 pr_debug("request_dma() : BEGIN \n"); 94 pr_debug("request_dma() : BEGIN\n");
95 95
96 if (device_id == NULL) 96 if (device_id == NULL)
97 printk(KERN_WARNING "request_dma(%u): no device_id given\n", channel); 97 printk(KERN_WARNING "request_dma(%u): no device_id given\n", channel);
@@ -107,7 +107,7 @@ int request_dma(unsigned int channel, const char *device_id)
107#endif 107#endif
108 108
109 if (atomic_cmpxchg(&dma_ch[channel].chan_status, 0, 1)) { 109 if (atomic_cmpxchg(&dma_ch[channel].chan_status, 0, 1)) {
110 pr_debug("DMA CHANNEL IN USE \n"); 110 pr_debug("DMA CHANNEL IN USE\n");
111 return -EBUSY; 111 return -EBUSY;
112 } 112 }
113 113
@@ -131,7 +131,7 @@ int request_dma(unsigned int channel, const char *device_id)
131 * you have to request DMA, before doing any operations on 131 * you have to request DMA, before doing any operations on
132 * descriptor/channel 132 * descriptor/channel
133 */ 133 */
134 pr_debug("request_dma() : END \n"); 134 pr_debug("request_dma() : END\n");
135 return 0; 135 return 0;
136} 136}
137EXPORT_SYMBOL(request_dma); 137EXPORT_SYMBOL(request_dma);
@@ -171,7 +171,7 @@ static void clear_dma_buffer(unsigned int channel)
171 171
172void free_dma(unsigned int channel) 172void free_dma(unsigned int channel)
173{ 173{
174 pr_debug("freedma() : BEGIN \n"); 174 pr_debug("freedma() : BEGIN\n");
175 BUG_ON(channel >= MAX_DMA_CHANNELS || 175 BUG_ON(channel >= MAX_DMA_CHANNELS ||
176 !atomic_read(&dma_ch[channel].chan_status)); 176 !atomic_read(&dma_ch[channel].chan_status));
177 177
@@ -185,7 +185,7 @@ void free_dma(unsigned int channel)
185 /* Clear the DMA Variable in the Channel */ 185 /* Clear the DMA Variable in the Channel */
186 atomic_set(&dma_ch[channel].chan_status, 0); 186 atomic_set(&dma_ch[channel].chan_status, 0);
187 187
188 pr_debug("freedma() : END \n"); 188 pr_debug("freedma() : END\n");
189} 189}
190EXPORT_SYMBOL(free_dma); 190EXPORT_SYMBOL(free_dma);
191 191
diff --git a/arch/blackfin/kernel/bfin_gpio.c b/arch/blackfin/kernel/bfin_gpio.c
index a174596cc009..42833ee2b308 100644
--- a/arch/blackfin/kernel/bfin_gpio.c
+++ b/arch/blackfin/kernel/bfin_gpio.c
@@ -475,9 +475,7 @@ GET_GPIO_P(maskb)
475 475
476 476
477#ifdef CONFIG_PM 477#ifdef CONFIG_PM
478
479static unsigned short wakeup_map[GPIO_BANK_NUM]; 478static unsigned short wakeup_map[GPIO_BANK_NUM];
480static unsigned char wakeup_flags_map[MAX_BLACKFIN_GPIOS];
481 479
482static const unsigned int sic_iwr_irqs[] = { 480static const unsigned int sic_iwr_irqs[] = {
483#if defined(BF533_FAMILY) 481#if defined(BF533_FAMILY)
@@ -514,112 +512,26 @@ static const unsigned int sic_iwr_irqs[] = {
514************************************************************* 512*************************************************************
515* MODIFICATION HISTORY : 513* MODIFICATION HISTORY :
516**************************************************************/ 514**************************************************************/
517int gpio_pm_wakeup_request(unsigned gpio, unsigned char type) 515int gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl)
518{
519 unsigned long flags;
520
521 if ((check_gpio(gpio) < 0) || !type)
522 return -EINVAL;
523
524 local_irq_save_hw(flags);
525 wakeup_map[gpio_bank(gpio)] |= gpio_bit(gpio);
526 wakeup_flags_map[gpio] = type;
527 local_irq_restore_hw(flags);
528
529 return 0;
530}
531EXPORT_SYMBOL(gpio_pm_wakeup_request);
532
533void gpio_pm_wakeup_free(unsigned gpio)
534{ 516{
535 unsigned long flags; 517 unsigned long flags;
536 518
537 if (check_gpio(gpio) < 0) 519 if (check_gpio(gpio) < 0)
538 return; 520 return -EINVAL;
539 521
540 local_irq_save_hw(flags); 522 local_irq_save_hw(flags);
541 523 if (ctrl)
542 wakeup_map[gpio_bank(gpio)] &= ~gpio_bit(gpio); 524 wakeup_map[gpio_bank(gpio)] |= gpio_bit(gpio);
543
544 local_irq_restore_hw(flags);
545}
546EXPORT_SYMBOL(gpio_pm_wakeup_free);
547
548static int bfin_gpio_wakeup_type(unsigned gpio, unsigned char type)
549{
550 port_setup(gpio, GPIO_USAGE);
551 set_gpio_dir(gpio, 0);
552 set_gpio_inen(gpio, 1);
553
554 if (type & (PM_WAKE_RISING | PM_WAKE_FALLING))
555 set_gpio_edge(gpio, 1);
556 else
557 set_gpio_edge(gpio, 0);
558
559 if ((type & (PM_WAKE_BOTH_EDGES)) == (PM_WAKE_BOTH_EDGES))
560 set_gpio_both(gpio, 1);
561 else 525 else
562 set_gpio_both(gpio, 0); 526 wakeup_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
563
564 if ((type & (PM_WAKE_FALLING | PM_WAKE_LOW)))
565 set_gpio_polar(gpio, 1);
566 else
567 set_gpio_polar(gpio, 0);
568
569 SSYNC();
570
571 return 0;
572}
573 527
574u32 bfin_pm_standby_setup(void) 528 set_gpio_maskb(gpio, ctrl);
575{ 529 local_irq_restore_hw(flags);
576 u16 bank, mask, i, gpio;
577
578 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
579 mask = wakeup_map[gpio_bank(i)];
580 bank = gpio_bank(i);
581
582 gpio_bank_saved[bank].maskb = gpio_array[bank]->maskb;
583 gpio_array[bank]->maskb = 0;
584
585 if (mask) {
586#if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
587 gpio_bank_saved[bank].fer = *port_fer[bank];
588#endif
589 gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
590 gpio_bank_saved[bank].polar = gpio_array[bank]->polar;
591 gpio_bank_saved[bank].dir = gpio_array[bank]->dir;
592 gpio_bank_saved[bank].edge = gpio_array[bank]->edge;
593 gpio_bank_saved[bank].both = gpio_array[bank]->both;
594 gpio_bank_saved[bank].reserved =
595 reserved_gpio_map[bank];
596
597 gpio = i;
598
599 while (mask) {
600 if ((mask & 1) && (wakeup_flags_map[gpio] !=
601 PM_WAKE_IGNORE)) {
602 reserved_gpio_map[gpio_bank(gpio)] |=
603 gpio_bit(gpio);
604 bfin_gpio_wakeup_type(gpio,
605 wakeup_flags_map[gpio]);
606 set_gpio_data(gpio, 0); /*Clear*/
607 }
608 gpio++;
609 mask >>= 1;
610 }
611
612 bfin_internal_set_wake(sic_iwr_irqs[bank], 1);
613 gpio_array[bank]->maskb_set = wakeup_map[gpio_bank(i)];
614 }
615 }
616
617 AWA_DUMMY_READ(maskb_set);
618 530
619 return 0; 531 return 0;
620} 532}
621 533
622void bfin_pm_standby_restore(void) 534int bfin_pm_standby_ctrl(unsigned ctrl)
623{ 535{
624 u16 bank, mask, i; 536 u16 bank, mask, i;
625 537
@@ -627,24 +539,10 @@ void bfin_pm_standby_restore(void)
627 mask = wakeup_map[gpio_bank(i)]; 539 mask = wakeup_map[gpio_bank(i)];
628 bank = gpio_bank(i); 540 bank = gpio_bank(i);
629 541
630 if (mask) { 542 if (mask)
631#if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x) 543 bfin_internal_set_wake(sic_iwr_irqs[bank], ctrl);
632 *port_fer[bank] = gpio_bank_saved[bank].fer;
633#endif
634 gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
635 gpio_array[bank]->dir = gpio_bank_saved[bank].dir;
636 gpio_array[bank]->polar = gpio_bank_saved[bank].polar;
637 gpio_array[bank]->edge = gpio_bank_saved[bank].edge;
638 gpio_array[bank]->both = gpio_bank_saved[bank].both;
639
640 reserved_gpio_map[bank] =
641 gpio_bank_saved[bank].reserved;
642 bfin_internal_set_wake(sic_iwr_irqs[bank], 0);
643 }
644
645 gpio_array[bank]->maskb = gpio_bank_saved[bank].maskb;
646 } 544 }
647 AWA_DUMMY_READ(maskb); 545 return 0;
648} 546}
649 547
650void bfin_gpio_pm_hibernate_suspend(void) 548void bfin_gpio_pm_hibernate_suspend(void)
@@ -708,16 +606,11 @@ void bfin_gpio_pm_hibernate_restore(void)
708#else /* CONFIG_BF54x */ 606#else /* CONFIG_BF54x */
709#ifdef CONFIG_PM 607#ifdef CONFIG_PM
710 608
711u32 bfin_pm_standby_setup(void) 609int bfin_pm_standby_ctrl(unsigned ctrl)
712{ 610{
713 return 0; 611 return 0;
714} 612}
715 613
716void bfin_pm_standby_restore(void)
717{
718
719}
720
721void bfin_gpio_pm_hibernate_suspend(void) 614void bfin_gpio_pm_hibernate_suspend(void)
722{ 615{
723 int i, bank; 616 int i, bank;
@@ -1289,44 +1182,50 @@ __initcall(gpio_register_proc);
1289#endif 1182#endif
1290 1183
1291#ifdef CONFIG_GPIOLIB 1184#ifdef CONFIG_GPIOLIB
1292int bfin_gpiolib_direction_input(struct gpio_chip *chip, unsigned gpio) 1185static int bfin_gpiolib_direction_input(struct gpio_chip *chip, unsigned gpio)
1293{ 1186{
1294 return bfin_gpio_direction_input(gpio); 1187 return bfin_gpio_direction_input(gpio);
1295} 1188}
1296 1189
1297int bfin_gpiolib_direction_output(struct gpio_chip *chip, unsigned gpio, int level) 1190static int bfin_gpiolib_direction_output(struct gpio_chip *chip, unsigned gpio, int level)
1298{ 1191{
1299 return bfin_gpio_direction_output(gpio, level); 1192 return bfin_gpio_direction_output(gpio, level);
1300} 1193}
1301 1194
1302int bfin_gpiolib_get_value(struct gpio_chip *chip, unsigned gpio) 1195static int bfin_gpiolib_get_value(struct gpio_chip *chip, unsigned gpio)
1303{ 1196{
1304 return bfin_gpio_get_value(gpio); 1197 return bfin_gpio_get_value(gpio);
1305} 1198}
1306 1199
1307void bfin_gpiolib_set_value(struct gpio_chip *chip, unsigned gpio, int value) 1200static void bfin_gpiolib_set_value(struct gpio_chip *chip, unsigned gpio, int value)
1308{ 1201{
1309 return bfin_gpio_set_value(gpio, value); 1202 return bfin_gpio_set_value(gpio, value);
1310} 1203}
1311 1204
1312int bfin_gpiolib_gpio_request(struct gpio_chip *chip, unsigned gpio) 1205static int bfin_gpiolib_gpio_request(struct gpio_chip *chip, unsigned gpio)
1313{ 1206{
1314 return bfin_gpio_request(gpio, chip->label); 1207 return bfin_gpio_request(gpio, chip->label);
1315} 1208}
1316 1209
1317void bfin_gpiolib_gpio_free(struct gpio_chip *chip, unsigned gpio) 1210static void bfin_gpiolib_gpio_free(struct gpio_chip *chip, unsigned gpio)
1318{ 1211{
1319 return bfin_gpio_free(gpio); 1212 return bfin_gpio_free(gpio);
1320} 1213}
1321 1214
1215static int bfin_gpiolib_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
1216{
1217 return gpio + GPIO_IRQ_BASE;
1218}
1219
1322static struct gpio_chip bfin_chip = { 1220static struct gpio_chip bfin_chip = {
1323 .label = "Blackfin-GPIOlib", 1221 .label = "BFIN-GPIO",
1324 .direction_input = bfin_gpiolib_direction_input, 1222 .direction_input = bfin_gpiolib_direction_input,
1325 .get = bfin_gpiolib_get_value, 1223 .get = bfin_gpiolib_get_value,
1326 .direction_output = bfin_gpiolib_direction_output, 1224 .direction_output = bfin_gpiolib_direction_output,
1327 .set = bfin_gpiolib_set_value, 1225 .set = bfin_gpiolib_set_value,
1328 .request = bfin_gpiolib_gpio_request, 1226 .request = bfin_gpiolib_gpio_request,
1329 .free = bfin_gpiolib_gpio_free, 1227 .free = bfin_gpiolib_gpio_free,
1228 .to_irq = bfin_gpiolib_gpio_to_irq,
1330 .base = 0, 1229 .base = 0,
1331 .ngpio = MAX_BLACKFIN_GPIOS, 1230 .ngpio = MAX_BLACKFIN_GPIOS,
1332}; 1231};
diff --git a/arch/blackfin/kernel/bfin_ksyms.c b/arch/blackfin/kernel/bfin_ksyms.c
index ed8392c117ea..2c264b51566a 100644
--- a/arch/blackfin/kernel/bfin_ksyms.c
+++ b/arch/blackfin/kernel/bfin_ksyms.c
@@ -33,6 +33,18 @@ EXPORT_SYMBOL(memmove);
33EXPORT_SYMBOL(memchr); 33EXPORT_SYMBOL(memchr);
34 34
35/* 35/*
36 * Because string functions are both inline and exported functions and
37 * folder arch/blackfin/lib is configured as a library path in Makefile,
38 * symbols exported in folder lib is not linked into built-in.o but
39 * inlined only. In order to export string symbols to kernel module
40 * properly, they should be exported here.
41 */
42EXPORT_SYMBOL(strcpy);
43EXPORT_SYMBOL(strncpy);
44EXPORT_SYMBOL(strcmp);
45EXPORT_SYMBOL(strncmp);
46
47/*
36 * libgcc functions - functions that are used internally by the 48 * libgcc functions - functions that are used internally by the
37 * compiler... (prototypes are not correct though, but that 49 * compiler... (prototypes are not correct though, but that
38 * doesn't really matter since they're not versioned). 50 * doesn't really matter since they're not versioned).
diff --git a/arch/blackfin/kernel/cplb-mpu/cplbinit.c b/arch/blackfin/kernel/cplb-mpu/cplbinit.c
index 8d42b9e50dfa..30fd6417f069 100644
--- a/arch/blackfin/kernel/cplb-mpu/cplbinit.c
+++ b/arch/blackfin/kernel/cplb-mpu/cplbinit.c
@@ -64,6 +64,15 @@ void __init generate_cplb_tables_cpu(unsigned int cpu)
64 icplb_tbl[cpu][i_i++].data = i_data | (addr == 0 ? CPLB_USER_RD : 0); 64 icplb_tbl[cpu][i_i++].data = i_data | (addr == 0 ? CPLB_USER_RD : 0);
65 } 65 }
66 66
67#ifdef CONFIG_ROMKERNEL
68 /* Cover kernel XIP flash area */
69 addr = CONFIG_ROM_BASE & ~(4 * 1024 * 1024 - 1);
70 dcplb_tbl[cpu][i_d].addr = addr;
71 dcplb_tbl[cpu][i_d++].data = d_data | CPLB_USER_RD;
72 icplb_tbl[cpu][i_i].addr = addr;
73 icplb_tbl[cpu][i_i++].data = i_data | CPLB_USER_RD;
74#endif
75
67 /* Cover L1 memory. One 4M area for code and data each is enough. */ 76 /* Cover L1 memory. One 4M area for code and data each is enough. */
68#if L1_DATA_A_LENGTH > 0 || L1_DATA_B_LENGTH > 0 77#if L1_DATA_A_LENGTH > 0 || L1_DATA_B_LENGTH > 0
69 dcplb_tbl[cpu][i_d].addr = get_l1_data_a_start_cpu(cpu); 78 dcplb_tbl[cpu][i_d].addr = get_l1_data_a_start_cpu(cpu);
diff --git a/arch/blackfin/kernel/cplb-mpu/cplbmgr.c b/arch/blackfin/kernel/cplb-mpu/cplbmgr.c
index 930c01c06813..87b25b1b30ed 100644
--- a/arch/blackfin/kernel/cplb-mpu/cplbmgr.c
+++ b/arch/blackfin/kernel/cplb-mpu/cplbmgr.c
@@ -31,6 +31,12 @@ int nr_dcplb_miss[NR_CPUS], nr_icplb_miss[NR_CPUS];
31int nr_icplb_supv_miss[NR_CPUS], nr_dcplb_prot[NR_CPUS]; 31int nr_icplb_supv_miss[NR_CPUS], nr_dcplb_prot[NR_CPUS];
32int nr_cplb_flush[NR_CPUS]; 32int nr_cplb_flush[NR_CPUS];
33 33
34#ifdef CONFIG_EXCPT_IRQ_SYSC_L1
35#define MGR_ATTR __attribute__((l1_text))
36#else
37#define MGR_ATTR
38#endif
39
34/* 40/*
35 * Given the contents of the status register, return the index of the 41 * Given the contents of the status register, return the index of the
36 * CPLB that caused the fault. 42 * CPLB that caused the fault.
@@ -59,7 +65,7 @@ static int icplb_rr_index[NR_CPUS], dcplb_rr_index[NR_CPUS];
59/* 65/*
60 * Find an ICPLB entry to be evicted and return its index. 66 * Find an ICPLB entry to be evicted and return its index.
61 */ 67 */
62static int evict_one_icplb(unsigned int cpu) 68MGR_ATTR static int evict_one_icplb(unsigned int cpu)
63{ 69{
64 int i; 70 int i;
65 for (i = first_switched_icplb; i < MAX_CPLBS; i++) 71 for (i = first_switched_icplb; i < MAX_CPLBS; i++)
@@ -74,7 +80,7 @@ static int evict_one_icplb(unsigned int cpu)
74 return i; 80 return i;
75} 81}
76 82
77static int evict_one_dcplb(unsigned int cpu) 83MGR_ATTR static int evict_one_dcplb(unsigned int cpu)
78{ 84{
79 int i; 85 int i;
80 for (i = first_switched_dcplb; i < MAX_CPLBS; i++) 86 for (i = first_switched_dcplb; i < MAX_CPLBS; i++)
@@ -89,7 +95,7 @@ static int evict_one_dcplb(unsigned int cpu)
89 return i; 95 return i;
90} 96}
91 97
92static noinline int dcplb_miss(unsigned int cpu) 98MGR_ATTR static noinline int dcplb_miss(unsigned int cpu)
93{ 99{
94 unsigned long addr = bfin_read_DCPLB_FAULT_ADDR(); 100 unsigned long addr = bfin_read_DCPLB_FAULT_ADDR();
95 int status = bfin_read_DCPLB_STATUS(); 101 int status = bfin_read_DCPLB_STATUS();
@@ -114,10 +120,15 @@ static noinline int dcplb_miss(unsigned int cpu)
114 d_data = L2_DMEMORY; 120 d_data = L2_DMEMORY;
115 } else if (addr >= physical_mem_end) { 121 } else if (addr >= physical_mem_end) {
116 if (addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE) { 122 if (addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE) {
117 addr &= ~(4 * 1024 * 1024 - 1); 123 mask = current_rwx_mask[cpu];
118 d_data &= ~PAGE_SIZE_4KB; 124 if (mask) {
119 d_data |= PAGE_SIZE_4MB; 125 int page = (addr - (ASYNC_BANK0_BASE - _ramend)) >> PAGE_SHIFT;
120 d_data |= CPLB_USER_RD | CPLB_USER_WR; 126 int idx = page >> 5;
127 int bit = 1 << (page & 31);
128
129 if (mask[idx] & bit)
130 d_data |= CPLB_USER_RD;
131 }
121 } else if (addr >= BOOT_ROM_START && addr < BOOT_ROM_START + BOOT_ROM_LENGTH 132 } else if (addr >= BOOT_ROM_START && addr < BOOT_ROM_START + BOOT_ROM_LENGTH
122 && (status & (FAULT_RW | FAULT_USERSUPV)) == FAULT_USERSUPV) { 133 && (status & (FAULT_RW | FAULT_USERSUPV)) == FAULT_USERSUPV) {
123 addr &= ~(1 * 1024 * 1024 - 1); 134 addr &= ~(1 * 1024 * 1024 - 1);
@@ -126,7 +137,9 @@ static noinline int dcplb_miss(unsigned int cpu)
126 } else 137 } else
127 return CPLB_PROT_VIOL; 138 return CPLB_PROT_VIOL;
128 } else if (addr >= _ramend) { 139 } else if (addr >= _ramend) {
129 d_data |= CPLB_USER_RD | CPLB_USER_WR; 140 d_data |= CPLB_USER_RD | CPLB_USER_WR;
141 if (reserved_mem_dcache_on)
142 d_data |= CPLB_L1_CHBL;
130 } else { 143 } else {
131 mask = current_rwx_mask[cpu]; 144 mask = current_rwx_mask[cpu];
132 if (mask) { 145 if (mask) {
@@ -156,7 +169,7 @@ static noinline int dcplb_miss(unsigned int cpu)
156 return 0; 169 return 0;
157} 170}
158 171
159static noinline int icplb_miss(unsigned int cpu) 172MGR_ATTR static noinline int icplb_miss(unsigned int cpu)
160{ 173{
161 unsigned long addr = bfin_read_ICPLB_FAULT_ADDR(); 174 unsigned long addr = bfin_read_ICPLB_FAULT_ADDR();
162 int status = bfin_read_ICPLB_STATUS(); 175 int status = bfin_read_ICPLB_STATUS();
@@ -204,10 +217,19 @@ static noinline int icplb_miss(unsigned int cpu)
204 i_data = L2_IMEMORY; 217 i_data = L2_IMEMORY;
205 } else if (addr >= physical_mem_end) { 218 } else if (addr >= physical_mem_end) {
206 if (addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE) { 219 if (addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE) {
207 addr &= ~(4 * 1024 * 1024 - 1); 220 if (!(status & FAULT_USERSUPV)) {
208 i_data &= ~PAGE_SIZE_4KB; 221 unsigned long *mask = current_rwx_mask[cpu];
209 i_data |= PAGE_SIZE_4MB; 222
210 i_data |= CPLB_USER_RD; 223 if (mask) {
224 int page = (addr - (ASYNC_BANK0_BASE - _ramend)) >> PAGE_SHIFT;
225 int idx = page >> 5;
226 int bit = 1 << (page & 31);
227
228 mask += 2 * page_mask_nelts;
229 if (mask[idx] & bit)
230 i_data |= CPLB_USER_RD;
231 }
232 }
211 } else if (addr >= BOOT_ROM_START && addr < BOOT_ROM_START + BOOT_ROM_LENGTH 233 } else if (addr >= BOOT_ROM_START && addr < BOOT_ROM_START + BOOT_ROM_LENGTH
212 && (status & FAULT_USERSUPV)) { 234 && (status & FAULT_USERSUPV)) {
213 addr &= ~(1 * 1024 * 1024 - 1); 235 addr &= ~(1 * 1024 * 1024 - 1);
@@ -217,6 +239,8 @@ static noinline int icplb_miss(unsigned int cpu)
217 return CPLB_PROT_VIOL; 239 return CPLB_PROT_VIOL;
218 } else if (addr >= _ramend) { 240 } else if (addr >= _ramend) {
219 i_data |= CPLB_USER_RD; 241 i_data |= CPLB_USER_RD;
242 if (reserved_mem_icache_on)
243 i_data |= CPLB_L1_CHBL;
220 } else { 244 } else {
221 /* 245 /*
222 * Two cases to distinguish - a supervisor access must 246 * Two cases to distinguish - a supervisor access must
@@ -251,7 +275,7 @@ static noinline int icplb_miss(unsigned int cpu)
251 return 0; 275 return 0;
252} 276}
253 277
254static noinline int dcplb_protection_fault(unsigned int cpu) 278MGR_ATTR static noinline int dcplb_protection_fault(unsigned int cpu)
255{ 279{
256 int status = bfin_read_DCPLB_STATUS(); 280 int status = bfin_read_DCPLB_STATUS();
257 281
@@ -271,7 +295,7 @@ static noinline int dcplb_protection_fault(unsigned int cpu)
271 return CPLB_PROT_VIOL; 295 return CPLB_PROT_VIOL;
272} 296}
273 297
274int cplb_hdr(int seqstat, struct pt_regs *regs) 298MGR_ATTR int cplb_hdr(int seqstat, struct pt_regs *regs)
275{ 299{
276 int cause = seqstat & 0x3f; 300 int cause = seqstat & 0x3f;
277 unsigned int cpu = raw_smp_processor_id(); 301 unsigned int cpu = raw_smp_processor_id();
diff --git a/arch/blackfin/kernel/cplb-nompu/cplbinit.c b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
index 282a7919821b..bfe75af4e8bd 100644
--- a/arch/blackfin/kernel/cplb-nompu/cplbinit.c
+++ b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
@@ -56,6 +56,15 @@ void __init generate_cplb_tables_cpu(unsigned int cpu)
56 i_tbl[i_i++].data = SDRAM_IGENERIC | PAGE_SIZE_4MB; 56 i_tbl[i_i++].data = SDRAM_IGENERIC | PAGE_SIZE_4MB;
57 } 57 }
58 58
59#ifdef CONFIG_ROMKERNEL
60 /* Cover kernel XIP flash area */
61 addr = CONFIG_ROM_BASE & ~(4 * 1024 * 1024 - 1);
62 d_tbl[i_d].addr = addr;
63 d_tbl[i_d++].data = SDRAM_DGENERIC | PAGE_SIZE_4MB;
64 i_tbl[i_i].addr = addr;
65 i_tbl[i_i++].data = SDRAM_IGENERIC | PAGE_SIZE_4MB;
66#endif
67
59 /* Cover L1 memory. One 4M area for code and data each is enough. */ 68 /* Cover L1 memory. One 4M area for code and data each is enough. */
60 if (cpu == 0) { 69 if (cpu == 0) {
61 if (L1_DATA_A_LENGTH || L1_DATA_B_LENGTH) { 70 if (L1_DATA_A_LENGTH || L1_DATA_B_LENGTH) {
diff --git a/arch/blackfin/kernel/dma-mapping.c b/arch/blackfin/kernel/dma-mapping.c
index e937f323d82c..04ddcfeb7981 100644
--- a/arch/blackfin/kernel/dma-mapping.c
+++ b/arch/blackfin/kernel/dma-mapping.c
@@ -116,7 +116,7 @@ EXPORT_SYMBOL(dma_free_coherent);
116void __dma_sync(dma_addr_t addr, size_t size, 116void __dma_sync(dma_addr_t addr, size_t size,
117 enum dma_data_direction dir) 117 enum dma_data_direction dir)
118{ 118{
119 _dma_sync(addr, size, dir); 119 __dma_sync_inline(addr, size, dir);
120} 120}
121EXPORT_SYMBOL(__dma_sync); 121EXPORT_SYMBOL(__dma_sync);
122 122
diff --git a/arch/blackfin/kernel/dumpstack.c b/arch/blackfin/kernel/dumpstack.c
new file mode 100644
index 000000000000..5cfbaa298211
--- /dev/null
+++ b/arch/blackfin/kernel/dumpstack.c
@@ -0,0 +1,174 @@
1/* Provide basic stack dumping functions
2 *
3 * Copyright 2004-2009 Analog Devices Inc.
4 *
5 * Licensed under the GPL-2 or later
6 */
7
8#include <linux/kernel.h>
9#include <linux/thread_info.h>
10#include <linux/mm.h>
11#include <linux/uaccess.h>
12#include <linux/module.h>
13#include <asm/trace.h>
14
15/*
16 * Checks to see if the address pointed to is either a
17 * 16-bit CALL instruction, or a 32-bit CALL instruction
18 */
19static bool is_bfin_call(unsigned short *addr)
20{
21 unsigned int opcode;
22
23 if (!get_instruction(&opcode, addr))
24 return false;
25
26 if ((opcode >= 0x0060 && opcode <= 0x0067) ||
27 (opcode >= 0x0070 && opcode <= 0x0077) ||
28 (opcode >= 0xE3000000 && opcode <= 0xE3FFFFFF))
29 return true;
30
31 return false;
32
33}
34
35void show_stack(struct task_struct *task, unsigned long *stack)
36{
37#ifdef CONFIG_PRINTK
38 unsigned int *addr, *endstack, *fp = 0, *frame;
39 unsigned short *ins_addr;
40 char buf[150];
41 unsigned int i, j, ret_addr, frame_no = 0;
42
43 /*
44 * If we have been passed a specific stack, use that one otherwise
45 * if we have been passed a task structure, use that, otherwise
46 * use the stack of where the variable "stack" exists
47 */
48
49 if (stack == NULL) {
50 if (task) {
51 /* We know this is a kernel stack, so this is the start/end */
52 stack = (unsigned long *)task->thread.ksp;
53 endstack = (unsigned int *)(((unsigned int)(stack) & ~(THREAD_SIZE - 1)) + THREAD_SIZE);
54 } else {
55 /* print out the existing stack info */
56 stack = (unsigned long *)&stack;
57 endstack = (unsigned int *)PAGE_ALIGN((unsigned int)stack);
58 }
59 } else
60 endstack = (unsigned int *)PAGE_ALIGN((unsigned int)stack);
61
62 printk(KERN_NOTICE "Stack info:\n");
63 decode_address(buf, (unsigned int)stack);
64 printk(KERN_NOTICE " SP: [0x%p] %s\n", stack, buf);
65
66 if (!access_ok(VERIFY_READ, stack, (unsigned int)endstack - (unsigned int)stack)) {
67 printk(KERN_NOTICE "Invalid stack pointer\n");
68 return;
69 }
70
71 /* First thing is to look for a frame pointer */
72 for (addr = (unsigned int *)((unsigned int)stack & ~0xF); addr < endstack; addr++) {
73 if (*addr & 0x1)
74 continue;
75 ins_addr = (unsigned short *)*addr;
76 ins_addr--;
77 if (is_bfin_call(ins_addr))
78 fp = addr - 1;
79
80 if (fp) {
81 /* Let's check to see if it is a frame pointer */
82 while (fp >= (addr - 1) && fp < endstack
83 && fp && ((unsigned int) fp & 0x3) == 0)
84 fp = (unsigned int *)*fp;
85 if (fp == 0 || fp == endstack) {
86 fp = addr - 1;
87 break;
88 }
89 fp = 0;
90 }
91 }
92 if (fp) {
93 frame = fp;
94 printk(KERN_NOTICE " FP: (0x%p)\n", fp);
95 } else
96 frame = 0;
97
98 /*
99 * Now that we think we know where things are, we
100 * walk the stack again, this time printing things out
101 * incase there is no frame pointer, we still look for
102 * valid return addresses
103 */
104
105 /* First time print out data, next time, print out symbols */
106 for (j = 0; j <= 1; j++) {
107 if (j)
108 printk(KERN_NOTICE "Return addresses in stack:\n");
109 else
110 printk(KERN_NOTICE " Memory from 0x%08lx to %p", ((long unsigned int)stack & ~0xF), endstack);
111
112 fp = frame;
113 frame_no = 0;
114
115 for (addr = (unsigned int *)((unsigned int)stack & ~0xF), i = 0;
116 addr < endstack; addr++, i++) {
117
118 ret_addr = 0;
119 if (!j && i % 8 == 0)
120 printk(KERN_NOTICE "%p:", addr);
121
122 /* if it is an odd address, or zero, just skip it */
123 if (*addr & 0x1 || !*addr)
124 goto print;
125
126 ins_addr = (unsigned short *)*addr;
127
128 /* Go back one instruction, and see if it is a CALL */
129 ins_addr--;
130 ret_addr = is_bfin_call(ins_addr);
131 print:
132 if (!j && stack == (unsigned long *)addr)
133 printk("[%08x]", *addr);
134 else if (ret_addr)
135 if (j) {
136 decode_address(buf, (unsigned int)*addr);
137 if (frame == addr) {
138 printk(KERN_NOTICE " frame %2i : %s\n", frame_no, buf);
139 continue;
140 }
141 printk(KERN_NOTICE " address : %s\n", buf);
142 } else
143 printk("<%08x>", *addr);
144 else if (fp == addr) {
145 if (j)
146 frame = addr+1;
147 else
148 printk("(%08x)", *addr);
149
150 fp = (unsigned int *)*addr;
151 frame_no++;
152
153 } else if (!j)
154 printk(" %08x ", *addr);
155 }
156 if (!j)
157 printk("\n");
158 }
159#endif
160}
161EXPORT_SYMBOL(show_stack);
162
163void dump_stack(void)
164{
165 unsigned long stack;
166#ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON
167 int tflags;
168#endif
169 trace_buffer_save(tflags);
170 dump_bfin_trace_buffer();
171 show_stack(current, &stack);
172 trace_buffer_restore(tflags);
173}
174EXPORT_SYMBOL(dump_stack);
diff --git a/arch/blackfin/kernel/entry.S b/arch/blackfin/kernel/entry.S
index f27dc2292e1b..686478f5f66b 100644
--- a/arch/blackfin/kernel/entry.S
+++ b/arch/blackfin/kernel/entry.S
@@ -44,7 +44,7 @@ ENTRY(_ret_from_fork)
44 sti r4; 44 sti r4;
45#endif /* CONFIG_IPIPE */ 45#endif /* CONFIG_IPIPE */
46 SP += -12; 46 SP += -12;
47 call _schedule_tail; 47 pseudo_long_call _schedule_tail, p5;
48 SP += 12; 48 SP += 12;
49 r0 = [sp + PT_IPEND]; 49 r0 = [sp + PT_IPEND];
50 cc = bittst(r0,1); 50 cc = bittst(r0,1);
@@ -79,7 +79,7 @@ ENTRY(_sys_vfork)
79 r0 += 24; 79 r0 += 24;
80 [--sp] = rets; 80 [--sp] = rets;
81 SP += -12; 81 SP += -12;
82 call _bfin_vfork; 82 pseudo_long_call _bfin_vfork, p2;
83 SP += 12; 83 SP += 12;
84 rets = [sp++]; 84 rets = [sp++];
85 rts; 85 rts;
@@ -90,7 +90,7 @@ ENTRY(_sys_clone)
90 r0 += 24; 90 r0 += 24;
91 [--sp] = rets; 91 [--sp] = rets;
92 SP += -12; 92 SP += -12;
93 call _bfin_clone; 93 pseudo_long_call _bfin_clone, p2;
94 SP += 12; 94 SP += 12;
95 rets = [sp++]; 95 rets = [sp++];
96 rts; 96 rts;
@@ -101,7 +101,7 @@ ENTRY(_sys_rt_sigreturn)
101 r0 += 24; 101 r0 += 24;
102 [--sp] = rets; 102 [--sp] = rets;
103 SP += -12; 103 SP += -12;
104 call _do_rt_sigreturn; 104 pseudo_long_call _do_rt_sigreturn, p2;
105 SP += 12; 105 SP += 12;
106 rets = [sp++]; 106 rets = [sp++];
107 rts; 107 rts;
diff --git a/arch/blackfin/kernel/exception.c b/arch/blackfin/kernel/exception.c
new file mode 100644
index 000000000000..9208b5fd5186
--- /dev/null
+++ b/arch/blackfin/kernel/exception.c
@@ -0,0 +1,45 @@
1/* Basic functions for adding/removing custom exception handlers
2 *
3 * Copyright 2004-2009 Analog Devices Inc.
4 *
5 * Licensed under the GPL-2 or later
6 */
7
8#include <linux/module.h>
9#include <asm/irq_handler.h>
10
11int bfin_request_exception(unsigned int exception, void (*handler)(void))
12{
13 void (*curr_handler)(void);
14
15 if (exception > 0x3F)
16 return -EINVAL;
17
18 curr_handler = ex_table[exception];
19
20 if (curr_handler != ex_replaceable)
21 return -EBUSY;
22
23 ex_table[exception] = handler;
24
25 return 0;
26}
27EXPORT_SYMBOL(bfin_request_exception);
28
29int bfin_free_exception(unsigned int exception, void (*handler)(void))
30{
31 void (*curr_handler)(void);
32
33 if (exception > 0x3F)
34 return -EINVAL;
35
36 curr_handler = ex_table[exception];
37
38 if (curr_handler != handler)
39 return -EBUSY;
40
41 ex_table[exception] = ex_replaceable;
42
43 return 0;
44}
45EXPORT_SYMBOL(bfin_free_exception);
diff --git a/arch/blackfin/kernel/ftrace-entry.S b/arch/blackfin/kernel/ftrace-entry.S
index 76dd4fbcd17a..d66446b572c0 100644
--- a/arch/blackfin/kernel/ftrace-entry.S
+++ b/arch/blackfin/kernel/ftrace-entry.S
@@ -1,7 +1,7 @@
1/* 1/*
2 * mcount and friends -- ftrace stuff 2 * mcount and friends -- ftrace stuff
3 * 3 *
4 * Copyright (C) 2009 Analog Devices Inc. 4 * Copyright (C) 2009-2010 Analog Devices Inc.
5 * Licensed under the GPL-2 or later. 5 * Licensed under the GPL-2 or later.
6 */ 6 */
7 7
@@ -21,6 +21,15 @@
21 * function will be waiting there. mmmm pie. 21 * function will be waiting there. mmmm pie.
22 */ 22 */
23ENTRY(__mcount) 23ENTRY(__mcount)
24#ifdef CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST
25 /* optional micro optimization: return if stopped */
26 p1.l = _function_trace_stop;
27 p1.h = _function_trace_stop;
28 r3 = [p1];
29 cc = r3 == 0;
30 if ! cc jump _ftrace_stub (bp);
31#endif
32
24 /* save third function arg early so we can do testing below */ 33 /* save third function arg early so we can do testing below */
25 [--sp] = r2; 34 [--sp] = r2;
26 35
@@ -106,9 +115,12 @@ ENTRY(_ftrace_graph_caller)
106 [--sp] = r1; 115 [--sp] = r1;
107 [--sp] = rets; 116 [--sp] = rets;
108 117
109 /* prepare_ftrace_return(unsigned long *parent, unsigned long self_addr) */ 118 /* prepare_ftrace_return(parent, self_addr, frame_pointer) */
110 r0 = sp; 119 r0 = sp; /* unsigned long *parent */
111 r1 = rets; 120 r1 = rets; /* unsigned long self_addr */
121#ifdef CONFIG_HAVE_FUNCTION_GRAPH_FP_TEST
122 r2 = fp; /* unsigned long frame_pointer */
123#endif
112 r0 += 16; /* skip the 4 local regs on stack */ 124 r0 += 16; /* skip the 4 local regs on stack */
113 r1 += -MCOUNT_INSN_SIZE; 125 r1 += -MCOUNT_INSN_SIZE;
114 call _prepare_ftrace_return; 126 call _prepare_ftrace_return;
@@ -127,6 +139,9 @@ ENTRY(_return_to_handler)
127 [--sp] = r1; 139 [--sp] = r1;
128 140
129 /* get original return address */ 141 /* get original return address */
142#ifdef CONFIG_HAVE_FUNCTION_GRAPH_FP_TEST
143 r0 = fp; /* Blackfin is sane, so omit this */
144#endif
130 call _ftrace_return_to_handler; 145 call _ftrace_return_to_handler;
131 rets = r0; 146 rets = r0;
132 147
diff --git a/arch/blackfin/kernel/ftrace.c b/arch/blackfin/kernel/ftrace.c
index f2c85ac6f2da..a61d948ea925 100644
--- a/arch/blackfin/kernel/ftrace.c
+++ b/arch/blackfin/kernel/ftrace.c
@@ -16,7 +16,8 @@
16 * Hook the return address and push it in the stack of return addrs 16 * Hook the return address and push it in the stack of return addrs
17 * in current thread info. 17 * in current thread info.
18 */ 18 */
19void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr) 19void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
20 unsigned long frame_pointer)
20{ 21{
21 struct ftrace_graph_ent trace; 22 struct ftrace_graph_ent trace;
22 unsigned long return_hooker = (unsigned long)&return_to_handler; 23 unsigned long return_hooker = (unsigned long)&return_to_handler;
@@ -24,7 +25,8 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr)
24 if (unlikely(atomic_read(&current->tracing_graph_pause))) 25 if (unlikely(atomic_read(&current->tracing_graph_pause)))
25 return; 26 return;
26 27
27 if (ftrace_push_return_trace(*parent, self_addr, &trace.depth, 0) == -EBUSY) 28 if (ftrace_push_return_trace(*parent, self_addr, &trace.depth,
29 frame_pointer) == -EBUSY)
28 return; 30 return;
29 31
30 trace.func = self_addr; 32 trace.func = self_addr;
diff --git a/arch/blackfin/kernel/init_task.c b/arch/blackfin/kernel/init_task.c
index 118c5b9dedac..d3970e8acd1a 100644
--- a/arch/blackfin/kernel/init_task.c
+++ b/arch/blackfin/kernel/init_task.c
@@ -28,5 +28,5 @@ EXPORT_SYMBOL(init_task);
28 * "init_task" linker map entry. 28 * "init_task" linker map entry.
29 */ 29 */
30union thread_union init_thread_union 30union thread_union init_thread_union
31 __attribute__ ((__section__(".init_task.data"))) = { 31 __init_task_data = {
32INIT_THREAD_INFO(init_task)}; 32INIT_THREAD_INFO(init_task)};
diff --git a/arch/blackfin/kernel/ipipe.c b/arch/blackfin/kernel/ipipe.c
index a77307a4473b..1a496cd71ba2 100644
--- a/arch/blackfin/kernel/ipipe.c
+++ b/arch/blackfin/kernel/ipipe.c
@@ -27,7 +27,6 @@
27#include <linux/interrupt.h> 27#include <linux/interrupt.h>
28#include <linux/percpu.h> 28#include <linux/percpu.h>
29#include <linux/bitops.h> 29#include <linux/bitops.h>
30#include <linux/slab.h>
31#include <linux/errno.h> 30#include <linux/errno.h>
32#include <linux/kthread.h> 31#include <linux/kthread.h>
33#include <linux/unistd.h> 32#include <linux/unistd.h>
diff --git a/arch/blackfin/kernel/kgdb.c b/arch/blackfin/kernel/kgdb.c
index 34c7c3ed2c9c..08bc44ea6883 100644
--- a/arch/blackfin/kernel/kgdb.c
+++ b/arch/blackfin/kernel/kgdb.c
@@ -66,7 +66,7 @@ void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs)
66 gdb_regs[BFIN_RETN] = regs->retn; 66 gdb_regs[BFIN_RETN] = regs->retn;
67 gdb_regs[BFIN_RETE] = regs->rete; 67 gdb_regs[BFIN_RETE] = regs->rete;
68 gdb_regs[BFIN_PC] = regs->pc; 68 gdb_regs[BFIN_PC] = regs->pc;
69 gdb_regs[BFIN_CC] = 0; 69 gdb_regs[BFIN_CC] = (regs->astat >> 5) & 1;
70 gdb_regs[BFIN_EXTRA1] = 0; 70 gdb_regs[BFIN_EXTRA1] = 0;
71 gdb_regs[BFIN_EXTRA2] = 0; 71 gdb_regs[BFIN_EXTRA2] = 0;
72 gdb_regs[BFIN_EXTRA3] = 0; 72 gdb_regs[BFIN_EXTRA3] = 0;
@@ -145,7 +145,7 @@ void gdb_regs_to_pt_regs(unsigned long *gdb_regs, struct pt_regs *regs)
145#endif 145#endif
146} 146}
147 147
148struct hw_breakpoint { 148static struct hw_breakpoint {
149 unsigned int occupied:1; 149 unsigned int occupied:1;
150 unsigned int skip:1; 150 unsigned int skip:1;
151 unsigned int enabled:1; 151 unsigned int enabled:1;
@@ -155,7 +155,7 @@ struct hw_breakpoint {
155 unsigned int addr; 155 unsigned int addr;
156} breakinfo[HW_WATCHPOINT_NUM]; 156} breakinfo[HW_WATCHPOINT_NUM];
157 157
158int bfin_set_hw_break(unsigned long addr, int len, enum kgdb_bptype type) 158static int bfin_set_hw_break(unsigned long addr, int len, enum kgdb_bptype type)
159{ 159{
160 int breakno; 160 int breakno;
161 int bfin_type; 161 int bfin_type;
@@ -202,7 +202,7 @@ int bfin_set_hw_break(unsigned long addr, int len, enum kgdb_bptype type)
202 return -ENOSPC; 202 return -ENOSPC;
203} 203}
204 204
205int bfin_remove_hw_break(unsigned long addr, int len, enum kgdb_bptype type) 205static int bfin_remove_hw_break(unsigned long addr, int len, enum kgdb_bptype type)
206{ 206{
207 int breakno; 207 int breakno;
208 int bfin_type; 208 int bfin_type;
@@ -230,7 +230,7 @@ int bfin_remove_hw_break(unsigned long addr, int len, enum kgdb_bptype type)
230 return 0; 230 return 0;
231} 231}
232 232
233void bfin_remove_all_hw_break(void) 233static void bfin_remove_all_hw_break(void)
234{ 234{
235 int breakno; 235 int breakno;
236 236
@@ -242,7 +242,7 @@ void bfin_remove_all_hw_break(void)
242 breakinfo[breakno].type = TYPE_DATA_WATCHPOINT; 242 breakinfo[breakno].type = TYPE_DATA_WATCHPOINT;
243} 243}
244 244
245void bfin_correct_hw_break(void) 245static void bfin_correct_hw_break(void)
246{ 246{
247 int breakno; 247 int breakno;
248 unsigned int wpiactl = 0; 248 unsigned int wpiactl = 0;
@@ -439,6 +439,11 @@ int kgdb_validate_break_address(unsigned long addr)
439 return -EFAULT; 439 return -EFAULT;
440} 440}
441 441
442void kgdb_arch_set_pc(struct pt_regs *regs, unsigned long ip)
443{
444 regs->retx = ip;
445}
446
442int kgdb_arch_init(void) 447int kgdb_arch_init(void)
443{ 448{
444 kgdb_single_step = 0; 449 kgdb_single_step = 0;
diff --git a/arch/blackfin/kernel/nmi.c b/arch/blackfin/kernel/nmi.c
new file mode 100644
index 000000000000..0b5f72f17fd0
--- /dev/null
+++ b/arch/blackfin/kernel/nmi.c
@@ -0,0 +1,299 @@
1/*
2 * Blackfin nmi_watchdog Driver
3 *
4 * Originally based on bfin_wdt.c
5 * Copyright 2010-2010 Analog Devices Inc.
6 * Graff Yang <graf.yang@analog.com>
7 *
8 * Enter bugs at http://blackfin.uclinux.org/
9 *
10 * Licensed under the GPL-2 or later.
11 */
12
13#include <linux/bitops.h>
14#include <linux/hardirq.h>
15#include <linux/sysdev.h>
16#include <linux/pm.h>
17#include <linux/nmi.h>
18#include <linux/smp.h>
19#include <linux/timer.h>
20#include <asm/blackfin.h>
21#include <asm/atomic.h>
22#include <asm/cacheflush.h>
23#include <asm/bfin_watchdog.h>
24
25#define DRV_NAME "nmi-wdt"
26
27#define NMI_WDT_TIMEOUT 5 /* 5 seconds */
28#define NMI_CHECK_TIMEOUT (4 * HZ) /* 4 seconds in jiffies */
29static int nmi_wdt_cpu = 1;
30
31static unsigned int timeout = NMI_WDT_TIMEOUT;
32static int nmi_active;
33
34static unsigned short wdoga_ctl;
35static unsigned int wdoga_cnt;
36static struct corelock_slot saved_corelock;
37static atomic_t nmi_touched[NR_CPUS];
38static struct timer_list ntimer;
39
40enum {
41 COREA_ENTER_NMI = 0,
42 COREA_EXIT_NMI,
43 COREB_EXIT_NMI,
44
45 NMI_EVENT_NR,
46};
47static unsigned long nmi_event __attribute__ ((__section__(".l2.bss")));
48
49/* we are in nmi, non-atomic bit ops is safe */
50static inline void set_nmi_event(int event)
51{
52 __set_bit(event, &nmi_event);
53}
54
55static inline void wait_nmi_event(int event)
56{
57 while (!test_bit(event, &nmi_event))
58 barrier();
59 __clear_bit(event, &nmi_event);
60}
61
62static inline void send_corea_nmi(void)
63{
64 wdoga_ctl = bfin_read_WDOGA_CTL();
65 wdoga_cnt = bfin_read_WDOGA_CNT();
66
67 bfin_write_WDOGA_CTL(WDEN_DISABLE);
68 bfin_write_WDOGA_CNT(0);
69 bfin_write_WDOGA_CTL(WDEN_ENABLE | ICTL_NMI);
70}
71
72static inline void restore_corea_nmi(void)
73{
74 bfin_write_WDOGA_CTL(WDEN_DISABLE);
75 bfin_write_WDOGA_CTL(WDOG_EXPIRED | WDEN_DISABLE | ICTL_NONE);
76
77 bfin_write_WDOGA_CNT(wdoga_cnt);
78 bfin_write_WDOGA_CTL(wdoga_ctl);
79}
80
81static inline void save_corelock(void)
82{
83 saved_corelock = corelock;
84 corelock.lock = 0;
85}
86
87static inline void restore_corelock(void)
88{
89 corelock = saved_corelock;
90}
91
92
93static inline void nmi_wdt_keepalive(void)
94{
95 bfin_write_WDOGB_STAT(0);
96}
97
98static inline void nmi_wdt_stop(void)
99{
100 bfin_write_WDOGB_CTL(WDEN_DISABLE);
101}
102
103/* before calling this function, you must stop the WDT */
104static inline void nmi_wdt_clear(void)
105{
106 /* clear TRO bit, disable event generation */
107 bfin_write_WDOGB_CTL(WDOG_EXPIRED | WDEN_DISABLE | ICTL_NONE);
108}
109
110static inline void nmi_wdt_start(void)
111{
112 bfin_write_WDOGB_CTL(WDEN_ENABLE | ICTL_NMI);
113}
114
115static inline int nmi_wdt_running(void)
116{
117 return ((bfin_read_WDOGB_CTL() & WDEN_MASK) != WDEN_DISABLE);
118}
119
120static inline int nmi_wdt_set_timeout(unsigned long t)
121{
122 u32 cnt, max_t, sclk;
123 int run;
124
125 sclk = get_sclk();
126 max_t = -1 / sclk;
127 cnt = t * sclk;
128 if (t > max_t) {
129 pr_warning("NMI: timeout value is too large\n");
130 return -EINVAL;
131 }
132
133 run = nmi_wdt_running();
134 nmi_wdt_stop();
135 bfin_write_WDOGB_CNT(cnt);
136 if (run)
137 nmi_wdt_start();
138
139 timeout = t;
140
141 return 0;
142}
143
144int check_nmi_wdt_touched(void)
145{
146 unsigned int this_cpu = smp_processor_id();
147 unsigned int cpu;
148
149 cpumask_t mask = cpu_online_map;
150
151 if (!atomic_read(&nmi_touched[this_cpu]))
152 return 0;
153
154 atomic_set(&nmi_touched[this_cpu], 0);
155
156 cpu_clear(this_cpu, mask);
157 for_each_cpu_mask(cpu, mask) {
158 invalidate_dcache_range((unsigned long)(&nmi_touched[cpu]),
159 (unsigned long)(&nmi_touched[cpu]));
160 if (!atomic_read(&nmi_touched[cpu]))
161 return 0;
162 atomic_set(&nmi_touched[cpu], 0);
163 }
164
165 return 1;
166}
167
168static void nmi_wdt_timer(unsigned long data)
169{
170 if (check_nmi_wdt_touched())
171 nmi_wdt_keepalive();
172
173 mod_timer(&ntimer, jiffies + NMI_CHECK_TIMEOUT);
174}
175
176static int __init init_nmi_wdt(void)
177{
178 nmi_wdt_set_timeout(timeout);
179 nmi_wdt_start();
180 nmi_active = true;
181
182 init_timer(&ntimer);
183 ntimer.function = nmi_wdt_timer;
184 ntimer.expires = jiffies + NMI_CHECK_TIMEOUT;
185 add_timer(&ntimer);
186
187 pr_info("nmi_wdt: initialized: timeout=%d sec\n", timeout);
188 return 0;
189}
190device_initcall(init_nmi_wdt);
191
192void touch_nmi_watchdog(void)
193{
194 atomic_set(&nmi_touched[smp_processor_id()], 1);
195}
196
197/* Suspend/resume support */
198#ifdef CONFIG_PM
199static int nmi_wdt_suspend(struct sys_device *dev, pm_message_t state)
200{
201 nmi_wdt_stop();
202 return 0;
203}
204
205static int nmi_wdt_resume(struct sys_device *dev)
206{
207 if (nmi_active)
208 nmi_wdt_start();
209 return 0;
210}
211
212static struct sysdev_class nmi_sysclass = {
213 .name = DRV_NAME,
214 .resume = nmi_wdt_resume,
215 .suspend = nmi_wdt_suspend,
216};
217
218static struct sys_device device_nmi_wdt = {
219 .id = 0,
220 .cls = &nmi_sysclass,
221};
222
223static int __init init_nmi_wdt_sysfs(void)
224{
225 int error;
226
227 if (!nmi_active)
228 return 0;
229
230 error = sysdev_class_register(&nmi_sysclass);
231 if (!error)
232 error = sysdev_register(&device_nmi_wdt);
233 return error;
234}
235late_initcall(init_nmi_wdt_sysfs);
236
237#endif /* CONFIG_PM */
238
239
240asmlinkage notrace void do_nmi(struct pt_regs *fp)
241{
242 unsigned int cpu = smp_processor_id();
243 nmi_enter();
244
245 cpu_pda[cpu].__nmi_count += 1;
246
247 if (cpu == nmi_wdt_cpu) {
248 /* CoreB goes here first */
249
250 /* reload the WDOG_STAT */
251 nmi_wdt_keepalive();
252
253 /* clear nmi interrupt for CoreB */
254 nmi_wdt_stop();
255 nmi_wdt_clear();
256
257 /* trigger NMI interrupt of CoreA */
258 send_corea_nmi();
259
260 /* waiting CoreB to enter NMI */
261 wait_nmi_event(COREA_ENTER_NMI);
262
263 /* recover WDOGA's settings */
264 restore_corea_nmi();
265
266 save_corelock();
267
268 /* corelock is save/cleared, CoreA is dummping messages */
269
270 wait_nmi_event(COREA_EXIT_NMI);
271 } else {
272 /* OK, CoreA entered NMI */
273 set_nmi_event(COREA_ENTER_NMI);
274 }
275
276 pr_emerg("\nNMI Watchdog detected LOCKUP, dump for CPU %d\n", cpu);
277 dump_bfin_process(fp);
278 dump_bfin_mem(fp);
279 show_regs(fp);
280 dump_bfin_trace_buffer();
281 show_stack(current, (unsigned long *)fp);
282
283 if (cpu == nmi_wdt_cpu) {
284 pr_emerg("This fault is not recoverable, sorry!\n");
285
286 /* CoreA dump finished, restore the corelock */
287 restore_corelock();
288
289 set_nmi_event(COREB_EXIT_NMI);
290 } else {
291 /* CoreB dump finished, notice the CoreA we are done */
292 set_nmi_event(COREA_EXIT_NMI);
293
294 /* synchronize with CoreA */
295 wait_nmi_event(COREB_EXIT_NMI);
296 }
297
298 nmi_exit();
299}
diff --git a/arch/blackfin/kernel/process.c b/arch/blackfin/kernel/process.c
index b56b0e485e0b..93ec07da2e51 100644
--- a/arch/blackfin/kernel/process.c
+++ b/arch/blackfin/kernel/process.c
@@ -11,6 +11,7 @@
11#include <linux/unistd.h> 11#include <linux/unistd.h>
12#include <linux/user.h> 12#include <linux/user.h>
13#include <linux/uaccess.h> 13#include <linux/uaccess.h>
14#include <linux/slab.h>
14#include <linux/sched.h> 15#include <linux/sched.h>
15#include <linux/tick.h> 16#include <linux/tick.h>
16#include <linux/fs.h> 17#include <linux/fs.h>
@@ -98,13 +99,6 @@ void cpu_idle(void)
98 } 99 }
99} 100}
100 101
101/* Fill in the fpu structure for a core dump. */
102
103int dump_fpu(struct pt_regs *regs, elf_fpregset_t * fpregs)
104{
105 return 1;
106}
107
108/* 102/*
109 * This gets run with P1 containing the 103 * This gets run with P1 containing the
110 * function to call, and R1 containing 104 * function to call, and R1 containing
diff --git a/arch/blackfin/kernel/pseudodbg.c b/arch/blackfin/kernel/pseudodbg.c
new file mode 100644
index 000000000000..db85bc94334e
--- /dev/null
+++ b/arch/blackfin/kernel/pseudodbg.c
@@ -0,0 +1,191 @@
1/* The fake debug assert instructions
2 *
3 * Copyright 2010 Analog Devices Inc.
4 *
5 * Licensed under the GPL-2 or later
6 */
7
8#include <linux/types.h>
9#include <linux/kernel.h>
10#include <linux/ptrace.h>
11
12const char * const greg_names[] = {
13 "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7",
14 "P0", "P1", "P2", "P3", "P4", "P5", "SP", "FP",
15 "I0", "I1", "I2", "I3", "M0", "M1", "M2", "M3",
16 "B0", "B1", "B2", "B3", "L0", "L1", "L2", "L3",
17 "A0.X", "A0.W", "A1.X", "A1.W", "<res>", "<res>", "ASTAT", "RETS",
18 "<res>", "<res>", "<res>", "<res>", "<res>", "<res>", "<res>", "<res>",
19 "LC0", "LT0", "LB0", "LC1", "LT1", "LB1", "CYCLES", "CYCLES2",
20 "USP", "SEQSTAT", "SYSCFG", "RETI", "RETX", "RETN", "RETE", "EMUDAT",
21};
22
23static const char *get_allreg_name(int grp, int reg)
24{
25 return greg_names[(grp << 3) | reg];
26}
27
28/*
29 * Unfortunately, the pt_regs structure is not laid out the same way as the
30 * hardware register file, so we need to do some fix ups.
31 *
32 * CYCLES is not stored in the pt_regs structure - so, we just read it from
33 * the hardware.
34 *
35 * Don't support:
36 * - All reserved registers
37 * - All in group 7 are (supervisors only)
38 */
39
40static bool fix_up_reg(struct pt_regs *fp, long *value, int grp, int reg)
41{
42 long *val = &fp->r0;
43 unsigned long tmp;
44
45 /* Only do Dregs and Pregs for now */
46 if (grp == 5 ||
47 (grp == 4 && (reg == 4 || reg == 5)) ||
48 (grp == 7))
49 return false;
50
51 if (grp == 0 || (grp == 1 && reg < 6))
52 val -= (reg + 8 * grp);
53 else if (grp == 1 && reg == 6)
54 val = &fp->usp;
55 else if (grp == 1 && reg == 7)
56 val = &fp->fp;
57 else if (grp == 2) {
58 val = &fp->i0;
59 val -= reg;
60 } else if (grp == 3 && reg >= 4) {
61 val = &fp->l0;
62 val -= (reg - 4);
63 } else if (grp == 3 && reg < 4) {
64 val = &fp->b0;
65 val -= reg;
66 } else if (grp == 4 && reg < 4) {
67 val = &fp->a0x;
68 val -= reg;
69 } else if (grp == 4 && reg == 6)
70 val = &fp->astat;
71 else if (grp == 4 && reg == 7)
72 val = &fp->rets;
73 else if (grp == 6 && reg < 6) {
74 val = &fp->lc0;
75 val -= reg;
76 } else if (grp == 6 && reg == 6) {
77 __asm__ __volatile__("%0 = cycles;\n" : "=d"(tmp));
78 val = &tmp;
79 } else if (grp == 6 && reg == 7) {
80 __asm__ __volatile__("%0 = cycles2;\n" : "=d"(tmp));
81 val = &tmp;
82 }
83
84 *value = *val;
85 return true;
86
87}
88
89#define PseudoDbg_Assert_opcode 0xf0000000
90#define PseudoDbg_Assert_expected_bits 0
91#define PseudoDbg_Assert_expected_mask 0xffff
92#define PseudoDbg_Assert_regtest_bits 16
93#define PseudoDbg_Assert_regtest_mask 0x7
94#define PseudoDbg_Assert_grp_bits 19
95#define PseudoDbg_Assert_grp_mask 0x7
96#define PseudoDbg_Assert_dbgop_bits 22
97#define PseudoDbg_Assert_dbgop_mask 0x3
98#define PseudoDbg_Assert_dontcare_bits 24
99#define PseudoDbg_Assert_dontcare_mask 0x7
100#define PseudoDbg_Assert_code_bits 27
101#define PseudoDbg_Assert_code_mask 0x1f
102
103/*
104 * DBGA - debug assert
105 */
106bool execute_pseudodbg_assert(struct pt_regs *fp, unsigned int opcode)
107{
108 int expected = ((opcode >> PseudoDbg_Assert_expected_bits) & PseudoDbg_Assert_expected_mask);
109 int dbgop = ((opcode >> (PseudoDbg_Assert_dbgop_bits)) & PseudoDbg_Assert_dbgop_mask);
110 int grp = ((opcode >> (PseudoDbg_Assert_grp_bits)) & PseudoDbg_Assert_grp_mask);
111 int regtest = ((opcode >> (PseudoDbg_Assert_regtest_bits)) & PseudoDbg_Assert_regtest_mask);
112 long value;
113
114 if ((opcode & 0xFF000000) != PseudoDbg_Assert_opcode)
115 return false;
116
117 if (!fix_up_reg(fp, &value, grp, regtest))
118 return false;
119
120 if (dbgop == 0 || dbgop == 2) {
121 /* DBGA ( regs_lo , uimm16 ) */
122 /* DBGAL ( regs , uimm16 ) */
123 if (expected != (value & 0xFFFF)) {
124 pr_notice("DBGA (%s.L,0x%x) failure, got 0x%x\n",
125 get_allreg_name(grp, regtest),
126 expected, (unsigned int)(value & 0xFFFF));
127 return false;
128 }
129
130 } else if (dbgop == 1 || dbgop == 3) {
131 /* DBGA ( regs_hi , uimm16 ) */
132 /* DBGAH ( regs , uimm16 ) */
133 if (expected != ((value >> 16) & 0xFFFF)) {
134 pr_notice("DBGA (%s.H,0x%x) failure, got 0x%x\n",
135 get_allreg_name(grp, regtest),
136 expected, (unsigned int)((value >> 16) & 0xFFFF));
137 return false;
138 }
139 }
140
141 fp->pc += 4;
142 return true;
143}
144
145#define PseudoDbg_opcode 0xf8000000
146#define PseudoDbg_reg_bits 0
147#define PseudoDbg_reg_mask 0x7
148#define PseudoDbg_grp_bits 3
149#define PseudoDbg_grp_mask 0x7
150#define PseudoDbg_fn_bits 6
151#define PseudoDbg_fn_mask 0x3
152#define PseudoDbg_code_bits 8
153#define PseudoDbg_code_mask 0xff
154
155/*
156 * DBG - debug (dump a register value out)
157 */
158bool execute_pseudodbg(struct pt_regs *fp, unsigned int opcode)
159{
160 int grp, fn, reg;
161 long value, value1;
162
163 if ((opcode & 0xFF000000) != PseudoDbg_opcode)
164 return false;
165
166 opcode >>= 16;
167 grp = ((opcode >> PseudoDbg_grp_bits) & PseudoDbg_reg_mask);
168 fn = ((opcode >> PseudoDbg_fn_bits) & PseudoDbg_fn_mask);
169 reg = ((opcode >> PseudoDbg_reg_bits) & PseudoDbg_reg_mask);
170
171 if (fn == 3 && (reg == 0 || reg == 1)) {
172 if (!fix_up_reg(fp, &value, 4, 2 * reg))
173 return false;
174 if (!fix_up_reg(fp, &value1, 4, 2 * reg + 1))
175 return false;
176
177 pr_notice("DBG A%i = %02lx%08lx\n", reg, value & 0xFF, value1);
178 fp->pc += 2;
179 return true;
180
181 } else if (fn == 0) {
182 if (!fix_up_reg(fp, &value, grp, reg))
183 return false;
184
185 pr_notice("DBG %s = %08lx\n", get_allreg_name(grp, reg), value);
186 fp->pc += 2;
187 return true;
188 }
189
190 return false;
191}
diff --git a/arch/blackfin/kernel/ptrace.c b/arch/blackfin/kernel/ptrace.c
index 65567dc4b9f5..6ec77685df52 100644
--- a/arch/blackfin/kernel/ptrace.c
+++ b/arch/blackfin/kernel/ptrace.c
@@ -1,6 +1,6 @@
1/* 1/*
2 * linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds 2 * linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds
3 * these modifications are Copyright 2004-2009 Analog Devices Inc. 3 * these modifications are Copyright 2004-2010 Analog Devices Inc.
4 * 4 *
5 * Licensed under the GPL-2 5 * Licensed under the GPL-2
6 */ 6 */
@@ -9,10 +9,13 @@
9#include <linux/sched.h> 9#include <linux/sched.h>
10#include <linux/mm.h> 10#include <linux/mm.h>
11#include <linux/smp.h> 11#include <linux/smp.h>
12#include <linux/elf.h>
12#include <linux/errno.h> 13#include <linux/errno.h>
13#include <linux/ptrace.h> 14#include <linux/ptrace.h>
14#include <linux/user.h> 15#include <linux/user.h>
16#include <linux/regset.h>
15#include <linux/signal.h> 17#include <linux/signal.h>
18#include <linux/tracehook.h>
16#include <linux/uaccess.h> 19#include <linux/uaccess.h>
17 20
18#include <asm/page.h> 21#include <asm/page.h>
@@ -25,90 +28,57 @@
25#include <asm/cacheflush.h> 28#include <asm/cacheflush.h>
26#include <asm/mem_map.h> 29#include <asm/mem_map.h>
27 30
28#define TEXT_OFFSET 0
29/* 31/*
30 * does not yet catch signals sent when the child dies. 32 * does not yet catch signals sent when the child dies.
31 * in exit.c or in signal.c. 33 * in exit.c or in signal.c.
32 */ 34 */
33 35
34/* determines which bits in the SYSCFG reg the user has access to. */
35/* 1 = access 0 = no access */
36#define SYSCFG_MASK 0x0007 /* SYSCFG reg */
37/* sets the trace bits. */
38#define TRACE_BITS 0x0001
39
40/* Find the stack offset for a register, relative to thread.esp0. */
41#define PT_REG(reg) ((long)&((struct pt_regs *)0)->reg)
42
43/*
44 * Get the address of the live pt_regs for the specified task.
45 * These are saved onto the top kernel stack when the process
46 * is not running.
47 *
48 * Note: if a user thread is execve'd from kernel space, the
49 * kernel stack will not be empty on entry to the kernel, so
50 * ptracing these tasks will fail.
51 */
52static inline struct pt_regs *get_user_regs(struct task_struct *task)
53{
54 return (struct pt_regs *)
55 ((unsigned long)task_stack_page(task) +
56 (THREAD_SIZE - sizeof(struct pt_regs)));
57}
58
59/*
60 * Get all user integer registers.
61 */
62static inline int ptrace_getregs(struct task_struct *tsk, void __user *uregs)
63{
64 struct pt_regs regs;
65 memcpy(&regs, get_user_regs(tsk), sizeof(regs));
66 regs.usp = tsk->thread.usp;
67 return copy_to_user(uregs, &regs, sizeof(struct pt_regs)) ? -EFAULT : 0;
68}
69
70/* Mapping from PT_xxx to the stack offset at which the register is
71 * saved. Notice that usp has no stack-slot and needs to be treated
72 * specially (see get_reg/put_reg below).
73 */
74
75/* 36/*
76 * Get contents of register REGNO in task TASK. 37 * Get contents of register REGNO in task TASK.
77 */ 38 */
78static inline long get_reg(struct task_struct *task, int regno) 39static inline long
40get_reg(struct task_struct *task, long regno, unsigned long __user *datap)
79{ 41{
80 unsigned char *reg_ptr; 42 long tmp;
43 struct pt_regs *regs = task_pt_regs(task);
81 44
82 struct pt_regs *regs = 45 if (regno & 3 || regno > PT_LAST_PSEUDO || regno < 0)
83 (struct pt_regs *)((unsigned long)task_stack_page(task) + 46 return -EIO;
84 (THREAD_SIZE - sizeof(struct pt_regs)));
85 reg_ptr = (char *)regs;
86 47
87 switch (regno) { 48 switch (regno) {
49 case PT_TEXT_ADDR:
50 tmp = task->mm->start_code;
51 break;
52 case PT_TEXT_END_ADDR:
53 tmp = task->mm->end_code;
54 break;
55 case PT_DATA_ADDR:
56 tmp = task->mm->start_data;
57 break;
88 case PT_USP: 58 case PT_USP:
89 return task->thread.usp; 59 tmp = task->thread.usp;
60 break;
90 default: 61 default:
91 if (regno <= 216) 62 if (regno < sizeof(*regs)) {
92 return *(long *)(reg_ptr + regno); 63 void *reg_ptr = regs;
64 tmp = *(long *)(reg_ptr + regno);
65 } else
66 return -EIO;
93 } 67 }
94 /* slight mystery ... never seems to come here but kernel misbehaves without this code! */
95 68
96 printk(KERN_WARNING "Request to get for unknown register %d\n", regno); 69 return put_user(tmp, datap);
97 return 0;
98} 70}
99 71
100/* 72/*
101 * Write contents of register REGNO in task TASK. 73 * Write contents of register REGNO in task TASK.
102 */ 74 */
103static inline int 75static inline int
104put_reg(struct task_struct *task, int regno, unsigned long data) 76put_reg(struct task_struct *task, long regno, unsigned long data)
105{ 77{
106 char *reg_ptr; 78 struct pt_regs *regs = task_pt_regs(task);
107 79
108 struct pt_regs *regs = 80 if (regno & 3 || regno > PT_LAST_PSEUDO || regno < 0)
109 (struct pt_regs *)((unsigned long)task_stack_page(task) + 81 return -EIO;
110 (THREAD_SIZE - sizeof(struct pt_regs)));
111 reg_ptr = (char *)regs;
112 82
113 switch (regno) { 83 switch (regno) {
114 case PT_PC: 84 case PT_PC:
@@ -125,10 +95,18 @@ put_reg(struct task_struct *task, int regno, unsigned long data)
125 regs->usp = data; 95 regs->usp = data;
126 task->thread.usp = data; 96 task->thread.usp = data;
127 break; 97 break;
98 case PT_SYSCFG: /* don't let userspace screw with this */
99 if ((data & ~1) != 0x6)
100 pr_warning("ptrace: ignore syscfg write of %#lx\n", data);
101 break; /* regs->syscfg = data; break; */
128 default: 102 default:
129 if (regno <= 216) 103 if (regno < sizeof(*regs)) {
130 *(long *)(reg_ptr + regno) = data; 104 void *reg_offset = regs;
105 *(long *)(reg_offset + regno) = data;
106 }
107 /* Ignore writes to pseudo registers */
131 } 108 }
109
132 return 0; 110 return 0;
133} 111}
134 112
@@ -160,24 +138,98 @@ static inline int is_user_addr_valid(struct task_struct *child,
160 return -EIO; 138 return -EIO;
161} 139}
162 140
163void ptrace_enable(struct task_struct *child) 141/*
142 * retrieve the contents of Blackfin userspace general registers
143 */
144static int genregs_get(struct task_struct *target,
145 const struct user_regset *regset,
146 unsigned int pos, unsigned int count,
147 void *kbuf, void __user *ubuf)
148{
149 struct pt_regs *regs = task_pt_regs(target);
150 int ret;
151
152 /* This sucks ... */
153 regs->usp = target->thread.usp;
154
155 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
156 regs, 0, sizeof(*regs));
157 if (ret < 0)
158 return ret;
159
160 return user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
161 sizeof(*regs), -1);
162}
163
164/*
165 * update the contents of the Blackfin userspace general registers
166 */
167static int genregs_set(struct task_struct *target,
168 const struct user_regset *regset,
169 unsigned int pos, unsigned int count,
170 const void *kbuf, const void __user *ubuf)
164{ 171{
165 unsigned long tmp; 172 struct pt_regs *regs = task_pt_regs(target);
166 tmp = get_reg(child, PT_SYSCFG) | (TRACE_BITS); 173 int ret;
167 put_reg(child, PT_SYSCFG, tmp); 174
175 /* Don't let people set SYSCFG (it's at the end of pt_regs) */
176 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
177 regs, 0, PT_SYSCFG);
178 if (ret < 0)
179 return ret;
180
181 /* This sucks ... */
182 target->thread.usp = regs->usp;
183 /* regs->retx = regs->pc; */
184
185 return user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
186 PT_SYSCFG, -1);
168} 187}
169 188
170/* 189/*
171 * Called by kernel/ptrace.c when detaching.. 190 * Define the register sets available on the Blackfin under Linux
172 *
173 * Make sure the single step bit is not set.
174 */ 191 */
175void ptrace_disable(struct task_struct *child) 192enum bfin_regset {
193 REGSET_GENERAL,
194};
195
196static const struct user_regset bfin_regsets[] = {
197 [REGSET_GENERAL] = {
198 .core_note_type = NT_PRSTATUS,
199 .n = sizeof(struct pt_regs) / sizeof(long),
200 .size = sizeof(long),
201 .align = sizeof(long),
202 .get = genregs_get,
203 .set = genregs_set,
204 },
205};
206
207static const struct user_regset_view user_bfin_native_view = {
208 .name = "Blackfin",
209 .e_machine = EM_BLACKFIN,
210 .regsets = bfin_regsets,
211 .n = ARRAY_SIZE(bfin_regsets),
212};
213
214const struct user_regset_view *task_user_regset_view(struct task_struct *task)
215{
216 return &user_bfin_native_view;
217}
218
219void user_enable_single_step(struct task_struct *child)
220{
221 struct pt_regs *regs = task_pt_regs(child);
222 regs->syscfg |= SYSCFG_SSSTEP;
223
224 set_tsk_thread_flag(child, TIF_SINGLESTEP);
225}
226
227void user_disable_single_step(struct task_struct *child)
176{ 228{
177 unsigned long tmp; 229 struct pt_regs *regs = task_pt_regs(child);
178 /* make sure the single step bit is not set. */ 230 regs->syscfg &= ~SYSCFG_SSSTEP;
179 tmp = get_reg(child, PT_SYSCFG) & ~TRACE_BITS; 231
180 put_reg(child, PT_SYSCFG, tmp); 232 clear_tsk_thread_flag(child, TIF_SINGLESTEP);
181} 233}
182 234
183long arch_ptrace(struct task_struct *child, long request, long addr, long data) 235long arch_ptrace(struct task_struct *child, long request, long addr, long data)
@@ -240,62 +292,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
240 break; 292 break;
241 } 293 }
242 294
243 /* read the word at location addr in the USER area. */
244 case PTRACE_PEEKUSR:
245 {
246 unsigned long tmp;
247 ret = -EIO;
248 tmp = 0;
249 if ((addr & 3) || (addr > (sizeof(struct pt_regs) + 16))) {
250 printk(KERN_WARNING "ptrace error : PEEKUSR : temporarily returning "
251 "0 - %x sizeof(pt_regs) is %lx\n",
252 (int)addr, sizeof(struct pt_regs));
253 break;
254 }
255 if (addr == sizeof(struct pt_regs)) {
256 /* PT_TEXT_ADDR */
257 tmp = child->mm->start_code + TEXT_OFFSET;
258 } else if (addr == (sizeof(struct pt_regs) + 4)) {
259 /* PT_TEXT_END_ADDR */
260 tmp = child->mm->end_code;
261 } else if (addr == (sizeof(struct pt_regs) + 8)) {
262 /* PT_DATA_ADDR */
263 tmp = child->mm->start_data;
264#ifdef CONFIG_BINFMT_ELF_FDPIC
265 } else if (addr == (sizeof(struct pt_regs) + 12)) {
266 goto case_PTRACE_GETFDPIC_EXEC;
267 } else if (addr == (sizeof(struct pt_regs) + 16)) {
268 goto case_PTRACE_GETFDPIC_INTERP;
269#endif
270 } else {
271 tmp = get_reg(child, addr);
272 }
273 ret = put_user(tmp, datap);
274 break;
275 }
276
277#ifdef CONFIG_BINFMT_ELF_FDPIC
278 case PTRACE_GETFDPIC: {
279 unsigned long tmp = 0;
280
281 switch (addr) {
282 case_PTRACE_GETFDPIC_EXEC:
283 case PTRACE_GETFDPIC_EXEC:
284 tmp = child->mm->context.exec_fdpic_loadmap;
285 break;
286 case_PTRACE_GETFDPIC_INTERP:
287 case PTRACE_GETFDPIC_INTERP:
288 tmp = child->mm->context.interp_fdpic_loadmap;
289 break;
290 default:
291 break;
292 }
293
294 ret = put_user(tmp, datap);
295 break;
296 }
297#endif
298
299 /* when I and D space are separate, this will have to be fixed. */ 295 /* when I and D space are separate, this will have to be fixed. */
300 case PTRACE_POKEDATA: 296 case PTRACE_POKEDATA:
301 pr_debug("ptrace: PTRACE_PEEKDATA\n"); 297 pr_debug("ptrace: PTRACE_PEEKDATA\n");
@@ -336,79 +332,44 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
336 break; 332 break;
337 } 333 }
338 334
339 case PTRACE_POKEUSR: /* write the word at location addr in the USER area */ 335 case PTRACE_PEEKUSR:
340 ret = -EIO; 336 switch (addr) {
341 if ((addr & 3) || (addr > (sizeof(struct pt_regs) + 16))) { 337#ifdef CONFIG_BINFMT_ELF_FDPIC /* backwards compat */
342 printk(KERN_WARNING "ptrace error : POKEUSR: temporarily returning 0\n"); 338 case PT_FDPIC_EXEC:
343 break; 339 request = PTRACE_GETFDPIC;
344 } 340 addr = PTRACE_GETFDPIC_EXEC;
345 341 goto case_default;
346 if (addr >= (sizeof(struct pt_regs))) { 342 case PT_FDPIC_INTERP:
347 ret = 0; 343 request = PTRACE_GETFDPIC;
348 break; 344 addr = PTRACE_GETFDPIC_INTERP;
349 } 345 goto case_default;
350 if (addr == PT_SYSCFG) { 346#endif
351 data &= SYSCFG_MASK; 347 default:
352 data |= get_reg(child, PT_SYSCFG); 348 ret = get_reg(child, addr, datap);
353 } 349 }
354 ret = put_reg(child, addr, data); 350 pr_debug("ptrace: PEEKUSR reg %li with %#lx = %i\n", addr, data, ret);
355 break;
356
357 case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
358 case PTRACE_CONT: /* restart after signal. */
359 pr_debug("ptrace: syscall/cont\n");
360
361 ret = -EIO;
362 if (!valid_signal(data))
363 break;
364 if (request == PTRACE_SYSCALL)
365 set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
366 else
367 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
368 child->exit_code = data;
369 ptrace_disable(child);
370 pr_debug("ptrace: before wake_up_process\n");
371 wake_up_process(child);
372 ret = 0;
373 break;
374
375 /*
376 * make the child exit. Best I can do is send it a sigkill.
377 * perhaps it should be put in the status that it wants to
378 * exit.
379 */
380 case PTRACE_KILL:
381 ret = 0;
382 if (child->exit_state == EXIT_ZOMBIE) /* already dead */
383 break;
384 child->exit_code = SIGKILL;
385 ptrace_disable(child);
386 wake_up_process(child);
387 break; 351 break;
388 352
389 case PTRACE_SINGLESTEP: /* set the trap flag. */ 353 case PTRACE_POKEUSR:
390 pr_debug("ptrace: single step\n"); 354 ret = put_reg(child, addr, data);
391 ret = -EIO; 355 pr_debug("ptrace: POKEUSR reg %li with %li = %i\n", addr, data, ret);
392 if (!valid_signal(data))
393 break;
394 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
395 ptrace_enable(child);
396 child->exit_code = data;
397 wake_up_process(child);
398 ret = 0;
399 break; 356 break;
400 357
401 case PTRACE_GETREGS: 358 case PTRACE_GETREGS:
402 /* Get all gp regs from the child. */ 359 pr_debug("ptrace: PTRACE_GETREGS\n");
403 ret = ptrace_getregs(child, datap); 360 return copy_regset_to_user(child, &user_bfin_native_view,
404 break; 361 REGSET_GENERAL,
362 0, sizeof(struct pt_regs),
363 (void __user *)data);
405 364
406 case PTRACE_SETREGS: 365 case PTRACE_SETREGS:
407 printk(KERN_WARNING "ptrace: SETREGS: **** NOT IMPLEMENTED ***\n"); 366 pr_debug("ptrace: PTRACE_SETREGS\n");
408 /* Set all gp regs in the child. */ 367 return copy_regset_from_user(child, &user_bfin_native_view,
409 ret = 0; 368 REGSET_GENERAL,
410 break; 369 0, sizeof(struct pt_regs),
370 (const void __user *)data);
411 371
372 case_default:
412 default: 373 default:
413 ret = ptrace_request(child, request, addr, data); 374 ret = ptrace_request(child, request, addr, data);
414 break; 375 break;
@@ -417,27 +378,21 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
417 return ret; 378 return ret;
418} 379}
419 380
420asmlinkage void syscall_trace(void) 381asmlinkage int syscall_trace_enter(struct pt_regs *regs)
421{ 382{
422 if (!test_thread_flag(TIF_SYSCALL_TRACE)) 383 int ret = 0;
423 return; 384
424 385 if (test_thread_flag(TIF_SYSCALL_TRACE))
425 if (!(current->ptrace & PT_PTRACED)) 386 ret = tracehook_report_syscall_entry(regs);
426 return; 387
427 388 return ret;
428 /* the 0x80 provides a way for the tracing parent to distinguish 389}
429 * between a syscall stop and SIGTRAP delivery 390
430 */ 391asmlinkage void syscall_trace_leave(struct pt_regs *regs)
431 ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) 392{
432 ? 0x80 : 0)); 393 int step;
433 394
434 /* 395 step = test_thread_flag(TIF_SINGLESTEP);
435 * this isn't the same as continuing with a signal, but it will do 396 if (step || test_thread_flag(TIF_SYSCALL_TRACE))
436 * for normal use. strace only continues with a signal if the 397 tracehook_report_syscall_exit(regs, step);
437 * stopping signal is not SIGTRAP. -brl
438 */
439 if (current->exit_code) {
440 send_sig(current->exit_code, current, 1);
441 current->exit_code = 0;
442 }
443} 398}
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c
index 95448ae9c43a..d37a397f43f5 100644
--- a/arch/blackfin/kernel/setup.c
+++ b/arch/blackfin/kernel/setup.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright 2004-2009 Analog Devices Inc. 2 * Copyright 2004-2010 Analog Devices Inc.
3 * 3 *
4 * Licensed under the GPL-2 or later. 4 * Licensed under the GPL-2 or later.
5 */ 5 */
@@ -220,6 +220,16 @@ void __init bfin_relocate_l1_mem(void)
220 memcpy(_stext_l2, _l2_lma, l2_len); 220 memcpy(_stext_l2, _l2_lma, l2_len);
221} 221}
222 222
223#ifdef CONFIG_ROMKERNEL
224void __init bfin_relocate_xip_data(void)
225{
226 early_shadow_stamp();
227
228 memcpy(_sdata, _data_lma, (unsigned long)_data_len - THREAD_SIZE + sizeof(struct thread_info));
229 memcpy(_sinitdata, _init_data_lma, (unsigned long)_init_data_len);
230}
231#endif
232
223/* add_memory_region to memmap */ 233/* add_memory_region to memmap */
224static void __init add_memory_region(unsigned long long start, 234static void __init add_memory_region(unsigned long long start,
225 unsigned long long size, int type) 235 unsigned long long size, int type)
@@ -504,7 +514,7 @@ static __init void memory_setup(void)
504#endif 514#endif
505 unsigned long max_mem; 515 unsigned long max_mem;
506 516
507 _rambase = (unsigned long)_stext; 517 _rambase = CONFIG_BOOT_LOAD;
508 _ramstart = (unsigned long)_end; 518 _ramstart = (unsigned long)_end;
509 519
510 if (DMA_UNCACHED_REGION > (_ramend - _ramstart)) { 520 if (DMA_UNCACHED_REGION > (_ramend - _ramstart)) {
@@ -597,7 +607,12 @@ static __init void memory_setup(void)
597 } 607 }
598 608
599#ifdef CONFIG_MPU 609#ifdef CONFIG_MPU
610#if defined(CONFIG_ROMFS_ON_MTD) && defined(CONFIG_MTD_ROM)
611 page_mask_nelts = (((_ramend + ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE -
612 ASYNC_BANK0_BASE) >> PAGE_SHIFT) + 31) / 32;
613#else
600 page_mask_nelts = ((_ramend >> PAGE_SHIFT) + 31) / 32; 614 page_mask_nelts = ((_ramend >> PAGE_SHIFT) + 31) / 32;
615#endif
601 page_mask_order = get_order(3 * page_mask_nelts * sizeof(long)); 616 page_mask_order = get_order(3 * page_mask_nelts * sizeof(long));
602#endif 617#endif
603 618
@@ -630,7 +645,7 @@ static __init void memory_setup(void)
630 __bss_start, __bss_stop, 645 __bss_start, __bss_stop,
631 _sdata, _edata, 646 _sdata, _edata,
632 (void *)&init_thread_union, 647 (void *)&init_thread_union,
633 (void *)((int)(&init_thread_union) + 0x2000), 648 (void *)((int)(&init_thread_union) + THREAD_SIZE),
634 __init_begin, __init_end, 649 __init_begin, __init_end,
635 (void *)_ramstart, (void *)memory_end 650 (void *)_ramstart, (void *)memory_end
636#ifdef CONFIG_MTD_UCLINUX 651#ifdef CONFIG_MTD_UCLINUX
@@ -792,10 +807,17 @@ static inline int __init get_mem_size(void)
792 BUG(); 807 BUG();
793} 808}
794 809
810__attribute__((weak))
811void __init native_machine_early_platform_add_devices(void)
812{
813}
814
795void __init setup_arch(char **cmdline_p) 815void __init setup_arch(char **cmdline_p)
796{ 816{
797 unsigned long sclk, cclk; 817 unsigned long sclk, cclk;
798 818
819 native_machine_early_platform_add_devices();
820
799 enable_shadow_console(); 821 enable_shadow_console();
800 822
801 /* Check to make sure we are running on the right processor */ 823 /* Check to make sure we are running on the right processor */
@@ -903,7 +925,7 @@ void __init setup_arch(char **cmdline_p)
903 else if (_bfin_swrst & RESET_SOFTWARE) 925 else if (_bfin_swrst & RESET_SOFTWARE)
904 printk(KERN_NOTICE "Reset caused by Software reset\n"); 926 printk(KERN_NOTICE "Reset caused by Software reset\n");
905 927
906 printk(KERN_INFO "Blackfin support (C) 2004-2009 Analog Devices, Inc.\n"); 928 printk(KERN_INFO "Blackfin support (C) 2004-2010 Analog Devices, Inc.\n");
907 if (bfin_compiled_revid() == 0xffff) 929 if (bfin_compiled_revid() == 0xffff)
908 printk(KERN_INFO "Compiled for ADSP-%s Rev any, running on 0.%d\n", CPU, bfin_revid()); 930 printk(KERN_INFO "Compiled for ADSP-%s Rev any, running on 0.%d\n", CPU, bfin_revid());
909 else if (bfin_compiled_revid() == -1) 931 else if (bfin_compiled_revid() == -1)
@@ -1217,10 +1239,10 @@ static int show_cpuinfo(struct seq_file *m, void *v)
1217 dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS, 1239 dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS,
1218 BFIN_DLINES); 1240 BFIN_DLINES);
1219#ifdef __ARCH_SYNC_CORE_DCACHE 1241#ifdef __ARCH_SYNC_CORE_DCACHE
1220 seq_printf(m, "SMP Dcache Flushes\t: %lu\n\n", cpudata->dcache_invld_count); 1242 seq_printf(m, "SMP Dcache Flushes\t: %lu\n\n", dcache_invld_count[cpu_num]);
1221#endif 1243#endif
1222#ifdef __ARCH_SYNC_CORE_ICACHE 1244#ifdef __ARCH_SYNC_CORE_ICACHE
1223 seq_printf(m, "SMP Icache Flushes\t: %lu\n\n", cpudata->icache_invld_count); 1245 seq_printf(m, "SMP Icache Flushes\t: %lu\n\n", icache_invld_count[cpu_num]);
1224#endif 1246#endif
1225 1247
1226 if (cpu_num != num_possible_cpus() - 1) 1248 if (cpu_num != num_possible_cpus() - 1)
@@ -1249,8 +1271,8 @@ static int show_cpuinfo(struct seq_file *m, void *v)
1249 seq_printf(m, "board memory\t: %ld kB (0x%p -> 0x%p)\n", 1271 seq_printf(m, "board memory\t: %ld kB (0x%p -> 0x%p)\n",
1250 physical_mem_end >> 10, (void *)0, (void *)physical_mem_end); 1272 physical_mem_end >> 10, (void *)0, (void *)physical_mem_end);
1251 seq_printf(m, "kernel memory\t: %d kB (0x%p -> 0x%p)\n", 1273 seq_printf(m, "kernel memory\t: %d kB (0x%p -> 0x%p)\n",
1252 ((int)memory_end - (int)_stext) >> 10, 1274 ((int)memory_end - (int)_rambase) >> 10,
1253 _stext, 1275 (void *)_rambase,
1254 (void *)memory_end); 1276 (void *)memory_end);
1255 seq_printf(m, "\n"); 1277 seq_printf(m, "\n");
1256 1278
diff --git a/arch/blackfin/kernel/signal.c b/arch/blackfin/kernel/signal.c
index e0fd63e9e38a..d536f35d1f43 100644
--- a/arch/blackfin/kernel/signal.c
+++ b/arch/blackfin/kernel/signal.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright 2004-2009 Analog Devices Inc. 2 * Copyright 2004-2010 Analog Devices Inc.
3 * 3 *
4 * Licensed under the GPL-2 or later 4 * Licensed under the GPL-2 or later
5 */ 5 */
@@ -17,6 +17,7 @@
17#include <asm/cacheflush.h> 17#include <asm/cacheflush.h>
18#include <asm/ucontext.h> 18#include <asm/ucontext.h>
19#include <asm/fixed_code.h> 19#include <asm/fixed_code.h>
20#include <asm/syscall.h>
20 21
21#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) 22#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
22 23
@@ -50,6 +51,9 @@ rt_restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc, int *p
50 unsigned long usp = 0; 51 unsigned long usp = 0;
51 int err = 0; 52 int err = 0;
52 53
54 /* Always make any pending restarted system calls return -EINTR */
55 current_thread_info()->restart_block.fn = do_no_restart_syscall;
56
53#define RESTORE(x) err |= __get_user(regs->x, &sc->sc_##x) 57#define RESTORE(x) err |= __get_user(regs->x, &sc->sc_##x)
54 58
55 /* restore passed registers */ 59 /* restore passed registers */
@@ -206,16 +210,6 @@ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t * info,
206 regs->r1 = (unsigned long)(&frame->info); 210 regs->r1 = (unsigned long)(&frame->info);
207 regs->r2 = (unsigned long)(&frame->uc); 211 regs->r2 = (unsigned long)(&frame->uc);
208 212
209 /*
210 * Clear the trace flag when entering the signal handler, but
211 * notify any tracer that was single-stepping it. The tracer
212 * may want to single-step inside the handler too.
213 */
214 if (regs->syscfg & TRACE_BITS) {
215 regs->syscfg &= ~TRACE_BITS;
216 ptrace_notify(SIGTRAP);
217 }
218
219 return 0; 213 return 0;
220 214
221 give_sigsegv: 215 give_sigsegv:
@@ -247,6 +241,11 @@ handle_restart(struct pt_regs *regs, struct k_sigaction *ka, int has_handler)
247 regs->r0 = regs->orig_r0; 241 regs->r0 = regs->orig_r0;
248 regs->pc -= 2; 242 regs->pc -= 2;
249 break; 243 break;
244
245 case -ERESTART_RESTARTBLOCK:
246 regs->p0 = __NR_restart_syscall;
247 regs->pc -= 2;
248 break;
250 } 249 }
251} 250}
252 251
@@ -315,6 +314,9 @@ asmlinkage void do_signal(struct pt_regs *regs)
315 * clear the TIF_RESTORE_SIGMASK flag */ 314 * clear the TIF_RESTORE_SIGMASK flag */
316 if (test_thread_flag(TIF_RESTORE_SIGMASK)) 315 if (test_thread_flag(TIF_RESTORE_SIGMASK))
317 clear_thread_flag(TIF_RESTORE_SIGMASK); 316 clear_thread_flag(TIF_RESTORE_SIGMASK);
317
318 tracehook_signal_handler(signr, &info, &ka, regs,
319 test_thread_flag(TIF_SINGLESTEP));
318 } 320 }
319 321
320 return; 322 return;
diff --git a/arch/blackfin/kernel/sys_bfin.c b/arch/blackfin/kernel/sys_bfin.c
index 2e7f8e10bf87..bdc1e2f0da32 100644
--- a/arch/blackfin/kernel/sys_bfin.c
+++ b/arch/blackfin/kernel/sys_bfin.c
@@ -47,3 +47,26 @@ unsigned long get_fb_unmapped_area(struct file *filp, unsigned long orig_addr,
47} 47}
48EXPORT_SYMBOL(get_fb_unmapped_area); 48EXPORT_SYMBOL(get_fb_unmapped_area);
49#endif 49#endif
50
51/* Needed for legacy userspace atomic emulation */
52static DEFINE_SPINLOCK(bfin_spinlock_lock);
53
54#ifdef CONFIG_SYS_BFIN_SPINLOCK_L1
55__attribute__((l1_text))
56#endif
57asmlinkage int sys_bfin_spinlock(int *p)
58{
59 int ret, tmp = 0;
60
61 spin_lock(&bfin_spinlock_lock); /* This would also hold kernel preemption. */
62 ret = get_user(tmp, p);
63 if (likely(ret == 0)) {
64 if (unlikely(tmp))
65 ret = 1;
66 else
67 put_user(1, p);
68 }
69 spin_unlock(&bfin_spinlock_lock);
70
71 return ret;
72}
diff --git a/arch/blackfin/kernel/time-ts.c b/arch/blackfin/kernel/time-ts.c
index 17c38c5b5b22..8c9a43daf80f 100644
--- a/arch/blackfin/kernel/time-ts.c
+++ b/arch/blackfin/kernel/time-ts.c
@@ -21,6 +21,7 @@
21#include <asm/blackfin.h> 21#include <asm/blackfin.h>
22#include <asm/time.h> 22#include <asm/time.h>
23#include <asm/gptimers.h> 23#include <asm/gptimers.h>
24#include <asm/nmi.h>
24 25
25/* Accelerators for sched_clock() 26/* Accelerators for sched_clock()
26 * convert from cycles(64bits) => nanoseconds (64bits) 27 * convert from cycles(64bits) => nanoseconds (64bits)
@@ -50,7 +51,11 @@
50 51
51static notrace cycle_t bfin_read_cycles(struct clocksource *cs) 52static notrace cycle_t bfin_read_cycles(struct clocksource *cs)
52{ 53{
54#ifdef CONFIG_CPU_FREQ
53 return __bfin_cycles_off + (get_cycles() << __bfin_cycles_mod); 55 return __bfin_cycles_off + (get_cycles() << __bfin_cycles_mod);
56#else
57 return get_cycles();
58#endif
54} 59}
55 60
56static struct clocksource bfin_cs_cycles = { 61static struct clocksource bfin_cs_cycles = {
@@ -132,7 +137,6 @@ static int __init bfin_cs_gptimer0_init(void)
132# define bfin_cs_gptimer0_init() 137# define bfin_cs_gptimer0_init()
133#endif 138#endif
134 139
135
136#if defined(CONFIG_GPTMR0_CLOCKSOURCE) || defined(CONFIG_CYCLES_CLOCKSOURCE) 140#if defined(CONFIG_GPTMR0_CLOCKSOURCE) || defined(CONFIG_CYCLES_CLOCKSOURCE)
137/* prefer to use cycles since it has higher rating */ 141/* prefer to use cycles since it has higher rating */
138notrace unsigned long long sched_clock(void) 142notrace unsigned long long sched_clock(void)
@@ -145,47 +149,8 @@ notrace unsigned long long sched_clock(void)
145} 149}
146#endif 150#endif
147 151
148#ifdef CONFIG_CORE_TIMER_IRQ_L1
149__attribute__((l1_text))
150#endif
151irqreturn_t timer_interrupt(int irq, void *dev_id);
152
153static int bfin_timer_set_next_event(unsigned long, \
154 struct clock_event_device *);
155
156static void bfin_timer_set_mode(enum clock_event_mode, \
157 struct clock_event_device *);
158
159static struct clock_event_device clockevent_bfin = {
160#if defined(CONFIG_TICKSOURCE_GPTMR0)
161 .name = "bfin_gptimer0",
162 .rating = 300,
163 .irq = IRQ_TIMER0,
164#else
165 .name = "bfin_core_timer",
166 .rating = 350,
167 .irq = IRQ_CORETMR,
168#endif
169 .shift = 32,
170 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
171 .set_next_event = bfin_timer_set_next_event,
172 .set_mode = bfin_timer_set_mode,
173};
174
175static struct irqaction bfin_timer_irq = {
176#if defined(CONFIG_TICKSOURCE_GPTMR0) 152#if defined(CONFIG_TICKSOURCE_GPTMR0)
177 .name = "Blackfin GPTimer0", 153static int bfin_gptmr0_set_next_event(unsigned long cycles,
178#else
179 .name = "Blackfin CoreTimer",
180#endif
181 .flags = IRQF_DISABLED | IRQF_TIMER | \
182 IRQF_IRQPOLL | IRQF_PERCPU,
183 .handler = timer_interrupt,
184 .dev_id = &clockevent_bfin,
185};
186
187#if defined(CONFIG_TICKSOURCE_GPTMR0)
188static int bfin_timer_set_next_event(unsigned long cycles,
189 struct clock_event_device *evt) 154 struct clock_event_device *evt)
190{ 155{
191 disable_gptimers(TIMER0bit); 156 disable_gptimers(TIMER0bit);
@@ -196,7 +161,7 @@ static int bfin_timer_set_next_event(unsigned long cycles,
196 return 0; 161 return 0;
197} 162}
198 163
199static void bfin_timer_set_mode(enum clock_event_mode mode, 164static void bfin_gptmr0_set_mode(enum clock_event_mode mode,
200 struct clock_event_device *evt) 165 struct clock_event_device *evt)
201{ 166{
202 switch (mode) { 167 switch (mode) {
@@ -224,25 +189,65 @@ static void bfin_timer_set_mode(enum clock_event_mode mode,
224 } 189 }
225} 190}
226 191
227static void bfin_timer_ack(void) 192static void bfin_gptmr0_ack(void)
228{ 193{
229 set_gptimer_status(TIMER_GROUP1, TIMER_STATUS_TIMIL0); 194 set_gptimer_status(TIMER_GROUP1, TIMER_STATUS_TIMIL0);
230} 195}
231 196
232static void __init bfin_timer_init(void) 197static void __init bfin_gptmr0_init(void)
233{ 198{
234 disable_gptimers(TIMER0bit); 199 disable_gptimers(TIMER0bit);
235} 200}
236 201
237static unsigned long __init bfin_clockevent_check(void) 202#ifdef CONFIG_CORE_TIMER_IRQ_L1
203__attribute__((l1_text))
204#endif
205irqreturn_t bfin_gptmr0_interrupt(int irq, void *dev_id)
238{ 206{
239 setup_irq(IRQ_TIMER0, &bfin_timer_irq); 207 struct clock_event_device *evt = dev_id;
240 return get_sclk(); 208 smp_mb();
209 evt->event_handler(evt);
210 bfin_gptmr0_ack();
211 return IRQ_HANDLED;
241} 212}
242 213
243#else /* CONFIG_TICKSOURCE_CORETMR */ 214static struct irqaction gptmr0_irq = {
215 .name = "Blackfin GPTimer0",
216 .flags = IRQF_DISABLED | IRQF_TIMER | \
217 IRQF_IRQPOLL | IRQF_PERCPU,
218 .handler = bfin_gptmr0_interrupt,
219};
220
221static struct clock_event_device clockevent_gptmr0 = {
222 .name = "bfin_gptimer0",
223 .rating = 300,
224 .irq = IRQ_TIMER0,
225 .shift = 32,
226 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
227 .set_next_event = bfin_gptmr0_set_next_event,
228 .set_mode = bfin_gptmr0_set_mode,
229};
244 230
245static int bfin_timer_set_next_event(unsigned long cycles, 231static void __init bfin_gptmr0_clockevent_init(struct clock_event_device *evt)
232{
233 unsigned long clock_tick;
234
235 clock_tick = get_sclk();
236 evt->mult = div_sc(clock_tick, NSEC_PER_SEC, evt->shift);
237 evt->max_delta_ns = clockevent_delta2ns(-1, evt);
238 evt->min_delta_ns = clockevent_delta2ns(100, evt);
239
240 evt->cpumask = cpumask_of(0);
241
242 clockevents_register_device(evt);
243}
244#endif /* CONFIG_TICKSOURCE_GPTMR0 */
245
246#if defined(CONFIG_TICKSOURCE_CORETMR)
247/* per-cpu local core timer */
248static DEFINE_PER_CPU(struct clock_event_device, coretmr_events);
249
250static int bfin_coretmr_set_next_event(unsigned long cycles,
246 struct clock_event_device *evt) 251 struct clock_event_device *evt)
247{ 252{
248 bfin_write_TCNTL(TMPWR); 253 bfin_write_TCNTL(TMPWR);
@@ -253,7 +258,7 @@ static int bfin_timer_set_next_event(unsigned long cycles,
253 return 0; 258 return 0;
254} 259}
255 260
256static void bfin_timer_set_mode(enum clock_event_mode mode, 261static void bfin_coretmr_set_mode(enum clock_event_mode mode,
257 struct clock_event_device *evt) 262 struct clock_event_device *evt)
258{ 263{
259 switch (mode) { 264 switch (mode) {
@@ -285,19 +290,13 @@ static void bfin_timer_set_mode(enum clock_event_mode mode,
285 } 290 }
286} 291}
287 292
288static void bfin_timer_ack(void) 293void bfin_coretmr_init(void)
289{
290}
291
292static void __init bfin_timer_init(void)
293{ 294{
294 /* power up the timer, but don't enable it just yet */ 295 /* power up the timer, but don't enable it just yet */
295 bfin_write_TCNTL(TMPWR); 296 bfin_write_TCNTL(TMPWR);
296 CSYNC(); 297 CSYNC();
297 298
298 /* 299 /* the TSCALE prescaler counter. */
299 * the TSCALE prescaler counter.
300 */
301 bfin_write_TSCALE(TIME_SCALE - 1); 300 bfin_write_TSCALE(TIME_SCALE - 1);
302 bfin_write_TPERIOD(0); 301 bfin_write_TPERIOD(0);
303 bfin_write_TCOUNT(0); 302 bfin_write_TCOUNT(0);
@@ -305,52 +304,64 @@ static void __init bfin_timer_init(void)
305 CSYNC(); 304 CSYNC();
306} 305}
307 306
308static unsigned long __init bfin_clockevent_check(void) 307#ifdef CONFIG_CORE_TIMER_IRQ_L1
308__attribute__((l1_text))
309#endif
310irqreturn_t bfin_coretmr_interrupt(int irq, void *dev_id)
309{ 311{
310 setup_irq(IRQ_CORETMR, &bfin_timer_irq); 312 int cpu = smp_processor_id();
311 return get_cclk() / TIME_SCALE; 313 struct clock_event_device *evt = &per_cpu(coretmr_events, cpu);
312}
313 314
314void __init setup_core_timer(void)
315{
316 bfin_timer_init();
317 bfin_timer_set_mode(CLOCK_EVT_MODE_PERIODIC, NULL);
318}
319#endif /* CONFIG_TICKSOURCE_GPTMR0 */
320
321/*
322 * timer_interrupt() needs to keep up the real-time clock,
323 * as well as call the "do_timer()" routine every clocktick
324 */
325irqreturn_t timer_interrupt(int irq, void *dev_id)
326{
327 struct clock_event_device *evt = dev_id;
328 smp_mb(); 315 smp_mb();
329 evt->event_handler(evt); 316 evt->event_handler(evt);
330 bfin_timer_ack(); 317
318 touch_nmi_watchdog();
319
331 return IRQ_HANDLED; 320 return IRQ_HANDLED;
332} 321}
333 322
334static int __init bfin_clockevent_init(void) 323static struct irqaction coretmr_irq = {
335{ 324 .name = "Blackfin CoreTimer",
336 unsigned long timer_clk; 325 .flags = IRQF_DISABLED | IRQF_TIMER | \
337 326 IRQF_IRQPOLL | IRQF_PERCPU,
338 timer_clk = bfin_clockevent_check(); 327 .handler = bfin_coretmr_interrupt,
328};
339 329
340 bfin_timer_init(); 330void bfin_coretmr_clockevent_init(void)
331{
332 unsigned long clock_tick;
333 unsigned int cpu = smp_processor_id();
334 struct clock_event_device *evt = &per_cpu(coretmr_events, cpu);
335
336 evt->name = "bfin_core_timer";
337 evt->rating = 350;
338 evt->irq = -1;
339 evt->shift = 32;
340 evt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
341 evt->set_next_event = bfin_coretmr_set_next_event;
342 evt->set_mode = bfin_coretmr_set_mode;
343
344 clock_tick = get_cclk() / TIME_SCALE;
345 evt->mult = div_sc(clock_tick, NSEC_PER_SEC, evt->shift);
346 evt->max_delta_ns = clockevent_delta2ns(-1, evt);
347 evt->min_delta_ns = clockevent_delta2ns(100, evt);
348
349 evt->cpumask = cpumask_of(cpu);
350
351 clockevents_register_device(evt);
352}
353#endif /* CONFIG_TICKSOURCE_CORETMR */
341 354
342 clockevent_bfin.mult = div_sc(timer_clk, NSEC_PER_SEC, clockevent_bfin.shift);
343 clockevent_bfin.max_delta_ns = clockevent_delta2ns(-1, &clockevent_bfin);
344 clockevent_bfin.min_delta_ns = clockevent_delta2ns(100, &clockevent_bfin);
345 clockevent_bfin.cpumask = cpumask_of(0);
346 clockevents_register_device(&clockevent_bfin);
347 355
348 return 0; 356void read_persistent_clock(struct timespec *ts)
357{
358 time_t secs_since_1970 = (365 * 37 + 9) * 24 * 60 * 60; /* 1 Jan 2007 */
359 ts->tv_sec = secs_since_1970;
360 ts->tv_nsec = 0;
349} 361}
350 362
351void __init time_init(void) 363void __init time_init(void)
352{ 364{
353 time_t secs_since_1970 = (365 * 37 + 9) * 24 * 60 * 60; /* 1 Jan 2007 */
354 365
355#ifdef CONFIG_RTC_DRV_BFIN 366#ifdef CONFIG_RTC_DRV_BFIN
356 /* [#2663] hack to filter junk RTC values that would cause 367 /* [#2663] hack to filter junk RTC values that would cause
@@ -363,12 +374,23 @@ void __init time_init(void)
363 } 374 }
364#endif 375#endif
365 376
366 /* Initialize xtime. From now on, xtime is updated with timer interrupts */
367 xtime.tv_sec = secs_since_1970;
368 xtime.tv_nsec = 0;
369 set_normalized_timespec(&wall_to_monotonic, -xtime.tv_sec, -xtime.tv_nsec);
370
371 bfin_cs_cycles_init(); 377 bfin_cs_cycles_init();
372 bfin_cs_gptimer0_init(); 378 bfin_cs_gptimer0_init();
373 bfin_clockevent_init(); 379
380#if defined(CONFIG_TICKSOURCE_CORETMR)
381 bfin_coretmr_init();
382 setup_irq(IRQ_CORETMR, &coretmr_irq);
383 bfin_coretmr_clockevent_init();
384#endif
385
386#if defined(CONFIG_TICKSOURCE_GPTMR0)
387 bfin_gptmr0_init();
388 setup_irq(IRQ_TIMER0, &gptmr0_irq);
389 gptmr0_irq.dev_id = &clockevent_gptmr0;
390 bfin_gptmr0_clockevent_init(&clockevent_gptmr0);
391#endif
392
393#if !defined(CONFIG_TICKSOURCE_CORETMR) && !defined(CONFIG_TICKSOURCE_GPTMR0)
394# error at least one clock event device is required
395#endif
374} 396}
diff --git a/arch/blackfin/kernel/time.c b/arch/blackfin/kernel/time.c
index 13c1ee3e6408..c9113619029f 100644
--- a/arch/blackfin/kernel/time.c
+++ b/arch/blackfin/kernel/time.c
@@ -112,11 +112,6 @@ u32 arch_gettimeoffset(void)
112} 112}
113#endif 113#endif
114 114
115static inline int set_rtc_mmss(unsigned long nowtime)
116{
117 return 0;
118}
119
120/* 115/*
121 * timer_interrupt() needs to keep up the real-time clock, 116 * timer_interrupt() needs to keep up the real-time clock,
122 * as well as call the "do_timer()" routine every clocktick 117 * as well as call the "do_timer()" routine every clocktick
@@ -126,29 +121,8 @@ __attribute__((l1_text))
126#endif 121#endif
127irqreturn_t timer_interrupt(int irq, void *dummy) 122irqreturn_t timer_interrupt(int irq, void *dummy)
128{ 123{
129 /* last time the cmos clock got updated */
130 static long last_rtc_update;
131
132 write_seqlock(&xtime_lock); 124 write_seqlock(&xtime_lock);
133 do_timer(1); 125 do_timer(1);
134
135 /*
136 * If we have an externally synchronized Linux clock, then update
137 * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
138 * called as close as possible to 500 ms before the new second starts.
139 */
140 if (ntp_synced() &&
141 xtime.tv_sec > last_rtc_update + 660 &&
142 (xtime.tv_nsec / NSEC_PER_USEC) >=
143 500000 - ((unsigned)TICK_SIZE) / 2
144 && (xtime.tv_nsec / NSEC_PER_USEC) <=
145 500000 + ((unsigned)TICK_SIZE) / 2) {
146 if (set_rtc_mmss(xtime.tv_sec) == 0)
147 last_rtc_update = xtime.tv_sec;
148 else
149 /* Do it again in 60s. */
150 last_rtc_update = xtime.tv_sec - 600;
151 }
152 write_sequnlock(&xtime_lock); 126 write_sequnlock(&xtime_lock);
153 127
154#ifdef CONFIG_IPIPE 128#ifdef CONFIG_IPIPE
@@ -161,10 +135,15 @@ irqreturn_t timer_interrupt(int irq, void *dummy)
161 return IRQ_HANDLED; 135 return IRQ_HANDLED;
162} 136}
163 137
164void __init time_init(void) 138void read_persistent_clock(struct timespec *ts)
165{ 139{
166 time_t secs_since_1970 = (365 * 37 + 9) * 24 * 60 * 60; /* 1 Jan 2007 */ 140 time_t secs_since_1970 = (365 * 37 + 9) * 24 * 60 * 60; /* 1 Jan 2007 */
141 ts->tv_sec = secs_since_1970;
142 ts->tv_nsec = 0;
143}
167 144
145void __init time_init(void)
146{
168#ifdef CONFIG_RTC_DRV_BFIN 147#ifdef CONFIG_RTC_DRV_BFIN
169 /* [#2663] hack to filter junk RTC values that would cause 148 /* [#2663] hack to filter junk RTC values that would cause
170 * userspace to have to deal with time values greater than 149 * userspace to have to deal with time values greater than
@@ -176,11 +155,5 @@ void __init time_init(void)
176 } 155 }
177#endif 156#endif
178 157
179 /* Initialize xtime. From now on, xtime is updated with timer interrupts */
180 xtime.tv_sec = secs_since_1970;
181 xtime.tv_nsec = 0;
182
183 wall_to_monotonic.tv_sec = -xtime.tv_sec;
184
185 time_sched_init(timer_interrupt); 158 time_sched_init(timer_interrupt);
186} 159}
diff --git a/arch/blackfin/kernel/trace.c b/arch/blackfin/kernel/trace.c
new file mode 100644
index 000000000000..59fcdf6b0138
--- /dev/null
+++ b/arch/blackfin/kernel/trace.c
@@ -0,0 +1,981 @@
1/* provide some functions which dump the trace buffer, in a nice way for people
2 * to read it, and understand what is going on
3 *
4 * Copyright 2004-2010 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later
7 */
8
9#include <linux/kernel.h>
10#include <linux/hardirq.h>
11#include <linux/thread_info.h>
12#include <linux/mm.h>
13#include <linux/uaccess.h>
14#include <linux/module.h>
15#include <linux/kallsyms.h>
16#include <linux/err.h>
17#include <linux/fs.h>
18#include <asm/dma.h>
19#include <asm/trace.h>
20#include <asm/fixed_code.h>
21#include <asm/traps.h>
22#include <asm/irq_handler.h>
23
24void decode_address(char *buf, unsigned long address)
25{
26 struct task_struct *p;
27 struct mm_struct *mm;
28 unsigned long flags, offset;
29 unsigned char in_atomic = (bfin_read_IPEND() & 0x10) || in_atomic();
30 struct rb_node *n;
31
32#ifdef CONFIG_KALLSYMS
33 unsigned long symsize;
34 const char *symname;
35 char *modname;
36 char *delim = ":";
37 char namebuf[128];
38#endif
39
40 buf += sprintf(buf, "<0x%08lx> ", address);
41
42#ifdef CONFIG_KALLSYMS
43 /* look up the address and see if we are in kernel space */
44 symname = kallsyms_lookup(address, &symsize, &offset, &modname, namebuf);
45
46 if (symname) {
47 /* yeah! kernel space! */
48 if (!modname)
49 modname = delim = "";
50 sprintf(buf, "{ %s%s%s%s + 0x%lx }",
51 delim, modname, delim, symname,
52 (unsigned long)offset);
53 return;
54 }
55#endif
56
57 if (address >= FIXED_CODE_START && address < FIXED_CODE_END) {
58 /* Problem in fixed code section? */
59 strcat(buf, "/* Maybe fixed code section */");
60 return;
61
62 } else if (address < CONFIG_BOOT_LOAD) {
63 /* Problem somewhere before the kernel start address */
64 strcat(buf, "/* Maybe null pointer? */");
65 return;
66
67 } else if (address >= COREMMR_BASE) {
68 strcat(buf, "/* core mmrs */");
69 return;
70
71 } else if (address >= SYSMMR_BASE) {
72 strcat(buf, "/* system mmrs */");
73 return;
74
75 } else if (address >= L1_ROM_START && address < L1_ROM_START + L1_ROM_LENGTH) {
76 strcat(buf, "/* on-chip L1 ROM */");
77 return;
78
79 } else if (address >= L1_SCRATCH_START && address < L1_SCRATCH_START + L1_SCRATCH_LENGTH) {
80 strcat(buf, "/* on-chip scratchpad */");
81 return;
82
83 } else if (address >= physical_mem_end && address < ASYNC_BANK0_BASE) {
84 strcat(buf, "/* unconnected memory */");
85 return;
86
87 } else if (address >= ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE && address < BOOT_ROM_START) {
88 strcat(buf, "/* reserved memory */");
89 return;
90
91 } else if (address >= L1_DATA_A_START && address < L1_DATA_A_START + L1_DATA_A_LENGTH) {
92 strcat(buf, "/* on-chip Data Bank A */");
93 return;
94
95 } else if (address >= L1_DATA_B_START && address < L1_DATA_B_START + L1_DATA_B_LENGTH) {
96 strcat(buf, "/* on-chip Data Bank B */");
97 return;
98 }
99
100 /*
101 * Don't walk any of the vmas if we are oopsing, it has been known
102 * to cause problems - corrupt vmas (kernel crashes) cause double faults
103 */
104 if (oops_in_progress) {
105 strcat(buf, "/* kernel dynamic memory (maybe user-space) */");
106 return;
107 }
108
109 /* looks like we're off in user-land, so let's walk all the
110 * mappings of all our processes and see if we can't be a whee
111 * bit more specific
112 */
113 write_lock_irqsave(&tasklist_lock, flags);
114 for_each_process(p) {
115 mm = (in_atomic ? p->mm : get_task_mm(p));
116 if (!mm)
117 continue;
118
119 if (!down_read_trylock(&mm->mmap_sem)) {
120 if (!in_atomic)
121 mmput(mm);
122 continue;
123 }
124
125 for (n = rb_first(&mm->mm_rb); n; n = rb_next(n)) {
126 struct vm_area_struct *vma;
127
128 vma = rb_entry(n, struct vm_area_struct, vm_rb);
129
130 if (address >= vma->vm_start && address < vma->vm_end) {
131 char _tmpbuf[256];
132 char *name = p->comm;
133 struct file *file = vma->vm_file;
134
135 if (file) {
136 char *d_name = d_path(&file->f_path, _tmpbuf,
137 sizeof(_tmpbuf));
138 if (!IS_ERR(d_name))
139 name = d_name;
140 }
141
142 /* FLAT does not have its text aligned to the start of
143 * the map while FDPIC ELF does ...
144 */
145
146 /* before we can check flat/fdpic, we need to
147 * make sure current is valid
148 */
149 if ((unsigned long)current >= FIXED_CODE_START &&
150 !((unsigned long)current & 0x3)) {
151 if (current->mm &&
152 (address > current->mm->start_code) &&
153 (address < current->mm->end_code))
154 offset = address - current->mm->start_code;
155 else
156 offset = (address - vma->vm_start) +
157 (vma->vm_pgoff << PAGE_SHIFT);
158
159 sprintf(buf, "[ %s + 0x%lx ]", name, offset);
160 } else
161 sprintf(buf, "[ %s vma:0x%lx-0x%lx]",
162 name, vma->vm_start, vma->vm_end);
163
164 up_read(&mm->mmap_sem);
165 if (!in_atomic)
166 mmput(mm);
167
168 if (buf[0] == '\0')
169 sprintf(buf, "[ %s ] dynamic memory", name);
170
171 goto done;
172 }
173 }
174
175 up_read(&mm->mmap_sem);
176 if (!in_atomic)
177 mmput(mm);
178 }
179
180 /*
181 * we were unable to find this address anywhere,
182 * or some MMs were skipped because they were in use.
183 */
184 sprintf(buf, "/* kernel dynamic memory */");
185
186done:
187 write_unlock_irqrestore(&tasklist_lock, flags);
188}
189
190#define EXPAND_LEN ((1 << CONFIG_DEBUG_BFIN_HWTRACE_EXPAND_LEN) * 256 - 1)
191
192/*
193 * Similar to get_user, do some address checking, then dereference
194 * Return true on success, false on bad address
195 */
196bool get_mem16(unsigned short *val, unsigned short *address)
197{
198 unsigned long addr = (unsigned long)address;
199
200 /* Check for odd addresses */
201 if (addr & 0x1)
202 return false;
203
204 switch (bfin_mem_access_type(addr, 2)) {
205 case BFIN_MEM_ACCESS_CORE:
206 case BFIN_MEM_ACCESS_CORE_ONLY:
207 *val = *address;
208 return true;
209 case BFIN_MEM_ACCESS_DMA:
210 dma_memcpy(val, address, 2);
211 return true;
212 case BFIN_MEM_ACCESS_ITEST:
213 isram_memcpy(val, address, 2);
214 return true;
215 default: /* invalid access */
216 return false;
217 }
218}
219
220bool get_instruction(unsigned int *val, unsigned short *address)
221{
222 unsigned long addr = (unsigned long)address;
223 unsigned short opcode0, opcode1;
224
225 /* Check for odd addresses */
226 if (addr & 0x1)
227 return false;
228
229 /* MMR region will never have instructions */
230 if (addr >= SYSMMR_BASE)
231 return false;
232
233 /* Scratchpad will never have instructions */
234 if (addr >= L1_SCRATCH_START && addr < L1_SCRATCH_START + L1_SCRATCH_LENGTH)
235 return false;
236
237 /* Data banks will never have instructions */
238 if (addr >= BOOT_ROM_START + BOOT_ROM_LENGTH && addr < L1_CODE_START)
239 return false;
240
241 if (!get_mem16(&opcode0, address))
242 return false;
243
244 /* was this a 32-bit instruction? If so, get the next 16 bits */
245 if ((opcode0 & 0xc000) == 0xc000) {
246 if (!get_mem16(&opcode1, address + 1))
247 return false;
248 *val = (opcode0 << 16) + opcode1;
249 } else
250 *val = opcode0;
251
252 return true;
253}
254
255#if defined(CONFIG_DEBUG_BFIN_HWTRACE_ON)
256/*
257 * decode the instruction if we are printing out the trace, as it
258 * makes things easier to follow, without running it through objdump
259 * Decode the change of flow, and the common load/store instructions
260 * which are the main cause for faults, and discontinuities in the trace
261 * buffer.
262 */
263
264#define ProgCtrl_opcode 0x0000
265#define ProgCtrl_poprnd_bits 0
266#define ProgCtrl_poprnd_mask 0xf
267#define ProgCtrl_prgfunc_bits 4
268#define ProgCtrl_prgfunc_mask 0xf
269#define ProgCtrl_code_bits 8
270#define ProgCtrl_code_mask 0xff
271
272static void decode_ProgCtrl_0(unsigned int opcode)
273{
274 int poprnd = ((opcode >> ProgCtrl_poprnd_bits) & ProgCtrl_poprnd_mask);
275 int prgfunc = ((opcode >> ProgCtrl_prgfunc_bits) & ProgCtrl_prgfunc_mask);
276
277 if (prgfunc == 0 && poprnd == 0)
278 pr_cont("NOP");
279 else if (prgfunc == 1 && poprnd == 0)
280 pr_cont("RTS");
281 else if (prgfunc == 1 && poprnd == 1)
282 pr_cont("RTI");
283 else if (prgfunc == 1 && poprnd == 2)
284 pr_cont("RTX");
285 else if (prgfunc == 1 && poprnd == 3)
286 pr_cont("RTN");
287 else if (prgfunc == 1 && poprnd == 4)
288 pr_cont("RTE");
289 else if (prgfunc == 2 && poprnd == 0)
290 pr_cont("IDLE");
291 else if (prgfunc == 2 && poprnd == 3)
292 pr_cont("CSYNC");
293 else if (prgfunc == 2 && poprnd == 4)
294 pr_cont("SSYNC");
295 else if (prgfunc == 2 && poprnd == 5)
296 pr_cont("EMUEXCPT");
297 else if (prgfunc == 3)
298 pr_cont("CLI R%i", poprnd);
299 else if (prgfunc == 4)
300 pr_cont("STI R%i", poprnd);
301 else if (prgfunc == 5)
302 pr_cont("JUMP (P%i)", poprnd);
303 else if (prgfunc == 6)
304 pr_cont("CALL (P%i)", poprnd);
305 else if (prgfunc == 7)
306 pr_cont("CALL (PC + P%i)", poprnd);
307 else if (prgfunc == 8)
308 pr_cont("JUMP (PC + P%i", poprnd);
309 else if (prgfunc == 9)
310 pr_cont("RAISE %i", poprnd);
311 else if (prgfunc == 10)
312 pr_cont("EXCPT %i", poprnd);
313 else
314 pr_cont("0x%04x", opcode);
315
316}
317
318#define BRCC_opcode 0x1000
319#define BRCC_offset_bits 0
320#define BRCC_offset_mask 0x3ff
321#define BRCC_B_bits 10
322#define BRCC_B_mask 0x1
323#define BRCC_T_bits 11
324#define BRCC_T_mask 0x1
325#define BRCC_code_bits 12
326#define BRCC_code_mask 0xf
327
328static void decode_BRCC_0(unsigned int opcode)
329{
330 int B = ((opcode >> BRCC_B_bits) & BRCC_B_mask);
331 int T = ((opcode >> BRCC_T_bits) & BRCC_T_mask);
332
333 pr_cont("IF %sCC JUMP pcrel %s", T ? "" : "!", B ? "(BP)" : "");
334}
335
336#define CALLa_opcode 0xe2000000
337#define CALLa_addr_bits 0
338#define CALLa_addr_mask 0xffffff
339#define CALLa_S_bits 24
340#define CALLa_S_mask 0x1
341#define CALLa_code_bits 25
342#define CALLa_code_mask 0x7f
343
344static void decode_CALLa_0(unsigned int opcode)
345{
346 int S = ((opcode >> (CALLa_S_bits - 16)) & CALLa_S_mask);
347
348 if (S)
349 pr_cont("CALL pcrel");
350 else
351 pr_cont("JUMP.L");
352}
353
354#define LoopSetup_opcode 0xe0800000
355#define LoopSetup_eoffset_bits 0
356#define LoopSetup_eoffset_mask 0x3ff
357#define LoopSetup_dontcare_bits 10
358#define LoopSetup_dontcare_mask 0x3
359#define LoopSetup_reg_bits 12
360#define LoopSetup_reg_mask 0xf
361#define LoopSetup_soffset_bits 16
362#define LoopSetup_soffset_mask 0xf
363#define LoopSetup_c_bits 20
364#define LoopSetup_c_mask 0x1
365#define LoopSetup_rop_bits 21
366#define LoopSetup_rop_mask 0x3
367#define LoopSetup_code_bits 23
368#define LoopSetup_code_mask 0x1ff
369
370static void decode_LoopSetup_0(unsigned int opcode)
371{
372 int c = ((opcode >> LoopSetup_c_bits) & LoopSetup_c_mask);
373 int reg = ((opcode >> LoopSetup_reg_bits) & LoopSetup_reg_mask);
374 int rop = ((opcode >> LoopSetup_rop_bits) & LoopSetup_rop_mask);
375
376 pr_cont("LSETUP <> LC%i", c);
377 if ((rop & 1) == 1)
378 pr_cont("= P%i", reg);
379 if ((rop & 2) == 2)
380 pr_cont(" >> 0x1");
381}
382
383#define DspLDST_opcode 0x9c00
384#define DspLDST_reg_bits 0
385#define DspLDST_reg_mask 0x7
386#define DspLDST_i_bits 3
387#define DspLDST_i_mask 0x3
388#define DspLDST_m_bits 5
389#define DspLDST_m_mask 0x3
390#define DspLDST_aop_bits 7
391#define DspLDST_aop_mask 0x3
392#define DspLDST_W_bits 9
393#define DspLDST_W_mask 0x1
394#define DspLDST_code_bits 10
395#define DspLDST_code_mask 0x3f
396
397static void decode_dspLDST_0(unsigned int opcode)
398{
399 int i = ((opcode >> DspLDST_i_bits) & DspLDST_i_mask);
400 int m = ((opcode >> DspLDST_m_bits) & DspLDST_m_mask);
401 int W = ((opcode >> DspLDST_W_bits) & DspLDST_W_mask);
402 int aop = ((opcode >> DspLDST_aop_bits) & DspLDST_aop_mask);
403 int reg = ((opcode >> DspLDST_reg_bits) & DspLDST_reg_mask);
404
405 if (W == 0) {
406 pr_cont("R%i", reg);
407 switch (m) {
408 case 0:
409 pr_cont(" = ");
410 break;
411 case 1:
412 pr_cont(".L = ");
413 break;
414 case 2:
415 pr_cont(".W = ");
416 break;
417 }
418 }
419
420 pr_cont("[ I%i", i);
421
422 switch (aop) {
423 case 0:
424 pr_cont("++ ]");
425 break;
426 case 1:
427 pr_cont("-- ]");
428 break;
429 }
430
431 if (W == 1) {
432 pr_cont(" = R%i", reg);
433 switch (m) {
434 case 1:
435 pr_cont(".L = ");
436 break;
437 case 2:
438 pr_cont(".W = ");
439 break;
440 }
441 }
442}
443
444#define LDST_opcode 0x9000
445#define LDST_reg_bits 0
446#define LDST_reg_mask 0x7
447#define LDST_ptr_bits 3
448#define LDST_ptr_mask 0x7
449#define LDST_Z_bits 6
450#define LDST_Z_mask 0x1
451#define LDST_aop_bits 7
452#define LDST_aop_mask 0x3
453#define LDST_W_bits 9
454#define LDST_W_mask 0x1
455#define LDST_sz_bits 10
456#define LDST_sz_mask 0x3
457#define LDST_code_bits 12
458#define LDST_code_mask 0xf
459
460static void decode_LDST_0(unsigned int opcode)
461{
462 int Z = ((opcode >> LDST_Z_bits) & LDST_Z_mask);
463 int W = ((opcode >> LDST_W_bits) & LDST_W_mask);
464 int sz = ((opcode >> LDST_sz_bits) & LDST_sz_mask);
465 int aop = ((opcode >> LDST_aop_bits) & LDST_aop_mask);
466 int reg = ((opcode >> LDST_reg_bits) & LDST_reg_mask);
467 int ptr = ((opcode >> LDST_ptr_bits) & LDST_ptr_mask);
468
469 if (W == 0)
470 pr_cont("%s%i = ", (sz == 0 && Z == 1) ? "P" : "R", reg);
471
472 switch (sz) {
473 case 1:
474 pr_cont("W");
475 break;
476 case 2:
477 pr_cont("B");
478 break;
479 }
480
481 pr_cont("[P%i", ptr);
482
483 switch (aop) {
484 case 0:
485 pr_cont("++");
486 break;
487 case 1:
488 pr_cont("--");
489 break;
490 }
491 pr_cont("]");
492
493 if (W == 1)
494 pr_cont(" = %s%i ", (sz == 0 && Z == 1) ? "P" : "R", reg);
495
496 if (sz) {
497 if (Z)
498 pr_cont(" (X)");
499 else
500 pr_cont(" (Z)");
501 }
502}
503
504#define LDSTii_opcode 0xa000
505#define LDSTii_reg_bit 0
506#define LDSTii_reg_mask 0x7
507#define LDSTii_ptr_bit 3
508#define LDSTii_ptr_mask 0x7
509#define LDSTii_offset_bit 6
510#define LDSTii_offset_mask 0xf
511#define LDSTii_op_bit 10
512#define LDSTii_op_mask 0x3
513#define LDSTii_W_bit 12
514#define LDSTii_W_mask 0x1
515#define LDSTii_code_bit 13
516#define LDSTii_code_mask 0x7
517
518static void decode_LDSTii_0(unsigned int opcode)
519{
520 int reg = ((opcode >> LDSTii_reg_bit) & LDSTii_reg_mask);
521 int ptr = ((opcode >> LDSTii_ptr_bit) & LDSTii_ptr_mask);
522 int offset = ((opcode >> LDSTii_offset_bit) & LDSTii_offset_mask);
523 int op = ((opcode >> LDSTii_op_bit) & LDSTii_op_mask);
524 int W = ((opcode >> LDSTii_W_bit) & LDSTii_W_mask);
525
526 if (W == 0) {
527 pr_cont("%s%i = %s[P%i + %i]", op == 3 ? "R" : "P", reg,
528 op == 1 || op == 2 ? "" : "W", ptr, offset);
529 if (op == 2)
530 pr_cont("(Z)");
531 if (op == 3)
532 pr_cont("(X)");
533 } else {
534 pr_cont("%s[P%i + %i] = %s%i", op == 0 ? "" : "W", ptr,
535 offset, op == 3 ? "P" : "R", reg);
536 }
537}
538
539#define LDSTidxI_opcode 0xe4000000
540#define LDSTidxI_offset_bits 0
541#define LDSTidxI_offset_mask 0xffff
542#define LDSTidxI_reg_bits 16
543#define LDSTidxI_reg_mask 0x7
544#define LDSTidxI_ptr_bits 19
545#define LDSTidxI_ptr_mask 0x7
546#define LDSTidxI_sz_bits 22
547#define LDSTidxI_sz_mask 0x3
548#define LDSTidxI_Z_bits 24
549#define LDSTidxI_Z_mask 0x1
550#define LDSTidxI_W_bits 25
551#define LDSTidxI_W_mask 0x1
552#define LDSTidxI_code_bits 26
553#define LDSTidxI_code_mask 0x3f
554
555static void decode_LDSTidxI_0(unsigned int opcode)
556{
557 int Z = ((opcode >> LDSTidxI_Z_bits) & LDSTidxI_Z_mask);
558 int W = ((opcode >> LDSTidxI_W_bits) & LDSTidxI_W_mask);
559 int sz = ((opcode >> LDSTidxI_sz_bits) & LDSTidxI_sz_mask);
560 int reg = ((opcode >> LDSTidxI_reg_bits) & LDSTidxI_reg_mask);
561 int ptr = ((opcode >> LDSTidxI_ptr_bits) & LDSTidxI_ptr_mask);
562 int offset = ((opcode >> LDSTidxI_offset_bits) & LDSTidxI_offset_mask);
563
564 if (W == 0)
565 pr_cont("%s%i = ", sz == 0 && Z == 1 ? "P" : "R", reg);
566
567 if (sz == 1)
568 pr_cont("W");
569 if (sz == 2)
570 pr_cont("B");
571
572 pr_cont("[P%i + %s0x%x]", ptr, offset & 0x20 ? "-" : "",
573 (offset & 0x1f) << 2);
574
575 if (W == 0 && sz != 0) {
576 if (Z)
577 pr_cont("(X)");
578 else
579 pr_cont("(Z)");
580 }
581
582 if (W == 1)
583 pr_cont("= %s%i", (sz == 0 && Z == 1) ? "P" : "R", reg);
584
585}
586
587static void decode_opcode(unsigned int opcode)
588{
589#ifdef CONFIG_BUG
590 if (opcode == BFIN_BUG_OPCODE)
591 pr_cont("BUG");
592 else
593#endif
594 if ((opcode & 0xffffff00) == ProgCtrl_opcode)
595 decode_ProgCtrl_0(opcode);
596 else if ((opcode & 0xfffff000) == BRCC_opcode)
597 decode_BRCC_0(opcode);
598 else if ((opcode & 0xfffff000) == 0x2000)
599 pr_cont("JUMP.S");
600 else if ((opcode & 0xfe000000) == CALLa_opcode)
601 decode_CALLa_0(opcode);
602 else if ((opcode & 0xff8000C0) == LoopSetup_opcode)
603 decode_LoopSetup_0(opcode);
604 else if ((opcode & 0xfffffc00) == DspLDST_opcode)
605 decode_dspLDST_0(opcode);
606 else if ((opcode & 0xfffff000) == LDST_opcode)
607 decode_LDST_0(opcode);
608 else if ((opcode & 0xffffe000) == LDSTii_opcode)
609 decode_LDSTii_0(opcode);
610 else if ((opcode & 0xfc000000) == LDSTidxI_opcode)
611 decode_LDSTidxI_0(opcode);
612 else if (opcode & 0xffff0000)
613 pr_cont("0x%08x", opcode);
614 else
615 pr_cont("0x%04x", opcode);
616}
617
618#define BIT_MULTI_INS 0x08000000
619static void decode_instruction(unsigned short *address)
620{
621 unsigned int opcode;
622
623 if (!get_instruction(&opcode, address))
624 return;
625
626 decode_opcode(opcode);
627
628 /* If things are a 32-bit instruction, it has the possibility of being
629 * a multi-issue instruction (a 32-bit, and 2 16 bit instrucitions)
630 * This test collidates with the unlink instruction, so disallow that
631 */
632 if ((opcode & 0xc0000000) == 0xc0000000 &&
633 (opcode & BIT_MULTI_INS) &&
634 (opcode & 0xe8000000) != 0xe8000000) {
635 pr_cont(" || ");
636 if (!get_instruction(&opcode, address + 2))
637 return;
638 decode_opcode(opcode);
639 pr_cont(" || ");
640 if (!get_instruction(&opcode, address + 3))
641 return;
642 decode_opcode(opcode);
643 }
644}
645#endif
646
647void dump_bfin_trace_buffer(void)
648{
649#ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON
650 int tflags, i = 0, fault = 0;
651 char buf[150];
652 unsigned short *addr;
653 unsigned int cpu = raw_smp_processor_id();
654#ifdef CONFIG_DEBUG_BFIN_HWTRACE_EXPAND
655 int j, index;
656#endif
657
658 trace_buffer_save(tflags);
659
660 pr_notice("Hardware Trace:\n");
661
662#ifdef CONFIG_DEBUG_BFIN_HWTRACE_EXPAND
663 pr_notice("WARNING: Expanded trace turned on - can not trace exceptions\n");
664#endif
665
666 if (likely(bfin_read_TBUFSTAT() & TBUFCNT)) {
667 for (; bfin_read_TBUFSTAT() & TBUFCNT; i++) {
668 addr = (unsigned short *)bfin_read_TBUF();
669 decode_address(buf, (unsigned long)addr);
670 pr_notice("%4i Target : %s\n", i, buf);
671 /* Normally, the faulting instruction doesn't go into
672 * the trace buffer, (since it doesn't commit), so
673 * we print out the fault address here
674 */
675 if (!fault && addr == ((unsigned short *)evt_ivhw)) {
676 addr = (unsigned short *)bfin_read_TBUF();
677 decode_address(buf, (unsigned long)addr);
678 pr_notice(" FAULT : %s ", buf);
679 decode_instruction(addr);
680 pr_cont("\n");
681 fault = 1;
682 continue;
683 }
684 if (!fault && addr == (unsigned short *)trap &&
685 (cpu_pda[cpu].seqstat & SEQSTAT_EXCAUSE) > VEC_EXCPT15) {
686 decode_address(buf, cpu_pda[cpu].icplb_fault_addr);
687 pr_notice(" FAULT : %s ", buf);
688 decode_instruction((unsigned short *)cpu_pda[cpu].icplb_fault_addr);
689 pr_cont("\n");
690 fault = 1;
691 }
692 addr = (unsigned short *)bfin_read_TBUF();
693 decode_address(buf, (unsigned long)addr);
694 pr_notice(" Source : %s ", buf);
695 decode_instruction(addr);
696 pr_cont("\n");
697 }
698 }
699
700#ifdef CONFIG_DEBUG_BFIN_HWTRACE_EXPAND
701 if (trace_buff_offset)
702 index = trace_buff_offset / 4;
703 else
704 index = EXPAND_LEN;
705
706 j = (1 << CONFIG_DEBUG_BFIN_HWTRACE_EXPAND_LEN) * 128;
707 while (j) {
708 decode_address(buf, software_trace_buff[index]);
709 pr_notice("%4i Target : %s\n", i, buf);
710 index -= 1;
711 if (index < 0)
712 index = EXPAND_LEN;
713 decode_address(buf, software_trace_buff[index]);
714 pr_notice(" Source : %s ", buf);
715 decode_instruction((unsigned short *)software_trace_buff[index]);
716 pr_cont("\n");
717 index -= 1;
718 if (index < 0)
719 index = EXPAND_LEN;
720 j--;
721 i++;
722 }
723#endif
724
725 trace_buffer_restore(tflags);
726#endif
727}
728EXPORT_SYMBOL(dump_bfin_trace_buffer);
729
730void dump_bfin_process(struct pt_regs *fp)
731{
732 /* We should be able to look at fp->ipend, but we don't push it on the
733 * stack all the time, so do this until we fix that */
734 unsigned int context = bfin_read_IPEND();
735
736 if (oops_in_progress)
737 pr_emerg("Kernel OOPS in progress\n");
738
739 if (context & 0x0020 && (fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR)
740 pr_notice("HW Error context\n");
741 else if (context & 0x0020)
742 pr_notice("Deferred Exception context\n");
743 else if (context & 0x3FC0)
744 pr_notice("Interrupt context\n");
745 else if (context & 0x4000)
746 pr_notice("Deferred Interrupt context\n");
747 else if (context & 0x8000)
748 pr_notice("Kernel process context\n");
749
750 /* Because we are crashing, and pointers could be bad, we check things
751 * pretty closely before we use them
752 */
753 if ((unsigned long)current >= FIXED_CODE_START &&
754 !((unsigned long)current & 0x3) && current->pid) {
755 pr_notice("CURRENT PROCESS:\n");
756 if (current->comm >= (char *)FIXED_CODE_START)
757 pr_notice("COMM=%s PID=%d",
758 current->comm, current->pid);
759 else
760 pr_notice("COMM= invalid");
761
762 pr_cont(" CPU=%d\n", current_thread_info()->cpu);
763 if (!((unsigned long)current->mm & 0x3) &&
764 (unsigned long)current->mm >= FIXED_CODE_START) {
765 pr_notice("TEXT = 0x%p-0x%p DATA = 0x%p-0x%p\n",
766 (void *)current->mm->start_code,
767 (void *)current->mm->end_code,
768 (void *)current->mm->start_data,
769 (void *)current->mm->end_data);
770 pr_notice(" BSS = 0x%p-0x%p USER-STACK = 0x%p\n\n",
771 (void *)current->mm->end_data,
772 (void *)current->mm->brk,
773 (void *)current->mm->start_stack);
774 } else
775 pr_notice("invalid mm\n");
776 } else
777 pr_notice("No Valid process in current context\n");
778}
779
780void dump_bfin_mem(struct pt_regs *fp)
781{
782 unsigned short *addr, *erraddr, val = 0, err = 0;
783 char sti = 0, buf[6];
784
785 erraddr = (void *)fp->pc;
786
787 pr_notice("return address: [0x%p]; contents of:", erraddr);
788
789 for (addr = (unsigned short *)((unsigned long)erraddr & ~0xF) - 0x10;
790 addr < (unsigned short *)((unsigned long)erraddr & ~0xF) + 0x10;
791 addr++) {
792 if (!((unsigned long)addr & 0xF))
793 pr_notice("0x%p: ", addr);
794
795 if (!get_mem16(&val, addr)) {
796 val = 0;
797 sprintf(buf, "????");
798 } else
799 sprintf(buf, "%04x", val);
800
801 if (addr == erraddr) {
802 pr_cont("[%s]", buf);
803 err = val;
804 } else
805 pr_cont(" %s ", buf);
806
807 /* Do any previous instructions turn on interrupts? */
808 if (addr <= erraddr && /* in the past */
809 ((val >= 0x0040 && val <= 0x0047) || /* STI instruction */
810 val == 0x017b)) /* [SP++] = RETI */
811 sti = 1;
812 }
813
814 pr_cont("\n");
815
816 /* Hardware error interrupts can be deferred */
817 if (unlikely(sti && (fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR &&
818 oops_in_progress)){
819 pr_notice("Looks like this was a deferred error - sorry\n");
820#ifndef CONFIG_DEBUG_HWERR
821 pr_notice("The remaining message may be meaningless\n");
822 pr_notice("You should enable CONFIG_DEBUG_HWERR to get a better idea where it came from\n");
823#else
824 /* If we are handling only one peripheral interrupt
825 * and current mm and pid are valid, and the last error
826 * was in that user space process's text area
827 * print it out - because that is where the problem exists
828 */
829 if ((!(((fp)->ipend & ~0x30) & (((fp)->ipend & ~0x30) - 1))) &&
830 (current->pid && current->mm)) {
831 /* And the last RETI points to the current userspace context */
832 if ((fp + 1)->pc >= current->mm->start_code &&
833 (fp + 1)->pc <= current->mm->end_code) {
834 pr_notice("It might be better to look around here :\n");
835 pr_notice("-------------------------------------------\n");
836 show_regs(fp + 1);
837 pr_notice("-------------------------------------------\n");
838 }
839 }
840#endif
841 }
842}
843
844void show_regs(struct pt_regs *fp)
845{
846 char buf[150];
847 struct irqaction *action;
848 unsigned int i;
849 unsigned long flags = 0;
850 unsigned int cpu = raw_smp_processor_id();
851 unsigned char in_atomic = (bfin_read_IPEND() & 0x10) || in_atomic();
852
853 pr_notice("\n");
854 if (CPUID != bfin_cpuid())
855 pr_notice("Compiled for cpu family 0x%04x (Rev %d), "
856 "but running on:0x%04x (Rev %d)\n",
857 CPUID, bfin_compiled_revid(), bfin_cpuid(), bfin_revid());
858
859 pr_notice("ADSP-%s-0.%d",
860 CPU, bfin_compiled_revid());
861
862 if (bfin_compiled_revid() != bfin_revid())
863 pr_cont("(Detected 0.%d)", bfin_revid());
864
865 pr_cont(" %lu(MHz CCLK) %lu(MHz SCLK) (%s)\n",
866 get_cclk()/1000000, get_sclk()/1000000,
867#ifdef CONFIG_MPU
868 "mpu on"
869#else
870 "mpu off"
871#endif
872 );
873
874 pr_notice("%s", linux_banner);
875
876 pr_notice("\nSEQUENCER STATUS:\t\t%s\n", print_tainted());
877 pr_notice(" SEQSTAT: %08lx IPEND: %04lx IMASK: %04lx SYSCFG: %04lx\n",
878 (long)fp->seqstat, fp->ipend, cpu_pda[raw_smp_processor_id()].ex_imask, fp->syscfg);
879 if (fp->ipend & EVT_IRPTEN)
880 pr_notice(" Global Interrupts Disabled (IPEND[4])\n");
881 if (!(cpu_pda[raw_smp_processor_id()].ex_imask & (EVT_IVG13 | EVT_IVG12 | EVT_IVG11 |
882 EVT_IVG10 | EVT_IVG9 | EVT_IVG8 | EVT_IVG7 | EVT_IVTMR)))
883 pr_notice(" Peripheral interrupts masked off\n");
884 if (!(cpu_pda[raw_smp_processor_id()].ex_imask & (EVT_IVG15 | EVT_IVG14)))
885 pr_notice(" Kernel interrupts masked off\n");
886 if ((fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR) {
887 pr_notice(" HWERRCAUSE: 0x%lx\n",
888 (fp->seqstat & SEQSTAT_HWERRCAUSE) >> 14);
889#ifdef EBIU_ERRMST
890 /* If the error was from the EBIU, print it out */
891 if (bfin_read_EBIU_ERRMST() & CORE_ERROR) {
892 pr_notice(" EBIU Error Reason : 0x%04x\n",
893 bfin_read_EBIU_ERRMST());
894 pr_notice(" EBIU Error Address : 0x%08x\n",
895 bfin_read_EBIU_ERRADD());
896 }
897#endif
898 }
899 pr_notice(" EXCAUSE : 0x%lx\n",
900 fp->seqstat & SEQSTAT_EXCAUSE);
901 for (i = 2; i <= 15 ; i++) {
902 if (fp->ipend & (1 << i)) {
903 if (i != 4) {
904 decode_address(buf, bfin_read32(EVT0 + 4*i));
905 pr_notice(" physical IVG%i asserted : %s\n", i, buf);
906 } else
907 pr_notice(" interrupts disabled\n");
908 }
909 }
910
911 /* if no interrupts are going off, don't print this out */
912 if (fp->ipend & ~0x3F) {
913 for (i = 0; i < (NR_IRQS - 1); i++) {
914 if (!in_atomic)
915 raw_spin_lock_irqsave(&irq_desc[i].lock, flags);
916
917 action = irq_desc[i].action;
918 if (!action)
919 goto unlock;
920
921 decode_address(buf, (unsigned int)action->handler);
922 pr_notice(" logical irq %3d mapped : %s", i, buf);
923 for (action = action->next; action; action = action->next) {
924 decode_address(buf, (unsigned int)action->handler);
925 pr_cont(", %s", buf);
926 }
927 pr_cont("\n");
928unlock:
929 if (!in_atomic)
930 raw_spin_unlock_irqrestore(&irq_desc[i].lock, flags);
931 }
932 }
933
934 decode_address(buf, fp->rete);
935 pr_notice(" RETE: %s\n", buf);
936 decode_address(buf, fp->retn);
937 pr_notice(" RETN: %s\n", buf);
938 decode_address(buf, fp->retx);
939 pr_notice(" RETX: %s\n", buf);
940 decode_address(buf, fp->rets);
941 pr_notice(" RETS: %s\n", buf);
942 decode_address(buf, fp->pc);
943 pr_notice(" PC : %s\n", buf);
944
945 if (((long)fp->seqstat & SEQSTAT_EXCAUSE) &&
946 (((long)fp->seqstat & SEQSTAT_EXCAUSE) != VEC_HWERR)) {
947 decode_address(buf, cpu_pda[cpu].dcplb_fault_addr);
948 pr_notice("DCPLB_FAULT_ADDR: %s\n", buf);
949 decode_address(buf, cpu_pda[cpu].icplb_fault_addr);
950 pr_notice("ICPLB_FAULT_ADDR: %s\n", buf);
951 }
952
953 pr_notice("PROCESSOR STATE:\n");
954 pr_notice(" R0 : %08lx R1 : %08lx R2 : %08lx R3 : %08lx\n",
955 fp->r0, fp->r1, fp->r2, fp->r3);
956 pr_notice(" R4 : %08lx R5 : %08lx R6 : %08lx R7 : %08lx\n",
957 fp->r4, fp->r5, fp->r6, fp->r7);
958 pr_notice(" P0 : %08lx P1 : %08lx P2 : %08lx P3 : %08lx\n",
959 fp->p0, fp->p1, fp->p2, fp->p3);
960 pr_notice(" P4 : %08lx P5 : %08lx FP : %08lx SP : %08lx\n",
961 fp->p4, fp->p5, fp->fp, (long)fp);
962 pr_notice(" LB0: %08lx LT0: %08lx LC0: %08lx\n",
963 fp->lb0, fp->lt0, fp->lc0);
964 pr_notice(" LB1: %08lx LT1: %08lx LC1: %08lx\n",
965 fp->lb1, fp->lt1, fp->lc1);
966 pr_notice(" B0 : %08lx L0 : %08lx M0 : %08lx I0 : %08lx\n",
967 fp->b0, fp->l0, fp->m0, fp->i0);
968 pr_notice(" B1 : %08lx L1 : %08lx M1 : %08lx I1 : %08lx\n",
969 fp->b1, fp->l1, fp->m1, fp->i1);
970 pr_notice(" B2 : %08lx L2 : %08lx M2 : %08lx I2 : %08lx\n",
971 fp->b2, fp->l2, fp->m2, fp->i2);
972 pr_notice(" B3 : %08lx L3 : %08lx M3 : %08lx I3 : %08lx\n",
973 fp->b3, fp->l3, fp->m3, fp->i3);
974 pr_notice("A0.w: %08lx A0.x: %08lx A1.w: %08lx A1.x: %08lx\n",
975 fp->a0w, fp->a0x, fp->a1w, fp->a1x);
976
977 pr_notice("USP : %08lx ASTAT: %08lx\n",
978 rdusp(), fp->astat);
979
980 pr_notice("\n");
981}
diff --git a/arch/blackfin/kernel/traps.c b/arch/blackfin/kernel/traps.c
index d3cbcd6bd985..59c1df75e4de 100644
--- a/arch/blackfin/kernel/traps.c
+++ b/arch/blackfin/kernel/traps.c
@@ -1,25 +1,22 @@
1/* 1/*
2 * Copyright 2004-2009 Analog Devices Inc. 2 * Main exception handling logic.
3 *
4 * Copyright 2004-2010 Analog Devices Inc.
3 * 5 *
4 * Licensed under the GPL-2 or later 6 * Licensed under the GPL-2 or later
5 */ 7 */
6 8
7#include <linux/bug.h> 9#include <linux/bug.h>
8#include <linux/uaccess.h> 10#include <linux/uaccess.h>
9#include <linux/interrupt.h>
10#include <linux/module.h> 11#include <linux/module.h>
11#include <linux/kallsyms.h>
12#include <linux/fs.h>
13#include <linux/rbtree.h>
14#include <asm/traps.h> 12#include <asm/traps.h>
15#include <asm/cacheflush.h>
16#include <asm/cplb.h> 13#include <asm/cplb.h>
17#include <asm/dma.h>
18#include <asm/blackfin.h> 14#include <asm/blackfin.h>
19#include <asm/irq_handler.h> 15#include <asm/irq_handler.h>
20#include <linux/irq.h> 16#include <linux/irq.h>
21#include <asm/trace.h> 17#include <asm/trace.h>
22#include <asm/fixed_code.h> 18#include <asm/fixed_code.h>
19#include <asm/pseudo_instructions.h>
23 20
24#ifdef CONFIG_KGDB 21#ifdef CONFIG_KGDB
25# include <linux/kgdb.h> 22# include <linux/kgdb.h>
@@ -62,182 +59,6 @@ void __init trap_init(void)
62 CSYNC(); 59 CSYNC();
63} 60}
64 61
65static void decode_address(char *buf, unsigned long address)
66{
67#ifdef CONFIG_DEBUG_VERBOSE
68 struct task_struct *p;
69 struct mm_struct *mm;
70 unsigned long flags, offset;
71 unsigned char in_atomic = (bfin_read_IPEND() & 0x10) || in_atomic();
72 struct rb_node *n;
73
74#ifdef CONFIG_KALLSYMS
75 unsigned long symsize;
76 const char *symname;
77 char *modname;
78 char *delim = ":";
79 char namebuf[128];
80#endif
81
82 buf += sprintf(buf, "<0x%08lx> ", address);
83
84#ifdef CONFIG_KALLSYMS
85 /* look up the address and see if we are in kernel space */
86 symname = kallsyms_lookup(address, &symsize, &offset, &modname, namebuf);
87
88 if (symname) {
89 /* yeah! kernel space! */
90 if (!modname)
91 modname = delim = "";
92 sprintf(buf, "{ %s%s%s%s + 0x%lx }",
93 delim, modname, delim, symname,
94 (unsigned long)offset);
95 return;
96 }
97#endif
98
99 if (address >= FIXED_CODE_START && address < FIXED_CODE_END) {
100 /* Problem in fixed code section? */
101 strcat(buf, "/* Maybe fixed code section */");
102 return;
103
104 } else if (address < CONFIG_BOOT_LOAD) {
105 /* Problem somewhere before the kernel start address */
106 strcat(buf, "/* Maybe null pointer? */");
107 return;
108
109 } else if (address >= COREMMR_BASE) {
110 strcat(buf, "/* core mmrs */");
111 return;
112
113 } else if (address >= SYSMMR_BASE) {
114 strcat(buf, "/* system mmrs */");
115 return;
116
117 } else if (address >= L1_ROM_START && address < L1_ROM_START + L1_ROM_LENGTH) {
118 strcat(buf, "/* on-chip L1 ROM */");
119 return;
120 }
121
122 /*
123 * Don't walk any of the vmas if we are oopsing, it has been known
124 * to cause problems - corrupt vmas (kernel crashes) cause double faults
125 */
126 if (oops_in_progress) {
127 strcat(buf, "/* kernel dynamic memory (maybe user-space) */");
128 return;
129 }
130
131 /* looks like we're off in user-land, so let's walk all the
132 * mappings of all our processes and see if we can't be a whee
133 * bit more specific
134 */
135 write_lock_irqsave(&tasklist_lock, flags);
136 for_each_process(p) {
137 mm = (in_atomic ? p->mm : get_task_mm(p));
138 if (!mm)
139 continue;
140
141 for (n = rb_first(&mm->mm_rb); n; n = rb_next(n)) {
142 struct vm_area_struct *vma;
143
144 vma = rb_entry(n, struct vm_area_struct, vm_rb);
145
146 if (address >= vma->vm_start && address < vma->vm_end) {
147 char _tmpbuf[256];
148 char *name = p->comm;
149 struct file *file = vma->vm_file;
150
151 if (file) {
152 char *d_name = d_path(&file->f_path, _tmpbuf,
153 sizeof(_tmpbuf));
154 if (!IS_ERR(d_name))
155 name = d_name;
156 }
157
158 /* FLAT does not have its text aligned to the start of
159 * the map while FDPIC ELF does ...
160 */
161
162 /* before we can check flat/fdpic, we need to
163 * make sure current is valid
164 */
165 if ((unsigned long)current >= FIXED_CODE_START &&
166 !((unsigned long)current & 0x3)) {
167 if (current->mm &&
168 (address > current->mm->start_code) &&
169 (address < current->mm->end_code))
170 offset = address - current->mm->start_code;
171 else
172 offset = (address - vma->vm_start) +
173 (vma->vm_pgoff << PAGE_SHIFT);
174
175 sprintf(buf, "[ %s + 0x%lx ]", name, offset);
176 } else
177 sprintf(buf, "[ %s vma:0x%lx-0x%lx]",
178 name, vma->vm_start, vma->vm_end);
179
180 if (!in_atomic)
181 mmput(mm);
182
183 if (buf[0] == '\0')
184 sprintf(buf, "[ %s ] dynamic memory", name);
185
186 goto done;
187 }
188 }
189 if (!in_atomic)
190 mmput(mm);
191 }
192
193 /* we were unable to find this address anywhere */
194 sprintf(buf, "/* kernel dynamic memory */");
195
196done:
197 write_unlock_irqrestore(&tasklist_lock, flags);
198#else
199 sprintf(buf, " ");
200#endif
201}
202
203asmlinkage void double_fault_c(struct pt_regs *fp)
204{
205#ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON
206 int j;
207 trace_buffer_save(j);
208#endif
209
210 console_verbose();
211 oops_in_progress = 1;
212#ifdef CONFIG_DEBUG_VERBOSE
213 printk(KERN_EMERG "Double Fault\n");
214#ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT
215 if (((long)fp->seqstat & SEQSTAT_EXCAUSE) == VEC_UNCOV) {
216 unsigned int cpu = raw_smp_processor_id();
217 char buf[150];
218 decode_address(buf, cpu_pda[cpu].retx_doublefault);
219 printk(KERN_EMERG "While handling exception (EXCAUSE = 0x%x) at %s:\n",
220 (unsigned int)cpu_pda[cpu].seqstat_doublefault & SEQSTAT_EXCAUSE, buf);
221 decode_address(buf, cpu_pda[cpu].dcplb_doublefault_addr);
222 printk(KERN_NOTICE " DCPLB_FAULT_ADDR: %s\n", buf);
223 decode_address(buf, cpu_pda[cpu].icplb_doublefault_addr);
224 printk(KERN_NOTICE " ICPLB_FAULT_ADDR: %s\n", buf);
225
226 decode_address(buf, fp->retx);
227 printk(KERN_NOTICE "The instruction at %s caused a double exception\n", buf);
228 } else
229#endif
230 {
231 dump_bfin_process(fp);
232 dump_bfin_mem(fp);
233 show_regs(fp);
234 dump_bfin_trace_buffer();
235 }
236#endif
237 panic("Double Fault - unrecoverable event");
238
239}
240
241static int kernel_mode_regs(struct pt_regs *regs) 62static int kernel_mode_regs(struct pt_regs *regs)
242{ 63{
243 return regs->ipend & 0xffc0; 64 return regs->ipend & 0xffc0;
@@ -248,9 +69,10 @@ asmlinkage notrace void trap_c(struct pt_regs *fp)
248#ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON 69#ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON
249 int j; 70 int j;
250#endif 71#endif
251#ifdef CONFIG_DEBUG_HUNT_FOR_ZERO 72#ifdef CONFIG_BFIN_PSEUDODBG_INSNS
252 unsigned int cpu = raw_smp_processor_id(); 73 int opcode;
253#endif 74#endif
75 unsigned int cpu = raw_smp_processor_id();
254 const char *strerror = NULL; 76 const char *strerror = NULL;
255 int sig = 0; 77 int sig = 0;
256 siginfo_t info; 78 siginfo_t info;
@@ -382,6 +204,19 @@ asmlinkage notrace void trap_c(struct pt_regs *fp)
382 } 204 }
383 } 205 }
384#endif 206#endif
207#ifdef CONFIG_BFIN_PSEUDODBG_INSNS
208 /*
209 * Support for the fake instructions, if the instruction fails,
210 * then just execute a illegal opcode failure (like normal).
211 * Don't support these instructions inside the kernel
212 */
213 if (!kernel_mode_regs(fp) && get_instruction(&opcode, (unsigned short *)fp->pc)) {
214 if (execute_pseudodbg_assert(fp, opcode))
215 goto traps_done;
216 if (execute_pseudodbg(fp, opcode))
217 goto traps_done;
218 }
219#endif
385 info.si_code = ILL_ILLOPC; 220 info.si_code = ILL_ILLOPC;
386 sig = SIGILL; 221 sig = SIGILL;
387 strerror = KERN_NOTICE EXC_0x21(KERN_NOTICE); 222 strerror = KERN_NOTICE EXC_0x21(KERN_NOTICE);
@@ -639,7 +474,17 @@ asmlinkage notrace void trap_c(struct pt_regs *fp)
639 { 474 {
640 info.si_signo = sig; 475 info.si_signo = sig;
641 info.si_errno = 0; 476 info.si_errno = 0;
642 info.si_addr = (void __user *)fp->pc; 477 switch (trapnr) {
478 case VEC_CPLB_VL:
479 case VEC_MISALI_D:
480 case VEC_CPLB_M:
481 case VEC_CPLB_MHIT:
482 info.si_addr = (void __user *)cpu_pda[cpu].dcplb_fault_addr;
483 break;
484 default:
485 info.si_addr = (void __user *)fp->pc;
486 break;
487 }
643 force_sig_info(sig, &info, current); 488 force_sig_info(sig, &info, current);
644 } 489 }
645 490
@@ -652,659 +497,44 @@ asmlinkage notrace void trap_c(struct pt_regs *fp)
652 trace_buffer_restore(j); 497 trace_buffer_restore(j);
653} 498}
654 499
655/* Typical exception handling routines */ 500asmlinkage void double_fault_c(struct pt_regs *fp)
656
657#define EXPAND_LEN ((1 << CONFIG_DEBUG_BFIN_HWTRACE_EXPAND_LEN) * 256 - 1)
658
659/*
660 * Similar to get_user, do some address checking, then dereference
661 * Return true on success, false on bad address
662 */
663static bool get_instruction(unsigned short *val, unsigned short *address)
664{
665 unsigned long addr = (unsigned long)address;
666
667 /* Check for odd addresses */
668 if (addr & 0x1)
669 return false;
670
671 /* MMR region will never have instructions */
672 if (addr >= SYSMMR_BASE)
673 return false;
674
675 switch (bfin_mem_access_type(addr, 2)) {
676 case BFIN_MEM_ACCESS_CORE:
677 case BFIN_MEM_ACCESS_CORE_ONLY:
678 *val = *address;
679 return true;
680 case BFIN_MEM_ACCESS_DMA:
681 dma_memcpy(val, address, 2);
682 return true;
683 case BFIN_MEM_ACCESS_ITEST:
684 isram_memcpy(val, address, 2);
685 return true;
686 default: /* invalid access */
687 return false;
688 }
689}
690
691/*
692 * decode the instruction if we are printing out the trace, as it
693 * makes things easier to follow, without running it through objdump
694 * These are the normal instructions which cause change of flow, which
695 * would be at the source of the trace buffer
696 */
697#if defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_BFIN_HWTRACE_ON)
698static void decode_instruction(unsigned short *address)
699{
700 unsigned short opcode;
701
702 if (get_instruction(&opcode, address)) {
703 if (opcode == 0x0010)
704 verbose_printk("RTS");
705 else if (opcode == 0x0011)
706 verbose_printk("RTI");
707 else if (opcode == 0x0012)
708 verbose_printk("RTX");
709 else if (opcode == 0x0013)
710 verbose_printk("RTN");
711 else if (opcode == 0x0014)
712 verbose_printk("RTE");
713 else if (opcode == 0x0025)
714 verbose_printk("EMUEXCPT");
715 else if (opcode == 0x0040 && opcode <= 0x0047)
716 verbose_printk("STI R%i", opcode & 7);
717 else if (opcode >= 0x0050 && opcode <= 0x0057)
718 verbose_printk("JUMP (P%i)", opcode & 7);
719 else if (opcode >= 0x0060 && opcode <= 0x0067)
720 verbose_printk("CALL (P%i)", opcode & 7);
721 else if (opcode >= 0x0070 && opcode <= 0x0077)
722 verbose_printk("CALL (PC+P%i)", opcode & 7);
723 else if (opcode >= 0x0080 && opcode <= 0x0087)
724 verbose_printk("JUMP (PC+P%i)", opcode & 7);
725 else if (opcode >= 0x0090 && opcode <= 0x009F)
726 verbose_printk("RAISE 0x%x", opcode & 0xF);
727 else if (opcode >= 0x00A0 && opcode <= 0x00AF)
728 verbose_printk("EXCPT 0x%x", opcode & 0xF);
729 else if ((opcode >= 0x1000 && opcode <= 0x13FF) || (opcode >= 0x1800 && opcode <= 0x1BFF))
730 verbose_printk("IF !CC JUMP");
731 else if ((opcode >= 0x1400 && opcode <= 0x17ff) || (opcode >= 0x1c00 && opcode <= 0x1fff))
732 verbose_printk("IF CC JUMP");
733 else if (opcode >= 0x2000 && opcode <= 0x2fff)
734 verbose_printk("JUMP.S");
735 else if (opcode >= 0xe080 && opcode <= 0xe0ff)
736 verbose_printk("LSETUP");
737 else if (opcode >= 0xe200 && opcode <= 0xe2ff)
738 verbose_printk("JUMP.L");
739 else if (opcode >= 0xe300 && opcode <= 0xe3ff)
740 verbose_printk("CALL pcrel");
741 else
742 verbose_printk("0x%04x", opcode);
743 }
744
745}
746#endif
747
748void dump_bfin_trace_buffer(void)
749{
750#ifdef CONFIG_DEBUG_VERBOSE
751#ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON
752 int tflags, i = 0;
753 char buf[150];
754 unsigned short *addr;
755#ifdef CONFIG_DEBUG_BFIN_HWTRACE_EXPAND
756 int j, index;
757#endif
758
759 trace_buffer_save(tflags);
760
761 printk(KERN_NOTICE "Hardware Trace:\n");
762
763#ifdef CONFIG_DEBUG_BFIN_HWTRACE_EXPAND
764 printk(KERN_NOTICE "WARNING: Expanded trace turned on - can not trace exceptions\n");
765#endif
766
767 if (likely(bfin_read_TBUFSTAT() & TBUFCNT)) {
768 for (; bfin_read_TBUFSTAT() & TBUFCNT; i++) {
769 decode_address(buf, (unsigned long)bfin_read_TBUF());
770 printk(KERN_NOTICE "%4i Target : %s\n", i, buf);
771 addr = (unsigned short *)bfin_read_TBUF();
772 decode_address(buf, (unsigned long)addr);
773 printk(KERN_NOTICE " Source : %s ", buf);
774 decode_instruction(addr);
775 printk("\n");
776 }
777 }
778
779#ifdef CONFIG_DEBUG_BFIN_HWTRACE_EXPAND
780 if (trace_buff_offset)
781 index = trace_buff_offset / 4;
782 else
783 index = EXPAND_LEN;
784
785 j = (1 << CONFIG_DEBUG_BFIN_HWTRACE_EXPAND_LEN) * 128;
786 while (j) {
787 decode_address(buf, software_trace_buff[index]);
788 printk(KERN_NOTICE "%4i Target : %s\n", i, buf);
789 index -= 1;
790 if (index < 0 )
791 index = EXPAND_LEN;
792 decode_address(buf, software_trace_buff[index]);
793 printk(KERN_NOTICE " Source : %s ", buf);
794 decode_instruction((unsigned short *)software_trace_buff[index]);
795 printk("\n");
796 index -= 1;
797 if (index < 0)
798 index = EXPAND_LEN;
799 j--;
800 i++;
801 }
802#endif
803
804 trace_buffer_restore(tflags);
805#endif
806#endif
807}
808EXPORT_SYMBOL(dump_bfin_trace_buffer);
809
810#ifdef CONFIG_BUG
811int is_valid_bugaddr(unsigned long addr)
812{
813 unsigned short opcode;
814
815 if (!get_instruction(&opcode, (unsigned short *)addr))
816 return 0;
817
818 return opcode == BFIN_BUG_OPCODE;
819}
820#endif
821
822/*
823 * Checks to see if the address pointed to is either a
824 * 16-bit CALL instruction, or a 32-bit CALL instruction
825 */
826static bool is_bfin_call(unsigned short *addr)
827{
828 unsigned short opcode = 0, *ins_addr;
829 ins_addr = (unsigned short *)addr;
830
831 if (!get_instruction(&opcode, ins_addr))
832 return false;
833
834 if ((opcode >= 0x0060 && opcode <= 0x0067) ||
835 (opcode >= 0x0070 && opcode <= 0x0077))
836 return true;
837
838 ins_addr--;
839 if (!get_instruction(&opcode, ins_addr))
840 return false;
841
842 if (opcode >= 0xE300 && opcode <= 0xE3FF)
843 return true;
844
845 return false;
846
847}
848
849void show_stack(struct task_struct *task, unsigned long *stack)
850{
851#ifdef CONFIG_PRINTK
852 unsigned int *addr, *endstack, *fp = 0, *frame;
853 unsigned short *ins_addr;
854 char buf[150];
855 unsigned int i, j, ret_addr, frame_no = 0;
856
857 /*
858 * If we have been passed a specific stack, use that one otherwise
859 * if we have been passed a task structure, use that, otherwise
860 * use the stack of where the variable "stack" exists
861 */
862
863 if (stack == NULL) {
864 if (task) {
865 /* We know this is a kernel stack, so this is the start/end */
866 stack = (unsigned long *)task->thread.ksp;
867 endstack = (unsigned int *)(((unsigned int)(stack) & ~(THREAD_SIZE - 1)) + THREAD_SIZE);
868 } else {
869 /* print out the existing stack info */
870 stack = (unsigned long *)&stack;
871 endstack = (unsigned int *)PAGE_ALIGN((unsigned int)stack);
872 }
873 } else
874 endstack = (unsigned int *)PAGE_ALIGN((unsigned int)stack);
875
876 printk(KERN_NOTICE "Stack info:\n");
877 decode_address(buf, (unsigned int)stack);
878 printk(KERN_NOTICE " SP: [0x%p] %s\n", stack, buf);
879
880 if (!access_ok(VERIFY_READ, stack, (unsigned int)endstack - (unsigned int)stack)) {
881 printk(KERN_NOTICE "Invalid stack pointer\n");
882 return;
883 }
884
885 /* First thing is to look for a frame pointer */
886 for (addr = (unsigned int *)((unsigned int)stack & ~0xF); addr < endstack; addr++) {
887 if (*addr & 0x1)
888 continue;
889 ins_addr = (unsigned short *)*addr;
890 ins_addr--;
891 if (is_bfin_call(ins_addr))
892 fp = addr - 1;
893
894 if (fp) {
895 /* Let's check to see if it is a frame pointer */
896 while (fp >= (addr - 1) && fp < endstack
897 && fp && ((unsigned int) fp & 0x3) == 0)
898 fp = (unsigned int *)*fp;
899 if (fp == 0 || fp == endstack) {
900 fp = addr - 1;
901 break;
902 }
903 fp = 0;
904 }
905 }
906 if (fp) {
907 frame = fp;
908 printk(KERN_NOTICE " FP: (0x%p)\n", fp);
909 } else
910 frame = 0;
911
912 /*
913 * Now that we think we know where things are, we
914 * walk the stack again, this time printing things out
915 * incase there is no frame pointer, we still look for
916 * valid return addresses
917 */
918
919 /* First time print out data, next time, print out symbols */
920 for (j = 0; j <= 1; j++) {
921 if (j)
922 printk(KERN_NOTICE "Return addresses in stack:\n");
923 else
924 printk(KERN_NOTICE " Memory from 0x%08lx to %p", ((long unsigned int)stack & ~0xF), endstack);
925
926 fp = frame;
927 frame_no = 0;
928
929 for (addr = (unsigned int *)((unsigned int)stack & ~0xF), i = 0;
930 addr < endstack; addr++, i++) {
931
932 ret_addr = 0;
933 if (!j && i % 8 == 0)
934 printk(KERN_NOTICE "%p:",addr);
935
936 /* if it is an odd address, or zero, just skip it */
937 if (*addr & 0x1 || !*addr)
938 goto print;
939
940 ins_addr = (unsigned short *)*addr;
941
942 /* Go back one instruction, and see if it is a CALL */
943 ins_addr--;
944 ret_addr = is_bfin_call(ins_addr);
945 print:
946 if (!j && stack == (unsigned long *)addr)
947 printk("[%08x]", *addr);
948 else if (ret_addr)
949 if (j) {
950 decode_address(buf, (unsigned int)*addr);
951 if (frame == addr) {
952 printk(KERN_NOTICE " frame %2i : %s\n", frame_no, buf);
953 continue;
954 }
955 printk(KERN_NOTICE " address : %s\n", buf);
956 } else
957 printk("<%08x>", *addr);
958 else if (fp == addr) {
959 if (j)
960 frame = addr+1;
961 else
962 printk("(%08x)", *addr);
963
964 fp = (unsigned int *)*addr;
965 frame_no++;
966
967 } else if (!j)
968 printk(" %08x ", *addr);
969 }
970 if (!j)
971 printk("\n");
972 }
973#endif
974}
975EXPORT_SYMBOL(show_stack);
976
977void dump_stack(void)
978{ 501{
979 unsigned long stack;
980#ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON 502#ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON
981 int tflags; 503 int j;
504 trace_buffer_save(j);
982#endif 505#endif
983 trace_buffer_save(tflags);
984 dump_bfin_trace_buffer();
985 show_stack(current, &stack);
986 trace_buffer_restore(tflags);
987}
988EXPORT_SYMBOL(dump_stack);
989 506
990void dump_bfin_process(struct pt_regs *fp) 507 console_verbose();
991{ 508 oops_in_progress = 1;
992#ifdef CONFIG_DEBUG_VERBOSE 509#ifdef CONFIG_DEBUG_VERBOSE
993 /* We should be able to look at fp->ipend, but we don't push it on the 510 printk(KERN_EMERG "Double Fault\n");
994 * stack all the time, so do this until we fix that */ 511#ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT
995 unsigned int context = bfin_read_IPEND(); 512 if (((long)fp->seqstat & SEQSTAT_EXCAUSE) == VEC_UNCOV) {
996 513 unsigned int cpu = raw_smp_processor_id();
997 if (oops_in_progress) 514 char buf[150];
998 verbose_printk(KERN_EMERG "Kernel OOPS in progress\n"); 515 decode_address(buf, cpu_pda[cpu].retx_doublefault);
999 516 printk(KERN_EMERG "While handling exception (EXCAUSE = 0x%x) at %s:\n",
1000 if (context & 0x0020 && (fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR) 517 (unsigned int)cpu_pda[cpu].seqstat_doublefault & SEQSTAT_EXCAUSE, buf);
1001 verbose_printk(KERN_NOTICE "HW Error context\n"); 518 decode_address(buf, cpu_pda[cpu].dcplb_doublefault_addr);
1002 else if (context & 0x0020) 519 printk(KERN_NOTICE " DCPLB_FAULT_ADDR: %s\n", buf);
1003 verbose_printk(KERN_NOTICE "Deferred Exception context\n"); 520 decode_address(buf, cpu_pda[cpu].icplb_doublefault_addr);
1004 else if (context & 0x3FC0) 521 printk(KERN_NOTICE " ICPLB_FAULT_ADDR: %s\n", buf);
1005 verbose_printk(KERN_NOTICE "Interrupt context\n");
1006 else if (context & 0x4000)
1007 verbose_printk(KERN_NOTICE "Deferred Interrupt context\n");
1008 else if (context & 0x8000)
1009 verbose_printk(KERN_NOTICE "Kernel process context\n");
1010
1011 /* Because we are crashing, and pointers could be bad, we check things
1012 * pretty closely before we use them
1013 */
1014 if ((unsigned long)current >= FIXED_CODE_START &&
1015 !((unsigned long)current & 0x3) && current->pid) {
1016 verbose_printk(KERN_NOTICE "CURRENT PROCESS:\n");
1017 if (current->comm >= (char *)FIXED_CODE_START)
1018 verbose_printk(KERN_NOTICE "COMM=%s PID=%d",
1019 current->comm, current->pid);
1020 else
1021 verbose_printk(KERN_NOTICE "COMM= invalid");
1022 522
1023 printk(KERN_CONT " CPU=%d\n", current_thread_info()->cpu); 523 decode_address(buf, fp->retx);
1024 if (!((unsigned long)current->mm & 0x3) && (unsigned long)current->mm >= FIXED_CODE_START) 524 printk(KERN_NOTICE "The instruction at %s caused a double exception\n", buf);
1025 verbose_printk(KERN_NOTICE
1026 "TEXT = 0x%p-0x%p DATA = 0x%p-0x%p\n"
1027 " BSS = 0x%p-0x%p USER-STACK = 0x%p\n\n",
1028 (void *)current->mm->start_code,
1029 (void *)current->mm->end_code,
1030 (void *)current->mm->start_data,
1031 (void *)current->mm->end_data,
1032 (void *)current->mm->end_data,
1033 (void *)current->mm->brk,
1034 (void *)current->mm->start_stack);
1035 else
1036 verbose_printk(KERN_NOTICE "invalid mm\n");
1037 } else 525 } else
1038 verbose_printk(KERN_NOTICE
1039 "No Valid process in current context\n");
1040#endif
1041}
1042
1043void dump_bfin_mem(struct pt_regs *fp)
1044{
1045#ifdef CONFIG_DEBUG_VERBOSE
1046 unsigned short *addr, *erraddr, val = 0, err = 0;
1047 char sti = 0, buf[6];
1048
1049 erraddr = (void *)fp->pc;
1050
1051 verbose_printk(KERN_NOTICE "return address: [0x%p]; contents of:", erraddr);
1052
1053 for (addr = (unsigned short *)((unsigned long)erraddr & ~0xF) - 0x10;
1054 addr < (unsigned short *)((unsigned long)erraddr & ~0xF) + 0x10;
1055 addr++) {
1056 if (!((unsigned long)addr & 0xF))
1057 verbose_printk(KERN_NOTICE "0x%p: ", addr);
1058
1059 if (!get_instruction(&val, addr)) {
1060 val = 0;
1061 sprintf(buf, "????");
1062 } else
1063 sprintf(buf, "%04x", val);
1064
1065 if (addr == erraddr) {
1066 verbose_printk("[%s]", buf);
1067 err = val;
1068 } else
1069 verbose_printk(" %s ", buf);
1070
1071 /* Do any previous instructions turn on interrupts? */
1072 if (addr <= erraddr && /* in the past */
1073 ((val >= 0x0040 && val <= 0x0047) || /* STI instruction */
1074 val == 0x017b)) /* [SP++] = RETI */
1075 sti = 1;
1076 }
1077
1078 verbose_printk("\n");
1079
1080 /* Hardware error interrupts can be deferred */
1081 if (unlikely(sti && (fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR &&
1082 oops_in_progress)){
1083 verbose_printk(KERN_NOTICE "Looks like this was a deferred error - sorry\n");
1084#ifndef CONFIG_DEBUG_HWERR
1085 verbose_printk(KERN_NOTICE
1086"The remaining message may be meaningless\n"
1087"You should enable CONFIG_DEBUG_HWERR to get a better idea where it came from\n");
1088#else
1089 /* If we are handling only one peripheral interrupt
1090 * and current mm and pid are valid, and the last error
1091 * was in that user space process's text area
1092 * print it out - because that is where the problem exists
1093 */
1094 if ((!(((fp)->ipend & ~0x30) & (((fp)->ipend & ~0x30) - 1))) &&
1095 (current->pid && current->mm)) {
1096 /* And the last RETI points to the current userspace context */
1097 if ((fp + 1)->pc >= current->mm->start_code &&
1098 (fp + 1)->pc <= current->mm->end_code) {
1099 verbose_printk(KERN_NOTICE "It might be better to look around here : \n");
1100 verbose_printk(KERN_NOTICE "-------------------------------------------\n");
1101 show_regs(fp + 1);
1102 verbose_printk(KERN_NOTICE "-------------------------------------------\n");
1103 }
1104 }
1105#endif
1106 }
1107#endif
1108}
1109
1110void show_regs(struct pt_regs *fp)
1111{
1112#ifdef CONFIG_DEBUG_VERBOSE
1113 char buf [150];
1114 struct irqaction *action;
1115 unsigned int i;
1116 unsigned long flags = 0;
1117 unsigned int cpu = raw_smp_processor_id();
1118 unsigned char in_atomic = (bfin_read_IPEND() & 0x10) || in_atomic();
1119
1120 verbose_printk(KERN_NOTICE "\n");
1121 if (CPUID != bfin_cpuid())
1122 verbose_printk(KERN_NOTICE "Compiled for cpu family 0x%04x (Rev %d), "
1123 "but running on:0x%04x (Rev %d)\n",
1124 CPUID, bfin_compiled_revid(), bfin_cpuid(), bfin_revid());
1125
1126 verbose_printk(KERN_NOTICE "ADSP-%s-0.%d",
1127 CPU, bfin_compiled_revid());
1128
1129 if (bfin_compiled_revid() != bfin_revid())
1130 verbose_printk("(Detected 0.%d)", bfin_revid());
1131
1132 verbose_printk(" %lu(MHz CCLK) %lu(MHz SCLK) (%s)\n",
1133 get_cclk()/1000000, get_sclk()/1000000,
1134#ifdef CONFIG_MPU
1135 "mpu on"
1136#else
1137 "mpu off"
1138#endif
1139 );
1140
1141 verbose_printk(KERN_NOTICE "%s", linux_banner);
1142
1143 verbose_printk(KERN_NOTICE "\nSEQUENCER STATUS:\t\t%s\n", print_tainted());
1144 verbose_printk(KERN_NOTICE " SEQSTAT: %08lx IPEND: %04lx IMASK: %04lx SYSCFG: %04lx\n",
1145 (long)fp->seqstat, fp->ipend, cpu_pda[raw_smp_processor_id()].ex_imask, fp->syscfg);
1146 if (fp->ipend & EVT_IRPTEN)
1147 verbose_printk(KERN_NOTICE " Global Interrupts Disabled (IPEND[4])\n");
1148 if (!(cpu_pda[raw_smp_processor_id()].ex_imask & (EVT_IVG13 | EVT_IVG12 | EVT_IVG11 |
1149 EVT_IVG10 | EVT_IVG9 | EVT_IVG8 | EVT_IVG7 | EVT_IVTMR)))
1150 verbose_printk(KERN_NOTICE " Peripheral interrupts masked off\n");
1151 if (!(cpu_pda[raw_smp_processor_id()].ex_imask & (EVT_IVG15 | EVT_IVG14)))
1152 verbose_printk(KERN_NOTICE " Kernel interrupts masked off\n");
1153 if ((fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR) {
1154 verbose_printk(KERN_NOTICE " HWERRCAUSE: 0x%lx\n",
1155 (fp->seqstat & SEQSTAT_HWERRCAUSE) >> 14);
1156#ifdef EBIU_ERRMST
1157 /* If the error was from the EBIU, print it out */
1158 if (bfin_read_EBIU_ERRMST() & CORE_ERROR) {
1159 verbose_printk(KERN_NOTICE " EBIU Error Reason : 0x%04x\n",
1160 bfin_read_EBIU_ERRMST());
1161 verbose_printk(KERN_NOTICE " EBIU Error Address : 0x%08x\n",
1162 bfin_read_EBIU_ERRADD());
1163 }
1164#endif 526#endif
527 {
528 dump_bfin_process(fp);
529 dump_bfin_mem(fp);
530 show_regs(fp);
531 dump_bfin_trace_buffer();
1165 } 532 }
1166 verbose_printk(KERN_NOTICE " EXCAUSE : 0x%lx\n",
1167 fp->seqstat & SEQSTAT_EXCAUSE);
1168 for (i = 2; i <= 15 ; i++) {
1169 if (fp->ipend & (1 << i)) {
1170 if (i != 4) {
1171 decode_address(buf, bfin_read32(EVT0 + 4*i));
1172 verbose_printk(KERN_NOTICE " physical IVG%i asserted : %s\n", i, buf);
1173 } else
1174 verbose_printk(KERN_NOTICE " interrupts disabled\n");
1175 }
1176 }
1177
1178 /* if no interrupts are going off, don't print this out */
1179 if (fp->ipend & ~0x3F) {
1180 for (i = 0; i < (NR_IRQS - 1); i++) {
1181 if (!in_atomic)
1182 raw_spin_lock_irqsave(&irq_desc[i].lock, flags);
1183
1184 action = irq_desc[i].action;
1185 if (!action)
1186 goto unlock;
1187
1188 decode_address(buf, (unsigned int)action->handler);
1189 verbose_printk(KERN_NOTICE " logical irq %3d mapped : %s", i, buf);
1190 for (action = action->next; action; action = action->next) {
1191 decode_address(buf, (unsigned int)action->handler);
1192 verbose_printk(", %s", buf);
1193 }
1194 verbose_printk("\n");
1195unlock:
1196 if (!in_atomic)
1197 raw_spin_unlock_irqrestore(&irq_desc[i].lock, flags);
1198 }
1199 }
1200
1201 decode_address(buf, fp->rete);
1202 verbose_printk(KERN_NOTICE " RETE: %s\n", buf);
1203 decode_address(buf, fp->retn);
1204 verbose_printk(KERN_NOTICE " RETN: %s\n", buf);
1205 decode_address(buf, fp->retx);
1206 verbose_printk(KERN_NOTICE " RETX: %s\n", buf);
1207 decode_address(buf, fp->rets);
1208 verbose_printk(KERN_NOTICE " RETS: %s\n", buf);
1209 decode_address(buf, fp->pc);
1210 verbose_printk(KERN_NOTICE " PC : %s\n", buf);
1211
1212 if (((long)fp->seqstat & SEQSTAT_EXCAUSE) &&
1213 (((long)fp->seqstat & SEQSTAT_EXCAUSE) != VEC_HWERR)) {
1214 decode_address(buf, cpu_pda[cpu].dcplb_fault_addr);
1215 verbose_printk(KERN_NOTICE "DCPLB_FAULT_ADDR: %s\n", buf);
1216 decode_address(buf, cpu_pda[cpu].icplb_fault_addr);
1217 verbose_printk(KERN_NOTICE "ICPLB_FAULT_ADDR: %s\n", buf);
1218 }
1219
1220 verbose_printk(KERN_NOTICE "PROCESSOR STATE:\n");
1221 verbose_printk(KERN_NOTICE " R0 : %08lx R1 : %08lx R2 : %08lx R3 : %08lx\n",
1222 fp->r0, fp->r1, fp->r2, fp->r3);
1223 verbose_printk(KERN_NOTICE " R4 : %08lx R5 : %08lx R6 : %08lx R7 : %08lx\n",
1224 fp->r4, fp->r5, fp->r6, fp->r7);
1225 verbose_printk(KERN_NOTICE " P0 : %08lx P1 : %08lx P2 : %08lx P3 : %08lx\n",
1226 fp->p0, fp->p1, fp->p2, fp->p3);
1227 verbose_printk(KERN_NOTICE " P4 : %08lx P5 : %08lx FP : %08lx SP : %08lx\n",
1228 fp->p4, fp->p5, fp->fp, (long)fp);
1229 verbose_printk(KERN_NOTICE " LB0: %08lx LT0: %08lx LC0: %08lx\n",
1230 fp->lb0, fp->lt0, fp->lc0);
1231 verbose_printk(KERN_NOTICE " LB1: %08lx LT1: %08lx LC1: %08lx\n",
1232 fp->lb1, fp->lt1, fp->lc1);
1233 verbose_printk(KERN_NOTICE " B0 : %08lx L0 : %08lx M0 : %08lx I0 : %08lx\n",
1234 fp->b0, fp->l0, fp->m0, fp->i0);
1235 verbose_printk(KERN_NOTICE " B1 : %08lx L1 : %08lx M1 : %08lx I1 : %08lx\n",
1236 fp->b1, fp->l1, fp->m1, fp->i1);
1237 verbose_printk(KERN_NOTICE " B2 : %08lx L2 : %08lx M2 : %08lx I2 : %08lx\n",
1238 fp->b2, fp->l2, fp->m2, fp->i2);
1239 verbose_printk(KERN_NOTICE " B3 : %08lx L3 : %08lx M3 : %08lx I3 : %08lx\n",
1240 fp->b3, fp->l3, fp->m3, fp->i3);
1241 verbose_printk(KERN_NOTICE "A0.w: %08lx A0.x: %08lx A1.w: %08lx A1.x: %08lx\n",
1242 fp->a0w, fp->a0x, fp->a1w, fp->a1x);
1243
1244 verbose_printk(KERN_NOTICE "USP : %08lx ASTAT: %08lx\n",
1245 rdusp(), fp->astat);
1246
1247 verbose_printk(KERN_NOTICE "\n");
1248#endif 533#endif
1249} 534 panic("Double Fault - unrecoverable event");
1250
1251#ifdef CONFIG_SYS_BFIN_SPINLOCK_L1
1252asmlinkage int sys_bfin_spinlock(int *spinlock)__attribute__((l1_text));
1253#endif
1254
1255static DEFINE_SPINLOCK(bfin_spinlock_lock);
1256
1257asmlinkage int sys_bfin_spinlock(int *p)
1258{
1259 int ret, tmp = 0;
1260
1261 spin_lock(&bfin_spinlock_lock); /* This would also hold kernel preemption. */
1262 ret = get_user(tmp, p);
1263 if (likely(ret == 0)) {
1264 if (unlikely(tmp))
1265 ret = 1;
1266 else
1267 put_user(1, p);
1268 }
1269 spin_unlock(&bfin_spinlock_lock);
1270 return ret;
1271}
1272
1273int bfin_request_exception(unsigned int exception, void (*handler)(void))
1274{
1275 void (*curr_handler)(void);
1276
1277 if (exception > 0x3F)
1278 return -EINVAL;
1279
1280 curr_handler = ex_table[exception];
1281
1282 if (curr_handler != ex_replaceable)
1283 return -EBUSY;
1284
1285 ex_table[exception] = handler;
1286 535
1287 return 0;
1288} 536}
1289EXPORT_SYMBOL(bfin_request_exception);
1290
1291int bfin_free_exception(unsigned int exception, void (*handler)(void))
1292{
1293 void (*curr_handler)(void);
1294
1295 if (exception > 0x3F)
1296 return -EINVAL;
1297
1298 curr_handler = ex_table[exception];
1299 537
1300 if (curr_handler != handler)
1301 return -EBUSY;
1302
1303 ex_table[exception] = ex_replaceable;
1304
1305 return 0;
1306}
1307EXPORT_SYMBOL(bfin_free_exception);
1308 538
1309void panic_cplb_error(int cplb_panic, struct pt_regs *fp) 539void panic_cplb_error(int cplb_panic, struct pt_regs *fp)
1310{ 540{
@@ -1329,3 +559,23 @@ void panic_cplb_error(int cplb_panic, struct pt_regs *fp)
1329 dump_stack(); 559 dump_stack();
1330 panic("Unrecoverable event"); 560 panic("Unrecoverable event");
1331} 561}
562
563#ifdef CONFIG_BUG
564int is_valid_bugaddr(unsigned long addr)
565{
566 unsigned int opcode;
567
568 if (!get_instruction(&opcode, (unsigned short *)addr))
569 return 0;
570
571 return opcode == BFIN_BUG_OPCODE;
572}
573#endif
574
575/* stub this out */
576#ifndef CONFIG_DEBUG_VERBOSE
577void show_regs(struct pt_regs *fp)
578{
579
580}
581#endif
diff --git a/arch/blackfin/kernel/vmlinux.lds.S b/arch/blackfin/kernel/vmlinux.lds.S
index 66799e763dc9..984c78172397 100644
--- a/arch/blackfin/kernel/vmlinux.lds.S
+++ b/arch/blackfin/kernel/vmlinux.lds.S
@@ -15,7 +15,12 @@ _jiffies = _jiffies_64;
15 15
16SECTIONS 16SECTIONS
17{ 17{
18#ifdef CONFIG_RAMKERNEL
18 . = CONFIG_BOOT_LOAD; 19 . = CONFIG_BOOT_LOAD;
20#else
21 . = CONFIG_ROM_BASE;
22#endif
23
19 /* Neither the text, ro_data or bss section need to be aligned 24 /* Neither the text, ro_data or bss section need to be aligned
20 * So pack them back to back 25 * So pack them back to back
21 */ 26 */
@@ -31,6 +36,12 @@ SECTIONS
31 LOCK_TEXT 36 LOCK_TEXT
32 IRQENTRY_TEXT 37 IRQENTRY_TEXT
33 KPROBES_TEXT 38 KPROBES_TEXT
39#ifdef CONFIG_ROMKERNEL
40 __sinittext = .;
41 INIT_TEXT
42 __einittext = .;
43 EXIT_TEXT
44#endif
34 *(.text.*) 45 *(.text.*)
35 *(.fixup) 46 *(.fixup)
36 47
@@ -50,8 +61,14 @@ SECTIONS
50 61
51 /* Just in case the first read only is a 32-bit access */ 62 /* Just in case the first read only is a 32-bit access */
52 RO_DATA(4) 63 RO_DATA(4)
64 __rodata_end = .;
53 65
66#ifdef CONFIG_ROMKERNEL
67 . = CONFIG_BOOT_LOAD;
68 .bss : AT(__rodata_end)
69#else
54 .bss : 70 .bss :
71#endif
55 { 72 {
56 . = ALIGN(4); 73 . = ALIGN(4);
57 ___bss_start = .; 74 ___bss_start = .;
@@ -67,7 +84,11 @@ SECTIONS
67 ___bss_stop = .; 84 ___bss_stop = .;
68 } 85 }
69 86
87#if defined(CONFIG_ROMKERNEL)
88 .data : AT(LOADADDR(.bss) + SIZEOF(.bss))
89#else
70 .data : 90 .data :
91#endif
71 { 92 {
72 __sdata = .; 93 __sdata = .;
73 /* This gets done first, so the glob doesn't suck it in */ 94 /* This gets done first, so the glob doesn't suck it in */
@@ -94,6 +115,8 @@ SECTIONS
94 115
95 __edata = .; 116 __edata = .;
96 } 117 }
118 __data_lma = LOADADDR(.data);
119 __data_len = SIZEOF(.data);
97 120
98 /* The init section should be last, so when we free it, it goes into 121 /* The init section should be last, so when we free it, it goes into
99 * the general memory pool, and (hopefully) will decrease fragmentation 122 * the general memory pool, and (hopefully) will decrease fragmentation
@@ -103,25 +126,58 @@ SECTIONS
103 . = ALIGN(PAGE_SIZE); 126 . = ALIGN(PAGE_SIZE);
104 ___init_begin = .; 127 ___init_begin = .;
105 128
129#ifdef CONFIG_RAMKERNEL
106 INIT_TEXT_SECTION(PAGE_SIZE) 130 INIT_TEXT_SECTION(PAGE_SIZE)
107 . = ALIGN(16);
108 INIT_DATA_SECTION(16)
109 PERCPU(4)
110 131
111 /* we have to discard exit text and such at runtime, not link time, to 132 /* We have to discard exit text and such at runtime, not link time, to
112 * handle embedded cross-section references (alt instructions, bug 133 * handle embedded cross-section references (alt instructions, bug
113 * table, eh_frame, etc...) 134 * table, eh_frame, etc...). We need all of our .text up front and
135 * .data after it for PCREL call issues.
114 */ 136 */
115 .exit.text : 137 .exit.text :
116 { 138 {
117 EXIT_TEXT 139 EXIT_TEXT
118 } 140 }
141
142 . = ALIGN(16);
143 INIT_DATA_SECTION(16)
144 PERCPU(4)
145
119 .exit.data : 146 .exit.data :
120 { 147 {
121 EXIT_DATA 148 EXIT_DATA
122 } 149 }
123 150
124 .text_l1 L1_CODE_START : AT(LOADADDR(.exit.data) + SIZEOF(.exit.data)) 151 .text_l1 L1_CODE_START : AT(LOADADDR(.exit.data) + SIZEOF(.exit.data))
152#else
153 .init.data : AT(__data_lma + __data_len)
154 {
155 __sinitdata = .;
156 INIT_DATA
157 INIT_SETUP(16)
158 INIT_CALLS
159 CON_INITCALL
160 SECURITY_INITCALL
161 INIT_RAM_FS
162
163 . = ALIGN(4);
164 ___per_cpu_load = .;
165 ___per_cpu_start = .;
166 *(.data.percpu.first)
167 *(.data.percpu.page_aligned)
168 *(.data.percpu)
169 *(.data.percpu.shared_aligned)
170 ___per_cpu_end = .;
171
172 EXIT_DATA
173 __einitdata = .;
174 }
175 __init_data_lma = LOADADDR(.init.data);
176 __init_data_len = SIZEOF(.init.data);
177 __init_data_end = .;
178
179 .text_l1 L1_CODE_START : AT(__init_data_lma + __init_data_len)
180#endif
125 { 181 {
126 . = ALIGN(4); 182 . = ALIGN(4);
127 __stext_l1 = .; 183 __stext_l1 = .;
@@ -202,7 +258,11 @@ SECTIONS
202 /* Force trailing alignment of our init section so that when we 258 /* Force trailing alignment of our init section so that when we
203 * free our init memory, we don't leave behind a partial page. 259 * free our init memory, we don't leave behind a partial page.
204 */ 260 */
261#ifdef CONFIG_RAMKERNEL
205 . = __l2_lma + __l2_len; 262 . = __l2_lma + __l2_len;
263#else
264 . = __init_data_end;
265#endif
206 . = ALIGN(PAGE_SIZE); 266 . = ALIGN(PAGE_SIZE);
207 ___init_end = .; 267 ___init_end = .;
208 268
diff --git a/arch/blackfin/lib/memset.S b/arch/blackfin/lib/memset.S
index c30d99b10969..eab1bef3f5bf 100644
--- a/arch/blackfin/lib/memset.S
+++ b/arch/blackfin/lib/memset.S
@@ -20,6 +20,7 @@
20 * R1 = filler byte 20 * R1 = filler byte
21 * R2 = count 21 * R2 = count
22 * Favours word aligned data. 22 * Favours word aligned data.
23 * The strncpy assumes that I0 and I1 are not used in this function
23 */ 24 */
24 25
25ENTRY(_memset) 26ENTRY(_memset)
diff --git a/arch/blackfin/lib/strcmp.S b/arch/blackfin/lib/strcmp.S
new file mode 100644
index 000000000000..d7c1d158973b
--- /dev/null
+++ b/arch/blackfin/lib/strcmp.S
@@ -0,0 +1,43 @@
1/*
2 * Copyright 2005-2010 Analog Devices Inc.
3 *
4 * Licensed under the ADI BSD license or the GPL-2 (or later)
5 */
6
7#include <linux/linkage.h>
8
9/* void *strcmp(char *s1, const char *s2);
10 * R0 = address (s1)
11 * R1 = address (s2)
12 *
13 * Returns an integer less than, equal to, or greater than zero if s1
14 * (or the first n bytes thereof) is found, respectively, to be less
15 * than, to match, or be greater than s2.
16 */
17
18#ifdef CONFIG_STRCMP_L1
19.section .l1.text
20#else
21.text
22#endif
23
24.align 2
25
26ENTRY(_strcmp)
27 P0 = R0 ; /* s1 */
28 P1 = R1 ; /* s2 */
29
301:
31 R0 = B[P0++] (Z); /* get *s1 */
32 R1 = B[P1++] (Z); /* get *s2 */
33 CC = R0 == R1; /* compare a byte */
34 if ! cc jump 2f; /* not equal, break out */
35 CC = R0; /* at end of s1? */
36 if cc jump 1b (bp); /* no, keep going */
37 jump.s 3f; /* strings are equal */
382:
39 R0 = R0 - R1; /* *s1 - *s2 */
403:
41 RTS;
42
43ENDPROC(_strcmp)
diff --git a/arch/blackfin/lib/strcmp.c b/arch/blackfin/lib/strcmp.c
deleted file mode 100644
index fde39a1950ce..000000000000
--- a/arch/blackfin/lib/strcmp.c
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * Provide symbol in case str func is not inlined.
3 *
4 * Copyright (c) 2006-2007 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9#define strcmp __inline_strcmp
10#include <asm/string.h>
11#undef strcmp
12
13#include <linux/module.h>
14
15int strcmp(const char *dest, const char *src)
16{
17 return __inline_strcmp(dest, src);
18}
19EXPORT_SYMBOL(strcmp);
diff --git a/arch/blackfin/lib/strcpy.S b/arch/blackfin/lib/strcpy.S
new file mode 100644
index 000000000000..a6a0c6363806
--- /dev/null
+++ b/arch/blackfin/lib/strcpy.S
@@ -0,0 +1,35 @@
1/*
2 * Copyright 2005-2010 Analog Devices Inc.
3 *
4 * Licensed under the ADI BSD license or the GPL-2 (or later)
5 */
6
7#include <linux/linkage.h>
8
9/* void *strcpy(char *dest, const char *src);
10 * R0 = address (dest)
11 * R1 = address (src)
12 *
13 * Returns a pointer to the destination string dest
14 */
15
16#ifdef CONFIG_STRCPY_L1
17.section .l1.text
18#else
19.text
20#endif
21
22.align 2
23
24ENTRY(_strcpy)
25 P0 = R0 ; /* dst*/
26 P1 = R1 ; /* src*/
27
281:
29 R1 = B [P1++] (Z);
30 B [P0++] = R1;
31 CC = R1;
32 if cc jump 1b (bp);
33 RTS;
34
35ENDPROC(_strcpy)
diff --git a/arch/blackfin/lib/strcpy.c b/arch/blackfin/lib/strcpy.c
deleted file mode 100644
index 2a8836b1f4d3..000000000000
--- a/arch/blackfin/lib/strcpy.c
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * Provide symbol in case str func is not inlined.
3 *
4 * Copyright (c) 2006-2007 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9#define strcpy __inline_strcpy
10#include <asm/string.h>
11#undef strcpy
12
13#include <linux/module.h>
14
15char *strcpy(char *dest, const char *src)
16{
17 return __inline_strcpy(dest, src);
18}
19EXPORT_SYMBOL(strcpy);
diff --git a/arch/blackfin/lib/strncmp.S b/arch/blackfin/lib/strncmp.S
new file mode 100644
index 000000000000..6da37c34a847
--- /dev/null
+++ b/arch/blackfin/lib/strncmp.S
@@ -0,0 +1,52 @@
1/*
2 * Copyright 2005-2010 Analog Devices Inc.
3 *
4 * Licensed under the ADI BSD license or the GPL-2 (or later)
5 */
6
7#include <linux/linkage.h>
8
9/* void *strncpy(char *s1, const char *s2, size_t n);
10 * R0 = address (dest)
11 * R1 = address (src)
12 * R2 = size (n)
13 * Returns a pointer to the destination string dest
14 */
15
16#ifdef CONFIG_STRNCMP_L1
17.section .l1.text
18#else
19.text
20#endif
21
22.align 2
23
24ENTRY(_strncmp)
25 CC = R2 == 0;
26 if CC JUMP 5f;
27
28 P0 = R0 ; /* s1 */
29 P1 = R1 ; /* s2 */
301:
31 R0 = B[P0++] (Z); /* get *s1 */
32 R1 = B[P1++] (Z); /* get *s2 */
33 CC = R0 == R1; /* compare a byte */
34 if ! cc jump 3f; /* not equal, break out */
35 CC = R0; /* at end of s1? */
36 if ! cc jump 4f; /* yes, all done */
37 R2 += -1; /* no, adjust count */
38 CC = R2 == 0;
39 if ! cc jump 1b (bp); /* more to do, keep going */
402:
41 R0 = 0; /* strings are equal */
42 jump.s 4f;
433:
44 R0 = R0 - R1; /* *s1 - *s2 */
454:
46 RTS;
47
485:
49 R0 = 0;
50 RTS;
51
52ENDPROC(_strncmp)
diff --git a/arch/blackfin/lib/strncmp.c b/arch/blackfin/lib/strncmp.c
deleted file mode 100644
index 46518b1d2983..000000000000
--- a/arch/blackfin/lib/strncmp.c
+++ /dev/null
@@ -1,18 +0,0 @@
1/*
2 * Provide symbol in case str func is not inlined.
3 *
4 * Copyright (c) 2006-2007 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9#define strncmp __inline_strncmp
10#include <asm/string.h>
11#include <linux/module.h>
12#undef strncmp
13
14int strncmp(const char *cs, const char *ct, size_t count)
15{
16 return __inline_strncmp(cs, ct, count);
17}
18EXPORT_SYMBOL(strncmp);
diff --git a/arch/blackfin/lib/strncpy.S b/arch/blackfin/lib/strncpy.S
new file mode 100644
index 000000000000..f3931d50b4a7
--- /dev/null
+++ b/arch/blackfin/lib/strncpy.S
@@ -0,0 +1,85 @@
1/*
2 * Copyright 2005-2010 Analog Devices Inc.
3 *
4 * Licensed under the ADI BSD license or the GPL-2 (or later)
5 */
6
7#include <linux/linkage.h>
8#include <asm/context.S>
9
10/* void *strncpy(char *dest, const char *src, size_t n);
11 * R0 = address (dest)
12 * R1 = address (src)
13 * R2 = size
14 * Returns a pointer (R0) to the destination string dest
15 * we do this by not changing R0
16 */
17
18#ifdef CONFIG_STRNCPY_L1
19.section .l1.text
20#else
21.text
22#endif
23
24.align 2
25
26ENTRY(_strncpy)
27 CC = R2 == 0;
28 if CC JUMP 4f;
29
30 P2 = R2 ; /* size */
31 P0 = R0 ; /* dst*/
32 P1 = R1 ; /* src*/
33
34 LSETUP (1f, 2f) LC0 = P2;
351:
36 R1 = B [P1++] (Z);
37 B [P0++] = R1;
38 CC = R1 == 0;
392:
40 if CC jump 3f;
41
42 RTS;
43
44 /* if src is shorter than n, we need to null pad bytes in dest
45 * but, we can get here when the last byte is zero, and we don't
46 * want to copy an extra byte at the end, so we need to check
47 */
483:
49 R2 = LC0;
50 CC = R2
51 if ! CC jump 6f;
52
53 /* if the required null padded portion is small, do it here, rather than
54 * handling the overhead of memset (which is OK when things are big).
55 */
56 R3 = 0x20;
57 CC = R2 < R3;
58 IF CC jump 4f;
59
60 R2 += -1;
61
62 /* Set things up for memset
63 * R0 = address
64 * R1 = filler byte (this case it's zero, set above)
65 * R2 = count (set above)
66 */
67
68 I1 = R0;
69 R0 = RETS;
70 I0 = R0;
71 R0 = P0;
72 pseudo_long_call _memset, p0;
73 R0 = I0;
74 RETS = R0;
75 R0 = I1;
76 RTS;
77
784:
79 LSETUP(5f, 5f) LC0;
805:
81 B [P0++] = R1;
826:
83 RTS;
84
85ENDPROC(_strncpy)
diff --git a/arch/blackfin/lib/strncpy.c b/arch/blackfin/lib/strncpy.c
deleted file mode 100644
index ea1dc6bf2373..000000000000
--- a/arch/blackfin/lib/strncpy.c
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * Provide symbol in case str func is not inlined.
3 *
4 * Copyright (c) 2006-2007 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9#define strncpy __inline_strncpy
10#include <asm/string.h>
11#undef strncpy
12
13#include <linux/module.h>
14
15char *strncpy(char *dest, const char *src, size_t n)
16{
17 return __inline_strncpy(dest, src, n);
18}
19EXPORT_SYMBOL(strncpy);
diff --git a/arch/blackfin/mach-bf518/boards/Kconfig b/arch/blackfin/mach-bf518/boards/Kconfig
index 96163514ed22..252261ec04c4 100644
--- a/arch/blackfin/mach-bf518/boards/Kconfig
+++ b/arch/blackfin/mach-bf518/boards/Kconfig
@@ -9,4 +9,9 @@ config BFIN518F_EZBRD
9 help 9 help
10 BF518-EZBRD board support. 10 BF518-EZBRD board support.
11 11
12config BFIN518F_TCM
13 bool "Bluetechnix TCM-BF518"
14 help
15 Bluetechnix TCM-BF518 board support.
16
12endchoice 17endchoice
diff --git a/arch/blackfin/mach-bf518/boards/Makefile b/arch/blackfin/mach-bf518/boards/Makefile
index 172e859c3a7f..a9ef25c6b302 100644
--- a/arch/blackfin/mach-bf518/boards/Makefile
+++ b/arch/blackfin/mach-bf518/boards/Makefile
@@ -3,3 +3,4 @@
3# 3#
4 4
5obj-$(CONFIG_BFIN518F_EZBRD) += ezbrd.o 5obj-$(CONFIG_BFIN518F_EZBRD) += ezbrd.o
6obj-$(CONFIG_BFIN518F_TCM) += tcm-bf518.o
diff --git a/arch/blackfin/mach-bf518/boards/ezbrd.c b/arch/blackfin/mach-bf518/boards/ezbrd.c
index 01975c017116..44d6d5299022 100644
--- a/arch/blackfin/mach-bf518/boards/ezbrd.c
+++ b/arch/blackfin/mach-bf518/boards/ezbrd.c
@@ -382,30 +382,93 @@ static struct platform_device bfin_spi1_device = {
382#endif /* spi master and devices */ 382#endif /* spi master and devices */
383 383
384#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 384#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
385static struct resource bfin_uart_resources[] = {
386#ifdef CONFIG_SERIAL_BFIN_UART0 385#ifdef CONFIG_SERIAL_BFIN_UART0
386static struct resource bfin_uart0_resources[] = {
387 { 387 {
388 .start = 0xFFC00400, 388 .start = UART0_THR,
389 .end = 0xFFC004FF, 389 .end = UART0_GCTL+2,
390 .flags = IORESOURCE_MEM, 390 .flags = IORESOURCE_MEM,
391 }, 391 },
392 {
393 .start = IRQ_UART0_RX,
394 .end = IRQ_UART0_RX+1,
395 .flags = IORESOURCE_IRQ,
396 },
397 {
398 .start = IRQ_UART0_ERROR,
399 .end = IRQ_UART0_ERROR,
400 .flags = IORESOURCE_IRQ,
401 },
402 {
403 .start = CH_UART0_TX,
404 .end = CH_UART0_TX,
405 .flags = IORESOURCE_DMA,
406 },
407 {
408 .start = CH_UART0_RX,
409 .end = CH_UART0_RX,
410 .flags = IORESOURCE_DMA,
411 },
412};
413
414unsigned short bfin_uart0_peripherals[] = {
415 P_UART0_TX, P_UART0_RX, 0
416};
417
418static struct platform_device bfin_uart0_device = {
419 .name = "bfin-uart",
420 .id = 0,
421 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
422 .resource = bfin_uart0_resources,
423 .dev = {
424 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
425 },
426};
392#endif 427#endif
393#ifdef CONFIG_SERIAL_BFIN_UART1 428#ifdef CONFIG_SERIAL_BFIN_UART1
429static struct resource bfin_uart1_resources[] = {
394 { 430 {
395 .start = 0xFFC02000, 431 .start = UART1_THR,
396 .end = 0xFFC020FF, 432 .end = UART1_GCTL+2,
397 .flags = IORESOURCE_MEM, 433 .flags = IORESOURCE_MEM,
398 }, 434 },
399#endif 435 {
436 .start = IRQ_UART1_RX,
437 .end = IRQ_UART1_RX+1,
438 .flags = IORESOURCE_IRQ,
439 },
440 {
441 .start = IRQ_UART1_ERROR,
442 .end = IRQ_UART1_ERROR,
443 .flags = IORESOURCE_IRQ,
444 },
445 {
446 .start = CH_UART1_TX,
447 .end = CH_UART1_TX,
448 .flags = IORESOURCE_DMA,
449 },
450 {
451 .start = CH_UART1_RX,
452 .end = CH_UART1_RX,
453 .flags = IORESOURCE_DMA,
454 },
455};
456
457unsigned short bfin_uart1_peripherals[] = {
458 P_UART1_TX, P_UART1_RX, 0
400}; 459};
401 460
402static struct platform_device bfin_uart_device = { 461static struct platform_device bfin_uart1_device = {
403 .name = "bfin-uart", 462 .name = "bfin-uart",
404 .id = 1, 463 .id = 1,
405 .num_resources = ARRAY_SIZE(bfin_uart_resources), 464 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
406 .resource = bfin_uart_resources, 465 .resource = bfin_uart1_resources,
466 .dev = {
467 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
468 },
407}; 469};
408#endif 470#endif
471#endif
409 472
410#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 473#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
411#ifdef CONFIG_BFIN_SIR0 474#ifdef CONFIG_BFIN_SIR0
@@ -499,16 +562,75 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
499}; 562};
500 563
501#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 564#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
565#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
566static struct resource bfin_sport0_uart_resources[] = {
567 {
568 .start = SPORT0_TCR1,
569 .end = SPORT0_MRCS3+4,
570 .flags = IORESOURCE_MEM,
571 },
572 {
573 .start = IRQ_SPORT0_RX,
574 .end = IRQ_SPORT0_RX+1,
575 .flags = IORESOURCE_IRQ,
576 },
577 {
578 .start = IRQ_SPORT0_ERROR,
579 .end = IRQ_SPORT0_ERROR,
580 .flags = IORESOURCE_IRQ,
581 },
582};
583
584unsigned short bfin_sport0_peripherals[] = {
585 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
586 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
587};
588
502static struct platform_device bfin_sport0_uart_device = { 589static struct platform_device bfin_sport0_uart_device = {
503 .name = "bfin-sport-uart", 590 .name = "bfin-sport-uart",
504 .id = 0, 591 .id = 0,
592 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
593 .resource = bfin_sport0_uart_resources,
594 .dev = {
595 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
596 },
597};
598#endif
599#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
600static struct resource bfin_sport1_uart_resources[] = {
601 {
602 .start = SPORT1_TCR1,
603 .end = SPORT1_MRCS3+4,
604 .flags = IORESOURCE_MEM,
605 },
606 {
607 .start = IRQ_SPORT1_RX,
608 .end = IRQ_SPORT1_RX+1,
609 .flags = IORESOURCE_IRQ,
610 },
611 {
612 .start = IRQ_SPORT1_ERROR,
613 .end = IRQ_SPORT1_ERROR,
614 .flags = IORESOURCE_IRQ,
615 },
616};
617
618unsigned short bfin_sport1_peripherals[] = {
619 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
620 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
505}; 621};
506 622
507static struct platform_device bfin_sport1_uart_device = { 623static struct platform_device bfin_sport1_uart_device = {
508 .name = "bfin-sport-uart", 624 .name = "bfin-sport-uart",
509 .id = 1, 625 .id = 1,
626 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
627 .resource = bfin_sport1_uart_resources,
628 .dev = {
629 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
630 },
510}; 631};
511#endif 632#endif
633#endif
512 634
513#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 635#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
514#include <linux/input.h> 636#include <linux/input.h>
@@ -593,7 +715,12 @@ static struct platform_device *stamp_devices[] __initdata = {
593#endif 715#endif
594 716
595#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 717#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
596 &bfin_uart_device, 718#ifdef CONFIG_SERIAL_BFIN_UART0
719 &bfin_uart0_device,
720#endif
721#ifdef CONFIG_SERIAL_BFIN_UART1
722 &bfin_uart1_device,
723#endif
597#endif 724#endif
598 725
599#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 726#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
@@ -610,9 +737,13 @@ static struct platform_device *stamp_devices[] __initdata = {
610#endif 737#endif
611 738
612#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 739#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
740#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
613 &bfin_sport0_uart_device, 741 &bfin_sport0_uart_device,
742#endif
743#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
614 &bfin_sport1_uart_device, 744 &bfin_sport1_uart_device,
615#endif 745#endif
746#endif
616 747
617#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 748#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
618 &bfin_device_gpiokeys, 749 &bfin_device_gpiokeys,
@@ -644,6 +775,33 @@ static int __init ezbrd_init(void)
644 775
645arch_initcall(ezbrd_init); 776arch_initcall(ezbrd_init);
646 777
778static struct platform_device *ezbrd_early_devices[] __initdata = {
779#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
780#ifdef CONFIG_SERIAL_BFIN_UART0
781 &bfin_uart0_device,
782#endif
783#ifdef CONFIG_SERIAL_BFIN_UART1
784 &bfin_uart1_device,
785#endif
786#endif
787
788#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
789#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
790 &bfin_sport0_uart_device,
791#endif
792#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
793 &bfin_sport1_uart_device,
794#endif
795#endif
796};
797
798void __init native_machine_early_platform_add_devices(void)
799{
800 printk(KERN_INFO "register early platform devices\n");
801 early_platform_add_devices(ezbrd_early_devices,
802 ARRAY_SIZE(ezbrd_early_devices));
803}
804
647void native_machine_restart(char *cmd) 805void native_machine_restart(char *cmd)
648{ 806{
649 /* workaround reboot hang when booting from SPI */ 807 /* workaround reboot hang when booting from SPI */
diff --git a/arch/blackfin/mach-bf518/boards/tcm-bf518.c b/arch/blackfin/mach-bf518/boards/tcm-bf518.c
new file mode 100644
index 000000000000..9b72e5cb21fe
--- /dev/null
+++ b/arch/blackfin/mach-bf518/boards/tcm-bf518.c
@@ -0,0 +1,753 @@
1/*
2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9#include <linux/device.h>
10#include <linux/etherdevice.h>
11#include <linux/platform_device.h>
12#include <linux/mtd/mtd.h>
13#include <linux/mtd/partitions.h>
14#include <linux/mtd/physmap.h>
15#include <linux/spi/spi.h>
16#include <linux/spi/flash.h>
17
18#include <linux/i2c.h>
19#include <linux/irq.h>
20#include <linux/interrupt.h>
21#include <asm/dma.h>
22#include <asm/bfin5xx_spi.h>
23#include <asm/reboot.h>
24#include <asm/portmux.h>
25#include <asm/dpmc.h>
26#include <asm/bfin_sdh.h>
27#include <linux/spi/ad7877.h>
28#include <net/dsa.h>
29
30/*
31 * Name the Board for the /proc/cpuinfo
32 */
33const char bfin_board_name[] = "Bluetechnix TCM-BF518";
34
35/*
36 * Driver needs to know address, irq and flag pin.
37 */
38
39#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
40static struct mtd_partition tcm_partitions[] = {
41 {
42 .name = "bootloader(nor)",
43 .size = 0x40000,
44 .offset = 0,
45 },
46 {
47 .name = "linux(nor)",
48 .size = 0x1C0000,
49 .offset = MTDPART_OFS_APPEND,
50 }
51};
52
53static struct physmap_flash_data tcm_flash_data = {
54 .width = 2,
55 .parts = tcm_partitions,
56 .nr_parts = ARRAY_SIZE(tcm_partitions),
57};
58
59static struct resource tcm_flash_resource = {
60 .start = 0x20000000,
61 .end = 0x201fffff,
62 .flags = IORESOURCE_MEM,
63};
64
65static struct platform_device tcm_flash_device = {
66 .name = "physmap-flash",
67 .id = 0,
68 .dev = {
69 .platform_data = &tcm_flash_data,
70 },
71 .num_resources = 1,
72 .resource = &tcm_flash_resource,
73};
74#endif
75
76#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
77static struct platform_device rtc_device = {
78 .name = "rtc-bfin",
79 .id = -1,
80};
81#endif
82
83#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
84static struct platform_device bfin_mii_bus = {
85 .name = "bfin_mii_bus",
86};
87
88static struct platform_device bfin_mac_device = {
89 .name = "bfin_mac",
90 .dev.platform_data = &bfin_mii_bus,
91};
92#endif
93
94#if defined(CONFIG_MTD_M25P80) \
95 || defined(CONFIG_MTD_M25P80_MODULE)
96static struct mtd_partition bfin_spi_flash_partitions[] = {
97 {
98 .name = "bootloader(spi)",
99 .size = 0x00040000,
100 .offset = 0,
101 .mask_flags = MTD_CAP_ROM
102 }, {
103 .name = "linux kernel(spi)",
104 .size = MTDPART_SIZ_FULL,
105 .offset = MTDPART_OFS_APPEND,
106 }
107};
108
109static struct flash_platform_data bfin_spi_flash_data = {
110 .name = "m25p80",
111 .parts = bfin_spi_flash_partitions,
112 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
113 .type = "m25p16",
114};
115
116/* SPI flash chip (m25p64) */
117static struct bfin5xx_spi_chip spi_flash_chip_info = {
118 .enable_dma = 0, /* use dma transfer with this chip*/
119 .bits_per_word = 8,
120};
121#endif
122
123#if defined(CONFIG_BFIN_SPI_ADC) \
124 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
125/* SPI ADC chip */
126static struct bfin5xx_spi_chip spi_adc_chip_info = {
127 .enable_dma = 1, /* use dma transfer with this chip*/
128 .bits_per_word = 16,
129};
130#endif
131
132#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
133static struct bfin5xx_spi_chip mmc_spi_chip_info = {
134 .enable_dma = 0,
135 .bits_per_word = 8,
136};
137#endif
138
139#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
140static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
141 .enable_dma = 0,
142 .bits_per_word = 16,
143};
144
145static const struct ad7877_platform_data bfin_ad7877_ts_info = {
146 .model = 7877,
147 .vref_delay_usecs = 50, /* internal, no capacitor */
148 .x_plate_ohms = 419,
149 .y_plate_ohms = 486,
150 .pressure_max = 1000,
151 .pressure_min = 0,
152 .stopacq_polarity = 1,
153 .first_conversion_delay = 3,
154 .acquisition_time = 1,
155 .averaging = 1,
156 .pen_down_acc_interval = 1,
157};
158#endif
159
160#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
161 && defined(CONFIG_SND_SOC_WM8731_SPI)
162static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
163 .enable_dma = 0,
164 .bits_per_word = 16,
165};
166#endif
167
168#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
169static struct bfin5xx_spi_chip spidev_chip_info = {
170 .enable_dma = 0,
171 .bits_per_word = 8,
172};
173#endif
174
175static struct spi_board_info bfin_spi_board_info[] __initdata = {
176#if defined(CONFIG_MTD_M25P80) \
177 || defined(CONFIG_MTD_M25P80_MODULE)
178 {
179 /* the modalias must be the same as spi device driver name */
180 .modalias = "m25p80", /* Name of spi_driver for this device */
181 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
182 .bus_num = 0, /* Framework bus number */
183 .chip_select = 2, /* SPI0_SSEL2 */
184 .platform_data = &bfin_spi_flash_data,
185 .controller_data = &spi_flash_chip_info,
186 .mode = SPI_MODE_3,
187 },
188#endif
189
190#if defined(CONFIG_BFIN_SPI_ADC) \
191 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
192 {
193 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
194 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
195 .bus_num = 0, /* Framework bus number */
196 .chip_select = 1, /* Framework chip select. */
197 .platform_data = NULL, /* No spi_driver specific config */
198 .controller_data = &spi_adc_chip_info,
199 },
200#endif
201
202#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
203 {
204 .modalias = "mmc_spi",
205 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
206 .bus_num = 0,
207 .chip_select = 5,
208 .controller_data = &mmc_spi_chip_info,
209 .mode = SPI_MODE_3,
210 },
211#endif
212#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
213 {
214 .modalias = "ad7877",
215 .platform_data = &bfin_ad7877_ts_info,
216 .irq = IRQ_PF8,
217 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
218 .bus_num = 0,
219 .chip_select = 2,
220 .controller_data = &spi_ad7877_chip_info,
221 },
222#endif
223#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
224 && defined(CONFIG_SND_SOC_WM8731_SPI)
225 {
226 .modalias = "wm8731",
227 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
228 .bus_num = 0,
229 .chip_select = 5,
230 .controller_data = &spi_wm8731_chip_info,
231 .mode = SPI_MODE_0,
232 },
233#endif
234#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
235 {
236 .modalias = "spidev",
237 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
238 .bus_num = 0,
239 .chip_select = 1,
240 .controller_data = &spidev_chip_info,
241 },
242#endif
243#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
244 {
245 .modalias = "bfin-lq035q1-spi",
246 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
247 .bus_num = 0,
248 .chip_select = 1,
249 .controller_data = &lq035q1_spi_chip_info,
250 .mode = SPI_CPHA | SPI_CPOL,
251 },
252#endif
253};
254
255/* SPI controller data */
256#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
257/* SPI (0) */
258static struct bfin5xx_spi_master bfin_spi0_info = {
259 .num_chipselect = 6,
260 .enable_dma = 1, /* master has the ability to do dma transfer */
261 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
262};
263
264static struct resource bfin_spi0_resource[] = {
265 [0] = {
266 .start = SPI0_REGBASE,
267 .end = SPI0_REGBASE + 0xFF,
268 .flags = IORESOURCE_MEM,
269 },
270 [1] = {
271 .start = CH_SPI0,
272 .end = CH_SPI0,
273 .flags = IORESOURCE_DMA,
274 },
275 [2] = {
276 .start = IRQ_SPI0,
277 .end = IRQ_SPI0,
278 .flags = IORESOURCE_IRQ,
279 },
280};
281
282static struct platform_device bfin_spi0_device = {
283 .name = "bfin-spi",
284 .id = 0, /* Bus number */
285 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
286 .resource = bfin_spi0_resource,
287 .dev = {
288 .platform_data = &bfin_spi0_info, /* Passed to driver */
289 },
290};
291
292/* SPI (1) */
293static struct bfin5xx_spi_master bfin_spi1_info = {
294 .num_chipselect = 5,
295 .enable_dma = 1, /* master has the ability to do dma transfer */
296 .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
297};
298
299static struct resource bfin_spi1_resource[] = {
300 [0] = {
301 .start = SPI1_REGBASE,
302 .end = SPI1_REGBASE + 0xFF,
303 .flags = IORESOURCE_MEM,
304 },
305 [1] = {
306 .start = CH_SPI1,
307 .end = CH_SPI1,
308 .flags = IORESOURCE_DMA,
309 },
310 [2] = {
311 .start = IRQ_SPI1,
312 .end = IRQ_SPI1,
313 .flags = IORESOURCE_IRQ,
314 },
315};
316
317static struct platform_device bfin_spi1_device = {
318 .name = "bfin-spi",
319 .id = 1, /* Bus number */
320 .num_resources = ARRAY_SIZE(bfin_spi1_resource),
321 .resource = bfin_spi1_resource,
322 .dev = {
323 .platform_data = &bfin_spi1_info, /* Passed to driver */
324 },
325};
326#endif /* spi master and devices */
327
328#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
329#ifdef CONFIG_SERIAL_BFIN_UART0
330static struct resource bfin_uart0_resources[] = {
331 {
332 .start = UART0_THR,
333 .end = UART0_GCTL+2,
334 .flags = IORESOURCE_MEM,
335 },
336 {
337 .start = IRQ_UART0_RX,
338 .end = IRQ_UART0_RX+1,
339 .flags = IORESOURCE_IRQ,
340 },
341 {
342 .start = IRQ_UART0_ERROR,
343 .end = IRQ_UART0_ERROR,
344 .flags = IORESOURCE_IRQ,
345 },
346 {
347 .start = CH_UART0_TX,
348 .end = CH_UART0_TX,
349 .flags = IORESOURCE_DMA,
350 },
351 {
352 .start = CH_UART0_RX,
353 .end = CH_UART0_RX,
354 .flags = IORESOURCE_DMA,
355 },
356};
357
358unsigned short bfin_uart0_peripherals[] = {
359 P_UART0_TX, P_UART0_RX, 0
360};
361
362static struct platform_device bfin_uart0_device = {
363 .name = "bfin-uart",
364 .id = 0,
365 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
366 .resource = bfin_uart0_resources,
367 .dev = {
368 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
369 },
370};
371#endif
372#ifdef CONFIG_SERIAL_BFIN_UART1
373static struct resource bfin_uart1_resources[] = {
374 {
375 .start = UART1_THR,
376 .end = UART1_GCTL+2,
377 .flags = IORESOURCE_MEM,
378 },
379 {
380 .start = IRQ_UART1_RX,
381 .end = IRQ_UART1_RX+1,
382 .flags = IORESOURCE_IRQ,
383 },
384 {
385 .start = IRQ_UART1_ERROR,
386 .end = IRQ_UART1_ERROR,
387 .flags = IORESOURCE_IRQ,
388 },
389 {
390 .start = CH_UART1_TX,
391 .end = CH_UART1_TX,
392 .flags = IORESOURCE_DMA,
393 },
394 {
395 .start = CH_UART1_RX,
396 .end = CH_UART1_RX,
397 .flags = IORESOURCE_DMA,
398 },
399};
400
401unsigned short bfin_uart1_peripherals[] = {
402 P_UART1_TX, P_UART1_RX, 0
403};
404
405static struct platform_device bfin_uart1_device = {
406 .name = "bfin-uart",
407 .id = 1,
408 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
409 .resource = bfin_uart1_resources,
410 .dev = {
411 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
412 },
413};
414#endif
415#endif
416
417#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
418#ifdef CONFIG_BFIN_SIR0
419static struct resource bfin_sir0_resources[] = {
420 {
421 .start = 0xFFC00400,
422 .end = 0xFFC004FF,
423 .flags = IORESOURCE_MEM,
424 },
425 {
426 .start = IRQ_UART0_RX,
427 .end = IRQ_UART0_RX+1,
428 .flags = IORESOURCE_IRQ,
429 },
430 {
431 .start = CH_UART0_RX,
432 .end = CH_UART0_RX+1,
433 .flags = IORESOURCE_DMA,
434 },
435};
436
437static struct platform_device bfin_sir0_device = {
438 .name = "bfin_sir",
439 .id = 0,
440 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
441 .resource = bfin_sir0_resources,
442};
443#endif
444#ifdef CONFIG_BFIN_SIR1
445static struct resource bfin_sir1_resources[] = {
446 {
447 .start = 0xFFC02000,
448 .end = 0xFFC020FF,
449 .flags = IORESOURCE_MEM,
450 },
451 {
452 .start = IRQ_UART1_RX,
453 .end = IRQ_UART1_RX+1,
454 .flags = IORESOURCE_IRQ,
455 },
456 {
457 .start = CH_UART1_RX,
458 .end = CH_UART1_RX+1,
459 .flags = IORESOURCE_DMA,
460 },
461};
462
463static struct platform_device bfin_sir1_device = {
464 .name = "bfin_sir",
465 .id = 1,
466 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
467 .resource = bfin_sir1_resources,
468};
469#endif
470#endif
471
472#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
473static struct resource bfin_twi0_resource[] = {
474 [0] = {
475 .start = TWI0_REGBASE,
476 .end = TWI0_REGBASE,
477 .flags = IORESOURCE_MEM,
478 },
479 [1] = {
480 .start = IRQ_TWI,
481 .end = IRQ_TWI,
482 .flags = IORESOURCE_IRQ,
483 },
484};
485
486static struct platform_device i2c_bfin_twi_device = {
487 .name = "i2c-bfin-twi",
488 .id = 0,
489 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
490 .resource = bfin_twi0_resource,
491};
492#endif
493
494static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
495#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
496 {
497 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
498 },
499#endif
500#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
501 {
502 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
503 .irq = IRQ_PF8,
504 },
505#endif
506};
507
508#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
509#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
510static struct resource bfin_sport0_uart_resources[] = {
511 {
512 .start = SPORT0_TCR1,
513 .end = SPORT0_MRCS3+4,
514 .flags = IORESOURCE_MEM,
515 },
516 {
517 .start = IRQ_SPORT0_RX,
518 .end = IRQ_SPORT0_RX+1,
519 .flags = IORESOURCE_IRQ,
520 },
521 {
522 .start = IRQ_SPORT0_ERROR,
523 .end = IRQ_SPORT0_ERROR,
524 .flags = IORESOURCE_IRQ,
525 },
526};
527
528unsigned short bfin_sport0_peripherals[] = {
529 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
530 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
531};
532
533static struct platform_device bfin_sport0_uart_device = {
534 .name = "bfin-sport-uart",
535 .id = 0,
536 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
537 .resource = bfin_sport0_uart_resources,
538 .dev = {
539 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
540 },
541};
542#endif
543#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
544static struct resource bfin_sport1_uart_resources[] = {
545 {
546 .start = SPORT1_TCR1,
547 .end = SPORT1_MRCS3+4,
548 .flags = IORESOURCE_MEM,
549 },
550 {
551 .start = IRQ_SPORT1_RX,
552 .end = IRQ_SPORT1_RX+1,
553 .flags = IORESOURCE_IRQ,
554 },
555 {
556 .start = IRQ_SPORT1_ERROR,
557 .end = IRQ_SPORT1_ERROR,
558 .flags = IORESOURCE_IRQ,
559 },
560};
561
562unsigned short bfin_sport1_peripherals[] = {
563 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
564 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
565};
566
567static struct platform_device bfin_sport1_uart_device = {
568 .name = "bfin-sport-uart",
569 .id = 1,
570 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
571 .resource = bfin_sport1_uart_resources,
572 .dev = {
573 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
574 },
575};
576#endif
577#endif
578
579#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
580#include <linux/input.h>
581#include <linux/gpio_keys.h>
582
583static struct gpio_keys_button bfin_gpio_keys_table[] = {
584 {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
585 {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
586};
587
588static struct gpio_keys_platform_data bfin_gpio_keys_data = {
589 .buttons = bfin_gpio_keys_table,
590 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
591};
592
593static struct platform_device bfin_device_gpiokeys = {
594 .name = "gpio-keys",
595 .dev = {
596 .platform_data = &bfin_gpio_keys_data,
597 },
598};
599#endif
600
601#if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
602
603static struct bfin_sd_host bfin_sdh_data = {
604 .dma_chan = CH_RSI,
605 .irq_int0 = IRQ_RSI_INT0,
606 .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
607};
608
609static struct platform_device bf51x_sdh_device = {
610 .name = "bfin-sdh",
611 .id = 0,
612 .dev = {
613 .platform_data = &bfin_sdh_data,
614 },
615};
616#endif
617
618static const unsigned int cclk_vlev_datasheet[] =
619{
620 VRPAIR(VLEV_100, 400000000),
621 VRPAIR(VLEV_105, 426000000),
622 VRPAIR(VLEV_110, 500000000),
623 VRPAIR(VLEV_115, 533000000),
624 VRPAIR(VLEV_120, 600000000),
625};
626
627static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
628 .tuple_tab = cclk_vlev_datasheet,
629 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
630 .vr_settling_time = 25 /* us */,
631};
632
633static struct platform_device bfin_dpmc = {
634 .name = "bfin dpmc",
635 .dev = {
636 .platform_data = &bfin_dmpc_vreg_data,
637 },
638};
639
640static struct platform_device *tcm_devices[] __initdata = {
641
642 &bfin_dpmc,
643
644#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
645 &rtc_device,
646#endif
647
648#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
649 &bfin_mii_bus,
650 &bfin_mac_device,
651#endif
652
653#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
654 &bfin_spi0_device,
655 &bfin_spi1_device,
656#endif
657
658#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
659#ifdef CONFIG_SERIAL_BFIN_UART0
660 &bfin_uart0_device,
661#endif
662#ifdef CONFIG_SERIAL_BFIN_UART1
663 &bfin_uart1_device,
664#endif
665#endif
666
667#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
668#ifdef CONFIG_BFIN_SIR0
669 &bfin_sir0_device,
670#endif
671#ifdef CONFIG_BFIN_SIR1
672 &bfin_sir1_device,
673#endif
674#endif
675
676#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
677 &i2c_bfin_twi_device,
678#endif
679
680#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
681#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
682 &bfin_sport0_uart_device,
683#endif
684#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
685 &bfin_sport1_uart_device,
686#endif
687#endif
688
689#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
690 &bfin_device_gpiokeys,
691#endif
692
693#if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
694 &bf51x_sdh_device,
695#endif
696
697#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
698 &tcm_flash_device,
699#endif
700};
701
702static int __init tcm_init(void)
703{
704 printk(KERN_INFO "%s(): registering device resources\n", __func__);
705 i2c_register_board_info(0, bfin_i2c_board_info,
706 ARRAY_SIZE(bfin_i2c_board_info));
707 platform_add_devices(tcm_devices, ARRAY_SIZE(tcm_devices));
708 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
709 return 0;
710}
711
712arch_initcall(tcm_init);
713
714static struct platform_device *tcm_early_devices[] __initdata = {
715#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
716#ifdef CONFIG_SERIAL_BFIN_UART0
717 &bfin_uart0_device,
718#endif
719#ifdef CONFIG_SERIAL_BFIN_UART1
720 &bfin_uart1_device,
721#endif
722#endif
723
724#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
725#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
726 &bfin_sport0_uart_device,
727#endif
728#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
729 &bfin_sport1_uart_device,
730#endif
731#endif
732};
733
734void __init native_machine_early_platform_add_devices(void)
735{
736 printk(KERN_INFO "register early platform devices\n");
737 early_platform_add_devices(tcm_early_devices,
738 ARRAY_SIZE(tcm_early_devices));
739}
740
741void native_machine_restart(char *cmd)
742{
743 /* workaround reboot hang when booting from SPI */
744 if ((bfin_read_SYSCR() & 0x7) == 0x3)
745 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
746}
747
748void bfin_get_ether_addr(char *addr)
749{
750 random_ether_addr(addr);
751 printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
752}
753EXPORT_SYMBOL(bfin_get_ether_addr);
diff --git a/arch/blackfin/mach-bf518/include/mach/irq.h b/arch/blackfin/mach-bf518/include/mach/irq.h
index 14e52ec7afa5..435e76e31aaa 100644
--- a/arch/blackfin/mach-bf518/include/mach/irq.h
+++ b/arch/blackfin/mach-bf518/include/mach/irq.h
@@ -151,7 +151,17 @@
151 151
152#define GPIO_IRQ_BASE IRQ_PF0 152#define GPIO_IRQ_BASE IRQ_PF0
153 153
154#define NR_IRQS (IRQ_PH15 + 1) 154#define IRQ_MAC_PHYINT 119 /* PHY_INT Interrupt */
155#define IRQ_MAC_MMCINT 120 /* MMC Counter Interrupt */
156#define IRQ_MAC_RXFSINT 121 /* RX Frame-Status Interrupt */
157#define IRQ_MAC_TXFSINT 122 /* TX Frame-Status Interrupt */
158#define IRQ_MAC_WAKEDET 123 /* Wake-Up Interrupt */
159#define IRQ_MAC_RXDMAERR 124 /* RX DMA Direction Error Interrupt */
160#define IRQ_MAC_TXDMAERR 125 /* TX DMA Direction Error Interrupt */
161#define IRQ_MAC_STMDONE 126 /* Station Mgt. Transfer Done Interrupt */
162
163#define NR_MACH_IRQS (IRQ_MAC_STMDONE + 1)
164#define NR_IRQS (NR_MACH_IRQS + NR_SPARE_IRQS)
155 165
156#define IVG7 7 166#define IVG7 7
157#define IVG8 8 167#define IVG8 8
diff --git a/arch/blackfin/mach-bf518/include/mach/mem_map.h b/arch/blackfin/mach-bf518/include/mach/mem_map.h
index 3c6777cb3532..073b5d73d391 100644
--- a/arch/blackfin/mach-bf518/include/mach/mem_map.h
+++ b/arch/blackfin/mach-bf518/include/mach/mem_map.h
@@ -41,7 +41,7 @@
41#define L1_DATA_A_START 0xFF800000 41#define L1_DATA_A_START 0xFF800000
42#define L1_DATA_B_START 0xFF900000 42#define L1_DATA_B_START 0xFF900000
43 43
44#define L1_CODE_LENGTH 0xC000 44#define L1_CODE_LENGTH 0x8000
45 45
46#ifdef CONFIG_BFIN_DCACHE 46#ifdef CONFIG_BFIN_DCACHE
47 47
diff --git a/arch/blackfin/mach-bf527/boards/Kconfig b/arch/blackfin/mach-bf527/boards/Kconfig
index df224d04e167..b14c28810a44 100644
--- a/arch/blackfin/mach-bf527/boards/Kconfig
+++ b/arch/blackfin/mach-bf527/boards/Kconfig
@@ -9,6 +9,11 @@ config BFIN527_EZKIT
9 help 9 help
10 BF527-EZKIT-LITE board support. 10 BF527-EZKIT-LITE board support.
11 11
12config BFIN527_EZKIT_V2
13 bool "BF527-EZKIT-V2"
14 help
15 BF527-EZKIT-LITE V2.1+ board support.
16
12config BFIN527_BLUETECHNIX_CM 17config BFIN527_BLUETECHNIX_CM
13 bool "Bluetechnix CM-BF527" 18 bool "Bluetechnix CM-BF527"
14 help 19 help
diff --git a/arch/blackfin/mach-bf527/boards/Makefile b/arch/blackfin/mach-bf527/boards/Makefile
index eb6ed3362f9f..51a5817c4a90 100644
--- a/arch/blackfin/mach-bf527/boards/Makefile
+++ b/arch/blackfin/mach-bf527/boards/Makefile
@@ -3,5 +3,6 @@
3# 3#
4 4
5obj-$(CONFIG_BFIN527_EZKIT) += ezkit.o 5obj-$(CONFIG_BFIN527_EZKIT) += ezkit.o
6obj-$(CONFIG_BFIN527_EZKIT_V2) += ezkit.o
6obj-$(CONFIG_BFIN527_BLUETECHNIX_CM) += cm_bf527.o 7obj-$(CONFIG_BFIN527_BLUETECHNIX_CM) += cm_bf527.o
7obj-$(CONFIG_BFIN526_EZBRD) += ezbrd.o 8obj-$(CONFIG_BFIN526_EZBRD) += ezbrd.o
diff --git a/arch/blackfin/mach-bf527/boards/cm_bf527.c b/arch/blackfin/mach-bf527/boards/cm_bf527.c
index 7ab0800e2914..f392af641657 100644
--- a/arch/blackfin/mach-bf527/boards/cm_bf527.c
+++ b/arch/blackfin/mach-bf527/boards/cm_bf527.c
@@ -18,7 +18,6 @@
18#include <linux/i2c.h> 18#include <linux/i2c.h>
19#include <linux/irq.h> 19#include <linux/irq.h>
20#include <linux/interrupt.h> 20#include <linux/interrupt.h>
21#include <linux/usb/sl811.h>
22#include <linux/usb/musb.h> 21#include <linux/usb/musb.h>
23#include <asm/dma.h> 22#include <asm/dma.h>
24#include <asm/bfin5xx_spi.h> 23#include <asm/bfin5xx_spi.h>
@@ -99,6 +98,10 @@ static struct musb_hdrc_config musb_config = {
99 .num_eps = 8, 98 .num_eps = 8,
100 .dma_channels = 8, 99 .dma_channels = 8,
101 .gpio_vrsel = GPIO_PF11, 100 .gpio_vrsel = GPIO_PF11,
101 /* Some custom boards need to be active low, just set it to "0"
102 * if it is the case.
103 */
104 .gpio_vrsel_active = 1,
102}; 105};
103 106
104static struct musb_hdrc_platform_data musb_plat = { 107static struct musb_hdrc_platform_data musb_plat = {
@@ -270,50 +273,6 @@ static struct platform_device dm9000_device = {
270}; 273};
271#endif 274#endif
272 275
273#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
274static struct resource sl811_hcd_resources[] = {
275 {
276 .start = 0x20340000,
277 .end = 0x20340000,
278 .flags = IORESOURCE_MEM,
279 }, {
280 .start = 0x20340004,
281 .end = 0x20340004,
282 .flags = IORESOURCE_MEM,
283 }, {
284 .start = CONFIG_USB_SL811_BFIN_IRQ,
285 .end = CONFIG_USB_SL811_BFIN_IRQ,
286 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
287 },
288};
289
290#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
291void sl811_port_power(struct device *dev, int is_on)
292{
293 gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
294 gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
295}
296#endif
297
298static struct sl811_platform_data sl811_priv = {
299 .potpg = 10,
300 .power = 250, /* == 500mA */
301#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
302 .port_power = &sl811_port_power,
303#endif
304};
305
306static struct platform_device sl811_hcd_device = {
307 .name = "sl811-hcd",
308 .id = 0,
309 .dev = {
310 .platform_data = &sl811_priv,
311 },
312 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
313 .resource = sl811_hcd_resources,
314};
315#endif
316
317#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) 276#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
318static struct platform_device bfin_mii_bus = { 277static struct platform_device bfin_mii_bus = {
319 .name = "bfin_mii_bus", 278 .name = "bfin_mii_bus",
@@ -384,8 +343,8 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
384}; 343};
385#endif 344#endif
386 345
387#if defined(CONFIG_SND_BLACKFIN_AD1836) \ 346#if defined(CONFIG_SND_BLACKFIN_AD183X) \
388 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) 347 || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
389static struct bfin5xx_spi_chip ad1836_spi_chip_info = { 348static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
390 .enable_dma = 0, 349 .enable_dma = 0,
391 .bits_per_word = 16, 350 .bits_per_word = 16,
@@ -462,8 +421,8 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
462 }, 421 },
463#endif 422#endif
464 423
465#if defined(CONFIG_SND_BLACKFIN_AD1836) \ 424#if defined(CONFIG_SND_BLACKFIN_AD183X) \
466 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) 425 || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
467 { 426 {
468 .modalias = "ad1836", 427 .modalias = "ad1836",
469 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 428 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
@@ -603,30 +562,105 @@ static struct platform_device cm_flash_device = {
603#endif 562#endif
604 563
605#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 564#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
606static struct resource bfin_uart_resources[] = {
607#ifdef CONFIG_SERIAL_BFIN_UART0 565#ifdef CONFIG_SERIAL_BFIN_UART0
566static struct resource bfin_uart0_resources[] = {
608 { 567 {
609 .start = 0xFFC00400, 568 .start = UART0_THR,
610 .end = 0xFFC004FF, 569 .end = UART0_GCTL+2,
611 .flags = IORESOURCE_MEM, 570 .flags = IORESOURCE_MEM,
612 }, 571 },
572 {
573 .start = IRQ_UART0_RX,
574 .end = IRQ_UART0_RX+1,
575 .flags = IORESOURCE_IRQ,
576 },
577 {
578 .start = IRQ_UART0_ERROR,
579 .end = IRQ_UART0_ERROR,
580 .flags = IORESOURCE_IRQ,
581 },
582 {
583 .start = CH_UART0_TX,
584 .end = CH_UART0_TX,
585 .flags = IORESOURCE_DMA,
586 },
587 {
588 .start = CH_UART0_RX,
589 .end = CH_UART0_RX,
590 .flags = IORESOURCE_DMA,
591 },
592};
593
594unsigned short bfin_uart0_peripherals[] = {
595 P_UART0_TX, P_UART0_RX, 0
596};
597
598static struct platform_device bfin_uart0_device = {
599 .name = "bfin-uart",
600 .id = 0,
601 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
602 .resource = bfin_uart0_resources,
603 .dev = {
604 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
605 },
606};
613#endif 607#endif
614#ifdef CONFIG_SERIAL_BFIN_UART1 608#ifdef CONFIG_SERIAL_BFIN_UART1
609static struct resource bfin_uart1_resources[] = {
615 { 610 {
616 .start = 0xFFC02000, 611 .start = UART1_THR,
617 .end = 0xFFC020FF, 612 .end = UART1_GCTL+2,
618 .flags = IORESOURCE_MEM, 613 .flags = IORESOURCE_MEM,
619 }, 614 },
615 {
616 .start = IRQ_UART1_RX,
617 .end = IRQ_UART1_RX+1,
618 .flags = IORESOURCE_IRQ,
619 },
620 {
621 .start = IRQ_UART1_ERROR,
622 .end = IRQ_UART1_ERROR,
623 .flags = IORESOURCE_IRQ,
624 },
625 {
626 .start = CH_UART1_TX,
627 .end = CH_UART1_TX,
628 .flags = IORESOURCE_DMA,
629 },
630 {
631 .start = CH_UART1_RX,
632 .end = CH_UART1_RX,
633 .flags = IORESOURCE_DMA,
634 },
635#ifdef CONFIG_BFIN_UART1_CTSRTS
636 { /* CTS pin */
637 .start = GPIO_PF9,
638 .end = GPIO_PF9,
639 .flags = IORESOURCE_IO,
640 },
641 { /* RTS pin */
642 .start = GPIO_PF10,
643 .end = GPIO_PF10,
644 .flags = IORESOURCE_IO,
645 },
620#endif 646#endif
621}; 647};
622 648
623static struct platform_device bfin_uart_device = { 649unsigned short bfin_uart1_peripherals[] = {
650 P_UART1_TX, P_UART1_RX, 0
651};
652
653static struct platform_device bfin_uart1_device = {
624 .name = "bfin-uart", 654 .name = "bfin-uart",
625 .id = 1, 655 .id = 1,
626 .num_resources = ARRAY_SIZE(bfin_uart_resources), 656 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
627 .resource = bfin_uart_resources, 657 .resource = bfin_uart1_resources,
658 .dev = {
659 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
660 },
628}; 661};
629#endif 662#endif
663#endif
630 664
631#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 665#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
632#ifdef CONFIG_BFIN_SIR0 666#ifdef CONFIG_BFIN_SIR0
@@ -725,16 +759,75 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
725}; 759};
726 760
727#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 761#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
762#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
763static struct resource bfin_sport0_uart_resources[] = {
764 {
765 .start = SPORT0_TCR1,
766 .end = SPORT0_MRCS3+4,
767 .flags = IORESOURCE_MEM,
768 },
769 {
770 .start = IRQ_SPORT0_RX,
771 .end = IRQ_SPORT0_RX+1,
772 .flags = IORESOURCE_IRQ,
773 },
774 {
775 .start = IRQ_SPORT0_ERROR,
776 .end = IRQ_SPORT0_ERROR,
777 .flags = IORESOURCE_IRQ,
778 },
779};
780
781unsigned short bfin_sport0_peripherals[] = {
782 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
783 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
784};
785
728static struct platform_device bfin_sport0_uart_device = { 786static struct platform_device bfin_sport0_uart_device = {
729 .name = "bfin-sport-uart", 787 .name = "bfin-sport-uart",
730 .id = 0, 788 .id = 0,
789 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
790 .resource = bfin_sport0_uart_resources,
791 .dev = {
792 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
793 },
794};
795#endif
796#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
797static struct resource bfin_sport1_uart_resources[] = {
798 {
799 .start = SPORT1_TCR1,
800 .end = SPORT1_MRCS3+4,
801 .flags = IORESOURCE_MEM,
802 },
803 {
804 .start = IRQ_SPORT1_RX,
805 .end = IRQ_SPORT1_RX+1,
806 .flags = IORESOURCE_IRQ,
807 },
808 {
809 .start = IRQ_SPORT1_ERROR,
810 .end = IRQ_SPORT1_ERROR,
811 .flags = IORESOURCE_IRQ,
812 },
813};
814
815unsigned short bfin_sport1_peripherals[] = {
816 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
817 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
731}; 818};
732 819
733static struct platform_device bfin_sport1_uart_device = { 820static struct platform_device bfin_sport1_uart_device = {
734 .name = "bfin-sport-uart", 821 .name = "bfin-sport-uart",
735 .id = 1, 822 .id = 1,
823 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
824 .resource = bfin_sport1_uart_resources,
825 .dev = {
826 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
827 },
736}; 828};
737#endif 829#endif
830#endif
738 831
739#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 832#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
740#include <linux/input.h> 833#include <linux/input.h>
@@ -795,10 +888,6 @@ static struct platform_device *cmbf527_devices[] __initdata = {
795 &rtc_device, 888 &rtc_device,
796#endif 889#endif
797 890
798#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
799 &sl811_hcd_device,
800#endif
801
802#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE) 891#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
803 &bfin_isp1760_device, 892 &bfin_isp1760_device,
804#endif 893#endif
@@ -829,7 +918,12 @@ static struct platform_device *cmbf527_devices[] __initdata = {
829#endif 918#endif
830 919
831#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 920#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
832 &bfin_uart_device, 921#ifdef CONFIG_SERIAL_BFIN_UART0
922 &bfin_uart0_device,
923#endif
924#ifdef CONFIG_SERIAL_BFIN_UART1
925 &bfin_uart1_device,
926#endif
833#endif 927#endif
834 928
835#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 929#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
@@ -846,9 +940,13 @@ static struct platform_device *cmbf527_devices[] __initdata = {
846#endif 940#endif
847 941
848#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 942#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
943#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
849 &bfin_sport0_uart_device, 944 &bfin_sport0_uart_device,
945#endif
946#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
850 &bfin_sport1_uart_device, 947 &bfin_sport1_uart_device,
851#endif 948#endif
949#endif
852 950
853#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 951#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
854 &bfin_device_gpiokeys, 952 &bfin_device_gpiokeys,
@@ -871,6 +969,33 @@ static int __init cm_init(void)
871 969
872arch_initcall(cm_init); 970arch_initcall(cm_init);
873 971
972static struct platform_device *cmbf527_early_devices[] __initdata = {
973#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
974#ifdef CONFIG_SERIAL_BFIN_UART0
975 &bfin_uart0_device,
976#endif
977#ifdef CONFIG_SERIAL_BFIN_UART1
978 &bfin_uart1_device,
979#endif
980#endif
981
982#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
983#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
984 &bfin_sport0_uart_device,
985#endif
986#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
987 &bfin_sport1_uart_device,
988#endif
989#endif
990};
991
992void __init native_machine_early_platform_add_devices(void)
993{
994 printk(KERN_INFO "register early platform devices\n");
995 early_platform_add_devices(cmbf527_early_devices,
996 ARRAY_SIZE(cmbf527_early_devices));
997}
998
874void native_machine_restart(char *cmd) 999void native_machine_restart(char *cmd)
875{ 1000{
876 /* workaround reboot hang when booting from SPI */ 1001 /* workaround reboot hang when booting from SPI */
diff --git a/arch/blackfin/mach-bf527/boards/ezbrd.c b/arch/blackfin/mach-bf527/boards/ezbrd.c
index cad23b15d83c..606eb36b9d6e 100644
--- a/arch/blackfin/mach-bf527/boards/ezbrd.c
+++ b/arch/blackfin/mach-bf527/boards/ezbrd.c
@@ -62,6 +62,10 @@ static struct musb_hdrc_config musb_config = {
62 .num_eps = 8, 62 .num_eps = 8,
63 .dma_channels = 8, 63 .dma_channels = 8,
64 .gpio_vrsel = GPIO_PG13, 64 .gpio_vrsel = GPIO_PG13,
65 /* Some custom boards need to be active low, just set it to "0"
66 * if it is the case.
67 */
68 .gpio_vrsel_active = 1,
65}; 69};
66 70
67static struct musb_hdrc_platform_data musb_plat = { 71static struct musb_hdrc_platform_data musb_plat = {
@@ -274,8 +278,8 @@ static const struct ad7879_platform_data bfin_ad7879_ts_info = {
274 .median = 2, /* do 8 measurements */ 278 .median = 2, /* do 8 measurements */
275 .averaging = 1, /* take the average of 4 middle samples */ 279 .averaging = 1, /* take the average of 4 middle samples */
276 .pen_down_acc_interval = 255, /* 9.4 ms */ 280 .pen_down_acc_interval = 255, /* 9.4 ms */
277 .gpio_output = 1, /* configure AUX/VBAT/GPIO as GPIO output */ 281 .gpio_export = 1, /* Export GPIO to gpiolib */
278 .gpio_default = 1, /* During initialization set GPIO = HIGH */ 282 .gpio_base = -1, /* Dynamic allocation */
279}; 283};
280#endif 284#endif
281 285
@@ -439,30 +443,105 @@ static struct platform_device bfin_spi0_device = {
439#endif /* spi master and devices */ 443#endif /* spi master and devices */
440 444
441#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 445#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
442static struct resource bfin_uart_resources[] = {
443#ifdef CONFIG_SERIAL_BFIN_UART0 446#ifdef CONFIG_SERIAL_BFIN_UART0
447static struct resource bfin_uart0_resources[] = {
444 { 448 {
445 .start = 0xFFC00400, 449 .start = UART0_THR,
446 .end = 0xFFC004FF, 450 .end = UART0_GCTL+2,
447 .flags = IORESOURCE_MEM, 451 .flags = IORESOURCE_MEM,
448 }, 452 },
453 {
454 .start = IRQ_UART0_RX,
455 .end = IRQ_UART0_RX+1,
456 .flags = IORESOURCE_IRQ,
457 },
458 {
459 .start = IRQ_UART0_ERROR,
460 .end = IRQ_UART0_ERROR,
461 .flags = IORESOURCE_IRQ,
462 },
463 {
464 .start = CH_UART0_TX,
465 .end = CH_UART0_TX,
466 .flags = IORESOURCE_DMA,
467 },
468 {
469 .start = CH_UART0_RX,
470 .end = CH_UART0_RX,
471 .flags = IORESOURCE_DMA,
472 },
473};
474
475unsigned short bfin_uart0_peripherals[] = {
476 P_UART0_TX, P_UART0_RX, 0
477};
478
479static struct platform_device bfin_uart0_device = {
480 .name = "bfin-uart",
481 .id = 0,
482 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
483 .resource = bfin_uart0_resources,
484 .dev = {
485 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
486 },
487};
449#endif 488#endif
450#ifdef CONFIG_SERIAL_BFIN_UART1 489#ifdef CONFIG_SERIAL_BFIN_UART1
490static struct resource bfin_uart1_resources[] = {
451 { 491 {
452 .start = 0xFFC02000, 492 .start = UART1_THR,
453 .end = 0xFFC020FF, 493 .end = UART1_GCTL+2,
454 .flags = IORESOURCE_MEM, 494 .flags = IORESOURCE_MEM,
455 }, 495 },
496 {
497 .start = IRQ_UART1_RX,
498 .end = IRQ_UART1_RX+1,
499 .flags = IORESOURCE_IRQ,
500 },
501 {
502 .start = IRQ_UART1_ERROR,
503 .end = IRQ_UART1_ERROR,
504 .flags = IORESOURCE_IRQ,
505 },
506 {
507 .start = CH_UART1_TX,
508 .end = CH_UART1_TX,
509 .flags = IORESOURCE_DMA,
510 },
511 {
512 .start = CH_UART1_RX,
513 .end = CH_UART1_RX,
514 .flags = IORESOURCE_DMA,
515 },
516#ifdef CONFIG_BFIN_UART1_CTSRTS
517 { /* CTS pin */
518 .start = GPIO_PG0,
519 .end = GPIO_PG0,
520 .flags = IORESOURCE_IO,
521 },
522 { /* RTS pin */
523 .start = GPIO_PF10,
524 .end = GPIO_PF10,
525 .flags = IORESOURCE_IO,
526 },
456#endif 527#endif
457}; 528};
458 529
459static struct platform_device bfin_uart_device = { 530unsigned short bfin_uart1_peripherals[] = {
531 P_UART1_TX, P_UART1_RX, 0
532};
533
534static struct platform_device bfin_uart1_device = {
460 .name = "bfin-uart", 535 .name = "bfin-uart",
461 .id = 1, 536 .id = 1,
462 .num_resources = ARRAY_SIZE(bfin_uart_resources), 537 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
463 .resource = bfin_uart_resources, 538 .resource = bfin_uart1_resources,
539 .dev = {
540 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
541 },
464}; 542};
465#endif 543#endif
544#endif
466 545
467#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 546#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
468#ifdef CONFIG_BFIN_SIR0 547#ifdef CONFIG_BFIN_SIR0
@@ -556,16 +635,75 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
556}; 635};
557 636
558#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 637#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
638#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
639static struct resource bfin_sport0_uart_resources[] = {
640 {
641 .start = SPORT0_TCR1,
642 .end = SPORT0_MRCS3+4,
643 .flags = IORESOURCE_MEM,
644 },
645 {
646 .start = IRQ_SPORT0_RX,
647 .end = IRQ_SPORT0_RX+1,
648 .flags = IORESOURCE_IRQ,
649 },
650 {
651 .start = IRQ_SPORT0_ERROR,
652 .end = IRQ_SPORT0_ERROR,
653 .flags = IORESOURCE_IRQ,
654 },
655};
656
657unsigned short bfin_sport0_peripherals[] = {
658 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
659 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
660};
661
559static struct platform_device bfin_sport0_uart_device = { 662static struct platform_device bfin_sport0_uart_device = {
560 .name = "bfin-sport-uart", 663 .name = "bfin-sport-uart",
561 .id = 0, 664 .id = 0,
665 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
666 .resource = bfin_sport0_uart_resources,
667 .dev = {
668 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
669 },
670};
671#endif
672#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
673static struct resource bfin_sport1_uart_resources[] = {
674 {
675 .start = SPORT1_TCR1,
676 .end = SPORT1_MRCS3+4,
677 .flags = IORESOURCE_MEM,
678 },
679 {
680 .start = IRQ_SPORT1_RX,
681 .end = IRQ_SPORT1_RX+1,
682 .flags = IORESOURCE_IRQ,
683 },
684 {
685 .start = IRQ_SPORT1_ERROR,
686 .end = IRQ_SPORT1_ERROR,
687 .flags = IORESOURCE_IRQ,
688 },
689};
690
691unsigned short bfin_sport1_peripherals[] = {
692 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
693 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
562}; 694};
563 695
564static struct platform_device bfin_sport1_uart_device = { 696static struct platform_device bfin_sport1_uart_device = {
565 .name = "bfin-sport-uart", 697 .name = "bfin-sport-uart",
566 .id = 1, 698 .id = 1,
699 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
700 .resource = bfin_sport1_uart_resources,
701 .dev = {
702 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
703 },
567}; 704};
568#endif 705#endif
706#endif
569 707
570#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 708#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
571#include <linux/input.h> 709#include <linux/input.h>
@@ -615,9 +753,10 @@ static struct platform_device bfin_dpmc = {
615#include <asm/bfin-lq035q1.h> 753#include <asm/bfin-lq035q1.h>
616 754
617static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = { 755static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
618 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB, 756 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
619 .use_bl = 1, 757 .ppi_mode = USE_RGB565_16_BIT_PPI,
620 .gpio_bl = GPIO_PG12, 758 .use_bl = 1,
759 .gpio_bl = GPIO_PG12,
621}; 760};
622 761
623static struct resource bfin_lq035q1_resources[] = { 762static struct resource bfin_lq035q1_resources[] = {
@@ -665,7 +804,12 @@ static struct platform_device *stamp_devices[] __initdata = {
665#endif 804#endif
666 805
667#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 806#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
668 &bfin_uart_device, 807#ifdef CONFIG_SERIAL_BFIN_UART0
808 &bfin_uart0_device,
809#endif
810#ifdef CONFIG_SERIAL_BFIN_UART1
811 &bfin_uart1_device,
812#endif
669#endif 813#endif
670 814
671#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) 815#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
@@ -686,9 +830,13 @@ static struct platform_device *stamp_devices[] __initdata = {
686#endif 830#endif
687 831
688#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 832#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
833#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
689 &bfin_sport0_uart_device, 834 &bfin_sport0_uart_device,
835#endif
836#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
690 &bfin_sport1_uart_device, 837 &bfin_sport1_uart_device,
691#endif 838#endif
839#endif
692 840
693#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 841#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
694 &bfin_device_gpiokeys, 842 &bfin_device_gpiokeys,
@@ -711,6 +859,33 @@ static int __init ezbrd_init(void)
711 859
712arch_initcall(ezbrd_init); 860arch_initcall(ezbrd_init);
713 861
862static struct platform_device *ezbrd_early_devices[] __initdata = {
863#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
864#ifdef CONFIG_SERIAL_BFIN_UART0
865 &bfin_uart0_device,
866#endif
867#ifdef CONFIG_SERIAL_BFIN_UART1
868 &bfin_uart1_device,
869#endif
870#endif
871
872#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
873#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
874 &bfin_sport0_uart_device,
875#endif
876#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
877 &bfin_sport1_uart_device,
878#endif
879#endif
880};
881
882void __init native_machine_early_platform_add_devices(void)
883{
884 printk(KERN_INFO "register early platform devices\n");
885 early_platform_add_devices(ezbrd_early_devices,
886 ARRAY_SIZE(ezbrd_early_devices));
887}
888
714void native_machine_restart(char *cmd) 889void native_machine_restart(char *cmd)
715{ 890{
716 /* workaround reboot hang when booting from SPI */ 891 /* workaround reboot hang when booting from SPI */
diff --git a/arch/blackfin/mach-bf527/boards/ezkit.c b/arch/blackfin/mach-bf527/boards/ezkit.c
index 5294fdd20732..a05c967a24cf 100644
--- a/arch/blackfin/mach-bf527/boards/ezkit.c
+++ b/arch/blackfin/mach-bf527/boards/ezkit.c
@@ -16,8 +16,9 @@
16#include <linux/i2c.h> 16#include <linux/i2c.h>
17#include <linux/irq.h> 17#include <linux/irq.h>
18#include <linux/interrupt.h> 18#include <linux/interrupt.h>
19#include <linux/usb/sl811.h>
20#include <linux/usb/musb.h> 19#include <linux/usb/musb.h>
20#include <linux/leds.h>
21#include <linux/input.h>
21#include <asm/dma.h> 22#include <asm/dma.h>
22#include <asm/bfin5xx_spi.h> 23#include <asm/bfin5xx_spi.h>
23#include <asm/reboot.h> 24#include <asm/reboot.h>
@@ -29,7 +30,11 @@
29/* 30/*
30 * Name the Board for the /proc/cpuinfo 31 * Name the Board for the /proc/cpuinfo
31 */ 32 */
33#ifdef CONFIG_BFIN527_EZKIT_V2
34const char bfin_board_name[] = "ADI BF527-EZKIT V2";
35#else
32const char bfin_board_name[] = "ADI BF527-EZKIT"; 36const char bfin_board_name[] = "ADI BF527-EZKIT";
37#endif
33 38
34/* 39/*
35 * Driver needs to know address, irq and flag pin. 40 * Driver needs to know address, irq and flag pin.
@@ -97,6 +102,10 @@ static struct musb_hdrc_config musb_config = {
97 .num_eps = 8, 102 .num_eps = 8,
98 .dma_channels = 8, 103 .dma_channels = 8,
99 .gpio_vrsel = GPIO_PG13, 104 .gpio_vrsel = GPIO_PG13,
105 /* Some custom boards need to be active low, just set it to "0"
106 * if it is the case.
107 */
108 .gpio_vrsel_active = 1,
100}; 109};
101 110
102static struct musb_hdrc_platform_data musb_plat = { 111static struct musb_hdrc_platform_data musb_plat = {
@@ -143,6 +152,33 @@ static struct platform_device bf52x_t350mcqb_device = {
143}; 152};
144#endif 153#endif
145 154
155#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
156#include <asm/bfin-lq035q1.h>
157
158static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
159 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
160 .ppi_mode = USE_RGB565_8_BIT_PPI,
161};
162
163static struct resource bfin_lq035q1_resources[] = {
164 {
165 .start = IRQ_PPI_ERROR,
166 .end = IRQ_PPI_ERROR,
167 .flags = IORESOURCE_IRQ,
168 },
169};
170
171static struct platform_device bfin_lq035q1_device = {
172 .name = "bfin-lq035q1",
173 .id = -1,
174 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
175 .resource = bfin_lq035q1_resources,
176 .dev = {
177 .platform_data = &bfin_lq035q1_data,
178 },
179};
180#endif
181
146#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) 182#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
147static struct mtd_partition ezkit_partitions[] = { 183static struct mtd_partition ezkit_partitions[] = {
148 { 184 {
@@ -326,50 +362,6 @@ static struct platform_device dm9000_device = {
326}; 362};
327#endif 363#endif
328 364
329#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
330static struct resource sl811_hcd_resources[] = {
331 {
332 .start = 0x20340000,
333 .end = 0x20340000,
334 .flags = IORESOURCE_MEM,
335 }, {
336 .start = 0x20340004,
337 .end = 0x20340004,
338 .flags = IORESOURCE_MEM,
339 }, {
340 .start = CONFIG_USB_SL811_BFIN_IRQ,
341 .end = CONFIG_USB_SL811_BFIN_IRQ,
342 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
343 },
344};
345
346#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
347void sl811_port_power(struct device *dev, int is_on)
348{
349 gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
350 gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
351}
352#endif
353
354static struct sl811_platform_data sl811_priv = {
355 .potpg = 10,
356 .power = 250, /* == 500mA */
357#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
358 .port_power = &sl811_port_power,
359#endif
360};
361
362static struct platform_device sl811_hcd_device = {
363 .name = "sl811-hcd",
364 .id = 0,
365 .dev = {
366 .platform_data = &sl811_priv,
367 },
368 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
369 .resource = sl811_hcd_resources,
370};
371#endif
372
373#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) 365#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
374static struct platform_device bfin_mii_bus = { 366static struct platform_device bfin_mii_bus = {
375 .name = "bfin_mii_bus", 367 .name = "bfin_mii_bus",
@@ -440,8 +432,8 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
440}; 432};
441#endif 433#endif
442 434
443#if defined(CONFIG_SND_BLACKFIN_AD1836) \ 435#if defined(CONFIG_SND_BLACKFIN_AD183X) \
444 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) 436 || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
445static struct bfin5xx_spi_chip ad1836_spi_chip_info = { 437static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
446 .enable_dma = 0, 438 .enable_dma = 0,
447 .bits_per_word = 16, 439 .bits_per_word = 16,
@@ -488,8 +480,7 @@ static const struct ad7879_platform_data bfin_ad7879_ts_info = {
488 .median = 2, /* do 8 measurements */ 480 .median = 2, /* do 8 measurements */
489 .averaging = 1, /* take the average of 4 middle samples */ 481 .averaging = 1, /* take the average of 4 middle samples */
490 .pen_down_acc_interval = 255, /* 9.4 ms */ 482 .pen_down_acc_interval = 255, /* 9.4 ms */
491 .gpio_output = 1, /* configure AUX/VBAT/GPIO as GPIO output */ 483 .gpio_export = 0, /* Export GPIO to gpiolib */
492 .gpio_default = 1, /* During initialization set GPIO = HIGH */
493}; 484};
494#endif 485#endif
495 486
@@ -500,14 +491,6 @@ static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
500}; 491};
501#endif 492#endif
502 493
503#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
504 && defined(CONFIG_SND_SOC_WM8731_SPI)
505static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
506 .enable_dma = 0,
507 .bits_per_word = 16,
508};
509#endif
510
511#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) 494#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
512static struct bfin5xx_spi_chip spidev_chip_info = { 495static struct bfin5xx_spi_chip spidev_chip_info = {
513 .enable_dma = 0, 496 .enable_dma = 0,
@@ -515,6 +498,29 @@ static struct bfin5xx_spi_chip spidev_chip_info = {
515}; 498};
516#endif 499#endif
517 500
501#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
502static struct platform_device bfin_i2s = {
503 .name = "bfin-i2s",
504 .id = CONFIG_SND_BF5XX_SPORT_NUM,
505 /* TODO: add platform data here */
506};
507#endif
508
509#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
510static struct platform_device bfin_tdm = {
511 .name = "bfin-tdm",
512 .id = CONFIG_SND_BF5XX_SPORT_NUM,
513 /* TODO: add platform data here */
514};
515#endif
516
517#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
518static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
519 .enable_dma = 0,
520 .bits_per_word = 8,
521};
522#endif
523
518static struct spi_board_info bfin_spi_board_info[] __initdata = { 524static struct spi_board_info bfin_spi_board_info[] __initdata = {
519#if defined(CONFIG_MTD_M25P80) \ 525#if defined(CONFIG_MTD_M25P80) \
520 || defined(CONFIG_MTD_M25P80_MODULE) 526 || defined(CONFIG_MTD_M25P80_MODULE)
@@ -542,8 +548,8 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
542 }, 548 },
543#endif 549#endif
544 550
545#if defined(CONFIG_SND_BLACKFIN_AD1836) \ 551#if defined(CONFIG_SND_BLACKFIN_AD183X) \
546 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) 552 || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
547 { 553 {
548 .modalias = "ad1836", 554 .modalias = "ad1836",
549 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 555 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
@@ -586,17 +592,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
586 .mode = SPI_CPHA | SPI_CPOL, 592 .mode = SPI_CPHA | SPI_CPOL,
587 }, 593 },
588#endif 594#endif
589#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
590 && defined(CONFIG_SND_SOC_WM8731_SPI)
591 {
592 .modalias = "wm8731",
593 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
594 .bus_num = 0,
595 .chip_select = 5,
596 .controller_data = &spi_wm8731_chip_info,
597 .mode = SPI_MODE_0,
598 },
599#endif
600#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) 595#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
601 { 596 {
602 .modalias = "spidev", 597 .modalias = "spidev",
@@ -606,6 +601,16 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
606 .controller_data = &spidev_chip_info, 601 .controller_data = &spidev_chip_info,
607 }, 602 },
608#endif 603#endif
604#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
605 {
606 .modalias = "bfin-lq035q1-spi",
607 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
608 .bus_num = 0,
609 .chip_select = 7,
610 .controller_data = &lq035q1_spi_chip_info,
611 .mode = SPI_CPHA | SPI_CPOL,
612 },
613#endif
609}; 614};
610 615
611#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 616#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
@@ -647,30 +652,105 @@ static struct platform_device bfin_spi0_device = {
647#endif /* spi master and devices */ 652#endif /* spi master and devices */
648 653
649#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 654#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
650static struct resource bfin_uart_resources[] = {
651#ifdef CONFIG_SERIAL_BFIN_UART0 655#ifdef CONFIG_SERIAL_BFIN_UART0
656static struct resource bfin_uart0_resources[] = {
652 { 657 {
653 .start = 0xFFC00400, 658 .start = UART0_THR,
654 .end = 0xFFC004FF, 659 .end = UART0_GCTL+2,
655 .flags = IORESOURCE_MEM, 660 .flags = IORESOURCE_MEM,
656 }, 661 },
662 {
663 .start = IRQ_UART0_RX,
664 .end = IRQ_UART0_RX+1,
665 .flags = IORESOURCE_IRQ,
666 },
667 {
668 .start = IRQ_UART0_ERROR,
669 .end = IRQ_UART0_ERROR,
670 .flags = IORESOURCE_IRQ,
671 },
672 {
673 .start = CH_UART0_TX,
674 .end = CH_UART0_TX,
675 .flags = IORESOURCE_DMA,
676 },
677 {
678 .start = CH_UART0_RX,
679 .end = CH_UART0_RX,
680 .flags = IORESOURCE_DMA,
681 },
682};
683
684unsigned short bfin_uart0_peripherals[] = {
685 P_UART0_TX, P_UART0_RX, 0
686};
687
688static struct platform_device bfin_uart0_device = {
689 .name = "bfin-uart",
690 .id = 0,
691 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
692 .resource = bfin_uart0_resources,
693 .dev = {
694 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
695 },
696};
657#endif 697#endif
658#ifdef CONFIG_SERIAL_BFIN_UART1 698#ifdef CONFIG_SERIAL_BFIN_UART1
699static struct resource bfin_uart1_resources[] = {
659 { 700 {
660 .start = 0xFFC02000, 701 .start = UART1_THR,
661 .end = 0xFFC020FF, 702 .end = UART1_GCTL+2,
662 .flags = IORESOURCE_MEM, 703 .flags = IORESOURCE_MEM,
663 }, 704 },
705 {
706 .start = IRQ_UART1_RX,
707 .end = IRQ_UART1_RX+1,
708 .flags = IORESOURCE_IRQ,
709 },
710 {
711 .start = IRQ_UART1_ERROR,
712 .end = IRQ_UART1_ERROR,
713 .flags = IORESOURCE_IRQ,
714 },
715 {
716 .start = CH_UART1_TX,
717 .end = CH_UART1_TX,
718 .flags = IORESOURCE_DMA,
719 },
720 {
721 .start = CH_UART1_RX,
722 .end = CH_UART1_RX,
723 .flags = IORESOURCE_DMA,
724 },
725#ifdef CONFIG_BFIN_UART1_CTSRTS
726 { /* CTS pin */
727 .start = GPIO_PF9,
728 .end = GPIO_PF9,
729 .flags = IORESOURCE_IO,
730 },
731 { /* RTS pin */
732 .start = GPIO_PF10,
733 .end = GPIO_PF10,
734 .flags = IORESOURCE_IO,
735 },
664#endif 736#endif
665}; 737};
666 738
667static struct platform_device bfin_uart_device = { 739unsigned short bfin_uart1_peripherals[] = {
740 P_UART1_TX, P_UART1_RX, 0
741};
742
743static struct platform_device bfin_uart1_device = {
668 .name = "bfin-uart", 744 .name = "bfin-uart",
669 .id = 1, 745 .id = 1,
670 .num_resources = ARRAY_SIZE(bfin_uart_resources), 746 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
671 .resource = bfin_uart_resources, 747 .resource = bfin_uart1_resources,
748 .dev = {
749 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
750 },
672}; 751};
673#endif 752#endif
753#endif
674 754
675#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 755#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
676#ifdef CONFIG_BFIN_SIR0 756#ifdef CONFIG_BFIN_SIR0
@@ -749,6 +829,71 @@ static struct platform_device i2c_bfin_twi_device = {
749}; 829};
750#endif 830#endif
751 831
832#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
833#include <linux/mfd/adp5520.h>
834
835 /*
836 * ADP5520/5501 LEDs Data
837 */
838
839static struct led_info adp5520_leds[] = {
840 {
841 .name = "adp5520-led1",
842 .default_trigger = "none",
843 .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
844 },
845};
846
847static struct adp5520_leds_platform_data adp5520_leds_data = {
848 .num_leds = ARRAY_SIZE(adp5520_leds),
849 .leds = adp5520_leds,
850 .fade_in = ADP5520_FADE_T_600ms,
851 .fade_out = ADP5520_FADE_T_600ms,
852 .led_on_time = ADP5520_LED_ONT_600ms,
853};
854
855 /*
856 * ADP5520 Keypad Data
857 */
858
859static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
860 [ADP5520_KEY(3, 3)] = KEY_1,
861 [ADP5520_KEY(2, 3)] = KEY_2,
862 [ADP5520_KEY(1, 3)] = KEY_3,
863 [ADP5520_KEY(0, 3)] = KEY_UP,
864 [ADP5520_KEY(3, 2)] = KEY_4,
865 [ADP5520_KEY(2, 2)] = KEY_5,
866 [ADP5520_KEY(1, 2)] = KEY_6,
867 [ADP5520_KEY(0, 2)] = KEY_DOWN,
868 [ADP5520_KEY(3, 1)] = KEY_7,
869 [ADP5520_KEY(2, 1)] = KEY_8,
870 [ADP5520_KEY(1, 1)] = KEY_9,
871 [ADP5520_KEY(0, 1)] = KEY_DOT,
872 [ADP5520_KEY(3, 0)] = KEY_BACKSPACE,
873 [ADP5520_KEY(2, 0)] = KEY_0,
874 [ADP5520_KEY(1, 0)] = KEY_HELP,
875 [ADP5520_KEY(0, 0)] = KEY_ENTER,
876};
877
878static struct adp5520_keys_platform_data adp5520_keys_data = {
879 .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
880 .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
881 .keymap = adp5520_keymap,
882 .keymapsize = ARRAY_SIZE(adp5520_keymap),
883 .repeat = 0,
884};
885
886 /*
887 * ADP5520/5501 Multifuction Device Init Data
888 */
889
890static struct adp5520_platform_data adp5520_pdev_data = {
891 .leds = &adp5520_leds_data,
892 .keys = &adp5520_keys_data,
893};
894
895#endif
896
752static struct i2c_board_info __initdata bfin_i2c_board_info[] = { 897static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
753#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE) 898#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
754 { 899 {
@@ -766,22 +911,99 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
766 I2C_BOARD_INFO("bfin-adv7393", 0x2B), 911 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
767 }, 912 },
768#endif 913#endif
914#if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
915 {
916 I2C_BOARD_INFO("ad7879", 0x2C),
917 .irq = IRQ_PF8,
918 .platform_data = (void *)&bfin_ad7879_ts_info,
919 },
920#endif
921#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
922 {
923 I2C_BOARD_INFO("pmic-adp5520", 0x32),
924 .irq = IRQ_PF9,
925 .platform_data = (void *)&adp5520_pdev_data,
926 },
927#endif
928#if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
929 {
930 I2C_BOARD_INFO("ssm2602", 0x1b),
931 },
932#endif
769}; 933};
770 934
771#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 935#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
936#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
937static struct resource bfin_sport0_uart_resources[] = {
938 {
939 .start = SPORT0_TCR1,
940 .end = SPORT0_MRCS3+4,
941 .flags = IORESOURCE_MEM,
942 },
943 {
944 .start = IRQ_SPORT0_RX,
945 .end = IRQ_SPORT0_RX+1,
946 .flags = IORESOURCE_IRQ,
947 },
948 {
949 .start = IRQ_SPORT0_ERROR,
950 .end = IRQ_SPORT0_ERROR,
951 .flags = IORESOURCE_IRQ,
952 },
953};
954
955unsigned short bfin_sport0_peripherals[] = {
956 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
957 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
958};
959
772static struct platform_device bfin_sport0_uart_device = { 960static struct platform_device bfin_sport0_uart_device = {
773 .name = "bfin-sport-uart", 961 .name = "bfin-sport-uart",
774 .id = 0, 962 .id = 0,
963 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
964 .resource = bfin_sport0_uart_resources,
965 .dev = {
966 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
967 },
968};
969#endif
970#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
971static struct resource bfin_sport1_uart_resources[] = {
972 {
973 .start = SPORT1_TCR1,
974 .end = SPORT1_MRCS3+4,
975 .flags = IORESOURCE_MEM,
976 },
977 {
978 .start = IRQ_SPORT1_RX,
979 .end = IRQ_SPORT1_RX+1,
980 .flags = IORESOURCE_IRQ,
981 },
982 {
983 .start = IRQ_SPORT1_ERROR,
984 .end = IRQ_SPORT1_ERROR,
985 .flags = IORESOURCE_IRQ,
986 },
987};
988
989unsigned short bfin_sport1_peripherals[] = {
990 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
991 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
775}; 992};
776 993
777static struct platform_device bfin_sport1_uart_device = { 994static struct platform_device bfin_sport1_uart_device = {
778 .name = "bfin-sport-uart", 995 .name = "bfin-sport-uart",
779 .id = 1, 996 .id = 1,
997 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
998 .resource = bfin_sport1_uart_resources,
999 .dev = {
1000 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
1001 },
780}; 1002};
781#endif 1003#endif
1004#endif
782 1005
783#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 1006#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
784#include <linux/input.h>
785#include <linux/gpio_keys.h> 1007#include <linux/gpio_keys.h>
786 1008
787static struct gpio_keys_button bfin_gpio_keys_table[] = { 1009static struct gpio_keys_button bfin_gpio_keys_table[] = {
@@ -803,7 +1025,6 @@ static struct platform_device bfin_device_gpiokeys = {
803#endif 1025#endif
804 1026
805#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE) 1027#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
806#include <linux/input.h>
807#include <asm/bfin_rotary.h> 1028#include <asm/bfin_rotary.h>
808 1029
809static struct bfin_rotary_platform_data bfin_rotary_data = { 1030static struct bfin_rotary_platform_data bfin_rotary_data = {
@@ -872,10 +1093,6 @@ static struct platform_device *stamp_devices[] __initdata = {
872 &rtc_device, 1093 &rtc_device,
873#endif 1094#endif
874 1095
875#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
876 &sl811_hcd_device,
877#endif
878
879#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE) 1096#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
880 &bfin_isp1760_device, 1097 &bfin_isp1760_device,
881#endif 1098#endif
@@ -909,8 +1126,17 @@ static struct platform_device *stamp_devices[] __initdata = {
909 &bf52x_t350mcqb_device, 1126 &bf52x_t350mcqb_device,
910#endif 1127#endif
911 1128
1129#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1130 &bfin_lq035q1_device,
1131#endif
1132
912#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 1133#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
913 &bfin_uart_device, 1134#ifdef CONFIG_SERIAL_BFIN_UART0
1135 &bfin_uart0_device,
1136#endif
1137#ifdef CONFIG_SERIAL_BFIN_UART1
1138 &bfin_uart1_device,
1139#endif
914#endif 1140#endif
915 1141
916#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 1142#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
@@ -927,9 +1153,13 @@ static struct platform_device *stamp_devices[] __initdata = {
927#endif 1153#endif
928 1154
929#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 1155#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
1156#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
930 &bfin_sport0_uart_device, 1157 &bfin_sport0_uart_device,
1158#endif
1159#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
931 &bfin_sport1_uart_device, 1160 &bfin_sport1_uart_device,
932#endif 1161#endif
1162#endif
933 1163
934#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 1164#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
935 &bfin_device_gpiokeys, 1165 &bfin_device_gpiokeys,
@@ -942,6 +1172,14 @@ static struct platform_device *stamp_devices[] __initdata = {
942#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) 1172#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
943 &ezkit_flash_device, 1173 &ezkit_flash_device,
944#endif 1174#endif
1175
1176#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
1177 &bfin_i2s,
1178#endif
1179
1180#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
1181 &bfin_tdm,
1182#endif
945}; 1183};
946 1184
947static int __init ezkit_init(void) 1185static int __init ezkit_init(void)
@@ -956,6 +1194,33 @@ static int __init ezkit_init(void)
956 1194
957arch_initcall(ezkit_init); 1195arch_initcall(ezkit_init);
958 1196
1197static struct platform_device *ezkit_early_devices[] __initdata = {
1198#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1199#ifdef CONFIG_SERIAL_BFIN_UART0
1200 &bfin_uart0_device,
1201#endif
1202#ifdef CONFIG_SERIAL_BFIN_UART1
1203 &bfin_uart1_device,
1204#endif
1205#endif
1206
1207#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
1208#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1209 &bfin_sport0_uart_device,
1210#endif
1211#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1212 &bfin_sport1_uart_device,
1213#endif
1214#endif
1215};
1216
1217void __init native_machine_early_platform_add_devices(void)
1218{
1219 printk(KERN_INFO "register early platform devices\n");
1220 early_platform_add_devices(ezkit_early_devices,
1221 ARRAY_SIZE(ezkit_early_devices));
1222}
1223
959void native_machine_restart(char *cmd) 1224void native_machine_restart(char *cmd)
960{ 1225{
961 /* workaround reboot hang when booting from SPI */ 1226 /* workaround reboot hang when booting from SPI */
diff --git a/arch/blackfin/mach-bf527/include/mach/irq.h b/arch/blackfin/mach-bf527/include/mach/irq.h
index aa6579a64a2f..704d9253e41d 100644
--- a/arch/blackfin/mach-bf527/include/mach/irq.h
+++ b/arch/blackfin/mach-bf527/include/mach/irq.h
@@ -151,7 +151,17 @@
151 151
152#define GPIO_IRQ_BASE IRQ_PF0 152#define GPIO_IRQ_BASE IRQ_PF0
153 153
154#define NR_IRQS (IRQ_PH15+1) 154#define IRQ_MAC_PHYINT 119 /* PHY_INT Interrupt */
155#define IRQ_MAC_MMCINT 120 /* MMC Counter Interrupt */
156#define IRQ_MAC_RXFSINT 121 /* RX Frame-Status Interrupt */
157#define IRQ_MAC_TXFSINT 122 /* TX Frame-Status Interrupt */
158#define IRQ_MAC_WAKEDET 123 /* Wake-Up Interrupt */
159#define IRQ_MAC_RXDMAERR 124 /* RX DMA Direction Error Interrupt */
160#define IRQ_MAC_TXDMAERR 125 /* TX DMA Direction Error Interrupt */
161#define IRQ_MAC_STMDONE 126 /* Station Mgt. Transfer Done Interrupt */
162
163#define NR_MACH_IRQS (IRQ_MAC_STMDONE + 1)
164#define NR_IRQS (NR_MACH_IRQS + NR_SPARE_IRQS)
155 165
156#define IVG7 7 166#define IVG7 7
157#define IVG8 8 167#define IVG8 8
diff --git a/arch/blackfin/mach-bf533/boards/H8606.c b/arch/blackfin/mach-bf533/boards/H8606.c
index 4adceb0bdb6d..175371af0692 100644
--- a/arch/blackfin/mach-bf533/boards/H8606.c
+++ b/arch/blackfin/mach-bf533/boards/H8606.c
@@ -171,7 +171,7 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
171}; 171};
172#endif 172#endif
173 173
174#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) 174#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
175static struct bfin5xx_spi_chip ad1836_spi_chip_info = { 175static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
176 .enable_dma = 0, 176 .enable_dma = 0,
177 .bits_per_word = 16, 177 .bits_per_word = 16,
@@ -206,7 +206,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
206 }, 206 },
207#endif 207#endif
208 208
209#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) 209#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
210 { 210 {
211 .modalias = "ad1836", 211 .modalias = "ad1836",
212 .max_speed_hz = 16, 212 .max_speed_hz = 16,
@@ -257,21 +257,50 @@ static struct platform_device bfin_spi0_device = {
257#endif /* spi master and devices */ 257#endif /* spi master and devices */
258 258
259#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 259#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
260static struct resource bfin_uart_resources[] = { 260#ifdef CONFIG_SERIAL_BFIN_UART0
261static struct resource bfin_uart0_resources[] = {
261 { 262 {
262 .start = 0xFFC00400, 263 .start = BFIN_UART_THR,
263 .end = 0xFFC004FF, 264 .end = BFIN_UART_GCTL+2,
264 .flags = IORESOURCE_MEM, 265 .flags = IORESOURCE_MEM,
265 }, 266 },
267 {
268 .start = IRQ_UART0_RX,
269 .end = IRQ_UART0_RX + 1,
270 .flags = IORESOURCE_IRQ,
271 },
272 {
273 .start = IRQ_UART0_ERROR,
274 .end = IRQ_UART0_ERROR,
275 .flags = IORESOURCE_IRQ,
276 },
277 {
278 .start = CH_UART0_TX,
279 .end = CH_UART0_TX,
280 .flags = IORESOURCE_DMA,
281 },
282 {
283 .start = CH_UART0_RX,
284 .end = CH_UART0_RX,
285 .flags = IORESOURCE_DMA,
286 },
287};
288
289unsigned short bfin_uart0_peripherals[] = {
290 P_UART0_TX, P_UART0_RX, 0
266}; 291};
267 292
268static struct platform_device bfin_uart_device = { 293static struct platform_device bfin_uart0_device = {
269 .name = "bfin-uart", 294 .name = "bfin-uart",
270 .id = 1, 295 .id = 0,
271 .num_resources = ARRAY_SIZE(bfin_uart_resources), 296 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
272 .resource = bfin_uart_resources, 297 .resource = bfin_uart0_resources,
298 .dev = {
299 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
300 },
273}; 301};
274#endif 302#endif
303#endif
275 304
276#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 305#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
277#ifdef CONFIG_BFIN_SIR0 306#ifdef CONFIG_BFIN_SIR0
@@ -394,7 +423,9 @@ static struct platform_device *h8606_devices[] __initdata = {
394#endif 423#endif
395 424
396#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 425#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
397 &bfin_uart_device, 426#ifdef CONFIG_SERIAL_BFIN_UART0
427 &bfin_uart0_device,
428#endif
398#endif 429#endif
399 430
400#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE) 431#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
@@ -424,3 +455,18 @@ static int __init H8606_init(void)
424} 455}
425 456
426arch_initcall(H8606_init); 457arch_initcall(H8606_init);
458
459static struct platform_device *H8606_early_devices[] __initdata = {
460#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
461#ifdef CONFIG_SERIAL_BFIN_UART0
462 &bfin_uart0_device,
463#endif
464#endif
465};
466
467void __init native_machine_early_platform_add_devices(void)
468{
469 printk(KERN_INFO "register early platform devices\n");
470 early_platform_add_devices(H8606_early_devices,
471 ARRAY_SIZE(H8606_early_devices));
472}
diff --git a/arch/blackfin/mach-bf533/boards/blackstamp.c b/arch/blackfin/mach-bf533/boards/blackstamp.c
index b580884848d4..842b4fa76ea9 100644
--- a/arch/blackfin/mach-bf533/boards/blackstamp.c
+++ b/arch/blackfin/mach-bf533/boards/blackstamp.c
@@ -195,21 +195,50 @@ static struct platform_device bfin_spi0_device = {
195#endif /* spi master and devices */ 195#endif /* spi master and devices */
196 196
197#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 197#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
198static struct resource bfin_uart_resources[] = { 198#ifdef CONFIG_SERIAL_BFIN_UART0
199static struct resource bfin_uart0_resources[] = {
199 { 200 {
200 .start = 0xFFC00400, 201 .start = BFIN_UART_THR,
201 .end = 0xFFC004FF, 202 .end = BFIN_UART_GCTL+2,
202 .flags = IORESOURCE_MEM, 203 .flags = IORESOURCE_MEM,
203 }, 204 },
205 {
206 .start = IRQ_UART0_RX,
207 .end = IRQ_UART0_RX + 1,
208 .flags = IORESOURCE_IRQ,
209 },
210 {
211 .start = IRQ_UART0_ERROR,
212 .end = IRQ_UART0_ERROR,
213 .flags = IORESOURCE_IRQ,
214 },
215 {
216 .start = CH_UART0_TX,
217 .end = CH_UART0_TX,
218 .flags = IORESOURCE_DMA,
219 },
220 {
221 .start = CH_UART0_RX,
222 .end = CH_UART0_RX,
223 .flags = IORESOURCE_DMA,
224 },
225};
226
227unsigned short bfin_uart0_peripherals[] = {
228 P_UART0_TX, P_UART0_RX, 0
204}; 229};
205 230
206static struct platform_device bfin_uart_device = { 231static struct platform_device bfin_uart0_device = {
207 .name = "bfin-uart", 232 .name = "bfin-uart",
208 .id = 1, 233 .id = 0,
209 .num_resources = ARRAY_SIZE(bfin_uart_resources), 234 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
210 .resource = bfin_uart_resources, 235 .resource = bfin_uart0_resources,
236 .dev = {
237 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
238 },
211}; 239};
212#endif 240#endif
241#endif
213 242
214#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 243#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
215#ifdef CONFIG_BFIN_SIR0 244#ifdef CONFIG_BFIN_SIR0
@@ -241,16 +270,75 @@ static struct platform_device bfin_sir0_device = {
241#endif 270#endif
242 271
243#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 272#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
273#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
274static struct resource bfin_sport0_uart_resources[] = {
275 {
276 .start = SPORT0_TCR1,
277 .end = SPORT0_MRCS3+4,
278 .flags = IORESOURCE_MEM,
279 },
280 {
281 .start = IRQ_SPORT0_RX,
282 .end = IRQ_SPORT0_RX+1,
283 .flags = IORESOURCE_IRQ,
284 },
285 {
286 .start = IRQ_SPORT0_ERROR,
287 .end = IRQ_SPORT0_ERROR,
288 .flags = IORESOURCE_IRQ,
289 },
290};
291
292unsigned short bfin_sport0_peripherals[] = {
293 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
294 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
295};
296
244static struct platform_device bfin_sport0_uart_device = { 297static struct platform_device bfin_sport0_uart_device = {
245 .name = "bfin-sport-uart", 298 .name = "bfin-sport-uart",
246 .id = 0, 299 .id = 0,
300 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
301 .resource = bfin_sport0_uart_resources,
302 .dev = {
303 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
304 },
305};
306#endif
307#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
308static struct resource bfin_sport1_uart_resources[] = {
309 {
310 .start = SPORT1_TCR1,
311 .end = SPORT1_MRCS3+4,
312 .flags = IORESOURCE_MEM,
313 },
314 {
315 .start = IRQ_SPORT1_RX,
316 .end = IRQ_SPORT1_RX+1,
317 .flags = IORESOURCE_IRQ,
318 },
319 {
320 .start = IRQ_SPORT1_ERROR,
321 .end = IRQ_SPORT1_ERROR,
322 .flags = IORESOURCE_IRQ,
323 },
324};
325
326unsigned short bfin_sport1_peripherals[] = {
327 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
328 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
247}; 329};
248 330
249static struct platform_device bfin_sport1_uart_device = { 331static struct platform_device bfin_sport1_uart_device = {
250 .name = "bfin-sport-uart", 332 .name = "bfin-sport-uart",
251 .id = 1, 333 .id = 1,
334 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
335 .resource = bfin_sport1_uart_resources,
336 .dev = {
337 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
338 },
252}; 339};
253#endif 340#endif
341#endif
254 342
255#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 343#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
256#include <linux/input.h> 344#include <linux/input.h>
@@ -344,7 +432,9 @@ static struct platform_device *stamp_devices[] __initdata = {
344#endif 432#endif
345 433
346#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 434#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
347 &bfin_uart_device, 435#ifdef CONFIG_SERIAL_BFIN_UART0
436 &bfin_uart0_device,
437#endif
348#endif 438#endif
349 439
350#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 440#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
@@ -354,9 +444,13 @@ static struct platform_device *stamp_devices[] __initdata = {
354#endif 444#endif
355 445
356#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 446#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
447#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
357 &bfin_sport0_uart_device, 448 &bfin_sport0_uart_device,
449#endif
450#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
358 &bfin_sport1_uart_device, 451 &bfin_sport1_uart_device,
359#endif 452#endif
453#endif
360 454
361#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 455#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
362 &bfin_device_gpiokeys, 456 &bfin_device_gpiokeys,
@@ -392,3 +486,27 @@ static int __init blackstamp_init(void)
392} 486}
393 487
394arch_initcall(blackstamp_init); 488arch_initcall(blackstamp_init);
489
490static struct platform_device *stamp_early_devices[] __initdata = {
491#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
492#ifdef CONFIG_SERIAL_BFIN_UART0
493 &bfin_uart0_device,
494#endif
495#endif
496
497#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
498#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
499 &bfin_sport0_uart_device,
500#endif
501#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
502 &bfin_sport1_uart_device,
503#endif
504#endif
505};
506
507void __init native_machine_early_platform_add_devices(void)
508{
509 printk(KERN_INFO "register early platform devices\n");
510 early_platform_add_devices(stamp_early_devices,
511 ARRAY_SIZE(stamp_early_devices));
512}
diff --git a/arch/blackfin/mach-bf533/boards/cm_bf533.c b/arch/blackfin/mach-bf533/boards/cm_bf533.c
index 7fc3b860d4ae..fdcde61906dc 100644
--- a/arch/blackfin/mach-bf533/boards/cm_bf533.c
+++ b/arch/blackfin/mach-bf533/boards/cm_bf533.c
@@ -71,7 +71,7 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
71}; 71};
72#endif 72#endif
73 73
74#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) 74#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
75static struct bfin5xx_spi_chip ad1836_spi_chip_info = { 75static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
76 .enable_dma = 0, 76 .enable_dma = 0,
77 .bits_per_word = 16, 77 .bits_per_word = 16,
@@ -110,7 +110,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
110 }, 110 },
111#endif 111#endif
112 112
113#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) 113#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
114 { 114 {
115 .modalias = "ad1836", 115 .modalias = "ad1836",
116 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 116 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
@@ -242,21 +242,50 @@ static struct platform_device smsc911x_device = {
242#endif 242#endif
243 243
244#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 244#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
245static struct resource bfin_uart_resources[] = { 245#ifdef CONFIG_SERIAL_BFIN_UART0
246static struct resource bfin_uart0_resources[] = {
246 { 247 {
247 .start = 0xFFC00400, 248 .start = BFIN_UART_THR,
248 .end = 0xFFC004FF, 249 .end = BFIN_UART_GCTL+2,
249 .flags = IORESOURCE_MEM, 250 .flags = IORESOURCE_MEM,
250 }, 251 },
252 {
253 .start = IRQ_UART0_RX,
254 .end = IRQ_UART0_RX + 1,
255 .flags = IORESOURCE_IRQ,
256 },
257 {
258 .start = IRQ_UART0_ERROR,
259 .end = IRQ_UART0_ERROR,
260 .flags = IORESOURCE_IRQ,
261 },
262 {
263 .start = CH_UART0_TX,
264 .end = CH_UART0_TX,
265 .flags = IORESOURCE_DMA,
266 },
267 {
268 .start = CH_UART0_RX,
269 .end = CH_UART0_RX,
270 .flags = IORESOURCE_DMA,
271 },
272};
273
274unsigned short bfin_uart0_peripherals[] = {
275 P_UART0_TX, P_UART0_RX, 0
251}; 276};
252 277
253static struct platform_device bfin_uart_device = { 278static struct platform_device bfin_uart0_device = {
254 .name = "bfin-uart", 279 .name = "bfin-uart",
255 .id = 1, 280 .id = 0,
256 .num_resources = ARRAY_SIZE(bfin_uart_resources), 281 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
257 .resource = bfin_uart_resources, 282 .resource = bfin_uart0_resources,
283 .dev = {
284 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
285 },
258}; 286};
259#endif 287#endif
288#endif
260 289
261#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 290#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
262#ifdef CONFIG_BFIN_SIR0 291#ifdef CONFIG_BFIN_SIR0
@@ -288,16 +317,75 @@ static struct platform_device bfin_sir0_device = {
288#endif 317#endif
289 318
290#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 319#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
320#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
321static struct resource bfin_sport0_uart_resources[] = {
322 {
323 .start = SPORT0_TCR1,
324 .end = SPORT0_MRCS3+4,
325 .flags = IORESOURCE_MEM,
326 },
327 {
328 .start = IRQ_SPORT0_RX,
329 .end = IRQ_SPORT0_RX+1,
330 .flags = IORESOURCE_IRQ,
331 },
332 {
333 .start = IRQ_SPORT0_ERROR,
334 .end = IRQ_SPORT0_ERROR,
335 .flags = IORESOURCE_IRQ,
336 },
337};
338
339unsigned short bfin_sport0_peripherals[] = {
340 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
341 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
342};
343
291static struct platform_device bfin_sport0_uart_device = { 344static struct platform_device bfin_sport0_uart_device = {
292 .name = "bfin-sport-uart", 345 .name = "bfin-sport-uart",
293 .id = 0, 346 .id = 0,
347 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
348 .resource = bfin_sport0_uart_resources,
349 .dev = {
350 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
351 },
352};
353#endif
354#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
355static struct resource bfin_sport1_uart_resources[] = {
356 {
357 .start = SPORT1_TCR1,
358 .end = SPORT1_MRCS3+4,
359 .flags = IORESOURCE_MEM,
360 },
361 {
362 .start = IRQ_SPORT1_RX,
363 .end = IRQ_SPORT1_RX+1,
364 .flags = IORESOURCE_IRQ,
365 },
366 {
367 .start = IRQ_SPORT1_ERROR,
368 .end = IRQ_SPORT1_ERROR,
369 .flags = IORESOURCE_IRQ,
370 },
371};
372
373unsigned short bfin_sport1_peripherals[] = {
374 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
375 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
294}; 376};
295 377
296static struct platform_device bfin_sport1_uart_device = { 378static struct platform_device bfin_sport1_uart_device = {
297 .name = "bfin-sport-uart", 379 .name = "bfin-sport-uart",
298 .id = 1, 380 .id = 1,
381 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
382 .resource = bfin_sport1_uart_resources,
383 .dev = {
384 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
385 },
299}; 386};
300#endif 387#endif
388#endif
301 389
302#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 390#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
303static struct resource isp1362_hcd_resources[] = { 391static struct resource isp1362_hcd_resources[] = {
@@ -432,7 +520,9 @@ static struct platform_device *cm_bf533_devices[] __initdata = {
432 &bfin_dpmc, 520 &bfin_dpmc,
433 521
434#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 522#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
435 &bfin_uart_device, 523#ifdef CONFIG_SERIAL_BFIN_UART0
524 &bfin_uart0_device,
525#endif
436#endif 526#endif
437 527
438#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 528#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
@@ -442,9 +532,13 @@ static struct platform_device *cm_bf533_devices[] __initdata = {
442#endif 532#endif
443 533
444#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 534#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
535#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
445 &bfin_sport0_uart_device, 536 &bfin_sport0_uart_device,
537#endif
538#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
446 &bfin_sport1_uart_device, 539 &bfin_sport1_uart_device,
447#endif 540#endif
541#endif
448 542
449#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) 543#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
450 &rtc_device, 544 &rtc_device,
@@ -486,3 +580,27 @@ static int __init cm_bf533_init(void)
486} 580}
487 581
488arch_initcall(cm_bf533_init); 582arch_initcall(cm_bf533_init);
583
584static struct platform_device *cm_bf533_early_devices[] __initdata = {
585#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
586#ifdef CONFIG_SERIAL_BFIN_UART0
587 &bfin_uart0_device,
588#endif
589#endif
590
591#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
592#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
593 &bfin_sport0_uart_device,
594#endif
595#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
596 &bfin_sport1_uart_device,
597#endif
598#endif
599};
600
601void __init native_machine_early_platform_add_devices(void)
602{
603 printk(KERN_INFO "register early platform devices\n");
604 early_platform_add_devices(cm_bf533_early_devices,
605 ARRAY_SIZE(cm_bf533_early_devices));
606}
diff --git a/arch/blackfin/mach-bf533/boards/ezkit.c b/arch/blackfin/mach-bf533/boards/ezkit.c
index d4689dcc198e..739773cb7fc6 100644
--- a/arch/blackfin/mach-bf533/boards/ezkit.c
+++ b/arch/blackfin/mach-bf533/boards/ezkit.c
@@ -222,7 +222,7 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
222}; 222};
223#endif 223#endif
224 224
225#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) 225#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
226static struct bfin5xx_spi_chip ad1836_spi_chip_info = { 226static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
227 .enable_dma = 0, 227 .enable_dma = 0,
228 .bits_per_word = 16, 228 .bits_per_word = 16,
@@ -261,7 +261,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
261 }, 261 },
262#endif 262#endif
263 263
264#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) 264#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
265 { 265 {
266 .modalias = "ad1836", 266 .modalias = "ad1836",
267 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 267 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
@@ -320,21 +320,50 @@ static struct platform_device bfin_spi0_device = {
320#endif /* spi master and devices */ 320#endif /* spi master and devices */
321 321
322#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 322#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
323static struct resource bfin_uart_resources[] = { 323#ifdef CONFIG_SERIAL_BFIN_UART0
324static struct resource bfin_uart0_resources[] = {
324 { 325 {
325 .start = 0xFFC00400, 326 .start = BFIN_UART_THR,
326 .end = 0xFFC004FF, 327 .end = BFIN_UART_GCTL+2,
327 .flags = IORESOURCE_MEM, 328 .flags = IORESOURCE_MEM,
328 }, 329 },
330 {
331 .start = IRQ_UART0_RX,
332 .end = IRQ_UART0_RX + 1,
333 .flags = IORESOURCE_IRQ,
334 },
335 {
336 .start = IRQ_UART0_ERROR,
337 .end = IRQ_UART0_ERROR,
338 .flags = IORESOURCE_IRQ,
339 },
340 {
341 .start = CH_UART0_TX,
342 .end = CH_UART0_TX,
343 .flags = IORESOURCE_DMA,
344 },
345 {
346 .start = CH_UART0_RX,
347 .end = CH_UART0_RX,
348 .flags = IORESOURCE_DMA,
349 },
350};
351
352unsigned short bfin_uart0_peripherals[] = {
353 P_UART0_TX, P_UART0_RX, 0
329}; 354};
330 355
331static struct platform_device bfin_uart_device = { 356static struct platform_device bfin_uart0_device = {
332 .name = "bfin-uart", 357 .name = "bfin-uart",
333 .id = 1, 358 .id = 0,
334 .num_resources = ARRAY_SIZE(bfin_uart_resources), 359 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
335 .resource = bfin_uart_resources, 360 .resource = bfin_uart0_resources,
361 .dev = {
362 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
363 },
336}; 364};
337#endif 365#endif
366#endif
338 367
339#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 368#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
340#ifdef CONFIG_BFIN_SIR0 369#ifdef CONFIG_BFIN_SIR0
@@ -444,6 +473,30 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
444#endif 473#endif
445}; 474};
446 475
476#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
477static struct platform_device bfin_i2s = {
478 .name = "bfin-i2s",
479 .id = CONFIG_SND_BF5XX_SPORT_NUM,
480 /* TODO: add platform data here */
481};
482#endif
483
484#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
485static struct platform_device bfin_tdm = {
486 .name = "bfin-tdm",
487 .id = CONFIG_SND_BF5XX_SPORT_NUM,
488 /* TODO: add platform data here */
489};
490#endif
491
492#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
493static struct platform_device bfin_ac97 = {
494 .name = "bfin-ac97",
495 .id = CONFIG_SND_BF5XX_SPORT_NUM,
496 /* TODO: add platform data here */
497};
498#endif
499
447static struct platform_device *ezkit_devices[] __initdata = { 500static struct platform_device *ezkit_devices[] __initdata = {
448 501
449 &bfin_dpmc, 502 &bfin_dpmc,
@@ -471,7 +524,9 @@ static struct platform_device *ezkit_devices[] __initdata = {
471#endif 524#endif
472 525
473#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 526#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
474 &bfin_uart_device, 527#ifdef CONFIG_SERIAL_BFIN_UART0
528 &bfin_uart0_device,
529#endif
475#endif 530#endif
476 531
477#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 532#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
@@ -487,6 +542,18 @@ static struct platform_device *ezkit_devices[] __initdata = {
487#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE) 542#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
488 &i2c_gpio_device, 543 &i2c_gpio_device,
489#endif 544#endif
545
546#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
547 &bfin_i2s,
548#endif
549
550#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
551 &bfin_tdm,
552#endif
553
554#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
555 &bfin_ac97,
556#endif
490}; 557};
491 558
492static int __init ezkit_init(void) 559static int __init ezkit_init(void)
@@ -500,3 +567,18 @@ static int __init ezkit_init(void)
500} 567}
501 568
502arch_initcall(ezkit_init); 569arch_initcall(ezkit_init);
570
571static struct platform_device *ezkit_early_devices[] __initdata = {
572#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
573#ifdef CONFIG_SERIAL_BFIN_UART0
574 &bfin_uart0_device,
575#endif
576#endif
577};
578
579void __init native_machine_early_platform_add_devices(void)
580{
581 printk(KERN_INFO "register early platform devices\n");
582 early_platform_add_devices(ezkit_early_devices,
583 ARRAY_SIZE(ezkit_early_devices));
584}
diff --git a/arch/blackfin/mach-bf533/boards/ip0x.c b/arch/blackfin/mach-bf533/boards/ip0x.c
index 8ec42ba35b9e..7349970db978 100644
--- a/arch/blackfin/mach-bf533/boards/ip0x.c
+++ b/arch/blackfin/mach-bf533/boards/ip0x.c
@@ -19,6 +19,7 @@
19#include <linux/usb/isp1362.h> 19#include <linux/usb/isp1362.h>
20#endif 20#endif
21#include <asm/irq.h> 21#include <asm/irq.h>
22#include <asm/dma.h>
22#include <asm/bfin5xx_spi.h> 23#include <asm/bfin5xx_spi.h>
23#include <asm/portmux.h> 24#include <asm/portmux.h>
24 25
@@ -143,21 +144,50 @@ static struct platform_device spi_bfin_master_device = {
143#endif /* spi master and devices */ 144#endif /* spi master and devices */
144 145
145#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 146#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
146static struct resource bfin_uart_resources[] = { 147#ifdef CONFIG_SERIAL_BFIN_UART0
148static struct resource bfin_uart0_resources[] = {
147 { 149 {
148 .start = 0xFFC00400, 150 .start = BFIN_UART_THR,
149 .end = 0xFFC004FF, 151 .end = BFIN_UART_GCTL+2,
150 .flags = IORESOURCE_MEM, 152 .flags = IORESOURCE_MEM,
151 }, 153 },
154 {
155 .start = IRQ_UART0_RX,
156 .end = IRQ_UART0_RX + 1,
157 .flags = IORESOURCE_IRQ,
158 },
159 {
160 .start = IRQ_UART0_ERROR,
161 .end = IRQ_UART0_ERROR,
162 .flags = IORESOURCE_IRQ,
163 },
164 {
165 .start = CH_UART0_TX,
166 .end = CH_UART0_TX,
167 .flags = IORESOURCE_DMA,
168 },
169 {
170 .start = CH_UART0_RX,
171 .end = CH_UART0_RX,
172 .flags = IORESOURCE_DMA,
173 },
174};
175
176unsigned short bfin_uart0_peripherals[] = {
177 P_UART0_TX, P_UART0_RX, 0
152}; 178};
153 179
154static struct platform_device bfin_uart_device = { 180static struct platform_device bfin_uart0_device = {
155 .name = "bfin-uart", 181 .name = "bfin-uart",
156 .id = 1, 182 .id = 0,
157 .num_resources = ARRAY_SIZE(bfin_uart_resources), 183 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
158 .resource = bfin_uart_resources, 184 .resource = bfin_uart0_resources,
185 .dev = {
186 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
187 },
159}; 188};
160#endif 189#endif
190#endif
161 191
162#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 192#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
163#ifdef CONFIG_BFIN_SIR0 193#ifdef CONFIG_BFIN_SIR0
@@ -241,7 +271,9 @@ static struct platform_device *ip0x_devices[] __initdata = {
241#endif 271#endif
242 272
243#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 273#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
244 &bfin_uart_device, 274#ifdef CONFIG_SERIAL_BFIN_UART0
275 &bfin_uart0_device,
276#endif
245#endif 277#endif
246 278
247#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 279#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
@@ -276,3 +308,18 @@ static int __init ip0x_init(void)
276} 308}
277 309
278arch_initcall(ip0x_init); 310arch_initcall(ip0x_init);
311
312static struct platform_device *ip0x_early_devices[] __initdata = {
313#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
314#ifdef CONFIG_SERIAL_BFIN_UART0
315 &bfin_uart0_device,
316#endif
317#endif
318};
319
320void __init native_machine_early_platform_add_devices(void)
321{
322 printk(KERN_INFO "register early platform devices\n");
323 early_platform_add_devices(ip0x_early_devices,
324 ARRAY_SIZE(ip0x_early_devices));
325}
diff --git a/arch/blackfin/mach-bf533/boards/stamp.c b/arch/blackfin/mach-bf533/boards/stamp.c
index 6d68dcfa2da2..c457eaa60239 100644
--- a/arch/blackfin/mach-bf533/boards/stamp.c
+++ b/arch/blackfin/mach-bf533/boards/stamp.c
@@ -184,7 +184,7 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
184}; 184};
185#endif 185#endif
186 186
187#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) 187#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
188static struct bfin5xx_spi_chip ad1836_spi_chip_info = { 188static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
189 .enable_dma = 0, 189 .enable_dma = 0,
190 .bits_per_word = 16, 190 .bits_per_word = 16,
@@ -251,7 +251,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
251 }, 251 },
252#endif 252#endif
253 253
254#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) 254#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
255 { 255 {
256 .modalias = "ad1836", 256 .modalias = "ad1836",
257 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 257 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
@@ -322,21 +322,50 @@ static struct platform_device bfin_spi0_device = {
322#endif /* spi master and devices */ 322#endif /* spi master and devices */
323 323
324#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 324#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
325static struct resource bfin_uart_resources[] = { 325#ifdef CONFIG_SERIAL_BFIN_UART0
326static struct resource bfin_uart0_resources[] = {
326 { 327 {
327 .start = 0xFFC00400, 328 .start = BFIN_UART_THR,
328 .end = 0xFFC004FF, 329 .end = BFIN_UART_GCTL+2,
329 .flags = IORESOURCE_MEM, 330 .flags = IORESOURCE_MEM,
330 }, 331 },
332 {
333 .start = IRQ_UART0_RX,
334 .end = IRQ_UART0_RX + 1,
335 .flags = IORESOURCE_IRQ,
336 },
337 {
338 .start = IRQ_UART0_ERROR,
339 .end = IRQ_UART0_ERROR,
340 .flags = IORESOURCE_IRQ,
341 },
342 {
343 .start = CH_UART0_TX,
344 .end = CH_UART0_TX,
345 .flags = IORESOURCE_DMA,
346 },
347 {
348 .start = CH_UART0_RX,
349 .end = CH_UART0_RX,
350 .flags = IORESOURCE_DMA,
351 },
331}; 352};
332 353
333static struct platform_device bfin_uart_device = { 354unsigned short bfin_uart0_peripherals[] = {
355 P_UART0_TX, P_UART0_RX, 0
356};
357
358static struct platform_device bfin_uart0_device = {
334 .name = "bfin-uart", 359 .name = "bfin-uart",
335 .id = 1, 360 .id = 0,
336 .num_resources = ARRAY_SIZE(bfin_uart_resources), 361 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
337 .resource = bfin_uart_resources, 362 .resource = bfin_uart0_resources,
363 .dev = {
364 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
365 },
338}; 366};
339#endif 367#endif
368#endif
340 369
341#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 370#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
342#ifdef CONFIG_BFIN_SIR0 371#ifdef CONFIG_BFIN_SIR0
@@ -368,16 +397,75 @@ static struct platform_device bfin_sir0_device = {
368#endif 397#endif
369 398
370#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 399#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
400#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
401static struct resource bfin_sport0_uart_resources[] = {
402 {
403 .start = SPORT0_TCR1,
404 .end = SPORT0_MRCS3+4,
405 .flags = IORESOURCE_MEM,
406 },
407 {
408 .start = IRQ_SPORT0_RX,
409 .end = IRQ_SPORT0_RX+1,
410 .flags = IORESOURCE_IRQ,
411 },
412 {
413 .start = IRQ_SPORT0_ERROR,
414 .end = IRQ_SPORT0_ERROR,
415 .flags = IORESOURCE_IRQ,
416 },
417};
418
419unsigned short bfin_sport0_peripherals[] = {
420 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
421 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
422};
423
371static struct platform_device bfin_sport0_uart_device = { 424static struct platform_device bfin_sport0_uart_device = {
372 .name = "bfin-sport-uart", 425 .name = "bfin-sport-uart",
373 .id = 0, 426 .id = 0,
427 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
428 .resource = bfin_sport0_uart_resources,
429 .dev = {
430 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
431 },
432};
433#endif
434#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
435static struct resource bfin_sport1_uart_resources[] = {
436 {
437 .start = SPORT1_TCR1,
438 .end = SPORT1_MRCS3+4,
439 .flags = IORESOURCE_MEM,
440 },
441 {
442 .start = IRQ_SPORT1_RX,
443 .end = IRQ_SPORT1_RX+1,
444 .flags = IORESOURCE_IRQ,
445 },
446 {
447 .start = IRQ_SPORT1_ERROR,
448 .end = IRQ_SPORT1_ERROR,
449 .flags = IORESOURCE_IRQ,
450 },
451};
452
453unsigned short bfin_sport1_peripherals[] = {
454 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
455 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
374}; 456};
375 457
376static struct platform_device bfin_sport1_uart_device = { 458static struct platform_device bfin_sport1_uart_device = {
377 .name = "bfin-sport-uart", 459 .name = "bfin-sport-uart",
378 .id = 1, 460 .id = 1,
461 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
462 .resource = bfin_sport1_uart_resources,
463 .dev = {
464 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
465 },
379}; 466};
380#endif 467#endif
468#endif
381 469
382#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 470#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
383#include <linux/input.h> 471#include <linux/input.h>
@@ -474,6 +562,30 @@ static struct platform_device bfin_dpmc = {
474 }, 562 },
475}; 563};
476 564
565#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
566static struct platform_device bfin_i2s = {
567 .name = "bfin-i2s",
568 .id = CONFIG_SND_BF5XX_SPORT_NUM,
569 /* TODO: add platform data here */
570};
571#endif
572
573#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
574static struct platform_device bfin_tdm = {
575 .name = "bfin-tdm",
576 .id = CONFIG_SND_BF5XX_SPORT_NUM,
577 /* TODO: add platform data here */
578};
579#endif
580
581#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
582static struct platform_device bfin_ac97 = {
583 .name = "bfin-ac97",
584 .id = CONFIG_SND_BF5XX_SPORT_NUM,
585 /* TODO: add platform data here */
586};
587#endif
588
477static struct platform_device *stamp_devices[] __initdata = { 589static struct platform_device *stamp_devices[] __initdata = {
478 590
479 &bfin_dpmc, 591 &bfin_dpmc,
@@ -495,7 +607,9 @@ static struct platform_device *stamp_devices[] __initdata = {
495#endif 607#endif
496 608
497#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 609#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
498 &bfin_uart_device, 610#ifdef CONFIG_SERIAL_BFIN_UART0
611 &bfin_uart0_device,
612#endif
499#endif 613#endif
500 614
501#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 615#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
@@ -505,9 +619,13 @@ static struct platform_device *stamp_devices[] __initdata = {
505#endif 619#endif
506 620
507#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 621#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
622#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
508 &bfin_sport0_uart_device, 623 &bfin_sport0_uart_device,
624#endif
625#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
509 &bfin_sport1_uart_device, 626 &bfin_sport1_uart_device,
510#endif 627#endif
628#endif
511 629
512#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 630#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
513 &bfin_device_gpiokeys, 631 &bfin_device_gpiokeys,
@@ -520,6 +638,18 @@ static struct platform_device *stamp_devices[] __initdata = {
520#if defined(CONFIG_MTD_BFIN_ASYNC) || defined(CONFIG_MTD_BFIN_ASYNC_MODULE) 638#if defined(CONFIG_MTD_BFIN_ASYNC) || defined(CONFIG_MTD_BFIN_ASYNC_MODULE)
521 &stamp_flash_device, 639 &stamp_flash_device,
522#endif 640#endif
641
642#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
643 &bfin_i2s,
644#endif
645
646#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
647 &bfin_tdm,
648#endif
649
650#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
651 &bfin_ac97,
652#endif
523}; 653};
524 654
525static int __init stamp_init(void) 655static int __init stamp_init(void)
@@ -548,6 +678,30 @@ static int __init stamp_init(void)
548 678
549arch_initcall(stamp_init); 679arch_initcall(stamp_init);
550 680
681static struct platform_device *stamp_early_devices[] __initdata = {
682#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
683#ifdef CONFIG_SERIAL_BFIN_UART0
684 &bfin_uart0_device,
685#endif
686#endif
687
688#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
689#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
690 &bfin_sport0_uart_device,
691#endif
692#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
693 &bfin_sport1_uart_device,
694#endif
695#endif
696};
697
698void __init native_machine_early_platform_add_devices(void)
699{
700 printk(KERN_INFO "register early platform devices\n");
701 early_platform_add_devices(stamp_early_devices,
702 ARRAY_SIZE(stamp_early_devices));
703}
704
551void native_machine_restart(char *cmd) 705void native_machine_restart(char *cmd)
552{ 706{
553 /* workaround pull up on cpld / flash pin not being strong enough */ 707 /* workaround pull up on cpld / flash pin not being strong enough */
diff --git a/arch/blackfin/mach-bf533/include/mach/irq.h b/arch/blackfin/mach-bf533/include/mach/irq.h
index c31498be0bbb..1f7e9765d954 100644
--- a/arch/blackfin/mach-bf533/include/mach/irq.h
+++ b/arch/blackfin/mach-bf533/include/mach/irq.h
@@ -104,7 +104,8 @@ Core Emulation **
104 104
105#define GPIO_IRQ_BASE IRQ_PF0 105#define GPIO_IRQ_BASE IRQ_PF0
106 106
107#define NR_IRQS (IRQ_PF15+1) 107#define NR_MACH_IRQS (IRQ_PF15 + 1)
108#define NR_IRQS (NR_MACH_IRQS + NR_SPARE_IRQS)
108 109
109#define IVG7 7 110#define IVG7 7
110#define IVG8 8 111#define IVG8 8
diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537e.c b/arch/blackfin/mach-bf537/boards/cm_bf537e.c
index c85f4d770535..d35fc5fe4c2b 100644
--- a/arch/blackfin/mach-bf537/boards/cm_bf537e.c
+++ b/arch/blackfin/mach-bf537/boards/cm_bf537e.c
@@ -73,7 +73,7 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
73}; 73};
74#endif 74#endif
75 75
76#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) 76#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
77static struct bfin5xx_spi_chip ad1836_spi_chip_info = { 77static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
78 .enable_dma = 0, 78 .enable_dma = 0,
79 .bits_per_word = 16, 79 .bits_per_word = 16,
@@ -112,7 +112,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
112 }, 112 },
113#endif 113#endif
114 114
115#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) 115#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
116 { 116 {
117 .modalias = "ad1836", 117 .modalias = "ad1836",
118 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 118 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
@@ -329,8 +329,8 @@ static struct platform_device cm_flash_device = {
329#ifdef CONFIG_SERIAL_BFIN_UART0 329#ifdef CONFIG_SERIAL_BFIN_UART0
330static struct resource bfin_uart0_resources[] = { 330static struct resource bfin_uart0_resources[] = {
331 { 331 {
332 .start = 0xFFC00400, 332 .start = UART0_THR,
333 .end = 0xFFC004FF, 333 .end = UART0_GCTL+2,
334 .flags = IORESOURCE_MEM, 334 .flags = IORESOURCE_MEM,
335 }, 335 },
336 { 336 {
@@ -373,18 +373,25 @@ static struct resource bfin_uart0_resources[] = {
373#endif 373#endif
374}; 374};
375 375
376unsigned short bfin_uart0_peripherals[] = {
377 P_UART0_TX, P_UART0_RX, 0
378};
379
376static struct platform_device bfin_uart0_device = { 380static struct platform_device bfin_uart0_device = {
377 .name = "bfin-uart", 381 .name = "bfin-uart",
378 .id = 0, 382 .id = 0,
379 .num_resources = ARRAY_SIZE(bfin_uart0_resources), 383 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
380 .resource = bfin_uart0_resources, 384 .resource = bfin_uart0_resources,
385 .dev = {
386 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
387 },
381}; 388};
382#endif 389#endif
383#ifdef CONFIG_SERIAL_BFIN_UART1 390#ifdef CONFIG_SERIAL_BFIN_UART1
384static struct resource bfin_uart1_resources[] = { 391static struct resource bfin_uart1_resources[] = {
385 { 392 {
386 .start = 0xFFC02000, 393 .start = UART1_THR,
387 .end = 0xFFC020FF, 394 .end = UART1_GCTL+2,
388 .flags = IORESOURCE_MEM, 395 .flags = IORESOURCE_MEM,
389 }, 396 },
390 { 397 {
@@ -427,11 +434,18 @@ static struct resource bfin_uart1_resources[] = {
427#endif 434#endif
428}; 435};
429 436
437unsigned short bfin_uart1_peripherals[] = {
438 P_UART1_TX, P_UART1_RX, 0
439};
440
430static struct platform_device bfin_uart1_device = { 441static struct platform_device bfin_uart1_device = {
431 .name = "bfin-uart", 442 .name = "bfin-uart",
432 .id = 1, 443 .id = 1,
433 .num_resources = ARRAY_SIZE(bfin_uart1_resources), 444 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
434 .resource = bfin_uart1_resources, 445 .resource = bfin_uart1_resources,
446 .dev = {
447 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
448 },
435}; 449};
436#endif 450#endif
437#endif 451#endif
@@ -512,16 +526,75 @@ static struct platform_device i2c_bfin_twi_device = {
512#endif 526#endif
513 527
514#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 528#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
529#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
530static struct resource bfin_sport0_uart_resources[] = {
531 {
532 .start = SPORT0_TCR1,
533 .end = SPORT0_MRCS3+4,
534 .flags = IORESOURCE_MEM,
535 },
536 {
537 .start = IRQ_SPORT0_RX,
538 .end = IRQ_SPORT0_RX+1,
539 .flags = IORESOURCE_IRQ,
540 },
541 {
542 .start = IRQ_SPORT0_ERROR,
543 .end = IRQ_SPORT0_ERROR,
544 .flags = IORESOURCE_IRQ,
545 },
546};
547
548unsigned short bfin_sport0_peripherals[] = {
549 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
550 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
551};
552
515static struct platform_device bfin_sport0_uart_device = { 553static struct platform_device bfin_sport0_uart_device = {
516 .name = "bfin-sport-uart", 554 .name = "bfin-sport-uart",
517 .id = 0, 555 .id = 0,
556 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
557 .resource = bfin_sport0_uart_resources,
558 .dev = {
559 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
560 },
561};
562#endif
563#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
564static struct resource bfin_sport1_uart_resources[] = {
565 {
566 .start = SPORT1_TCR1,
567 .end = SPORT1_MRCS3+4,
568 .flags = IORESOURCE_MEM,
569 },
570 {
571 .start = IRQ_SPORT1_RX,
572 .end = IRQ_SPORT1_RX+1,
573 .flags = IORESOURCE_IRQ,
574 },
575 {
576 .start = IRQ_SPORT1_ERROR,
577 .end = IRQ_SPORT1_ERROR,
578 .flags = IORESOURCE_IRQ,
579 },
580};
581
582unsigned short bfin_sport1_peripherals[] = {
583 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
584 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
518}; 585};
519 586
520static struct platform_device bfin_sport1_uart_device = { 587static struct platform_device bfin_sport1_uart_device = {
521 .name = "bfin-sport-uart", 588 .name = "bfin-sport-uart",
522 .id = 1, 589 .id = 1,
590 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
591 .resource = bfin_sport1_uart_resources,
592 .dev = {
593 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
594 },
523}; 595};
524#endif 596#endif
597#endif
525 598
526#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) 599#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
527static struct platform_device bfin_mii_bus = { 600static struct platform_device bfin_mii_bus = {
@@ -633,9 +706,13 @@ static struct platform_device *cm_bf537e_devices[] __initdata = {
633#endif 706#endif
634 707
635#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 708#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
709#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
636 &bfin_sport0_uart_device, 710 &bfin_sport0_uart_device,
711#endif
712#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
637 &bfin_sport1_uart_device, 713 &bfin_sport1_uart_device,
638#endif 714#endif
715#endif
639 716
640#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 717#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
641 &isp1362_hcd_device, 718 &isp1362_hcd_device,
@@ -683,6 +760,33 @@ static int __init cm_bf537e_init(void)
683 760
684arch_initcall(cm_bf537e_init); 761arch_initcall(cm_bf537e_init);
685 762
763static struct platform_device *cm_bf537e_early_devices[] __initdata = {
764#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
765#ifdef CONFIG_SERIAL_BFIN_UART0
766 &bfin_uart0_device,
767#endif
768#ifdef CONFIG_SERIAL_BFIN_UART1
769 &bfin_uart1_device,
770#endif
771#endif
772
773#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
774#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
775 &bfin_sport0_uart_device,
776#endif
777#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
778 &bfin_sport1_uart_device,
779#endif
780#endif
781};
782
783void __init native_machine_early_platform_add_devices(void)
784{
785 printk(KERN_INFO "register early platform devices\n");
786 early_platform_add_devices(cm_bf537e_early_devices,
787 ARRAY_SIZE(cm_bf537e_early_devices));
788}
789
686void bfin_get_ether_addr(char *addr) 790void bfin_get_ether_addr(char *addr)
687{ 791{
688 random_ether_addr(addr); 792 random_ether_addr(addr);
diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537u.c b/arch/blackfin/mach-bf537/boards/cm_bf537u.c
index ea11aa81340d..d464ad5b72b2 100644
--- a/arch/blackfin/mach-bf537/boards/cm_bf537u.c
+++ b/arch/blackfin/mach-bf537/boards/cm_bf537u.c
@@ -74,7 +74,7 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
74}; 74};
75#endif 75#endif
76 76
77#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) 77#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
78static struct bfin5xx_spi_chip ad1836_spi_chip_info = { 78static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
79 .enable_dma = 0, 79 .enable_dma = 0,
80 .bits_per_word = 16, 80 .bits_per_word = 16,
@@ -113,7 +113,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
113 }, 113 },
114#endif 114#endif
115 115
116#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) 116#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
117 { 117 {
118 .modalias = "ad1836", 118 .modalias = "ad1836",
119 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 119 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
@@ -327,25 +327,93 @@ static struct platform_device cm_flash_device = {
327#endif 327#endif
328 328
329#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 329#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
330static struct resource bfin_uart_resources[] = { 330#ifdef CONFIG_SERIAL_BFIN_UART0
331static struct resource bfin_uart0_resources[] = {
331 { 332 {
332 .start = 0xFFC00400, 333 .start = UART0_THR,
333 .end = 0xFFC004FF, 334 .end = UART0_GCTL+2,
334 .flags = IORESOURCE_MEM, 335 .flags = IORESOURCE_MEM,
335 }, { 336 },
336 .start = 0xFFC02000, 337 {
337 .end = 0xFFC020FF, 338 .start = IRQ_UART0_RX,
339 .end = IRQ_UART0_RX+1,
340 .flags = IORESOURCE_IRQ,
341 },
342 {
343 .start = IRQ_UART0_ERROR,
344 .end = IRQ_UART0_ERROR,
345 .flags = IORESOURCE_IRQ,
346 },
347 {
348 .start = CH_UART0_TX,
349 .end = CH_UART0_TX,
350 .flags = IORESOURCE_DMA,
351 },
352 {
353 .start = CH_UART0_RX,
354 .end = CH_UART0_RX,
355 .flags = IORESOURCE_DMA,
356 },
357};
358
359unsigned short bfin_uart0_peripherals[] = {
360 P_UART0_TX, P_UART0_RX, 0
361};
362
363static struct platform_device bfin_uart0_device = {
364 .name = "bfin-uart",
365 .id = 0,
366 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
367 .resource = bfin_uart0_resources,
368 .dev = {
369 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
370 },
371};
372#endif
373#ifdef CONFIG_SERIAL_BFIN_UART1
374static struct resource bfin_uart1_resources[] = {
375 {
376 .start = UART1_THR,
377 .end = UART1_GCTL+2,
338 .flags = IORESOURCE_MEM, 378 .flags = IORESOURCE_MEM,
339 }, 379 },
380 {
381 .start = IRQ_UART1_RX,
382 .end = IRQ_UART1_RX+1,
383 .flags = IORESOURCE_IRQ,
384 },
385 {
386 .start = IRQ_UART1_ERROR,
387 .end = IRQ_UART1_ERROR,
388 .flags = IORESOURCE_IRQ,
389 },
390 {
391 .start = CH_UART1_TX,
392 .end = CH_UART1_TX,
393 .flags = IORESOURCE_DMA,
394 },
395 {
396 .start = CH_UART1_RX,
397 .end = CH_UART1_RX,
398 .flags = IORESOURCE_DMA,
399 },
400};
401
402unsigned short bfin_uart1_peripherals[] = {
403 P_UART1_TX, P_UART1_RX, 0
340}; 404};
341 405
342static struct platform_device bfin_uart_device = { 406static struct platform_device bfin_uart1_device = {
343 .name = "bfin-uart", 407 .name = "bfin-uart",
344 .id = 1, 408 .id = 1,
345 .num_resources = ARRAY_SIZE(bfin_uart_resources), 409 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
346 .resource = bfin_uart_resources, 410 .resource = bfin_uart1_resources,
411 .dev = {
412 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
413 },
347}; 414};
348#endif 415#endif
416#endif
349 417
350#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 418#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
351#ifdef CONFIG_BFIN_SIR0 419#ifdef CONFIG_BFIN_SIR0
@@ -423,16 +491,75 @@ static struct platform_device i2c_bfin_twi_device = {
423#endif 491#endif
424 492
425#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 493#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
494#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
495static struct resource bfin_sport0_uart_resources[] = {
496 {
497 .start = SPORT0_TCR1,
498 .end = SPORT0_MRCS3+4,
499 .flags = IORESOURCE_MEM,
500 },
501 {
502 .start = IRQ_SPORT0_RX,
503 .end = IRQ_SPORT0_RX+1,
504 .flags = IORESOURCE_IRQ,
505 },
506 {
507 .start = IRQ_SPORT0_ERROR,
508 .end = IRQ_SPORT0_ERROR,
509 .flags = IORESOURCE_IRQ,
510 },
511};
512
513unsigned short bfin_sport0_peripherals[] = {
514 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
515 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
516};
517
426static struct platform_device bfin_sport0_uart_device = { 518static struct platform_device bfin_sport0_uart_device = {
427 .name = "bfin-sport-uart", 519 .name = "bfin-sport-uart",
428 .id = 0, 520 .id = 0,
521 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
522 .resource = bfin_sport0_uart_resources,
523 .dev = {
524 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
525 },
526};
527#endif
528#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
529static struct resource bfin_sport1_uart_resources[] = {
530 {
531 .start = SPORT1_TCR1,
532 .end = SPORT1_MRCS3+4,
533 .flags = IORESOURCE_MEM,
534 },
535 {
536 .start = IRQ_SPORT1_RX,
537 .end = IRQ_SPORT1_RX+1,
538 .flags = IORESOURCE_IRQ,
539 },
540 {
541 .start = IRQ_SPORT1_ERROR,
542 .end = IRQ_SPORT1_ERROR,
543 .flags = IORESOURCE_IRQ,
544 },
545};
546
547unsigned short bfin_sport1_peripherals[] = {
548 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
549 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
429}; 550};
430 551
431static struct platform_device bfin_sport1_uart_device = { 552static struct platform_device bfin_sport1_uart_device = {
432 .name = "bfin-sport-uart", 553 .name = "bfin-sport-uart",
433 .id = 1, 554 .id = 1,
555 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
556 .resource = bfin_sport1_uart_resources,
557 .dev = {
558 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
559 },
434}; 560};
435#endif 561#endif
562#endif
436 563
437#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) 564#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
438static struct platform_device bfin_mii_bus = { 565static struct platform_device bfin_mii_bus = {
@@ -522,7 +649,12 @@ static struct platform_device *cm_bf537u_devices[] __initdata = {
522#endif 649#endif
523 650
524#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 651#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
525 &bfin_uart_device, 652#ifdef CONFIG_SERIAL_BFIN_UART0
653 &bfin_uart0_device,
654#endif
655#ifdef CONFIG_SERIAL_BFIN_UART1
656 &bfin_uart1_device,
657#endif
526#endif 658#endif
527 659
528#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 660#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
@@ -539,9 +671,13 @@ static struct platform_device *cm_bf537u_devices[] __initdata = {
539#endif 671#endif
540 672
541#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 673#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
674#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
542 &bfin_sport0_uart_device, 675 &bfin_sport0_uart_device,
676#endif
677#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
543 &bfin_sport1_uart_device, 678 &bfin_sport1_uart_device,
544#endif 679#endif
680#endif
545 681
546#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 682#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
547 &isp1362_hcd_device, 683 &isp1362_hcd_device,
@@ -589,6 +725,33 @@ static int __init cm_bf537u_init(void)
589 725
590arch_initcall(cm_bf537u_init); 726arch_initcall(cm_bf537u_init);
591 727
728static struct platform_device *cm_bf537u_early_devices[] __initdata = {
729#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
730#ifdef CONFIG_SERIAL_BFIN_UART0
731 &bfin_uart0_device,
732#endif
733#ifdef CONFIG_SERIAL_BFIN_UART1
734 &bfin_uart1_device,
735#endif
736#endif
737
738#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
739#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
740 &bfin_sport0_uart_device,
741#endif
742#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
743 &bfin_sport1_uart_device,
744#endif
745#endif
746};
747
748void __init native_machine_early_platform_add_devices(void)
749{
750 printk(KERN_INFO "register early platform devices\n");
751 early_platform_add_devices(cm_bf537u_early_devices,
752 ARRAY_SIZE(cm_bf537u_early_devices));
753}
754
592void bfin_get_ether_addr(char *addr) 755void bfin_get_ether_addr(char *addr)
593{ 756{
594 random_ether_addr(addr); 757 random_ether_addr(addr);
diff --git a/arch/blackfin/mach-bf537/boards/minotaur.c b/arch/blackfin/mach-bf537/boards/minotaur.c
index 0da927252701..05d45994480e 100644
--- a/arch/blackfin/mach-bf537/boards/minotaur.c
+++ b/arch/blackfin/mach-bf537/boards/minotaur.c
@@ -23,12 +23,13 @@
23#include <asm/dma.h> 23#include <asm/dma.h>
24#include <asm/bfin5xx_spi.h> 24#include <asm/bfin5xx_spi.h>
25#include <asm/reboot.h> 25#include <asm/reboot.h>
26#include <asm/portmux.h>
26#include <linux/spi/ad7877.h> 27#include <linux/spi/ad7877.h>
27 28
28/* 29/*
29 * Name the Board for the /proc/cpuinfo 30 * Name the Board for the /proc/cpuinfo
30 */ 31 */
31char *bfin_board_name = "CamSig Minotaur BF537"; 32const char bfin_board_name[] = "CamSig Minotaur BF537";
32 33
33#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) 34#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
34static struct resource bfin_pcmcia_cf_resources[] = { 35static struct resource bfin_pcmcia_cf_resources[] = {
@@ -211,25 +212,93 @@ static struct platform_device bfin_spi0_device = {
211#endif /* spi master and devices */ 212#endif /* spi master and devices */
212 213
213#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 214#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
214static struct resource bfin_uart_resources[] = { 215#ifdef CONFIG_SERIAL_BFIN_UART0
216static struct resource bfin_uart0_resources[] = {
215 { 217 {
216 .start = 0xFFC00400, 218 .start = UART0_THR,
217 .end = 0xFFC004FF, 219 .end = UART0_GCTL+2,
218 .flags = IORESOURCE_MEM, 220 .flags = IORESOURCE_MEM,
219 }, { 221 },
220 .start = 0xFFC02000, 222 {
221 .end = 0xFFC020FF, 223 .start = IRQ_UART0_RX,
224 .end = IRQ_UART0_RX+1,
225 .flags = IORESOURCE_IRQ,
226 },
227 {
228 .start = IRQ_UART0_ERROR,
229 .end = IRQ_UART0_ERROR,
230 .flags = IORESOURCE_IRQ,
231 },
232 {
233 .start = CH_UART0_TX,
234 .end = CH_UART0_TX,
235 .flags = IORESOURCE_DMA,
236 },
237 {
238 .start = CH_UART0_RX,
239 .end = CH_UART0_RX,
240 .flags = IORESOURCE_DMA,
241 },
242};
243
244unsigned short bfin_uart0_peripherals[] = {
245 P_UART0_TX, P_UART0_RX, 0
246};
247
248static struct platform_device bfin_uart0_device = {
249 .name = "bfin-uart",
250 .id = 0,
251 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
252 .resource = bfin_uart0_resources,
253 .dev = {
254 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
255 },
256};
257#endif
258#ifdef CONFIG_SERIAL_BFIN_UART1
259static struct resource bfin_uart1_resources[] = {
260 {
261 .start = UART1_THR,
262 .end = UART1_GCTL+2,
222 .flags = IORESOURCE_MEM, 263 .flags = IORESOURCE_MEM,
223 }, 264 },
265 {
266 .start = IRQ_UART1_RX,
267 .end = IRQ_UART1_RX+1,
268 .flags = IORESOURCE_IRQ,
269 },
270 {
271 .start = IRQ_UART1_ERROR,
272 .end = IRQ_UART1_ERROR,
273 .flags = IORESOURCE_IRQ,
274 },
275 {
276 .start = CH_UART1_TX,
277 .end = CH_UART1_TX,
278 .flags = IORESOURCE_DMA,
279 },
280 {
281 .start = CH_UART1_RX,
282 .end = CH_UART1_RX,
283 .flags = IORESOURCE_DMA,
284 },
285};
286
287unsigned short bfin_uart1_peripherals[] = {
288 P_UART1_TX, P_UART1_RX, 0
224}; 289};
225 290
226static struct platform_device bfin_uart_device = { 291static struct platform_device bfin_uart1_device = {
227 .name = "bfin-uart", 292 .name = "bfin-uart",
228 .id = 1, 293 .id = 1,
229 .num_resources = ARRAY_SIZE(bfin_uart_resources), 294 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
230 .resource = bfin_uart_resources, 295 .resource = bfin_uart1_resources,
296 .dev = {
297 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
298 },
231}; 299};
232#endif 300#endif
301#endif
233 302
234#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 303#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
235#ifdef CONFIG_BFIN_SIR0 304#ifdef CONFIG_BFIN_SIR0
@@ -309,16 +378,75 @@ static struct platform_device i2c_bfin_twi_device = {
309#endif 378#endif
310 379
311#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 380#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
381#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
382static struct resource bfin_sport0_uart_resources[] = {
383 {
384 .start = SPORT0_TCR1,
385 .end = SPORT0_MRCS3+4,
386 .flags = IORESOURCE_MEM,
387 },
388 {
389 .start = IRQ_SPORT0_RX,
390 .end = IRQ_SPORT0_RX+1,
391 .flags = IORESOURCE_IRQ,
392 },
393 {
394 .start = IRQ_SPORT0_ERROR,
395 .end = IRQ_SPORT0_ERROR,
396 .flags = IORESOURCE_IRQ,
397 },
398};
399
400unsigned short bfin_sport0_peripherals[] = {
401 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
402 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
403};
404
312static struct platform_device bfin_sport0_uart_device = { 405static struct platform_device bfin_sport0_uart_device = {
313 .name = "bfin-sport-uart", 406 .name = "bfin-sport-uart",
314 .id = 0, 407 .id = 0,
408 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
409 .resource = bfin_sport0_uart_resources,
410 .dev = {
411 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
412 },
413};
414#endif
415#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
416static struct resource bfin_sport1_uart_resources[] = {
417 {
418 .start = SPORT1_TCR1,
419 .end = SPORT1_MRCS3+4,
420 .flags = IORESOURCE_MEM,
421 },
422 {
423 .start = IRQ_SPORT1_RX,
424 .end = IRQ_SPORT1_RX+1,
425 .flags = IORESOURCE_IRQ,
426 },
427 {
428 .start = IRQ_SPORT1_ERROR,
429 .end = IRQ_SPORT1_ERROR,
430 .flags = IORESOURCE_IRQ,
431 },
432};
433
434unsigned short bfin_sport1_peripherals[] = {
435 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
436 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
315}; 437};
316 438
317static struct platform_device bfin_sport1_uart_device = { 439static struct platform_device bfin_sport1_uart_device = {
318 .name = "bfin-sport-uart", 440 .name = "bfin-sport-uart",
319 .id = 1, 441 .id = 1,
442 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
443 .resource = bfin_sport1_uart_resources,
444 .dev = {
445 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
446 },
320}; 447};
321#endif 448#endif
449#endif
322 450
323static struct platform_device *minotaur_devices[] __initdata = { 451static struct platform_device *minotaur_devices[] __initdata = {
324#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) 452#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
@@ -343,7 +471,12 @@ static struct platform_device *minotaur_devices[] __initdata = {
343#endif 471#endif
344 472
345#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 473#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
346 &bfin_uart_device, 474#ifdef CONFIG_SERIAL_BFIN_UART0
475 &bfin_uart0_device,
476#endif
477#ifdef CONFIG_SERIAL_BFIN_UART1
478 &bfin_uart1_device,
479#endif
347#endif 480#endif
348 481
349#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 482#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
@@ -360,9 +493,13 @@ static struct platform_device *minotaur_devices[] __initdata = {
360#endif 493#endif
361 494
362#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 495#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
496#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
363 &bfin_sport0_uart_device, 497 &bfin_sport0_uart_device,
498#endif
499#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
364 &bfin_sport1_uart_device, 500 &bfin_sport1_uart_device,
365#endif 501#endif
502#endif
366 503
367}; 504};
368 505
@@ -380,6 +517,33 @@ static int __init minotaur_init(void)
380 517
381arch_initcall(minotaur_init); 518arch_initcall(minotaur_init);
382 519
520static struct platform_device *minotaur_early_devices[] __initdata = {
521#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
522#ifdef CONFIG_SERIAL_BFIN_UART0
523 &bfin_uart0_device,
524#endif
525#ifdef CONFIG_SERIAL_BFIN_UART1
526 &bfin_uart1_device,
527#endif
528#endif
529
530#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
531#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
532 &bfin_sport0_uart_device,
533#endif
534#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
535 &bfin_sport1_uart_device,
536#endif
537#endif
538};
539
540void __init native_machine_early_platform_add_devices(void)
541{
542 printk(KERN_INFO "register early platform devices\n");
543 early_platform_add_devices(minotaur_early_devices,
544 ARRAY_SIZE(minotaur_early_devices));
545}
546
383void native_machine_restart(char *cmd) 547void native_machine_restart(char *cmd)
384{ 548{
385 /* workaround reboot hang when booting from SPI */ 549 /* workaround reboot hang when booting from SPI */
diff --git a/arch/blackfin/mach-bf537/boards/pnav10.c b/arch/blackfin/mach-bf537/boards/pnav10.c
index 4e0afda472ab..812e8f991601 100644
--- a/arch/blackfin/mach-bf537/boards/pnav10.c
+++ b/arch/blackfin/mach-bf537/boards/pnav10.c
@@ -17,7 +17,6 @@
17#include <asm/dma.h> 17#include <asm/dma.h>
18#include <asm/bfin5xx_spi.h> 18#include <asm/bfin5xx_spi.h>
19#include <asm/portmux.h> 19#include <asm/portmux.h>
20#include <linux/usb/sl811.h>
21 20
22#include <linux/spi/ad7877.h> 21#include <linux/spi/ad7877.h>
23 22
@@ -99,51 +98,6 @@ static struct platform_device smc91x_device = {
99}; 98};
100#endif 99#endif
101 100
102#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
103static struct resource sl811_hcd_resources[] = {
104 {
105 .start = 0x20340000,
106 .end = 0x20340000,
107 .flags = IORESOURCE_MEM,
108 }, {
109 .start = 0x20340004,
110 .end = 0x20340004,
111 .flags = IORESOURCE_MEM,
112 }, {
113 .start = CONFIG_USB_SL811_BFIN_IRQ,
114 .end = CONFIG_USB_SL811_BFIN_IRQ,
115 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
116 },
117};
118
119#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
120void sl811_port_power(struct device *dev, int is_on)
121{
122 gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
123 gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
124
125}
126#endif
127
128static struct sl811_platform_data sl811_priv = {
129 .potpg = 10,
130 .power = 250, /* == 500mA */
131#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
132 .port_power = &sl811_port_power,
133#endif
134};
135
136static struct platform_device sl811_hcd_device = {
137 .name = "sl811-hcd",
138 .id = 0,
139 .dev = {
140 .platform_data = &sl811_priv,
141 },
142 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
143 .resource = sl811_hcd_resources,
144};
145#endif
146
147#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) 101#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
148static struct platform_device bfin_mii_bus = { 102static struct platform_device bfin_mii_bus = {
149 .name = "bfin_mii_bus", 103 .name = "bfin_mii_bus",
@@ -221,8 +175,8 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
221}; 175};
222#endif 176#endif
223 177
224#if defined(CONFIG_SND_BLACKFIN_AD1836) \ 178#if defined(CONFIG_SND_BLACKFIN_AD183X) \
225 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) 179 || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
226static struct bfin5xx_spi_chip ad1836_spi_chip_info = { 180static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
227 .enable_dma = 0, 181 .enable_dma = 0,
228 .bits_per_word = 16, 182 .bits_per_word = 16,
@@ -284,8 +238,8 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
284 }, 238 },
285#endif 239#endif
286 240
287#if defined(CONFIG_SND_BLACKFIN_AD1836) \ 241#if defined(CONFIG_SND_BLACKFIN_AD183X) \
288 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) 242 || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
289 { 243 {
290 .modalias = "ad1836", 244 .modalias = "ad1836",
291 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 245 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
@@ -362,25 +316,93 @@ static struct platform_device bfin_fb_device = {
362#endif 316#endif
363 317
364#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 318#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
365static struct resource bfin_uart_resources[] = { 319#ifdef CONFIG_SERIAL_BFIN_UART0
320static struct resource bfin_uart0_resources[] = {
366 { 321 {
367 .start = 0xFFC00400, 322 .start = UART0_THR,
368 .end = 0xFFC004FF, 323 .end = UART0_GCTL+2,
369 .flags = IORESOURCE_MEM, 324 .flags = IORESOURCE_MEM,
370 }, { 325 },
371 .start = 0xFFC02000, 326 {
372 .end = 0xFFC020FF, 327 .start = IRQ_UART0_RX,
328 .end = IRQ_UART0_RX+1,
329 .flags = IORESOURCE_IRQ,
330 },
331 {
332 .start = IRQ_UART0_ERROR,
333 .end = IRQ_UART0_ERROR,
334 .flags = IORESOURCE_IRQ,
335 },
336 {
337 .start = CH_UART0_TX,
338 .end = CH_UART0_TX,
339 .flags = IORESOURCE_DMA,
340 },
341 {
342 .start = CH_UART0_RX,
343 .end = CH_UART0_RX,
344 .flags = IORESOURCE_DMA,
345 },
346};
347
348unsigned short bfin_uart0_peripherals[] = {
349 P_UART0_TX, P_UART0_RX, 0
350};
351
352static struct platform_device bfin_uart0_device = {
353 .name = "bfin-uart",
354 .id = 0,
355 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
356 .resource = bfin_uart0_resources,
357 .dev = {
358 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
359 },
360};
361#endif
362#ifdef CONFIG_SERIAL_BFIN_UART1
363static struct resource bfin_uart1_resources[] = {
364 {
365 .start = UART1_THR,
366 .end = UART1_GCTL+2,
373 .flags = IORESOURCE_MEM, 367 .flags = IORESOURCE_MEM,
374 }, 368 },
369 {
370 .start = IRQ_UART1_RX,
371 .end = IRQ_UART1_RX+1,
372 .flags = IORESOURCE_IRQ,
373 },
374 {
375 .start = IRQ_UART1_ERROR,
376 .end = IRQ_UART1_ERROR,
377 .flags = IORESOURCE_IRQ,
378 },
379 {
380 .start = CH_UART1_TX,
381 .end = CH_UART1_TX,
382 .flags = IORESOURCE_DMA,
383 },
384 {
385 .start = CH_UART1_RX,
386 .end = CH_UART1_RX,
387 .flags = IORESOURCE_DMA,
388 },
389};
390
391unsigned short bfin_uart1_peripherals[] = {
392 P_UART1_TX, P_UART1_RX, 0
375}; 393};
376 394
377static struct platform_device bfin_uart_device = { 395static struct platform_device bfin_uart1_device = {
378 .name = "bfin-uart", 396 .name = "bfin-uart",
379 .id = 1, 397 .id = 1,
380 .num_resources = ARRAY_SIZE(bfin_uart_resources), 398 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
381 .resource = bfin_uart_resources, 399 .resource = bfin_uart1_resources,
400 .dev = {
401 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
402 },
382}; 403};
383#endif 404#endif
405#endif
384 406
385#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 407#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
386#ifdef CONFIG_BFIN_SIR0 408#ifdef CONFIG_BFIN_SIR0
@@ -446,10 +468,6 @@ static struct platform_device *stamp_devices[] __initdata = {
446 &rtc_device, 468 &rtc_device,
447#endif 469#endif
448 470
449#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
450 &sl811_hcd_device,
451#endif
452
453#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) 471#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
454 &smc91x_device, 472 &smc91x_device,
455#endif 473#endif
@@ -472,7 +490,12 @@ static struct platform_device *stamp_devices[] __initdata = {
472#endif 490#endif
473 491
474#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 492#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
475 &bfin_uart_device, 493#ifdef CONFIG_SERIAL_BFIN_UART0
494 &bfin_uart0_device,
495#endif
496#ifdef CONFIG_SERIAL_BFIN_UART1
497 &bfin_uart1_device,
498#endif
476#endif 499#endif
477 500
478#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 501#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
@@ -498,6 +521,24 @@ static int __init pnav_init(void)
498 521
499arch_initcall(pnav_init); 522arch_initcall(pnav_init);
500 523
524static struct platform_device *stamp_early_devices[] __initdata = {
525#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
526#ifdef CONFIG_SERIAL_BFIN_UART0
527 &bfin_uart0_device,
528#endif
529#ifdef CONFIG_SERIAL_BFIN_UART1
530 &bfin_uart1_device,
531#endif
532#endif
533};
534
535void __init native_machine_early_platform_add_devices(void)
536{
537 printk(KERN_INFO "register early platform devices\n");
538 early_platform_add_devices(stamp_early_devices,
539 ARRAY_SIZE(stamp_early_devices));
540}
541
501void bfin_get_ether_addr(char *addr) 542void bfin_get_ether_addr(char *addr)
502{ 543{
503 random_ether_addr(addr); 544 random_ether_addr(addr);
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c
index ac9b52e0087c..9eaf5b05c11e 100644
--- a/arch/blackfin/mach-bf537/boards/stamp.c
+++ b/arch/blackfin/mach-bf537/boards/stamp.c
@@ -20,10 +20,12 @@
20#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 20#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
21#include <linux/usb/isp1362.h> 21#include <linux/usb/isp1362.h>
22#endif 22#endif
23#include <linux/i2c.h>
24#include <linux/i2c/adp5588.h>
25#include <linux/etherdevice.h>
23#include <linux/ata_platform.h> 26#include <linux/ata_platform.h>
24#include <linux/irq.h> 27#include <linux/irq.h>
25#include <linux/interrupt.h> 28#include <linux/interrupt.h>
26#include <linux/i2c.h>
27#include <linux/usb/sl811.h> 29#include <linux/usb/sl811.h>
28#include <linux/spi/mmc_spi.h> 30#include <linux/spi/mmc_spi.h>
29#include <linux/leds.h> 31#include <linux/leds.h>
@@ -33,6 +35,14 @@
33#include <asm/reboot.h> 35#include <asm/reboot.h>
34#include <asm/portmux.h> 36#include <asm/portmux.h>
35#include <asm/dpmc.h> 37#include <asm/dpmc.h>
38#ifdef CONFIG_REGULATOR_ADP_SWITCH
39#include <linux/regulator/adp_switch.h>
40#endif
41#ifdef CONFIG_REGULATOR_AD5398
42#include <linux/regulator/ad5398.h>
43#endif
44#include <linux/regulator/consumer.h>
45#include <linux/regulator/userspace-consumer.h>
36 46
37/* 47/*
38 * Name the Board for the /proc/cpuinfo 48 * Name the Board for the /proc/cpuinfo
@@ -208,8 +218,8 @@ static struct resource sl811_hcd_resources[] = {
208 .end = 0x20340004, 218 .end = 0x20340004,
209 .flags = IORESOURCE_MEM, 219 .flags = IORESOURCE_MEM,
210 }, { 220 }, {
211 .start = CONFIG_USB_SL811_BFIN_IRQ, 221 .start = IRQ_PF4,
212 .end = CONFIG_USB_SL811_BFIN_IRQ, 222 .end = IRQ_PF4,
213 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 223 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
214 }, 224 },
215}; 225};
@@ -454,6 +464,9 @@ static struct physmap_flash_data stamp_flash_data = {
454 .width = 2, 464 .width = 2,
455 .parts = stamp_partitions, 465 .parts = stamp_partitions,
456 .nr_parts = ARRAY_SIZE(stamp_partitions), 466 .nr_parts = ARRAY_SIZE(stamp_partitions),
467#ifdef CONFIG_ROMKERNEL
468 .probe_type = "map_rom",
469#endif
457}; 470};
458 471
459static struct resource stamp_flash_resource = { 472static struct resource stamp_flash_resource = {
@@ -515,20 +528,19 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
515}; 528};
516#endif 529#endif
517 530
518#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \ 531#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
519 || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE) 532 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
520static struct bfin5xx_spi_chip ad1836_spi_chip_info = { 533static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
521 .enable_dma = 0, 534 .enable_dma = 0,
522 .bits_per_word = 16, 535 .bits_per_word = 16,
523}; 536};
524#endif 537#endif
525 538
526#if defined(CONFIG_SND_BF5XX_SOC_AD1938) \ 539#if defined(CONFIG_SND_BF5XX_SOC_AD193X) \
527 || defined(CONFIG_SND_BF5XX_SOC_AD1938_MODULE) 540 || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
528static struct bfin5xx_spi_chip ad1938_spi_chip_info = { 541static struct bfin5xx_spi_chip ad1938_spi_chip_info = {
529 .enable_dma = 0, 542 .enable_dma = 0,
530 .bits_per_word = 8, 543 .bits_per_word = 8,
531 .cs_gpio = GPIO_PF5,
532}; 544};
533#endif 545#endif
534 546
@@ -644,6 +656,42 @@ static struct ad714x_platform_data ad7142_i2c_platform_data = {
644}; 656};
645#endif 657#endif
646 658
659#if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
660static struct bfin5xx_spi_chip ad2s90_spi_chip_info = {
661 .enable_dma = 0,
662 .bits_per_word = 16,
663};
664#endif
665
666#if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
667unsigned short ad2s120x_platform_data[] = {
668 /* used as SAMPLE and RDVEL */
669 GPIO_PF5, GPIO_PF6, 0
670};
671
672static struct bfin5xx_spi_chip ad2s120x_spi_chip_info = {
673 .enable_dma = 0,
674 .bits_per_word = 16,
675};
676#endif
677
678#if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
679unsigned short ad2s1210_platform_data[] = {
680 /* use as SAMPLE, A0, A1 */
681 GPIO_PF7, GPIO_PF8, GPIO_PF9,
682# if defined(CONFIG_AD2S1210_GPIO_INPUT) || defined(CONFIG_AD2S1210_GPIO_OUTPUT)
683 /* the RES0 and RES1 pins */
684 GPIO_PF4, GPIO_PF5,
685# endif
686 0,
687};
688
689static struct bfin5xx_spi_chip ad2s1210_spi_chip_info = {
690 .enable_dma = 0,
691 .bits_per_word = 8,
692};
693#endif
694
647#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) 695#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
648#define MMC_SPI_CARD_DETECT_INT IRQ_PF5 696#define MMC_SPI_CARD_DETECT_INT IRQ_PF5
649 697
@@ -686,11 +734,11 @@ static const struct ad7877_platform_data bfin_ad7877_ts_info = {
686 .y_plate_ohms = 486, 734 .y_plate_ohms = 486,
687 .pressure_max = 1000, 735 .pressure_max = 1000,
688 .pressure_min = 0, 736 .pressure_min = 0,
689 .stopacq_polarity = 1, 737 .stopacq_polarity = 1,
690 .first_conversion_delay = 3, 738 .first_conversion_delay = 3,
691 .acquisition_time = 1, 739 .acquisition_time = 1,
692 .averaging = 1, 740 .averaging = 1,
693 .pen_down_acc_interval = 1, 741 .pen_down_acc_interval = 1,
694}; 742};
695#endif 743#endif
696 744
@@ -701,13 +749,13 @@ static const struct ad7879_platform_data bfin_ad7879_ts_info = {
701 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */ 749 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
702 .pressure_max = 10000, 750 .pressure_max = 10000,
703 .pressure_min = 0, 751 .pressure_min = 0,
704 .first_conversion_delay = 3, /* wait 512us before do a first conversion */ 752 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
705 .acquisition_time = 1, /* 4us acquisition time per sample */ 753 .acquisition_time = 1, /* 4us acquisition time per sample */
706 .median = 2, /* do 8 measurements */ 754 .median = 2, /* do 8 measurements */
707 .averaging = 1, /* take the average of 4 middle samples */ 755 .averaging = 1, /* take the average of 4 middle samples */
708 .pen_down_acc_interval = 255, /* 9.4 ms */ 756 .pen_down_acc_interval = 255, /* 9.4 ms */
709 .gpio_output = 1, /* configure AUX/VBAT/GPIO as GPIO output */ 757 .gpio_export = 1, /* Export GPIO to gpiolib */
710 .gpio_default = 1, /* During initialization set GPIO = HIGH */ 758 .gpio_base = -1, /* Dynamic allocation */
711}; 759};
712#endif 760#endif
713 761
@@ -742,6 +790,11 @@ static const struct adxl34x_platform_data adxl34x_info = {
742/* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */ 790/* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
743 .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK, 791 .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
744 .fifo_mode = ADXL_FIFO_STREAM, 792 .fifo_mode = ADXL_FIFO_STREAM,
793 .orientation_enable = ADXL_EN_ORIENTATION_3D,
794 .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
795 .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
796 /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
797 .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
745}; 798};
746#endif 799#endif
747 800
@@ -813,6 +866,35 @@ static struct adf702x_platform_data adf7021_platform_data = {
813 .adf702x_regs = adf7021_regs, 866 .adf702x_regs = adf7021_regs,
814 .tx_reg = TXREG, 867 .tx_reg = TXREG,
815}; 868};
869static inline void adf702x_mac_init(void)
870{
871 random_ether_addr(adf7021_platform_data.mac_addr);
872}
873#else
874static inline void adf702x_mac_init(void) {}
875#endif
876
877#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
878#include <linux/spi/ads7846.h>
879static struct bfin5xx_spi_chip ad7873_spi_chip_info = {
880 .bits_per_word = 8,
881};
882
883static int ads7873_get_pendown_state(void)
884{
885 return gpio_get_value(GPIO_PF6);
886}
887
888static struct ads7846_platform_data __initdata ad7873_pdata = {
889 .model = 7873, /* AD7873 */
890 .x_max = 0xfff,
891 .y_max = 0xfff,
892 .x_plate_ohms = 620,
893 .debounce_max = 1,
894 .debounce_rep = 0,
895 .debounce_tol = (~0),
896 .get_pendown_state = ads7873_get_pendown_state,
897};
816#endif 898#endif
817 899
818#if defined(CONFIG_MTD_DATAFLASH) \ 900#if defined(CONFIG_MTD_DATAFLASH) \
@@ -893,24 +975,25 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
893 }, 975 },
894#endif 976#endif
895 977
896#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \ 978#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
897 || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE) 979 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
898 { 980 {
899 .modalias = "ad1836", 981 .modalias = "ad183x",
900 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 982 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
901 .bus_num = 0, 983 .bus_num = 0,
902 .chip_select = 4,/* CONFIG_SND_BLACKFIN_SPI_PFBIT */ 984 .chip_select = 4,/* CONFIG_SND_BLACKFIN_SPI_PFBIT */
985 .platform_data = "ad1836", /* only includes chip name for the moment */
903 .controller_data = &ad1836_spi_chip_info, 986 .controller_data = &ad1836_spi_chip_info,
904 .mode = SPI_MODE_3, 987 .mode = SPI_MODE_3,
905 }, 988 },
906#endif 989#endif
907 990
908#if defined(CONFIG_SND_BF5XX_SOC_AD1938) || defined(CONFIG_SND_BF5XX_SOC_AD1938_MODULE) 991#if defined(CONFIG_SND_BF5XX_SOC_AD193X) || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
909 { 992 {
910 .modalias = "ad1938", 993 .modalias = "ad193x",
911 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 994 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
912 .bus_num = 0, 995 .bus_num = 0,
913 .chip_select = 0,/* CONFIG_SND_BLACKFIN_SPI_PFBIT */ 996 .chip_select = 5,
914 .controller_data = &ad1938_spi_chip_info, 997 .controller_data = &ad1938_spi_chip_info,
915 .mode = SPI_MODE_3, 998 .mode = SPI_MODE_3,
916 }, 999 },
@@ -929,6 +1012,37 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
929 }, 1012 },
930#endif 1013#endif
931 1014
1015#if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
1016 {
1017 .modalias = "ad2s90",
1018 .bus_num = 0,
1019 .chip_select = 3, /* change it for your board */
1020 .platform_data = NULL,
1021 .controller_data = &ad2s90_spi_chip_info,
1022 },
1023#endif
1024
1025#if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
1026 {
1027 .modalias = "ad2s120x",
1028 .bus_num = 0,
1029 .chip_select = 4, /* CS, change it for your board */
1030 .platform_data = ad2s120x_platform_data,
1031 .controller_data = &ad2s120x_spi_chip_info,
1032 },
1033#endif
1034
1035#if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
1036 {
1037 .modalias = "ad2s1210",
1038 .max_speed_hz = 8192000,
1039 .bus_num = 0,
1040 .chip_select = 4, /* CS, change it for your board */
1041 .platform_data = ad2s1210_platform_data,
1042 .controller_data = &ad2s1210_spi_chip_info,
1043 },
1044#endif
1045
932#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) 1046#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
933 { 1047 {
934 .modalias = "mmc_spi", 1048 .modalias = "mmc_spi",
@@ -1016,7 +1130,18 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
1016 .mode = SPI_MODE_0, 1130 .mode = SPI_MODE_0,
1017 }, 1131 },
1018#endif 1132#endif
1019 1133#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
1134 {
1135 .modalias = "ads7846",
1136 .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
1137 .bus_num = 0,
1138 .irq = IRQ_PF6,
1139 .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
1140 .controller_data = &ad7873_spi_chip_info,
1141 .platform_data = &ad7873_pdata,
1142 .mode = SPI_MODE_0,
1143 },
1144#endif
1020}; 1145};
1021 1146
1022#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 1147#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
@@ -1132,9 +1257,10 @@ static struct platform_device bfin_fb_device = {
1132#include <asm/bfin-lq035q1.h> 1257#include <asm/bfin-lq035q1.h>
1133 1258
1134static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = { 1259static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
1135 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB, 1260 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
1136 .use_bl = 0, /* let something else control the LCD Blacklight */ 1261 .ppi_mode = USE_RGB565_16_BIT_PPI,
1137 .gpio_bl = GPIO_PF7, 1262 .use_bl = 0, /* let something else control the LCD Blacklight */
1263 .gpio_bl = GPIO_PF7,
1138}; 1264};
1139 1265
1140static struct resource bfin_lq035q1_resources[] = { 1266static struct resource bfin_lq035q1_resources[] = {
@@ -1148,8 +1274,8 @@ static struct resource bfin_lq035q1_resources[] = {
1148static struct platform_device bfin_lq035q1_device = { 1274static struct platform_device bfin_lq035q1_device = {
1149 .name = "bfin-lq035q1", 1275 .name = "bfin-lq035q1",
1150 .id = -1, 1276 .id = -1,
1151 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources), 1277 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
1152 .resource = bfin_lq035q1_resources, 1278 .resource = bfin_lq035q1_resources,
1153 .dev = { 1279 .dev = {
1154 .platform_data = &bfin_lq035q1_data, 1280 .platform_data = &bfin_lq035q1_data,
1155 }, 1281 },
@@ -1157,30 +1283,105 @@ static struct platform_device bfin_lq035q1_device = {
1157#endif 1283#endif
1158 1284
1159#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 1285#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
1160static struct resource bfin_uart_resources[] = {
1161#ifdef CONFIG_SERIAL_BFIN_UART0 1286#ifdef CONFIG_SERIAL_BFIN_UART0
1287static struct resource bfin_uart0_resources[] = {
1162 { 1288 {
1163 .start = 0xFFC00400, 1289 .start = UART0_THR,
1164 .end = 0xFFC004FF, 1290 .end = UART0_GCTL+2,
1165 .flags = IORESOURCE_MEM, 1291 .flags = IORESOURCE_MEM,
1166 }, 1292 },
1293 {
1294 .start = IRQ_UART0_RX,
1295 .end = IRQ_UART0_RX+1,
1296 .flags = IORESOURCE_IRQ,
1297 },
1298 {
1299 .start = IRQ_UART0_ERROR,
1300 .end = IRQ_UART0_ERROR,
1301 .flags = IORESOURCE_IRQ,
1302 },
1303 {
1304 .start = CH_UART0_TX,
1305 .end = CH_UART0_TX,
1306 .flags = IORESOURCE_DMA,
1307 },
1308 {
1309 .start = CH_UART0_RX,
1310 .end = CH_UART0_RX,
1311 .flags = IORESOURCE_DMA,
1312 },
1313#ifdef CONFIG_BFIN_UART0_CTSRTS
1314 { /* CTS pin */
1315 .start = GPIO_PG7,
1316 .end = GPIO_PG7,
1317 .flags = IORESOURCE_IO,
1318 },
1319 { /* RTS pin */
1320 .start = GPIO_PG6,
1321 .end = GPIO_PG6,
1322 .flags = IORESOURCE_IO,
1323 },
1324#endif
1325};
1326
1327unsigned short bfin_uart0_peripherals[] = {
1328 P_UART0_TX, P_UART0_RX, 0
1329};
1330
1331static struct platform_device bfin_uart0_device = {
1332 .name = "bfin-uart",
1333 .id = 0,
1334 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
1335 .resource = bfin_uart0_resources,
1336 .dev = {
1337 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
1338 },
1339};
1167#endif 1340#endif
1168#ifdef CONFIG_SERIAL_BFIN_UART1 1341#ifdef CONFIG_SERIAL_BFIN_UART1
1342static struct resource bfin_uart1_resources[] = {
1169 { 1343 {
1170 .start = 0xFFC02000, 1344 .start = UART1_THR,
1171 .end = 0xFFC020FF, 1345 .end = UART1_GCTL+2,
1172 .flags = IORESOURCE_MEM, 1346 .flags = IORESOURCE_MEM,
1173 }, 1347 },
1174#endif 1348 {
1349 .start = IRQ_UART1_RX,
1350 .end = IRQ_UART1_RX+1,
1351 .flags = IORESOURCE_IRQ,
1352 },
1353 {
1354 .start = IRQ_UART1_ERROR,
1355 .end = IRQ_UART1_ERROR,
1356 .flags = IORESOURCE_IRQ,
1357 },
1358 {
1359 .start = CH_UART1_TX,
1360 .end = CH_UART1_TX,
1361 .flags = IORESOURCE_DMA,
1362 },
1363 {
1364 .start = CH_UART1_RX,
1365 .end = CH_UART1_RX,
1366 .flags = IORESOURCE_DMA,
1367 },
1368};
1369
1370unsigned short bfin_uart1_peripherals[] = {
1371 P_UART1_TX, P_UART1_RX, 0
1175}; 1372};
1176 1373
1177static struct platform_device bfin_uart_device = { 1374static struct platform_device bfin_uart1_device = {
1178 .name = "bfin-uart", 1375 .name = "bfin-uart",
1179 .id = 1, 1376 .id = 1,
1180 .num_resources = ARRAY_SIZE(bfin_uart_resources), 1377 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
1181 .resource = bfin_uart_resources, 1378 .resource = bfin_uart1_resources,
1379 .dev = {
1380 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
1381 },
1182}; 1382};
1183#endif 1383#endif
1384#endif
1184 1385
1185#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 1386#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
1186#ifdef CONFIG_BFIN_SIR0 1387#ifdef CONFIG_BFIN_SIR0
@@ -1260,7 +1461,6 @@ static struct platform_device i2c_bfin_twi_device = {
1260#endif 1461#endif
1261 1462
1262#if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE) 1463#if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
1263#include <linux/i2c/adp5588.h>
1264static const unsigned short adp5588_keymap[ADP5588_KEYMAPSIZE] = { 1464static const unsigned short adp5588_keymap[ADP5588_KEYMAPSIZE] = {
1265 [0] = KEY_GRAVE, 1465 [0] = KEY_GRAVE,
1266 [1] = KEY_1, 1466 [1] = KEY_1,
@@ -1457,7 +1657,6 @@ static struct adp5520_platform_data adp5520_pdev_data = {
1457#endif 1657#endif
1458 1658
1459#if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE) 1659#if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
1460#include <linux/i2c/adp5588.h>
1461static struct adp5588_gpio_platform_data adp5588_gpio_data = { 1660static struct adp5588_gpio_platform_data adp5588_gpio_data = {
1462 .gpio_start = 50, 1661 .gpio_start = 50,
1463 .pullup_dis_mask = 0, 1662 .pullup_dis_mask = 0,
@@ -1516,6 +1715,101 @@ static struct adp8870_backlight_platform_data adp8870_pdata = {
1516}; 1715};
1517#endif 1716#endif
1518 1717
1718#if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
1719#include <linux/i2c/adp8860.h>
1720static struct led_info adp8860_leds[] = {
1721 {
1722 .name = "adp8860-led7",
1723 .default_trigger = "none",
1724 .flags = ADP8860_LED_D7 | ADP8860_LED_OFFT_600ms,
1725 },
1726};
1727
1728static struct adp8860_backlight_platform_data adp8860_pdata = {
1729 .bl_led_assign = ADP8860_BL_D1 | ADP8860_BL_D2 | ADP8860_BL_D3 |
1730 ADP8860_BL_D4 | ADP8860_BL_D5 | ADP8860_BL_D6, /* 1 = Backlight 0 = Individual LED */
1731
1732 .bl_fade_in = ADP8860_FADE_T_1200ms, /* Backlight Fade-In Timer */
1733 .bl_fade_out = ADP8860_FADE_T_1200ms, /* Backlight Fade-Out Timer */
1734 .bl_fade_law = ADP8860_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
1735
1736 .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
1737 .abml_filt = ADP8860_BL_AMBL_FILT_320ms, /* Light sensor filter time */
1738
1739 .l1_daylight_max = ADP8860_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1740 .l1_daylight_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1741 .l2_office_max = ADP8860_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1742 .l2_office_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1743 .l3_dark_max = ADP8860_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1744 .l3_dark_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1745
1746 .l2_trip = ADP8860_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
1747 .l2_hyst = ADP8860_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
1748 .l3_trip = ADP8860_L3_COMP_CURR_uA(43), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
1749 .l3_hyst = ADP8860_L3_COMP_CURR_uA(11), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
1750
1751 .leds = adp8860_leds,
1752 .num_leds = ARRAY_SIZE(adp8860_leds),
1753 .led_fade_law = ADP8860_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
1754 .led_fade_in = ADP8860_FADE_T_600ms,
1755 .led_fade_out = ADP8860_FADE_T_600ms,
1756 .led_on_time = ADP8860_LED_ONT_200ms,
1757};
1758#endif
1759
1760#if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
1761static struct regulator_consumer_supply ad5398_consumer = {
1762 .supply = "current",
1763};
1764
1765static struct regulator_init_data ad5398_regulator_data = {
1766 .constraints = {
1767 .name = "current range",
1768 .max_uA = 120000,
1769 .valid_ops_mask = REGULATOR_CHANGE_CURRENT | REGULATOR_CHANGE_STATUS,
1770 },
1771 .num_consumer_supplies = 1,
1772 .consumer_supplies = &ad5398_consumer,
1773};
1774
1775static struct ad5398_platform_data ad5398_i2c_platform_data = {
1776 .current_bits = 10,
1777 .current_offset = 4,
1778 .regulator_data = &ad5398_regulator_data,
1779};
1780
1781#if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
1782 defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
1783static struct platform_device ad5398_virt_consumer_device = {
1784 .name = "reg-virt-consumer",
1785 .id = 0,
1786 .dev = {
1787 .platform_data = "current", /* Passed to driver */
1788 },
1789};
1790#endif
1791#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
1792 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
1793static struct regulator_bulk_data ad5398_bulk_data = {
1794 .supply = "current",
1795};
1796
1797static struct regulator_userspace_consumer_data ad5398_userspace_comsumer_data = {
1798 .name = "ad5398",
1799 .num_supplies = 1,
1800 .supplies = &ad5398_bulk_data,
1801};
1802
1803static struct platform_device ad5398_userspace_consumer_device = {
1804 .name = "reg-userspace-consumer",
1805 .id = 0,
1806 .dev = {
1807 .platform_data = &ad5398_userspace_comsumer_data,
1808 },
1809};
1810#endif
1811#endif
1812
1519static struct i2c_board_info __initdata bfin_i2c_board_info[] = { 1813static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
1520#if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE) 1814#if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
1521 { 1815 {
@@ -1524,6 +1818,52 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
1524 .platform_data = (void *)&ad7142_i2c_platform_data, 1818 .platform_data = (void *)&ad7142_i2c_platform_data,
1525 }, 1819 },
1526#endif 1820#endif
1821
1822#if defined(CONFIG_AD7150) || defined(CONFIG_AD7150_MODULE)
1823 {
1824 I2C_BOARD_INFO("ad7150", 0x48),
1825 .irq = IRQ_PG5, /* fixme: use real interrupt number */
1826 },
1827#endif
1828
1829#if defined(CONFIG_AD7152) || defined(CONFIG_AD7152_MODULE)
1830 {
1831 I2C_BOARD_INFO("ad7152", 0x48),
1832 },
1833#endif
1834
1835#if defined(CONFIG_AD774X) || defined(CONFIG_AD774X_MODULE)
1836 {
1837 I2C_BOARD_INFO("ad774x", 0x48),
1838 },
1839#endif
1840
1841#if defined(CONFIG_AD7414) || defined(CONFIG_AD7414_MODULE)
1842 {
1843 I2C_BOARD_INFO("ad7414", 0x9),
1844 .irq = IRQ_PG5,
1845 /*
1846 * platform_data pointer is borrwoed by the driver to
1847 * store custimer defined IRQ ALART level mode.
1848 * only IRQF_TRIGGER_HIGH and IRQF_TRIGGER_LOW are valid.
1849 */
1850 .platform_data = (void *)IRQF_TRIGGER_LOW,
1851 },
1852#endif
1853
1854#if defined(CONFIG_AD7416) || defined(CONFIG_AD7416_MODULE)
1855 {
1856 I2C_BOARD_INFO("ad7417", 0xb),
1857 .irq = IRQ_PG5,
1858 /*
1859 * platform_data pointer is borrwoed by the driver to
1860 * store custimer defined IRQ ALART level mode.
1861 * only IRQF_TRIGGER_HIGH and IRQF_TRIGGER_LOW are valid.
1862 */
1863 .platform_data = (void *)IRQF_TRIGGER_LOW,
1864 },
1865#endif
1866
1527#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE) 1867#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
1528 { 1868 {
1529 I2C_BOARD_INFO("pcf8574_lcd", 0x22), 1869 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
@@ -1595,24 +1935,105 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
1595 I2C_BOARD_INFO("adau1761", 0x38), 1935 I2C_BOARD_INFO("adau1761", 0x38),
1596 }, 1936 },
1597#endif 1937#endif
1938#if defined(CONFIG_SND_SOC_ADAU1361) || defined(CONFIG_SND_SOC_ADAU1361_MODULE)
1939 {
1940 I2C_BOARD_INFO("adau1361", 0x38),
1941 },
1942#endif
1598#if defined(CONFIG_AD525X_DPOT) || defined(CONFIG_AD525X_DPOT_MODULE) 1943#if defined(CONFIG_AD525X_DPOT) || defined(CONFIG_AD525X_DPOT_MODULE)
1599 { 1944 {
1600 I2C_BOARD_INFO("ad5258", 0x18), 1945 I2C_BOARD_INFO("ad5258", 0x18),
1601 }, 1946 },
1602#endif 1947#endif
1948#if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
1949 {
1950 I2C_BOARD_INFO("ssm2602", 0x1b),
1951 },
1952#endif
1953#if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
1954 {
1955 I2C_BOARD_INFO("ad5398", 0xC),
1956 .platform_data = (void *)&ad5398_i2c_platform_data,
1957 },
1958#endif
1959#if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
1960 {
1961 I2C_BOARD_INFO("adp8860", 0x2A),
1962 .platform_data = (void *)&adp8860_pdata,
1963 },
1964#endif
1603}; 1965};
1604 1966
1605#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 1967#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
1968#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1969static struct resource bfin_sport0_uart_resources[] = {
1970 {
1971 .start = SPORT0_TCR1,
1972 .end = SPORT0_MRCS3+4,
1973 .flags = IORESOURCE_MEM,
1974 },
1975 {
1976 .start = IRQ_SPORT0_RX,
1977 .end = IRQ_SPORT0_RX+1,
1978 .flags = IORESOURCE_IRQ,
1979 },
1980 {
1981 .start = IRQ_SPORT0_ERROR,
1982 .end = IRQ_SPORT0_ERROR,
1983 .flags = IORESOURCE_IRQ,
1984 },
1985};
1986
1987unsigned short bfin_sport0_peripherals[] = {
1988 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
1989 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
1990};
1991
1606static struct platform_device bfin_sport0_uart_device = { 1992static struct platform_device bfin_sport0_uart_device = {
1607 .name = "bfin-sport-uart", 1993 .name = "bfin-sport-uart",
1608 .id = 0, 1994 .id = 0,
1995 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
1996 .resource = bfin_sport0_uart_resources,
1997 .dev = {
1998 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
1999 },
2000};
2001#endif
2002#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
2003static struct resource bfin_sport1_uart_resources[] = {
2004 {
2005 .start = SPORT1_TCR1,
2006 .end = SPORT1_MRCS3+4,
2007 .flags = IORESOURCE_MEM,
2008 },
2009 {
2010 .start = IRQ_SPORT1_RX,
2011 .end = IRQ_SPORT1_RX+1,
2012 .flags = IORESOURCE_IRQ,
2013 },
2014 {
2015 .start = IRQ_SPORT1_ERROR,
2016 .end = IRQ_SPORT1_ERROR,
2017 .flags = IORESOURCE_IRQ,
2018 },
2019};
2020
2021unsigned short bfin_sport1_peripherals[] = {
2022 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
2023 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
1609}; 2024};
1610 2025
1611static struct platform_device bfin_sport1_uart_device = { 2026static struct platform_device bfin_sport1_uart_device = {
1612 .name = "bfin-sport-uart", 2027 .name = "bfin-sport-uart",
1613 .id = 1, 2028 .id = 1,
2029 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
2030 .resource = bfin_sport1_uart_resources,
2031 .dev = {
2032 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
2033 },
1614}; 2034};
1615#endif 2035#endif
2036#endif
1616 2037
1617#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) 2038#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
1618#define CF_IDE_NAND_CARD_USE_HDD_INTERFACE 2039#define CF_IDE_NAND_CARD_USE_HDD_INTERFACE
@@ -1701,13 +2122,121 @@ static struct platform_device bfin_dpmc = {
1701 }, 2122 },
1702}; 2123};
1703 2124
2125#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
2126static struct platform_device bfin_i2s = {
2127 .name = "bfin-i2s",
2128 .id = CONFIG_SND_BF5XX_SPORT_NUM,
2129 /* TODO: add platform data here */
2130};
2131#endif
2132
1704#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE) 2133#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
1705static struct platform_device bfin_tdm = { 2134static struct platform_device bfin_tdm = {
1706 .name = "bfin-tdm", 2135 .name = "bfin-tdm",
2136 .id = CONFIG_SND_BF5XX_SPORT_NUM,
1707 /* TODO: add platform data here */ 2137 /* TODO: add platform data here */
1708}; 2138};
1709#endif 2139#endif
1710 2140
2141#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
2142static struct platform_device bfin_ac97 = {
2143 .name = "bfin-ac97",
2144 .id = CONFIG_SND_BF5XX_SPORT_NUM,
2145 /* TODO: add platform data here */
2146};
2147#endif
2148
2149#if defined(CONFIG_REGULATOR_ADP_SWITCH) || defined(CONFIG_REGULATOR_ADP_SWITCH_MODULE)
2150#define REGULATOR_ADP122 "adp122"
2151#define REGULATOR_ADP150 "adp150"
2152
2153static struct regulator_consumer_supply adp122_consumers = {
2154 .supply = REGULATOR_ADP122,
2155};
2156
2157static struct regulator_consumer_supply adp150_consumers = {
2158 .supply = REGULATOR_ADP150,
2159};
2160
2161static struct regulator_init_data adp_switch_regulator_data[] = {
2162 {
2163 .constraints = {
2164 .name = REGULATOR_ADP122,
2165 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
2166 .min_uA = 0,
2167 .max_uA = 300000,
2168 },
2169 .num_consumer_supplies = 1, /* only 1 */
2170 .consumer_supplies = &adp122_consumers,
2171 .driver_data = (void *)GPIO_PF2, /* gpio port only */
2172 },
2173 {
2174 .constraints = {
2175 .name = REGULATOR_ADP150,
2176 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
2177 .min_uA = 0,
2178 .max_uA = 150000,
2179 },
2180 .num_consumer_supplies = 1, /* only 1 */
2181 .consumer_supplies = &adp150_consumers,
2182 .driver_data = (void *)GPIO_PF3, /* gpio port only */
2183 },
2184};
2185
2186static struct adp_switch_platform_data adp_switch_pdata = {
2187 .regulator_num = ARRAY_SIZE(adp_switch_regulator_data),
2188 .regulator_data = adp_switch_regulator_data,
2189};
2190
2191static struct platform_device adp_switch_device = {
2192 .name = "adp_switch",
2193 .id = 0,
2194 .dev = {
2195 .platform_data = &adp_switch_pdata,
2196 },
2197};
2198
2199#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2200 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2201static struct regulator_bulk_data adp122_bulk_data = {
2202 .supply = REGULATOR_ADP122,
2203};
2204
2205static struct regulator_userspace_consumer_data adp122_userspace_comsumer_data = {
2206 .name = REGULATOR_ADP122,
2207 .num_supplies = 1,
2208 .supplies = &adp122_bulk_data,
2209};
2210
2211static struct platform_device adp122_userspace_consumer_device = {
2212 .name = "reg-userspace-consumer",
2213 .id = 0,
2214 .dev = {
2215 .platform_data = &adp122_userspace_comsumer_data,
2216 },
2217};
2218
2219static struct regulator_bulk_data adp150_bulk_data = {
2220 .supply = REGULATOR_ADP150,
2221};
2222
2223static struct regulator_userspace_consumer_data adp150_userspace_comsumer_data = {
2224 .name = REGULATOR_ADP150,
2225 .num_supplies = 1,
2226 .supplies = &adp150_bulk_data,
2227};
2228
2229static struct platform_device adp150_userspace_consumer_device = {
2230 .name = "reg-userspace-consumer",
2231 .id = 1,
2232 .dev = {
2233 .platform_data = &adp150_userspace_comsumer_data,
2234 },
2235};
2236#endif
2237#endif
2238
2239
1711static struct platform_device *stamp_devices[] __initdata = { 2240static struct platform_device *stamp_devices[] __initdata = {
1712 2241
1713 &bfin_dpmc, 2242 &bfin_dpmc,
@@ -1771,7 +2300,12 @@ static struct platform_device *stamp_devices[] __initdata = {
1771#endif 2300#endif
1772 2301
1773#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 2302#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
1774 &bfin_uart_device, 2303#ifdef CONFIG_SERIAL_BFIN_UART0
2304 &bfin_uart0_device,
2305#endif
2306#ifdef CONFIG_SERIAL_BFIN_UART1
2307 &bfin_uart1_device,
2308#endif
1775#endif 2309#endif
1776 2310
1777#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 2311#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
@@ -1788,9 +2322,13 @@ static struct platform_device *stamp_devices[] __initdata = {
1788#endif 2322#endif
1789 2323
1790#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 2324#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
2325#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1791 &bfin_sport0_uart_device, 2326 &bfin_sport0_uart_device,
2327#endif
2328#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1792 &bfin_sport1_uart_device, 2329 &bfin_sport1_uart_device,
1793#endif 2330#endif
2331#endif
1794 2332
1795#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) 2333#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
1796 &bfin_pata_device, 2334 &bfin_pata_device,
@@ -1808,18 +2346,46 @@ static struct platform_device *stamp_devices[] __initdata = {
1808 &stamp_flash_device, 2346 &stamp_flash_device,
1809#endif 2347#endif
1810 2348
2349#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
2350 &bfin_i2s,
2351#endif
2352
1811#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE) 2353#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
1812 &bfin_tdm, 2354 &bfin_tdm,
1813#endif 2355#endif
2356
2357#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
2358 &bfin_ac97,
2359#endif
2360#if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
2361#if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
2362 defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
2363 &ad5398_virt_consumer_device,
2364#endif
2365#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2366 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2367 &ad5398_userspace_consumer_device,
2368#endif
2369#endif
2370
2371#if defined(CONFIG_REGULATOR_ADP_SWITCH) || defined(CONFIG_REGULATOR_ADP_SWITCH_MODULE)
2372 &adp_switch_device,
2373#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2374 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2375 &adp122_userspace_consumer_device,
2376 &adp150_userspace_consumer_device,
2377#endif
2378#endif
1814}; 2379};
1815 2380
1816static int __init stamp_init(void) 2381static int __init stamp_init(void)
1817{ 2382{
1818 printk(KERN_INFO "%s(): registering device resources\n", __func__); 2383 printk(KERN_INFO "%s(): registering device resources\n", __func__);
1819 i2c_register_board_info(0, bfin_i2c_board_info,
1820 ARRAY_SIZE(bfin_i2c_board_info));
1821 bfin_plat_nand_init(); 2384 bfin_plat_nand_init();
2385 adf702x_mac_init();
1822 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); 2386 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
2387 i2c_register_board_info(0, bfin_i2c_board_info,
2388 ARRAY_SIZE(bfin_i2c_board_info));
1823 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); 2389 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
1824 2390
1825 return 0; 2391 return 0;
@@ -1827,6 +2393,34 @@ static int __init stamp_init(void)
1827 2393
1828arch_initcall(stamp_init); 2394arch_initcall(stamp_init);
1829 2395
2396
2397static struct platform_device *stamp_early_devices[] __initdata = {
2398#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
2399#ifdef CONFIG_SERIAL_BFIN_UART0
2400 &bfin_uart0_device,
2401#endif
2402#ifdef CONFIG_SERIAL_BFIN_UART1
2403 &bfin_uart1_device,
2404#endif
2405#endif
2406
2407#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
2408#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
2409 &bfin_sport0_uart_device,
2410#endif
2411#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
2412 &bfin_sport1_uart_device,
2413#endif
2414#endif
2415};
2416
2417void __init native_machine_early_platform_add_devices(void)
2418{
2419 printk(KERN_INFO "register early platform devices\n");
2420 early_platform_add_devices(stamp_early_devices,
2421 ARRAY_SIZE(stamp_early_devices));
2422}
2423
1830void native_machine_restart(char *cmd) 2424void native_machine_restart(char *cmd)
1831{ 2425{
1832 /* workaround reboot hang when booting from SPI */ 2426 /* workaround reboot hang when booting from SPI */
diff --git a/arch/blackfin/mach-bf537/boards/tcm_bf537.c b/arch/blackfin/mach-bf537/boards/tcm_bf537.c
index 57163b65a4f5..4f0a2e72ce4c 100644
--- a/arch/blackfin/mach-bf537/boards/tcm_bf537.c
+++ b/arch/blackfin/mach-bf537/boards/tcm_bf537.c
@@ -74,7 +74,7 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
74}; 74};
75#endif 75#endif
76 76
77#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) 77#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
78static struct bfin5xx_spi_chip ad1836_spi_chip_info = { 78static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
79 .enable_dma = 0, 79 .enable_dma = 0,
80 .bits_per_word = 16, 80 .bits_per_word = 16,
@@ -113,7 +113,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
113 }, 113 },
114#endif 114#endif
115 115
116#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) 116#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
117 { 117 {
118 .modalias = "ad1836", 118 .modalias = "ad1836",
119 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 119 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
@@ -327,25 +327,93 @@ static struct platform_device cm_flash_device = {
327#endif 327#endif
328 328
329#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 329#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
330static struct resource bfin_uart_resources[] = { 330#ifdef CONFIG_SERIAL_BFIN_UART0
331static struct resource bfin_uart0_resources[] = {
331 { 332 {
332 .start = 0xFFC00400, 333 .start = UART0_THR,
333 .end = 0xFFC004FF, 334 .end = UART0_GCTL+2,
334 .flags = IORESOURCE_MEM, 335 .flags = IORESOURCE_MEM,
335 }, { 336 },
336 .start = 0xFFC02000, 337 {
337 .end = 0xFFC020FF, 338 .start = IRQ_UART0_RX,
339 .end = IRQ_UART0_RX+1,
340 .flags = IORESOURCE_IRQ,
341 },
342 {
343 .start = IRQ_UART0_ERROR,
344 .end = IRQ_UART0_ERROR,
345 .flags = IORESOURCE_IRQ,
346 },
347 {
348 .start = CH_UART0_TX,
349 .end = CH_UART0_TX,
350 .flags = IORESOURCE_DMA,
351 },
352 {
353 .start = CH_UART0_RX,
354 .end = CH_UART0_RX,
355 .flags = IORESOURCE_DMA,
356 },
357};
358
359unsigned short bfin_uart0_peripherals[] = {
360 P_UART0_TX, P_UART0_RX, 0
361};
362
363static struct platform_device bfin_uart0_device = {
364 .name = "bfin-uart",
365 .id = 0,
366 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
367 .resource = bfin_uart0_resources,
368 .dev = {
369 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
370 },
371};
372#endif
373#ifdef CONFIG_SERIAL_BFIN_UART1
374static struct resource bfin_uart1_resources[] = {
375 {
376 .start = UART1_THR,
377 .end = UART1_GCTL+2,
338 .flags = IORESOURCE_MEM, 378 .flags = IORESOURCE_MEM,
339 }, 379 },
380 {
381 .start = IRQ_UART1_RX,
382 .end = IRQ_UART1_RX+1,
383 .flags = IORESOURCE_IRQ,
384 },
385 {
386 .start = IRQ_UART1_ERROR,
387 .end = IRQ_UART1_ERROR,
388 .flags = IORESOURCE_IRQ,
389 },
390 {
391 .start = CH_UART1_TX,
392 .end = CH_UART1_TX,
393 .flags = IORESOURCE_DMA,
394 },
395 {
396 .start = CH_UART1_RX,
397 .end = CH_UART1_RX,
398 .flags = IORESOURCE_DMA,
399 },
400};
401
402unsigned short bfin_uart1_peripherals[] = {
403 P_UART1_TX, P_UART1_RX, 0
340}; 404};
341 405
342static struct platform_device bfin_uart_device = { 406static struct platform_device bfin_uart1_device = {
343 .name = "bfin-uart", 407 .name = "bfin-uart",
344 .id = 1, 408 .id = 1,
345 .num_resources = ARRAY_SIZE(bfin_uart_resources), 409 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
346 .resource = bfin_uart_resources, 410 .resource = bfin_uart1_resources,
411 .dev = {
412 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
413 },
347}; 414};
348#endif 415#endif
416#endif
349 417
350#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 418#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
351#ifdef CONFIG_BFIN_SIR0 419#ifdef CONFIG_BFIN_SIR0
@@ -425,16 +493,75 @@ static struct platform_device i2c_bfin_twi_device = {
425#endif 493#endif
426 494
427#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 495#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
496#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
497static struct resource bfin_sport0_uart_resources[] = {
498 {
499 .start = SPORT0_TCR1,
500 .end = SPORT0_MRCS3+4,
501 .flags = IORESOURCE_MEM,
502 },
503 {
504 .start = IRQ_SPORT0_RX,
505 .end = IRQ_SPORT0_RX+1,
506 .flags = IORESOURCE_IRQ,
507 },
508 {
509 .start = IRQ_SPORT0_ERROR,
510 .end = IRQ_SPORT0_ERROR,
511 .flags = IORESOURCE_IRQ,
512 },
513};
514
515unsigned short bfin_sport0_peripherals[] = {
516 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
517 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
518};
519
428static struct platform_device bfin_sport0_uart_device = { 520static struct platform_device bfin_sport0_uart_device = {
429 .name = "bfin-sport-uart", 521 .name = "bfin-sport-uart",
430 .id = 0, 522 .id = 0,
523 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
524 .resource = bfin_sport0_uart_resources,
525 .dev = {
526 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
527 },
528};
529#endif
530#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
531static struct resource bfin_sport1_uart_resources[] = {
532 {
533 .start = SPORT1_TCR1,
534 .end = SPORT1_MRCS3+4,
535 .flags = IORESOURCE_MEM,
536 },
537 {
538 .start = IRQ_SPORT1_RX,
539 .end = IRQ_SPORT1_RX+1,
540 .flags = IORESOURCE_IRQ,
541 },
542 {
543 .start = IRQ_SPORT1_ERROR,
544 .end = IRQ_SPORT1_ERROR,
545 .flags = IORESOURCE_IRQ,
546 },
547};
548
549unsigned short bfin_sport1_peripherals[] = {
550 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
551 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
431}; 552};
432 553
433static struct platform_device bfin_sport1_uart_device = { 554static struct platform_device bfin_sport1_uart_device = {
434 .name = "bfin-sport-uart", 555 .name = "bfin-sport-uart",
435 .id = 1, 556 .id = 1,
557 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
558 .resource = bfin_sport1_uart_resources,
559 .dev = {
560 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
561 },
436}; 562};
437#endif 563#endif
564#endif
438 565
439#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) 566#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
440static struct platform_device bfin_mii_bus = { 567static struct platform_device bfin_mii_bus = {
@@ -524,7 +651,12 @@ static struct platform_device *cm_bf537_devices[] __initdata = {
524#endif 651#endif
525 652
526#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 653#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
527 &bfin_uart_device, 654#ifdef CONFIG_SERIAL_BFIN_UART0
655 &bfin_uart0_device,
656#endif
657#ifdef CONFIG_SERIAL_BFIN_UART1
658 &bfin_uart1_device,
659#endif
528#endif 660#endif
529 661
530#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 662#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
@@ -541,9 +673,13 @@ static struct platform_device *cm_bf537_devices[] __initdata = {
541#endif 673#endif
542 674
543#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 675#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
676#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
544 &bfin_sport0_uart_device, 677 &bfin_sport0_uart_device,
678#endif
679#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
545 &bfin_sport1_uart_device, 680 &bfin_sport1_uart_device,
546#endif 681#endif
682#endif
547 683
548#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 684#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
549 &isp1362_hcd_device, 685 &isp1362_hcd_device,
@@ -591,6 +727,33 @@ static int __init tcm_bf537_init(void)
591 727
592arch_initcall(tcm_bf537_init); 728arch_initcall(tcm_bf537_init);
593 729
730static struct platform_device *cm_bf537_early_devices[] __initdata = {
731#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
732#ifdef CONFIG_SERIAL_BFIN_UART0
733 &bfin_uart0_device,
734#endif
735#ifdef CONFIG_SERIAL_BFIN_UART1
736 &bfin_uart1_device,
737#endif
738#endif
739
740#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
741#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
742 &bfin_sport0_uart_device,
743#endif
744#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
745 &bfin_sport1_uart_device,
746#endif
747#endif
748};
749
750void __init native_machine_early_platform_add_devices(void)
751{
752 printk(KERN_INFO "register early platform devices\n");
753 early_platform_add_devices(cm_bf537_early_devices,
754 ARRAY_SIZE(cm_bf537_early_devices));
755}
756
594void bfin_get_ether_addr(char *addr) 757void bfin_get_ether_addr(char *addr)
595{ 758{
596 random_ether_addr(addr); 759 random_ether_addr(addr);
diff --git a/arch/blackfin/mach-bf537/include/mach/defBF534.h b/arch/blackfin/mach-bf537/include/mach/defBF534.h
index 066d5c261f47..cf396ea40092 100644
--- a/arch/blackfin/mach-bf537/include/mach/defBF534.h
+++ b/arch/blackfin/mach-bf537/include/mach/defBF534.h
@@ -1702,628 +1702,6 @@
1702#define RCV_HALF 0x0004 /* Receive FIFO Has 1 Byte To Read */ 1702#define RCV_HALF 0x0004 /* Receive FIFO Has 1 Byte To Read */
1703#define RCV_FULL 0x000C /* Receive FIFO Full (2 Bytes To Read) */ 1703#define RCV_FULL 0x000C /* Receive FIFO Full (2 Bytes To Read) */
1704 1704
1705/* ************ CONTROLLER AREA NETWORK (CAN) MASKS ***************/
1706/* CAN_CONTROL Masks */
1707#define SRS 0x0001 /* Software Reset */
1708#define DNM 0x0002 /* Device Net Mode */
1709#define ABO 0x0004 /* Auto-Bus On Enable */
1710#define TXPRIO 0x0008 /* TX Priority (Priority/Mailbox*) */
1711#define WBA 0x0010 /* Wake-Up On CAN Bus Activity Enable */
1712#define SMR 0x0020 /* Sleep Mode Request */
1713#define CSR 0x0040 /* CAN Suspend Mode Request */
1714#define CCR 0x0080 /* CAN Configuration Mode Request */
1715
1716/* CAN_STATUS Masks */
1717#define WT 0x0001 /* TX Warning Flag */
1718#define WR 0x0002 /* RX Warning Flag */
1719#define EP 0x0004 /* Error Passive Mode */
1720#define EBO 0x0008 /* Error Bus Off Mode */
1721#define SMA 0x0020 /* Sleep Mode Acknowledge */
1722#define CSA 0x0040 /* Suspend Mode Acknowledge */
1723#define CCA 0x0080 /* Configuration Mode Acknowledge */
1724#define MBPTR 0x1F00 /* Mailbox Pointer */
1725#define TRM 0x4000 /* Transmit Mode */
1726#define REC 0x8000 /* Receive Mode */
1727
1728/* CAN_CLOCK Masks */
1729#define BRP 0x03FF /* Bit-Rate Pre-Scaler */
1730
1731/* CAN_TIMING Masks */
1732#define TSEG1 0x000F /* Time Segment 1 */
1733#define TSEG2 0x0070 /* Time Segment 2 */
1734#define SAM 0x0080 /* Sampling */
1735#define SJW 0x0300 /* Synchronization Jump Width */
1736
1737/* CAN_DEBUG Masks */
1738#define DEC 0x0001 /* Disable CAN Error Counters */
1739#define DRI 0x0002 /* Disable CAN RX Input */
1740#define DTO 0x0004 /* Disable CAN TX Output */
1741#define DIL 0x0008 /* Disable CAN Internal Loop */
1742#define MAA 0x0010 /* Mode Auto-Acknowledge Enable */
1743#define MRB 0x0020 /* Mode Read Back Enable */
1744#define CDE 0x8000 /* CAN Debug Enable */
1745
1746/* CAN_CEC Masks */
1747#define RXECNT 0x00FF /* Receive Error Counter */
1748#define TXECNT 0xFF00 /* Transmit Error Counter */
1749
1750/* CAN_INTR Masks */
1751#define MBRIRQ 0x0001 /* Mailbox Receive Interrupt */
1752#define MBRIF MBRIRQ /* legacy */
1753#define MBTIRQ 0x0002 /* Mailbox Transmit Interrupt */
1754#define MBTIF MBTIRQ /* legacy */
1755#define GIRQ 0x0004 /* Global Interrupt */
1756#define SMACK 0x0008 /* Sleep Mode Acknowledge */
1757#define CANTX 0x0040 /* CAN TX Bus Value */
1758#define CANRX 0x0080 /* CAN RX Bus Value */
1759
1760/* CAN_MBxx_ID1 and CAN_MBxx_ID0 Masks */
1761#define DFC 0xFFFF /* Data Filtering Code (If Enabled) (ID0) */
1762#define EXTID_LO 0xFFFF /* Lower 16 Bits of Extended Identifier (ID0) */
1763#define EXTID_HI 0x0003 /* Upper 2 Bits of Extended Identifier (ID1) */
1764#define BASEID 0x1FFC /* Base Identifier */
1765#define IDE 0x2000 /* Identifier Extension */
1766#define RTR 0x4000 /* Remote Frame Transmission Request */
1767#define AME 0x8000 /* Acceptance Mask Enable */
1768
1769/* CAN_MBxx_TIMESTAMP Masks */
1770#define TSV 0xFFFF /* Timestamp */
1771
1772/* CAN_MBxx_LENGTH Masks */
1773#define DLC 0x000F /* Data Length Code */
1774
1775/* CAN_AMxxH and CAN_AMxxL Masks */
1776#define DFM 0xFFFF /* Data Field Mask (If Enabled) (CAN_AMxxL) */
1777#define EXTID_LO 0xFFFF /* Lower 16 Bits of Extended Identifier (CAN_AMxxL) */
1778#define EXTID_HI 0x0003 /* Upper 2 Bits of Extended Identifier (CAN_AMxxH) */
1779#define BASEID 0x1FFC /* Base Identifier */
1780#define AMIDE 0x2000 /* Acceptance Mask ID Extension Enable */
1781#define FMD 0x4000 /* Full Mask Data Field Enable */
1782#define FDF 0x8000 /* Filter On Data Field Enable */
1783
1784/* CAN_MC1 Masks */
1785#define MC0 0x0001 /* Enable Mailbox 0 */
1786#define MC1 0x0002 /* Enable Mailbox 1 */
1787#define MC2 0x0004 /* Enable Mailbox 2 */
1788#define MC3 0x0008 /* Enable Mailbox 3 */
1789#define MC4 0x0010 /* Enable Mailbox 4 */
1790#define MC5 0x0020 /* Enable Mailbox 5 */
1791#define MC6 0x0040 /* Enable Mailbox 6 */
1792#define MC7 0x0080 /* Enable Mailbox 7 */
1793#define MC8 0x0100 /* Enable Mailbox 8 */
1794#define MC9 0x0200 /* Enable Mailbox 9 */
1795#define MC10 0x0400 /* Enable Mailbox 10 */
1796#define MC11 0x0800 /* Enable Mailbox 11 */
1797#define MC12 0x1000 /* Enable Mailbox 12 */
1798#define MC13 0x2000 /* Enable Mailbox 13 */
1799#define MC14 0x4000 /* Enable Mailbox 14 */
1800#define MC15 0x8000 /* Enable Mailbox 15 */
1801
1802/* CAN_MC2 Masks */
1803#define MC16 0x0001 /* Enable Mailbox 16 */
1804#define MC17 0x0002 /* Enable Mailbox 17 */
1805#define MC18 0x0004 /* Enable Mailbox 18 */
1806#define MC19 0x0008 /* Enable Mailbox 19 */
1807#define MC20 0x0010 /* Enable Mailbox 20 */
1808#define MC21 0x0020 /* Enable Mailbox 21 */
1809#define MC22 0x0040 /* Enable Mailbox 22 */
1810#define MC23 0x0080 /* Enable Mailbox 23 */
1811#define MC24 0x0100 /* Enable Mailbox 24 */
1812#define MC25 0x0200 /* Enable Mailbox 25 */
1813#define MC26 0x0400 /* Enable Mailbox 26 */
1814#define MC27 0x0800 /* Enable Mailbox 27 */
1815#define MC28 0x1000 /* Enable Mailbox 28 */
1816#define MC29 0x2000 /* Enable Mailbox 29 */
1817#define MC30 0x4000 /* Enable Mailbox 30 */
1818#define MC31 0x8000 /* Enable Mailbox 31 */
1819
1820/* CAN_MD1 Masks */
1821#define MD0 0x0001 /* Enable Mailbox 0 For Receive */
1822#define MD1 0x0002 /* Enable Mailbox 1 For Receive */
1823#define MD2 0x0004 /* Enable Mailbox 2 For Receive */
1824#define MD3 0x0008 /* Enable Mailbox 3 For Receive */
1825#define MD4 0x0010 /* Enable Mailbox 4 For Receive */
1826#define MD5 0x0020 /* Enable Mailbox 5 For Receive */
1827#define MD6 0x0040 /* Enable Mailbox 6 For Receive */
1828#define MD7 0x0080 /* Enable Mailbox 7 For Receive */
1829#define MD8 0x0100 /* Enable Mailbox 8 For Receive */
1830#define MD9 0x0200 /* Enable Mailbox 9 For Receive */
1831#define MD10 0x0400 /* Enable Mailbox 10 For Receive */
1832#define MD11 0x0800 /* Enable Mailbox 11 For Receive */
1833#define MD12 0x1000 /* Enable Mailbox 12 For Receive */
1834#define MD13 0x2000 /* Enable Mailbox 13 For Receive */
1835#define MD14 0x4000 /* Enable Mailbox 14 For Receive */
1836#define MD15 0x8000 /* Enable Mailbox 15 For Receive */
1837
1838/* CAN_MD2 Masks */
1839#define MD16 0x0001 /* Enable Mailbox 16 For Receive */
1840#define MD17 0x0002 /* Enable Mailbox 17 For Receive */
1841#define MD18 0x0004 /* Enable Mailbox 18 For Receive */
1842#define MD19 0x0008 /* Enable Mailbox 19 For Receive */
1843#define MD20 0x0010 /* Enable Mailbox 20 For Receive */
1844#define MD21 0x0020 /* Enable Mailbox 21 For Receive */
1845#define MD22 0x0040 /* Enable Mailbox 22 For Receive */
1846#define MD23 0x0080 /* Enable Mailbox 23 For Receive */
1847#define MD24 0x0100 /* Enable Mailbox 24 For Receive */
1848#define MD25 0x0200 /* Enable Mailbox 25 For Receive */
1849#define MD26 0x0400 /* Enable Mailbox 26 For Receive */
1850#define MD27 0x0800 /* Enable Mailbox 27 For Receive */
1851#define MD28 0x1000 /* Enable Mailbox 28 For Receive */
1852#define MD29 0x2000 /* Enable Mailbox 29 For Receive */
1853#define MD30 0x4000 /* Enable Mailbox 30 For Receive */
1854#define MD31 0x8000 /* Enable Mailbox 31 For Receive */
1855
1856/* CAN_RMP1 Masks */
1857#define RMP0 0x0001 /* RX Message Pending In Mailbox 0 */
1858#define RMP1 0x0002 /* RX Message Pending In Mailbox 1 */
1859#define RMP2 0x0004 /* RX Message Pending In Mailbox 2 */
1860#define RMP3 0x0008 /* RX Message Pending In Mailbox 3 */
1861#define RMP4 0x0010 /* RX Message Pending In Mailbox 4 */
1862#define RMP5 0x0020 /* RX Message Pending In Mailbox 5 */
1863#define RMP6 0x0040 /* RX Message Pending In Mailbox 6 */
1864#define RMP7 0x0080 /* RX Message Pending In Mailbox 7 */
1865#define RMP8 0x0100 /* RX Message Pending In Mailbox 8 */
1866#define RMP9 0x0200 /* RX Message Pending In Mailbox 9 */
1867#define RMP10 0x0400 /* RX Message Pending In Mailbox 10 */
1868#define RMP11 0x0800 /* RX Message Pending In Mailbox 11 */
1869#define RMP12 0x1000 /* RX Message Pending In Mailbox 12 */
1870#define RMP13 0x2000 /* RX Message Pending In Mailbox 13 */
1871#define RMP14 0x4000 /* RX Message Pending In Mailbox 14 */
1872#define RMP15 0x8000 /* RX Message Pending In Mailbox 15 */
1873
1874/* CAN_RMP2 Masks */
1875#define RMP16 0x0001 /* RX Message Pending In Mailbox 16 */
1876#define RMP17 0x0002 /* RX Message Pending In Mailbox 17 */
1877#define RMP18 0x0004 /* RX Message Pending In Mailbox 18 */
1878#define RMP19 0x0008 /* RX Message Pending In Mailbox 19 */
1879#define RMP20 0x0010 /* RX Message Pending In Mailbox 20 */
1880#define RMP21 0x0020 /* RX Message Pending In Mailbox 21 */
1881#define RMP22 0x0040 /* RX Message Pending In Mailbox 22 */
1882#define RMP23 0x0080 /* RX Message Pending In Mailbox 23 */
1883#define RMP24 0x0100 /* RX Message Pending In Mailbox 24 */
1884#define RMP25 0x0200 /* RX Message Pending In Mailbox 25 */
1885#define RMP26 0x0400 /* RX Message Pending In Mailbox 26 */
1886#define RMP27 0x0800 /* RX Message Pending In Mailbox 27 */
1887#define RMP28 0x1000 /* RX Message Pending In Mailbox 28 */
1888#define RMP29 0x2000 /* RX Message Pending In Mailbox 29 */
1889#define RMP30 0x4000 /* RX Message Pending In Mailbox 30 */
1890#define RMP31 0x8000 /* RX Message Pending In Mailbox 31 */
1891
1892/* CAN_RML1 Masks */
1893#define RML0 0x0001 /* RX Message Lost In Mailbox 0 */
1894#define RML1 0x0002 /* RX Message Lost In Mailbox 1 */
1895#define RML2 0x0004 /* RX Message Lost In Mailbox 2 */
1896#define RML3 0x0008 /* RX Message Lost In Mailbox 3 */
1897#define RML4 0x0010 /* RX Message Lost In Mailbox 4 */
1898#define RML5 0x0020 /* RX Message Lost In Mailbox 5 */
1899#define RML6 0x0040 /* RX Message Lost In Mailbox 6 */
1900#define RML7 0x0080 /* RX Message Lost In Mailbox 7 */
1901#define RML8 0x0100 /* RX Message Lost In Mailbox 8 */
1902#define RML9 0x0200 /* RX Message Lost In Mailbox 9 */
1903#define RML10 0x0400 /* RX Message Lost In Mailbox 10 */
1904#define RML11 0x0800 /* RX Message Lost In Mailbox 11 */
1905#define RML12 0x1000 /* RX Message Lost In Mailbox 12 */
1906#define RML13 0x2000 /* RX Message Lost In Mailbox 13 */
1907#define RML14 0x4000 /* RX Message Lost In Mailbox 14 */
1908#define RML15 0x8000 /* RX Message Lost In Mailbox 15 */
1909
1910/* CAN_RML2 Masks */
1911#define RML16 0x0001 /* RX Message Lost In Mailbox 16 */
1912#define RML17 0x0002 /* RX Message Lost In Mailbox 17 */
1913#define RML18 0x0004 /* RX Message Lost In Mailbox 18 */
1914#define RML19 0x0008 /* RX Message Lost In Mailbox 19 */
1915#define RML20 0x0010 /* RX Message Lost In Mailbox 20 */
1916#define RML21 0x0020 /* RX Message Lost In Mailbox 21 */
1917#define RML22 0x0040 /* RX Message Lost In Mailbox 22 */
1918#define RML23 0x0080 /* RX Message Lost In Mailbox 23 */
1919#define RML24 0x0100 /* RX Message Lost In Mailbox 24 */
1920#define RML25 0x0200 /* RX Message Lost In Mailbox 25 */
1921#define RML26 0x0400 /* RX Message Lost In Mailbox 26 */
1922#define RML27 0x0800 /* RX Message Lost In Mailbox 27 */
1923#define RML28 0x1000 /* RX Message Lost In Mailbox 28 */
1924#define RML29 0x2000 /* RX Message Lost In Mailbox 29 */
1925#define RML30 0x4000 /* RX Message Lost In Mailbox 30 */
1926#define RML31 0x8000 /* RX Message Lost In Mailbox 31 */
1927
1928/* CAN_OPSS1 Masks */
1929#define OPSS0 0x0001 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 0 */
1930#define OPSS1 0x0002 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 1 */
1931#define OPSS2 0x0004 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 2 */
1932#define OPSS3 0x0008 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 3 */
1933#define OPSS4 0x0010 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 4 */
1934#define OPSS5 0x0020 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 5 */
1935#define OPSS6 0x0040 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 6 */
1936#define OPSS7 0x0080 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 7 */
1937#define OPSS8 0x0100 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 8 */
1938#define OPSS9 0x0200 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 9 */
1939#define OPSS10 0x0400 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 10 */
1940#define OPSS11 0x0800 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 11 */
1941#define OPSS12 0x1000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 12 */
1942#define OPSS13 0x2000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 13 */
1943#define OPSS14 0x4000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 14 */
1944#define OPSS15 0x8000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 15 */
1945
1946/* CAN_OPSS2 Masks */
1947#define OPSS16 0x0001 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 16 */
1948#define OPSS17 0x0002 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 17 */
1949#define OPSS18 0x0004 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 18 */
1950#define OPSS19 0x0008 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 19 */
1951#define OPSS20 0x0010 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 20 */
1952#define OPSS21 0x0020 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 21 */
1953#define OPSS22 0x0040 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 22 */
1954#define OPSS23 0x0080 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 23 */
1955#define OPSS24 0x0100 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 24 */
1956#define OPSS25 0x0200 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 25 */
1957#define OPSS26 0x0400 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 26 */
1958#define OPSS27 0x0800 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 27 */
1959#define OPSS28 0x1000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 28 */
1960#define OPSS29 0x2000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 29 */
1961#define OPSS30 0x4000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 30 */
1962#define OPSS31 0x8000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 31 */
1963
1964/* CAN_TRR1 Masks */
1965#define TRR0 0x0001 /* Deny But Don't Lock Access To Mailbox 0 */
1966#define TRR1 0x0002 /* Deny But Don't Lock Access To Mailbox 1 */
1967#define TRR2 0x0004 /* Deny But Don't Lock Access To Mailbox 2 */
1968#define TRR3 0x0008 /* Deny But Don't Lock Access To Mailbox 3 */
1969#define TRR4 0x0010 /* Deny But Don't Lock Access To Mailbox 4 */
1970#define TRR5 0x0020 /* Deny But Don't Lock Access To Mailbox 5 */
1971#define TRR6 0x0040 /* Deny But Don't Lock Access To Mailbox 6 */
1972#define TRR7 0x0080 /* Deny But Don't Lock Access To Mailbox 7 */
1973#define TRR8 0x0100 /* Deny But Don't Lock Access To Mailbox 8 */
1974#define TRR9 0x0200 /* Deny But Don't Lock Access To Mailbox 9 */
1975#define TRR10 0x0400 /* Deny But Don't Lock Access To Mailbox 10 */
1976#define TRR11 0x0800 /* Deny But Don't Lock Access To Mailbox 11 */
1977#define TRR12 0x1000 /* Deny But Don't Lock Access To Mailbox 12 */
1978#define TRR13 0x2000 /* Deny But Don't Lock Access To Mailbox 13 */
1979#define TRR14 0x4000 /* Deny But Don't Lock Access To Mailbox 14 */
1980#define TRR15 0x8000 /* Deny But Don't Lock Access To Mailbox 15 */
1981
1982/* CAN_TRR2 Masks */
1983#define TRR16 0x0001 /* Deny But Don't Lock Access To Mailbox 16 */
1984#define TRR17 0x0002 /* Deny But Don't Lock Access To Mailbox 17 */
1985#define TRR18 0x0004 /* Deny But Don't Lock Access To Mailbox 18 */
1986#define TRR19 0x0008 /* Deny But Don't Lock Access To Mailbox 19 */
1987#define TRR20 0x0010 /* Deny But Don't Lock Access To Mailbox 20 */
1988#define TRR21 0x0020 /* Deny But Don't Lock Access To Mailbox 21 */
1989#define TRR22 0x0040 /* Deny But Don't Lock Access To Mailbox 22 */
1990#define TRR23 0x0080 /* Deny But Don't Lock Access To Mailbox 23 */
1991#define TRR24 0x0100 /* Deny But Don't Lock Access To Mailbox 24 */
1992#define TRR25 0x0200 /* Deny But Don't Lock Access To Mailbox 25 */
1993#define TRR26 0x0400 /* Deny But Don't Lock Access To Mailbox 26 */
1994#define TRR27 0x0800 /* Deny But Don't Lock Access To Mailbox 27 */
1995#define TRR28 0x1000 /* Deny But Don't Lock Access To Mailbox 28 */
1996#define TRR29 0x2000 /* Deny But Don't Lock Access To Mailbox 29 */
1997#define TRR30 0x4000 /* Deny But Don't Lock Access To Mailbox 30 */
1998#define TRR31 0x8000 /* Deny But Don't Lock Access To Mailbox 31 */
1999
2000/* CAN_TRS1 Masks */
2001#define TRS0 0x0001 /* Remote Frame Request For Mailbox 0 */
2002#define TRS1 0x0002 /* Remote Frame Request For Mailbox 1 */
2003#define TRS2 0x0004 /* Remote Frame Request For Mailbox 2 */
2004#define TRS3 0x0008 /* Remote Frame Request For Mailbox 3 */
2005#define TRS4 0x0010 /* Remote Frame Request For Mailbox 4 */
2006#define TRS5 0x0020 /* Remote Frame Request For Mailbox 5 */
2007#define TRS6 0x0040 /* Remote Frame Request For Mailbox 6 */
2008#define TRS7 0x0080 /* Remote Frame Request For Mailbox 7 */
2009#define TRS8 0x0100 /* Remote Frame Request For Mailbox 8 */
2010#define TRS9 0x0200 /* Remote Frame Request For Mailbox 9 */
2011#define TRS10 0x0400 /* Remote Frame Request For Mailbox 10 */
2012#define TRS11 0x0800 /* Remote Frame Request For Mailbox 11 */
2013#define TRS12 0x1000 /* Remote Frame Request For Mailbox 12 */
2014#define TRS13 0x2000 /* Remote Frame Request For Mailbox 13 */
2015#define TRS14 0x4000 /* Remote Frame Request For Mailbox 14 */
2016#define TRS15 0x8000 /* Remote Frame Request For Mailbox 15 */
2017
2018/* CAN_TRS2 Masks */
2019#define TRS16 0x0001 /* Remote Frame Request For Mailbox 16 */
2020#define TRS17 0x0002 /* Remote Frame Request For Mailbox 17 */
2021#define TRS18 0x0004 /* Remote Frame Request For Mailbox 18 */
2022#define TRS19 0x0008 /* Remote Frame Request For Mailbox 19 */
2023#define TRS20 0x0010 /* Remote Frame Request For Mailbox 20 */
2024#define TRS21 0x0020 /* Remote Frame Request For Mailbox 21 */
2025#define TRS22 0x0040 /* Remote Frame Request For Mailbox 22 */
2026#define TRS23 0x0080 /* Remote Frame Request For Mailbox 23 */
2027#define TRS24 0x0100 /* Remote Frame Request For Mailbox 24 */
2028#define TRS25 0x0200 /* Remote Frame Request For Mailbox 25 */
2029#define TRS26 0x0400 /* Remote Frame Request For Mailbox 26 */
2030#define TRS27 0x0800 /* Remote Frame Request For Mailbox 27 */
2031#define TRS28 0x1000 /* Remote Frame Request For Mailbox 28 */
2032#define TRS29 0x2000 /* Remote Frame Request For Mailbox 29 */
2033#define TRS30 0x4000 /* Remote Frame Request For Mailbox 30 */
2034#define TRS31 0x8000 /* Remote Frame Request For Mailbox 31 */
2035
2036/* CAN_AA1 Masks */
2037#define AA0 0x0001 /* Aborted Message In Mailbox 0 */
2038#define AA1 0x0002 /* Aborted Message In Mailbox 1 */
2039#define AA2 0x0004 /* Aborted Message In Mailbox 2 */
2040#define AA3 0x0008 /* Aborted Message In Mailbox 3 */
2041#define AA4 0x0010 /* Aborted Message In Mailbox 4 */
2042#define AA5 0x0020 /* Aborted Message In Mailbox 5 */
2043#define AA6 0x0040 /* Aborted Message In Mailbox 6 */
2044#define AA7 0x0080 /* Aborted Message In Mailbox 7 */
2045#define AA8 0x0100 /* Aborted Message In Mailbox 8 */
2046#define AA9 0x0200 /* Aborted Message In Mailbox 9 */
2047#define AA10 0x0400 /* Aborted Message In Mailbox 10 */
2048#define AA11 0x0800 /* Aborted Message In Mailbox 11 */
2049#define AA12 0x1000 /* Aborted Message In Mailbox 12 */
2050#define AA13 0x2000 /* Aborted Message In Mailbox 13 */
2051#define AA14 0x4000 /* Aborted Message In Mailbox 14 */
2052#define AA15 0x8000 /* Aborted Message In Mailbox 15 */
2053
2054/* CAN_AA2 Masks */
2055#define AA16 0x0001 /* Aborted Message In Mailbox 16 */
2056#define AA17 0x0002 /* Aborted Message In Mailbox 17 */
2057#define AA18 0x0004 /* Aborted Message In Mailbox 18 */
2058#define AA19 0x0008 /* Aborted Message In Mailbox 19 */
2059#define AA20 0x0010 /* Aborted Message In Mailbox 20 */
2060#define AA21 0x0020 /* Aborted Message In Mailbox 21 */
2061#define AA22 0x0040 /* Aborted Message In Mailbox 22 */
2062#define AA23 0x0080 /* Aborted Message In Mailbox 23 */
2063#define AA24 0x0100 /* Aborted Message In Mailbox 24 */
2064#define AA25 0x0200 /* Aborted Message In Mailbox 25 */
2065#define AA26 0x0400 /* Aborted Message In Mailbox 26 */
2066#define AA27 0x0800 /* Aborted Message In Mailbox 27 */
2067#define AA28 0x1000 /* Aborted Message In Mailbox 28 */
2068#define AA29 0x2000 /* Aborted Message In Mailbox 29 */
2069#define AA30 0x4000 /* Aborted Message In Mailbox 30 */
2070#define AA31 0x8000 /* Aborted Message In Mailbox 31 */
2071
2072/* CAN_TA1 Masks */
2073#define TA0 0x0001 /* Transmit Successful From Mailbox 0 */
2074#define TA1 0x0002 /* Transmit Successful From Mailbox 1 */
2075#define TA2 0x0004 /* Transmit Successful From Mailbox 2 */
2076#define TA3 0x0008 /* Transmit Successful From Mailbox 3 */
2077#define TA4 0x0010 /* Transmit Successful From Mailbox 4 */
2078#define TA5 0x0020 /* Transmit Successful From Mailbox 5 */
2079#define TA6 0x0040 /* Transmit Successful From Mailbox 6 */
2080#define TA7 0x0080 /* Transmit Successful From Mailbox 7 */
2081#define TA8 0x0100 /* Transmit Successful From Mailbox 8 */
2082#define TA9 0x0200 /* Transmit Successful From Mailbox 9 */
2083#define TA10 0x0400 /* Transmit Successful From Mailbox 10 */
2084#define TA11 0x0800 /* Transmit Successful From Mailbox 11 */
2085#define TA12 0x1000 /* Transmit Successful From Mailbox 12 */
2086#define TA13 0x2000 /* Transmit Successful From Mailbox 13 */
2087#define TA14 0x4000 /* Transmit Successful From Mailbox 14 */
2088#define TA15 0x8000 /* Transmit Successful From Mailbox 15 */
2089
2090/* CAN_TA2 Masks */
2091#define TA16 0x0001 /* Transmit Successful From Mailbox 16 */
2092#define TA17 0x0002 /* Transmit Successful From Mailbox 17 */
2093#define TA18 0x0004 /* Transmit Successful From Mailbox 18 */
2094#define TA19 0x0008 /* Transmit Successful From Mailbox 19 */
2095#define TA20 0x0010 /* Transmit Successful From Mailbox 20 */
2096#define TA21 0x0020 /* Transmit Successful From Mailbox 21 */
2097#define TA22 0x0040 /* Transmit Successful From Mailbox 22 */
2098#define TA23 0x0080 /* Transmit Successful From Mailbox 23 */
2099#define TA24 0x0100 /* Transmit Successful From Mailbox 24 */
2100#define TA25 0x0200 /* Transmit Successful From Mailbox 25 */
2101#define TA26 0x0400 /* Transmit Successful From Mailbox 26 */
2102#define TA27 0x0800 /* Transmit Successful From Mailbox 27 */
2103#define TA28 0x1000 /* Transmit Successful From Mailbox 28 */
2104#define TA29 0x2000 /* Transmit Successful From Mailbox 29 */
2105#define TA30 0x4000 /* Transmit Successful From Mailbox 30 */
2106#define TA31 0x8000 /* Transmit Successful From Mailbox 31 */
2107
2108/* CAN_MBTD Masks */
2109#define TDPTR 0x001F /* Mailbox To Temporarily Disable */
2110#define TDA 0x0040 /* Temporary Disable Acknowledge */
2111#define TDR 0x0080 /* Temporary Disable Request */
2112
2113/* CAN_RFH1 Masks */
2114#define RFH0 0x0001 /* Enable Automatic Remote Frame Handling For Mailbox 0 */
2115#define RFH1 0x0002 /* Enable Automatic Remote Frame Handling For Mailbox 1 */
2116#define RFH2 0x0004 /* Enable Automatic Remote Frame Handling For Mailbox 2 */
2117#define RFH3 0x0008 /* Enable Automatic Remote Frame Handling For Mailbox 3 */
2118#define RFH4 0x0010 /* Enable Automatic Remote Frame Handling For Mailbox 4 */
2119#define RFH5 0x0020 /* Enable Automatic Remote Frame Handling For Mailbox 5 */
2120#define RFH6 0x0040 /* Enable Automatic Remote Frame Handling For Mailbox 6 */
2121#define RFH7 0x0080 /* Enable Automatic Remote Frame Handling For Mailbox 7 */
2122#define RFH8 0x0100 /* Enable Automatic Remote Frame Handling For Mailbox 8 */
2123#define RFH9 0x0200 /* Enable Automatic Remote Frame Handling For Mailbox 9 */
2124#define RFH10 0x0400 /* Enable Automatic Remote Frame Handling For Mailbox 10 */
2125#define RFH11 0x0800 /* Enable Automatic Remote Frame Handling For Mailbox 11 */
2126#define RFH12 0x1000 /* Enable Automatic Remote Frame Handling For Mailbox 12 */
2127#define RFH13 0x2000 /* Enable Automatic Remote Frame Handling For Mailbox 13 */
2128#define RFH14 0x4000 /* Enable Automatic Remote Frame Handling For Mailbox 14 */
2129#define RFH15 0x8000 /* Enable Automatic Remote Frame Handling For Mailbox 15 */
2130
2131/* CAN_RFH2 Masks */
2132#define RFH16 0x0001 /* Enable Automatic Remote Frame Handling For Mailbox 16 */
2133#define RFH17 0x0002 /* Enable Automatic Remote Frame Handling For Mailbox 17 */
2134#define RFH18 0x0004 /* Enable Automatic Remote Frame Handling For Mailbox 18 */
2135#define RFH19 0x0008 /* Enable Automatic Remote Frame Handling For Mailbox 19 */
2136#define RFH20 0x0010 /* Enable Automatic Remote Frame Handling For Mailbox 20 */
2137#define RFH21 0x0020 /* Enable Automatic Remote Frame Handling For Mailbox 21 */
2138#define RFH22 0x0040 /* Enable Automatic Remote Frame Handling For Mailbox 22 */
2139#define RFH23 0x0080 /* Enable Automatic Remote Frame Handling For Mailbox 23 */
2140#define RFH24 0x0100 /* Enable Automatic Remote Frame Handling For Mailbox 24 */
2141#define RFH25 0x0200 /* Enable Automatic Remote Frame Handling For Mailbox 25 */
2142#define RFH26 0x0400 /* Enable Automatic Remote Frame Handling For Mailbox 26 */
2143#define RFH27 0x0800 /* Enable Automatic Remote Frame Handling For Mailbox 27 */
2144#define RFH28 0x1000 /* Enable Automatic Remote Frame Handling For Mailbox 28 */
2145#define RFH29 0x2000 /* Enable Automatic Remote Frame Handling For Mailbox 29 */
2146#define RFH30 0x4000 /* Enable Automatic Remote Frame Handling For Mailbox 30 */
2147#define RFH31 0x8000 /* Enable Automatic Remote Frame Handling For Mailbox 31 */
2148
2149/* CAN_MBTIF1 Masks */
2150#define MBTIF0 0x0001 /* TX Interrupt Active In Mailbox 0 */
2151#define MBTIF1 0x0002 /* TX Interrupt Active In Mailbox 1 */
2152#define MBTIF2 0x0004 /* TX Interrupt Active In Mailbox 2 */
2153#define MBTIF3 0x0008 /* TX Interrupt Active In Mailbox 3 */
2154#define MBTIF4 0x0010 /* TX Interrupt Active In Mailbox 4 */
2155#define MBTIF5 0x0020 /* TX Interrupt Active In Mailbox 5 */
2156#define MBTIF6 0x0040 /* TX Interrupt Active In Mailbox 6 */
2157#define MBTIF7 0x0080 /* TX Interrupt Active In Mailbox 7 */
2158#define MBTIF8 0x0100 /* TX Interrupt Active In Mailbox 8 */
2159#define MBTIF9 0x0200 /* TX Interrupt Active In Mailbox 9 */
2160#define MBTIF10 0x0400 /* TX Interrupt Active In Mailbox 10 */
2161#define MBTIF11 0x0800 /* TX Interrupt Active In Mailbox 11 */
2162#define MBTIF12 0x1000 /* TX Interrupt Active In Mailbox 12 */
2163#define MBTIF13 0x2000 /* TX Interrupt Active In Mailbox 13 */
2164#define MBTIF14 0x4000 /* TX Interrupt Active In Mailbox 14 */
2165#define MBTIF15 0x8000 /* TX Interrupt Active In Mailbox 15 */
2166
2167/* CAN_MBTIF2 Masks */
2168#define MBTIF16 0x0001 /* TX Interrupt Active In Mailbox 16 */
2169#define MBTIF17 0x0002 /* TX Interrupt Active In Mailbox 17 */
2170#define MBTIF18 0x0004 /* TX Interrupt Active In Mailbox 18 */
2171#define MBTIF19 0x0008 /* TX Interrupt Active In Mailbox 19 */
2172#define MBTIF20 0x0010 /* TX Interrupt Active In Mailbox 20 */
2173#define MBTIF21 0x0020 /* TX Interrupt Active In Mailbox 21 */
2174#define MBTIF22 0x0040 /* TX Interrupt Active In Mailbox 22 */
2175#define MBTIF23 0x0080 /* TX Interrupt Active In Mailbox 23 */
2176#define MBTIF24 0x0100 /* TX Interrupt Active In Mailbox 24 */
2177#define MBTIF25 0x0200 /* TX Interrupt Active In Mailbox 25 */
2178#define MBTIF26 0x0400 /* TX Interrupt Active In Mailbox 26 */
2179#define MBTIF27 0x0800 /* TX Interrupt Active In Mailbox 27 */
2180#define MBTIF28 0x1000 /* TX Interrupt Active In Mailbox 28 */
2181#define MBTIF29 0x2000 /* TX Interrupt Active In Mailbox 29 */
2182#define MBTIF30 0x4000 /* TX Interrupt Active In Mailbox 30 */
2183#define MBTIF31 0x8000 /* TX Interrupt Active In Mailbox 31 */
2184
2185/* CAN_MBRIF1 Masks */
2186#define MBRIF0 0x0001 /* RX Interrupt Active In Mailbox 0 */
2187#define MBRIF1 0x0002 /* RX Interrupt Active In Mailbox 1 */
2188#define MBRIF2 0x0004 /* RX Interrupt Active In Mailbox 2 */
2189#define MBRIF3 0x0008 /* RX Interrupt Active In Mailbox 3 */
2190#define MBRIF4 0x0010 /* RX Interrupt Active In Mailbox 4 */
2191#define MBRIF5 0x0020 /* RX Interrupt Active In Mailbox 5 */
2192#define MBRIF6 0x0040 /* RX Interrupt Active In Mailbox 6 */
2193#define MBRIF7 0x0080 /* RX Interrupt Active In Mailbox 7 */
2194#define MBRIF8 0x0100 /* RX Interrupt Active In Mailbox 8 */
2195#define MBRIF9 0x0200 /* RX Interrupt Active In Mailbox 9 */
2196#define MBRIF10 0x0400 /* RX Interrupt Active In Mailbox 10 */
2197#define MBRIF11 0x0800 /* RX Interrupt Active In Mailbox 11 */
2198#define MBRIF12 0x1000 /* RX Interrupt Active In Mailbox 12 */
2199#define MBRIF13 0x2000 /* RX Interrupt Active In Mailbox 13 */
2200#define MBRIF14 0x4000 /* RX Interrupt Active In Mailbox 14 */
2201#define MBRIF15 0x8000 /* RX Interrupt Active In Mailbox 15 */
2202
2203/* CAN_MBRIF2 Masks */
2204#define MBRIF16 0x0001 /* RX Interrupt Active In Mailbox 16 */
2205#define MBRIF17 0x0002 /* RX Interrupt Active In Mailbox 17 */
2206#define MBRIF18 0x0004 /* RX Interrupt Active In Mailbox 18 */
2207#define MBRIF19 0x0008 /* RX Interrupt Active In Mailbox 19 */
2208#define MBRIF20 0x0010 /* RX Interrupt Active In Mailbox 20 */
2209#define MBRIF21 0x0020 /* RX Interrupt Active In Mailbox 21 */
2210#define MBRIF22 0x0040 /* RX Interrupt Active In Mailbox 22 */
2211#define MBRIF23 0x0080 /* RX Interrupt Active In Mailbox 23 */
2212#define MBRIF24 0x0100 /* RX Interrupt Active In Mailbox 24 */
2213#define MBRIF25 0x0200 /* RX Interrupt Active In Mailbox 25 */
2214#define MBRIF26 0x0400 /* RX Interrupt Active In Mailbox 26 */
2215#define MBRIF27 0x0800 /* RX Interrupt Active In Mailbox 27 */
2216#define MBRIF28 0x1000 /* RX Interrupt Active In Mailbox 28 */
2217#define MBRIF29 0x2000 /* RX Interrupt Active In Mailbox 29 */
2218#define MBRIF30 0x4000 /* RX Interrupt Active In Mailbox 30 */
2219#define MBRIF31 0x8000 /* RX Interrupt Active In Mailbox 31 */
2220
2221/* CAN_MBIM1 Masks */
2222#define MBIM0 0x0001 /* Enable Interrupt For Mailbox 0 */
2223#define MBIM1 0x0002 /* Enable Interrupt For Mailbox 1 */
2224#define MBIM2 0x0004 /* Enable Interrupt For Mailbox 2 */
2225#define MBIM3 0x0008 /* Enable Interrupt For Mailbox 3 */
2226#define MBIM4 0x0010 /* Enable Interrupt For Mailbox 4 */
2227#define MBIM5 0x0020 /* Enable Interrupt For Mailbox 5 */
2228#define MBIM6 0x0040 /* Enable Interrupt For Mailbox 6 */
2229#define MBIM7 0x0080 /* Enable Interrupt For Mailbox 7 */
2230#define MBIM8 0x0100 /* Enable Interrupt For Mailbox 8 */
2231#define MBIM9 0x0200 /* Enable Interrupt For Mailbox 9 */
2232#define MBIM10 0x0400 /* Enable Interrupt For Mailbox 10 */
2233#define MBIM11 0x0800 /* Enable Interrupt For Mailbox 11 */
2234#define MBIM12 0x1000 /* Enable Interrupt For Mailbox 12 */
2235#define MBIM13 0x2000 /* Enable Interrupt For Mailbox 13 */
2236#define MBIM14 0x4000 /* Enable Interrupt For Mailbox 14 */
2237#define MBIM15 0x8000 /* Enable Interrupt For Mailbox 15 */
2238
2239/* CAN_MBIM2 Masks */
2240#define MBIM16 0x0001 /* Enable Interrupt For Mailbox 16 */
2241#define MBIM17 0x0002 /* Enable Interrupt For Mailbox 17 */
2242#define MBIM18 0x0004 /* Enable Interrupt For Mailbox 18 */
2243#define MBIM19 0x0008 /* Enable Interrupt For Mailbox 19 */
2244#define MBIM20 0x0010 /* Enable Interrupt For Mailbox 20 */
2245#define MBIM21 0x0020 /* Enable Interrupt For Mailbox 21 */
2246#define MBIM22 0x0040 /* Enable Interrupt For Mailbox 22 */
2247#define MBIM23 0x0080 /* Enable Interrupt For Mailbox 23 */
2248#define MBIM24 0x0100 /* Enable Interrupt For Mailbox 24 */
2249#define MBIM25 0x0200 /* Enable Interrupt For Mailbox 25 */
2250#define MBIM26 0x0400 /* Enable Interrupt For Mailbox 26 */
2251#define MBIM27 0x0800 /* Enable Interrupt For Mailbox 27 */
2252#define MBIM28 0x1000 /* Enable Interrupt For Mailbox 28 */
2253#define MBIM29 0x2000 /* Enable Interrupt For Mailbox 29 */
2254#define MBIM30 0x4000 /* Enable Interrupt For Mailbox 30 */
2255#define MBIM31 0x8000 /* Enable Interrupt For Mailbox 31 */
2256
2257/* CAN_GIM Masks */
2258#define EWTIM 0x0001 /* Enable TX Error Count Interrupt */
2259#define EWRIM 0x0002 /* Enable RX Error Count Interrupt */
2260#define EPIM 0x0004 /* Enable Error-Passive Mode Interrupt */
2261#define BOIM 0x0008 /* Enable Bus Off Interrupt */
2262#define WUIM 0x0010 /* Enable Wake-Up Interrupt */
2263#define UIAIM 0x0020 /* Enable Access To Unimplemented Address Interrupt */
2264#define AAIM 0x0040 /* Enable Abort Acknowledge Interrupt */
2265#define RMLIM 0x0080 /* Enable RX Message Lost Interrupt */
2266#define UCEIM 0x0100 /* Enable Universal Counter Overflow Interrupt */
2267#define EXTIM 0x0200 /* Enable External Trigger Output Interrupt */
2268#define ADIM 0x0400 /* Enable Access Denied Interrupt */
2269
2270/* CAN_GIS Masks */
2271#define EWTIS 0x0001 /* TX Error Count IRQ Status */
2272#define EWRIS 0x0002 /* RX Error Count IRQ Status */
2273#define EPIS 0x0004 /* Error-Passive Mode IRQ Status */
2274#define BOIS 0x0008 /* Bus Off IRQ Status */
2275#define WUIS 0x0010 /* Wake-Up IRQ Status */
2276#define UIAIS 0x0020 /* Access To Unimplemented Address IRQ Status */
2277#define AAIS 0x0040 /* Abort Acknowledge IRQ Status */
2278#define RMLIS 0x0080 /* RX Message Lost IRQ Status */
2279#define UCEIS 0x0100 /* Universal Counter Overflow IRQ Status */
2280#define EXTIS 0x0200 /* External Trigger Output IRQ Status */
2281#define ADIS 0x0400 /* Access Denied IRQ Status */
2282
2283/* CAN_GIF Masks */
2284#define EWTIF 0x0001 /* TX Error Count IRQ Flag */
2285#define EWRIF 0x0002 /* RX Error Count IRQ Flag */
2286#define EPIF 0x0004 /* Error-Passive Mode IRQ Flag */
2287#define BOIF 0x0008 /* Bus Off IRQ Flag */
2288#define WUIF 0x0010 /* Wake-Up IRQ Flag */
2289#define UIAIF 0x0020 /* Access To Unimplemented Address IRQ Flag */
2290#define AAIF 0x0040 /* Abort Acknowledge IRQ Flag */
2291#define RMLIF 0x0080 /* RX Message Lost IRQ Flag */
2292#define UCEIF 0x0100 /* Universal Counter Overflow IRQ Flag */
2293#define EXTIF 0x0200 /* External Trigger Output IRQ Flag */
2294#define ADIF 0x0400 /* Access Denied IRQ Flag */
2295
2296/* CAN_UCCNF Masks */
2297#define UCCNF 0x000F /* Universal Counter Mode */
2298#define UC_STAMP 0x0001 /* Timestamp Mode */
2299#define UC_WDOG 0x0002 /* Watchdog Mode */
2300#define UC_AUTOTX 0x0003 /* Auto-Transmit Mode */
2301#define UC_ERROR 0x0006 /* CAN Error Frame Count */
2302#define UC_OVER 0x0007 /* CAN Overload Frame Count */
2303#define UC_LOST 0x0008 /* Arbitration Lost During TX Count */
2304#define UC_AA 0x0009 /* TX Abort Count */
2305#define UC_TA 0x000A /* TX Successful Count */
2306#define UC_REJECT 0x000B /* RX Message Rejected Count */
2307#define UC_RML 0x000C /* RX Message Lost Count */
2308#define UC_RX 0x000D /* Total Successful RX Messages Count */
2309#define UC_RMP 0x000E /* Successful RX W/Matching ID Count */
2310#define UC_ALL 0x000F /* Correct Message On CAN Bus Line Count */
2311#define UCRC 0x0020 /* Universal Counter Reload/Clear */
2312#define UCCT 0x0040 /* Universal Counter CAN Trigger */
2313#define UCE 0x0080 /* Universal Counter Enable */
2314
2315/* CAN_ESR Masks */
2316#define ACKE 0x0004 /* Acknowledge Error */
2317#define SER 0x0008 /* Stuff Error */
2318#define CRCE 0x0010 /* CRC Error */
2319#define SA0 0x0020 /* Stuck At Dominant Error */
2320#define BEF 0x0040 /* Bit Error Flag */
2321#define FER 0x0080 /* Form Error Flag */
2322
2323/* CAN_EWR Masks */
2324#define EWLREC 0x00FF /* RX Error Count Limit (For EWRIS) */
2325#define EWLTEC 0xFF00 /* TX Error Count Limit (For EWTIS) */
2326
2327/* ******************* PIN CONTROL REGISTER MASKS ************************/ 1705/* ******************* PIN CONTROL REGISTER MASKS ************************/
2328/* PORT_MUX Masks */ 1706/* PORT_MUX Masks */
2329#define PJSE 0x0001 /* Port J SPI/SPORT Enable */ 1707#define PJSE 0x0001 /* Port J SPI/SPORT Enable */
diff --git a/arch/blackfin/mach-bf537/include/mach/irq.h b/arch/blackfin/mach-bf537/include/mach/irq.h
index 0defa9457e7f..1a6d617c5fcf 100644
--- a/arch/blackfin/mach-bf537/include/mach/irq.h
+++ b/arch/blackfin/mach-bf537/include/mach/irq.h
@@ -74,7 +74,7 @@
74 74
75#define IRQ_PPI_ERROR 42 /*PPI Error Interrupt */ 75#define IRQ_PPI_ERROR 42 /*PPI Error Interrupt */
76#define IRQ_CAN_ERROR 43 /*CAN Error Interrupt */ 76#define IRQ_CAN_ERROR 43 /*CAN Error Interrupt */
77#define IRQ_MAC_ERROR 44 /*PPI Error Interrupt */ 77#define IRQ_MAC_ERROR 44 /*MAC Status/Error Interrupt */
78#define IRQ_SPORT0_ERROR 45 /*SPORT0 Error Interrupt */ 78#define IRQ_SPORT0_ERROR 45 /*SPORT0 Error Interrupt */
79#define IRQ_SPORT1_ERROR 46 /*SPORT1 Error Interrupt */ 79#define IRQ_SPORT1_ERROR 46 /*SPORT1 Error Interrupt */
80#define IRQ_SPI_ERROR 47 /*SPI Error Interrupt */ 80#define IRQ_SPI_ERROR 47 /*SPI Error Interrupt */
@@ -134,7 +134,17 @@
134 134
135#define GPIO_IRQ_BASE IRQ_PF0 135#define GPIO_IRQ_BASE IRQ_PF0
136 136
137#define NR_IRQS (IRQ_PH15+1) 137#define IRQ_MAC_PHYINT 98 /* PHY_INT Interrupt */
138#define IRQ_MAC_MMCINT 99 /* MMC Counter Interrupt */
139#define IRQ_MAC_RXFSINT 100 /* RX Frame-Status Interrupt */
140#define IRQ_MAC_TXFSINT 101 /* TX Frame-Status Interrupt */
141#define IRQ_MAC_WAKEDET 102 /* Wake-Up Interrupt */
142#define IRQ_MAC_RXDMAERR 103 /* RX DMA Direction Error Interrupt */
143#define IRQ_MAC_TXDMAERR 104 /* TX DMA Direction Error Interrupt */
144#define IRQ_MAC_STMDONE 105 /* Station Mgt. Transfer Done Interrupt */
145
146#define NR_MACH_IRQS (IRQ_MAC_STMDONE + 1)
147#define NR_IRQS (NR_MACH_IRQS + NR_SPARE_IRQS)
138 148
139#define IVG7 7 149#define IVG7 7
140#define IVG8 8 150#define IVG8 8
diff --git a/arch/blackfin/mach-bf538/boards/ezkit.c b/arch/blackfin/mach-bf538/boards/ezkit.c
index c296bb1ed503..1a1f65855b03 100644
--- a/arch/blackfin/mach-bf538/boards/ezkit.c
+++ b/arch/blackfin/mach-bf538/boards/ezkit.c
@@ -41,37 +41,148 @@ static struct platform_device rtc_device = {
41#endif 41#endif
42 42
43#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 43#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
44static struct resource bfin_uart_resources[] = {
45#ifdef CONFIG_SERIAL_BFIN_UART0 44#ifdef CONFIG_SERIAL_BFIN_UART0
45static struct resource bfin_uart0_resources[] = {
46 { 46 {
47 .start = 0xFFC00400, 47 .start = UART0_THR,
48 .end = 0xFFC004FF, 48 .end = UART0_GCTL+2,
49 .flags = IORESOURCE_MEM, 49 .flags = IORESOURCE_MEM,
50 }, 50 },
51 {
52 .start = IRQ_UART0_RX,
53 .end = IRQ_UART0_RX+1,
54 .flags = IORESOURCE_IRQ,
55 },
56 {
57 .start = IRQ_UART0_ERROR,
58 .end = IRQ_UART0_ERROR,
59 .flags = IORESOURCE_IRQ,
60 },
61 {
62 .start = CH_UART0_TX,
63 .end = CH_UART0_TX,
64 .flags = IORESOURCE_DMA,
65 },
66 {
67 .start = CH_UART0_RX,
68 .end = CH_UART0_RX,
69 .flags = IORESOURCE_DMA,
70 },
71#ifdef CONFIG_BFIN_UART0_CTSRTS
72 { /* CTS pin */
73 .start = GPIO_PG7,
74 .end = GPIO_PG7,
75 .flags = IORESOURCE_IO,
76 },
77 { /* RTS pin */
78 .start = GPIO_PG6,
79 .end = GPIO_PG6,
80 .flags = IORESOURCE_IO,
81 },
82#endif
83};
84
85unsigned short bfin_uart0_peripherals[] = {
86 P_UART0_TX, P_UART0_RX, 0
87};
88
89static struct platform_device bfin_uart0_device = {
90 .name = "bfin-uart",
91 .id = 0,
92 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
93 .resource = bfin_uart0_resources,
94 .dev = {
95 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
96 },
97};
51#endif 98#endif
52#ifdef CONFIG_SERIAL_BFIN_UART1 99#ifdef CONFIG_SERIAL_BFIN_UART1
100static struct resource bfin_uart1_resources[] = {
53 { 101 {
54 .start = 0xFFC02000, 102 .start = UART1_THR,
55 .end = 0xFFC020FF, 103 .end = UART1_GCTL+2,
56 .flags = IORESOURCE_MEM, 104 .flags = IORESOURCE_MEM,
57 }, 105 },
106 {
107 .start = IRQ_UART1_RX,
108 .end = IRQ_UART1_RX+1,
109 .flags = IORESOURCE_IRQ,
110 },
111 {
112 .start = IRQ_UART1_ERROR,
113 .end = IRQ_UART1_ERROR,
114 .flags = IORESOURCE_IRQ,
115 },
116 {
117 .start = CH_UART1_TX,
118 .end = CH_UART1_TX,
119 .flags = IORESOURCE_DMA,
120 },
121 {
122 .start = CH_UART1_RX,
123 .end = CH_UART1_RX,
124 .flags = IORESOURCE_DMA,
125 },
126};
127
128unsigned short bfin_uart1_peripherals[] = {
129 P_UART1_TX, P_UART1_RX, 0
130};
131
132static struct platform_device bfin_uart1_device = {
133 .name = "bfin-uart",
134 .id = 1,
135 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
136 .resource = bfin_uart1_resources,
137 .dev = {
138 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
139 },
140};
58#endif 141#endif
59#ifdef CONFIG_SERIAL_BFIN_UART2 142#ifdef CONFIG_SERIAL_BFIN_UART2
143static struct resource bfin_uart2_resources[] = {
60 { 144 {
61 .start = 0xFFC02100, 145 .start = UART2_THR,
62 .end = 0xFFC021FF, 146 .end = UART2_GCTL+2,
63 .flags = IORESOURCE_MEM, 147 .flags = IORESOURCE_MEM,
64 }, 148 },
65#endif 149 {
150 .start = IRQ_UART2_RX,
151 .end = IRQ_UART2_RX+1,
152 .flags = IORESOURCE_IRQ,
153 },
154 {
155 .start = IRQ_UART2_ERROR,
156 .end = IRQ_UART2_ERROR,
157 .flags = IORESOURCE_IRQ,
158 },
159 {
160 .start = CH_UART2_TX,
161 .end = CH_UART2_TX,
162 .flags = IORESOURCE_DMA,
163 },
164 {
165 .start = CH_UART2_RX,
166 .end = CH_UART2_RX,
167 .flags = IORESOURCE_DMA,
168 },
169};
170
171unsigned short bfin_uart2_peripherals[] = {
172 P_UART2_TX, P_UART2_RX, 0
66}; 173};
67 174
68static struct platform_device bfin_uart_device = { 175static struct platform_device bfin_uart2_device = {
69 .name = "bfin-uart", 176 .name = "bfin-uart",
70 .id = 1, 177 .id = 2,
71 .num_resources = ARRAY_SIZE(bfin_uart_resources), 178 .num_resources = ARRAY_SIZE(bfin_uart2_resources),
72 .resource = bfin_uart_resources, 179 .resource = bfin_uart2_resources,
180 .dev = {
181 .platform_data = &bfin_uart2_peripherals, /* Passed to driver */
182 },
73}; 183};
74#endif 184#endif
185#endif
75 186
76#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 187#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
77#ifdef CONFIG_BFIN_SIR0 188#ifdef CONFIG_BFIN_SIR0
@@ -151,6 +262,145 @@ static struct platform_device bfin_sir2_device = {
151#endif 262#endif
152#endif 263#endif
153 264
265#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
266#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
267static struct resource bfin_sport0_uart_resources[] = {
268 {
269 .start = SPORT0_TCR1,
270 .end = SPORT0_MRCS3+4,
271 .flags = IORESOURCE_MEM,
272 },
273 {
274 .start = IRQ_SPORT0_RX,
275 .end = IRQ_SPORT0_RX+1,
276 .flags = IORESOURCE_IRQ,
277 },
278 {
279 .start = IRQ_SPORT0_ERROR,
280 .end = IRQ_SPORT0_ERROR,
281 .flags = IORESOURCE_IRQ,
282 },
283};
284
285unsigned short bfin_sport0_peripherals[] = {
286 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
287 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
288};
289
290static struct platform_device bfin_sport0_uart_device = {
291 .name = "bfin-sport-uart",
292 .id = 0,
293 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
294 .resource = bfin_sport0_uart_resources,
295 .dev = {
296 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
297 },
298};
299#endif
300#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
301static struct resource bfin_sport1_uart_resources[] = {
302 {
303 .start = SPORT1_TCR1,
304 .end = SPORT1_MRCS3+4,
305 .flags = IORESOURCE_MEM,
306 },
307 {
308 .start = IRQ_SPORT1_RX,
309 .end = IRQ_SPORT1_RX+1,
310 .flags = IORESOURCE_IRQ,
311 },
312 {
313 .start = IRQ_SPORT1_ERROR,
314 .end = IRQ_SPORT1_ERROR,
315 .flags = IORESOURCE_IRQ,
316 },
317};
318
319unsigned short bfin_sport1_peripherals[] = {
320 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
321 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
322};
323
324static struct platform_device bfin_sport1_uart_device = {
325 .name = "bfin-sport-uart",
326 .id = 1,
327 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
328 .resource = bfin_sport1_uart_resources,
329 .dev = {
330 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
331 },
332};
333#endif
334#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
335static struct resource bfin_sport2_uart_resources[] = {
336 {
337 .start = SPORT2_TCR1,
338 .end = SPORT2_MRCS3+4,
339 .flags = IORESOURCE_MEM,
340 },
341 {
342 .start = IRQ_SPORT2_RX,
343 .end = IRQ_SPORT2_RX+1,
344 .flags = IORESOURCE_IRQ,
345 },
346 {
347 .start = IRQ_SPORT2_ERROR,
348 .end = IRQ_SPORT2_ERROR,
349 .flags = IORESOURCE_IRQ,
350 },
351};
352
353unsigned short bfin_sport2_peripherals[] = {
354 P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
355 P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
356};
357
358static struct platform_device bfin_sport2_uart_device = {
359 .name = "bfin-sport-uart",
360 .id = 2,
361 .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
362 .resource = bfin_sport2_uart_resources,
363 .dev = {
364 .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
365 },
366};
367#endif
368#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
369static struct resource bfin_sport3_uart_resources[] = {
370 {
371 .start = SPORT3_TCR1,
372 .end = SPORT3_MRCS3+4,
373 .flags = IORESOURCE_MEM,
374 },
375 {
376 .start = IRQ_SPORT3_RX,
377 .end = IRQ_SPORT3_RX+1,
378 .flags = IORESOURCE_IRQ,
379 },
380 {
381 .start = IRQ_SPORT3_ERROR,
382 .end = IRQ_SPORT3_ERROR,
383 .flags = IORESOURCE_IRQ,
384 },
385};
386
387unsigned short bfin_sport3_peripherals[] = {
388 P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, P_SPORT3_RFS,
389 P_SPORT3_DRPRI, P_SPORT3_RSCLK, P_SPORT3_DRSEC, P_SPORT3_DTSEC, 0
390};
391
392static struct platform_device bfin_sport3_uart_device = {
393 .name = "bfin-sport-uart",
394 .id = 3,
395 .num_resources = ARRAY_SIZE(bfin_sport3_uart_resources),
396 .resource = bfin_sport3_uart_resources,
397 .dev = {
398 .platform_data = &bfin_sport3_peripherals, /* Passed to driver */
399 },
400};
401#endif
402#endif
403
154#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE) 404#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
155unsigned short bfin_can_peripherals[] = { 405unsigned short bfin_can_peripherals[] = {
156 P_CAN0_RX, P_CAN0_TX, 0 406 P_CAN0_RX, P_CAN0_TX, 0
@@ -268,8 +518,8 @@ static const struct ad7879_platform_data bfin_ad7879_ts_info = {
268 .median = 2, /* do 8 measurements */ 518 .median = 2, /* do 8 measurements */
269 .averaging = 1, /* take the average of 4 middle samples */ 519 .averaging = 1, /* take the average of 4 middle samples */
270 .pen_down_acc_interval = 255, /* 9.4 ms */ 520 .pen_down_acc_interval = 255, /* 9.4 ms */
271 .gpio_output = 1, /* configure AUX/VBAT/GPIO as GPIO output */ 521 .gpio_export = 1, /* Export GPIO to gpiolib */
272 .gpio_default = 1, /* During initialization set GPIO = HIGH */ 522 .gpio_base = -1, /* Dynamic allocation */
273}; 523};
274#endif 524#endif
275 525
@@ -284,9 +534,10 @@ static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
284#include <asm/bfin-lq035q1.h> 534#include <asm/bfin-lq035q1.h>
285 535
286static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = { 536static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
287 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB, 537 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
288 .use_bl = 0, /* let something else control the LCD Blacklight */ 538 .ppi_mode = USE_RGB565_16_BIT_PPI,
289 .gpio_bl = GPIO_PF7, 539 .use_bl = 0, /* let something else control the LCD Blacklight */
540 .gpio_bl = GPIO_PF7,
290}; 541};
291 542
292static struct resource bfin_lq035q1_resources[] = { 543static struct resource bfin_lq035q1_resources[] = {
@@ -622,7 +873,15 @@ static struct platform_device *cm_bf538_devices[] __initdata = {
622#endif 873#endif
623 874
624#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 875#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
625 &bfin_uart_device, 876#ifdef CONFIG_SERIAL_BFIN_UART0
877 &bfin_uart0_device,
878#endif
879#ifdef CONFIG_SERIAL_BFIN_UART1
880 &bfin_uart1_device,
881#endif
882#ifdef CONFIG_SERIAL_BFIN_UART2
883 &bfin_uart2_device,
884#endif
626#endif 885#endif
627 886
628#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 887#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
@@ -648,6 +907,21 @@ static struct platform_device *cm_bf538_devices[] __initdata = {
648#endif 907#endif
649#endif 908#endif
650 909
910#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
911#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
912 &bfin_sport0_uart_device,
913#endif
914#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
915 &bfin_sport1_uart_device,
916#endif
917#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
918 &bfin_sport2_uart_device,
919#endif
920#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
921 &bfin_sport3_uart_device,
922#endif
923#endif
924
651#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE) 925#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
652 &bfin_can_device, 926 &bfin_can_device,
653#endif 927#endif
@@ -683,3 +957,39 @@ static int __init ezkit_init(void)
683} 957}
684 958
685arch_initcall(ezkit_init); 959arch_initcall(ezkit_init);
960
961static struct platform_device *ezkit_early_devices[] __initdata = {
962#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
963#ifdef CONFIG_SERIAL_BFIN_UART0
964 &bfin_uart0_device,
965#endif
966#ifdef CONFIG_SERIAL_BFIN_UART1
967 &bfin_uart1_device,
968#endif
969#ifdef CONFIG_SERIAL_BFIN_UART2
970 &bfin_uart2_device,
971#endif
972#endif
973
974#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
975#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
976 &bfin_sport0_uart_device,
977#endif
978#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
979 &bfin_sport1_uart_device,
980#endif
981#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
982 &bfin_sport2_uart_device,
983#endif
984#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
985 &bfin_sport3_uart_device,
986#endif
987#endif
988};
989
990void __init native_machine_early_platform_add_devices(void)
991{
992 printk(KERN_INFO "register early platform devices\n");
993 early_platform_add_devices(ezkit_early_devices,
994 ARRAY_SIZE(ezkit_early_devices));
995}
diff --git a/arch/blackfin/mach-bf538/include/mach/defBF539.h b/arch/blackfin/mach-bf538/include/mach/defBF539.h
index fac563e6f62f..d7061d9f2a83 100644
--- a/arch/blackfin/mach-bf538/include/mach/defBF539.h
+++ b/arch/blackfin/mach-bf538/include/mach/defBF539.h
@@ -2418,625 +2418,4 @@
2418#define RCV_HALF 0x0004 /* Receive FIFO Has 1 Byte To Read */ 2418#define RCV_HALF 0x0004 /* Receive FIFO Has 1 Byte To Read */
2419#define RCV_FULL 0x000C /* Receive FIFO Full (2 Bytes To Read) */ 2419#define RCV_FULL 0x000C /* Receive FIFO Full (2 Bytes To Read) */
2420 2420
2421
2422/* ************ CONTROLLER AREA NETWORK (CAN) MASKS ***************/
2423/* CAN_CONTROL Masks */
2424#define SRS 0x0001 /* Software Reset */
2425#define DNM 0x0002 /* Device Net Mode */
2426#define ABO 0x0004 /* Auto-Bus On Enable */
2427#define WBA 0x0010 /* Wake-Up On CAN Bus Activity Enable */
2428#define SMR 0x0020 /* Sleep Mode Request */
2429#define CSR 0x0040 /* CAN Suspend Mode Request */
2430#define CCR 0x0080 /* CAN Configuration Mode Request */
2431
2432/* CAN_STATUS Masks */
2433#define WT 0x0001 /* TX Warning Flag */
2434#define WR 0x0002 /* RX Warning Flag */
2435#define EP 0x0004 /* Error Passive Mode */
2436#define EBO 0x0008 /* Error Bus Off Mode */
2437#define CSA 0x0040 /* Suspend Mode Acknowledge */
2438#define CCA 0x0080 /* Configuration Mode Acknowledge */
2439#define MBPTR 0x1F00 /* Mailbox Pointer */
2440#define TRM 0x4000 /* Transmit Mode */
2441#define REC 0x8000 /* Receive Mode */
2442
2443/* CAN_CLOCK Masks */
2444#define BRP 0x03FF /* Bit-Rate Pre-Scaler */
2445
2446/* CAN_TIMING Masks */
2447#define TSEG1 0x000F /* Time Segment 1 */
2448#define TSEG2 0x0070 /* Time Segment 2 */
2449#define SAM 0x0080 /* Sampling */
2450#define SJW 0x0300 /* Synchronization Jump Width */
2451
2452/* CAN_DEBUG Masks */
2453#define DEC 0x0001 /* Disable CAN Error Counters */
2454#define DRI 0x0002 /* Disable CAN RX Input */
2455#define DTO 0x0004 /* Disable CAN TX Output */
2456#define DIL 0x0008 /* Disable CAN Internal Loop */
2457#define MAA 0x0010 /* Mode Auto-Acknowledge Enable */
2458#define MRB 0x0020 /* Mode Read Back Enable */
2459#define CDE 0x8000 /* CAN Debug Enable */
2460
2461/* CAN_CEC Masks */
2462#define RXECNT 0x00FF /* Receive Error Counter */
2463#define TXECNT 0xFF00 /* Transmit Error Counter */
2464
2465/* CAN_INTR Masks */
2466#define MBRIRQ 0x0001 /* Mailbox Receive Interrupt */
2467#define MBRIF MBRIRQ /* legacy */
2468#define MBTIRQ 0x0002 /* Mailbox Transmit Interrupt */
2469#define MBTIF MBTIRQ /* legacy */
2470#define GIRQ 0x0004 /* Global Interrupt */
2471#define SMACK 0x0008 /* Sleep Mode Acknowledge */
2472#define CANTX 0x0040 /* CAN TX Bus Value */
2473#define CANRX 0x0080 /* CAN RX Bus Value */
2474
2475/* CAN_MBxx_ID1 and CAN_MBxx_ID0 Masks */
2476#define DFC 0xFFFF /* Data Filtering Code (If Enabled) (ID0) */
2477#define EXTID_LO 0xFFFF /* Lower 16 Bits of Extended Identifier (ID0) */
2478#define EXTID_HI 0x0003 /* Upper 2 Bits of Extended Identifier (ID1) */
2479#define BASEID 0x1FFC /* Base Identifier */
2480#define IDE 0x2000 /* Identifier Extension */
2481#define RTR 0x4000 /* Remote Frame Transmission Request */
2482#define AME 0x8000 /* Acceptance Mask Enable */
2483
2484/* CAN_MBxx_TIMESTAMP Masks */
2485#define TSV 0xFFFF /* Timestamp */
2486
2487/* CAN_MBxx_LENGTH Masks */
2488#define DLC 0x000F /* Data Length Code */
2489
2490/* CAN_AMxxH and CAN_AMxxL Masks */
2491#define DFM 0xFFFF /* Data Field Mask (If Enabled) (CAN_AMxxL) */
2492#define EXTID_LO 0xFFFF /* Lower 16 Bits of Extended Identifier (CAN_AMxxL) */
2493#define EXTID_HI 0x0003 /* Upper 2 Bits of Extended Identifier (CAN_AMxxH) */
2494#define BASEID 0x1FFC /* Base Identifier */
2495#define AMIDE 0x2000 /* Acceptance Mask ID Extension Enable */
2496#define FMD 0x4000 /* Full Mask Data Field Enable */
2497#define FDF 0x8000 /* Filter On Data Field Enable */
2498
2499/* CAN_MC1 Masks */
2500#define MC0 0x0001 /* Enable Mailbox 0 */
2501#define MC1 0x0002 /* Enable Mailbox 1 */
2502#define MC2 0x0004 /* Enable Mailbox 2 */
2503#define MC3 0x0008 /* Enable Mailbox 3 */
2504#define MC4 0x0010 /* Enable Mailbox 4 */
2505#define MC5 0x0020 /* Enable Mailbox 5 */
2506#define MC6 0x0040 /* Enable Mailbox 6 */
2507#define MC7 0x0080 /* Enable Mailbox 7 */
2508#define MC8 0x0100 /* Enable Mailbox 8 */
2509#define MC9 0x0200 /* Enable Mailbox 9 */
2510#define MC10 0x0400 /* Enable Mailbox 10 */
2511#define MC11 0x0800 /* Enable Mailbox 11 */
2512#define MC12 0x1000 /* Enable Mailbox 12 */
2513#define MC13 0x2000 /* Enable Mailbox 13 */
2514#define MC14 0x4000 /* Enable Mailbox 14 */
2515#define MC15 0x8000 /* Enable Mailbox 15 */
2516
2517/* CAN_MC2 Masks */
2518#define MC16 0x0001 /* Enable Mailbox 16 */
2519#define MC17 0x0002 /* Enable Mailbox 17 */
2520#define MC18 0x0004 /* Enable Mailbox 18 */
2521#define MC19 0x0008 /* Enable Mailbox 19 */
2522#define MC20 0x0010 /* Enable Mailbox 20 */
2523#define MC21 0x0020 /* Enable Mailbox 21 */
2524#define MC22 0x0040 /* Enable Mailbox 22 */
2525#define MC23 0x0080 /* Enable Mailbox 23 */
2526#define MC24 0x0100 /* Enable Mailbox 24 */
2527#define MC25 0x0200 /* Enable Mailbox 25 */
2528#define MC26 0x0400 /* Enable Mailbox 26 */
2529#define MC27 0x0800 /* Enable Mailbox 27 */
2530#define MC28 0x1000 /* Enable Mailbox 28 */
2531#define MC29 0x2000 /* Enable Mailbox 29 */
2532#define MC30 0x4000 /* Enable Mailbox 30 */
2533#define MC31 0x8000 /* Enable Mailbox 31 */
2534
2535/* CAN_MD1 Masks */
2536#define MD0 0x0001 /* Enable Mailbox 0 For Receive */
2537#define MD1 0x0002 /* Enable Mailbox 1 For Receive */
2538#define MD2 0x0004 /* Enable Mailbox 2 For Receive */
2539#define MD3 0x0008 /* Enable Mailbox 3 For Receive */
2540#define MD4 0x0010 /* Enable Mailbox 4 For Receive */
2541#define MD5 0x0020 /* Enable Mailbox 5 For Receive */
2542#define MD6 0x0040 /* Enable Mailbox 6 For Receive */
2543#define MD7 0x0080 /* Enable Mailbox 7 For Receive */
2544#define MD8 0x0100 /* Enable Mailbox 8 For Receive */
2545#define MD9 0x0200 /* Enable Mailbox 9 For Receive */
2546#define MD10 0x0400 /* Enable Mailbox 10 For Receive */
2547#define MD11 0x0800 /* Enable Mailbox 11 For Receive */
2548#define MD12 0x1000 /* Enable Mailbox 12 For Receive */
2549#define MD13 0x2000 /* Enable Mailbox 13 For Receive */
2550#define MD14 0x4000 /* Enable Mailbox 14 For Receive */
2551#define MD15 0x8000 /* Enable Mailbox 15 For Receive */
2552
2553/* CAN_MD2 Masks */
2554#define MD16 0x0001 /* Enable Mailbox 16 For Receive */
2555#define MD17 0x0002 /* Enable Mailbox 17 For Receive */
2556#define MD18 0x0004 /* Enable Mailbox 18 For Receive */
2557#define MD19 0x0008 /* Enable Mailbox 19 For Receive */
2558#define MD20 0x0010 /* Enable Mailbox 20 For Receive */
2559#define MD21 0x0020 /* Enable Mailbox 21 For Receive */
2560#define MD22 0x0040 /* Enable Mailbox 22 For Receive */
2561#define MD23 0x0080 /* Enable Mailbox 23 For Receive */
2562#define MD24 0x0100 /* Enable Mailbox 24 For Receive */
2563#define MD25 0x0200 /* Enable Mailbox 25 For Receive */
2564#define MD26 0x0400 /* Enable Mailbox 26 For Receive */
2565#define MD27 0x0800 /* Enable Mailbox 27 For Receive */
2566#define MD28 0x1000 /* Enable Mailbox 28 For Receive */
2567#define MD29 0x2000 /* Enable Mailbox 29 For Receive */
2568#define MD30 0x4000 /* Enable Mailbox 30 For Receive */
2569#define MD31 0x8000 /* Enable Mailbox 31 For Receive */
2570
2571/* CAN_RMP1 Masks */
2572#define RMP0 0x0001 /* RX Message Pending In Mailbox 0 */
2573#define RMP1 0x0002 /* RX Message Pending In Mailbox 1 */
2574#define RMP2 0x0004 /* RX Message Pending In Mailbox 2 */
2575#define RMP3 0x0008 /* RX Message Pending In Mailbox 3 */
2576#define RMP4 0x0010 /* RX Message Pending In Mailbox 4 */
2577#define RMP5 0x0020 /* RX Message Pending In Mailbox 5 */
2578#define RMP6 0x0040 /* RX Message Pending In Mailbox 6 */
2579#define RMP7 0x0080 /* RX Message Pending In Mailbox 7 */
2580#define RMP8 0x0100 /* RX Message Pending In Mailbox 8 */
2581#define RMP9 0x0200 /* RX Message Pending In Mailbox 9 */
2582#define RMP10 0x0400 /* RX Message Pending In Mailbox 10 */
2583#define RMP11 0x0800 /* RX Message Pending In Mailbox 11 */
2584#define RMP12 0x1000 /* RX Message Pending In Mailbox 12 */
2585#define RMP13 0x2000 /* RX Message Pending In Mailbox 13 */
2586#define RMP14 0x4000 /* RX Message Pending In Mailbox 14 */
2587#define RMP15 0x8000 /* RX Message Pending In Mailbox 15 */
2588
2589/* CAN_RMP2 Masks */
2590#define RMP16 0x0001 /* RX Message Pending In Mailbox 16 */
2591#define RMP17 0x0002 /* RX Message Pending In Mailbox 17 */
2592#define RMP18 0x0004 /* RX Message Pending In Mailbox 18 */
2593#define RMP19 0x0008 /* RX Message Pending In Mailbox 19 */
2594#define RMP20 0x0010 /* RX Message Pending In Mailbox 20 */
2595#define RMP21 0x0020 /* RX Message Pending In Mailbox 21 */
2596#define RMP22 0x0040 /* RX Message Pending In Mailbox 22 */
2597#define RMP23 0x0080 /* RX Message Pending In Mailbox 23 */
2598#define RMP24 0x0100 /* RX Message Pending In Mailbox 24 */
2599#define RMP25 0x0200 /* RX Message Pending In Mailbox 25 */
2600#define RMP26 0x0400 /* RX Message Pending In Mailbox 26 */
2601#define RMP27 0x0800 /* RX Message Pending In Mailbox 27 */
2602#define RMP28 0x1000 /* RX Message Pending In Mailbox 28 */
2603#define RMP29 0x2000 /* RX Message Pending In Mailbox 29 */
2604#define RMP30 0x4000 /* RX Message Pending In Mailbox 30 */
2605#define RMP31 0x8000 /* RX Message Pending In Mailbox 31 */
2606
2607/* CAN_RML1 Masks */
2608#define RML0 0x0001 /* RX Message Lost In Mailbox 0 */
2609#define RML1 0x0002 /* RX Message Lost In Mailbox 1 */
2610#define RML2 0x0004 /* RX Message Lost In Mailbox 2 */
2611#define RML3 0x0008 /* RX Message Lost In Mailbox 3 */
2612#define RML4 0x0010 /* RX Message Lost In Mailbox 4 */
2613#define RML5 0x0020 /* RX Message Lost In Mailbox 5 */
2614#define RML6 0x0040 /* RX Message Lost In Mailbox 6 */
2615#define RML7 0x0080 /* RX Message Lost In Mailbox 7 */
2616#define RML8 0x0100 /* RX Message Lost In Mailbox 8 */
2617#define RML9 0x0200 /* RX Message Lost In Mailbox 9 */
2618#define RML10 0x0400 /* RX Message Lost In Mailbox 10 */
2619#define RML11 0x0800 /* RX Message Lost In Mailbox 11 */
2620#define RML12 0x1000 /* RX Message Lost In Mailbox 12 */
2621#define RML13 0x2000 /* RX Message Lost In Mailbox 13 */
2622#define RML14 0x4000 /* RX Message Lost In Mailbox 14 */
2623#define RML15 0x8000 /* RX Message Lost In Mailbox 15 */
2624
2625/* CAN_RML2 Masks */
2626#define RML16 0x0001 /* RX Message Lost In Mailbox 16 */
2627#define RML17 0x0002 /* RX Message Lost In Mailbox 17 */
2628#define RML18 0x0004 /* RX Message Lost In Mailbox 18 */
2629#define RML19 0x0008 /* RX Message Lost In Mailbox 19 */
2630#define RML20 0x0010 /* RX Message Lost In Mailbox 20 */
2631#define RML21 0x0020 /* RX Message Lost In Mailbox 21 */
2632#define RML22 0x0040 /* RX Message Lost In Mailbox 22 */
2633#define RML23 0x0080 /* RX Message Lost In Mailbox 23 */
2634#define RML24 0x0100 /* RX Message Lost In Mailbox 24 */
2635#define RML25 0x0200 /* RX Message Lost In Mailbox 25 */
2636#define RML26 0x0400 /* RX Message Lost In Mailbox 26 */
2637#define RML27 0x0800 /* RX Message Lost In Mailbox 27 */
2638#define RML28 0x1000 /* RX Message Lost In Mailbox 28 */
2639#define RML29 0x2000 /* RX Message Lost In Mailbox 29 */
2640#define RML30 0x4000 /* RX Message Lost In Mailbox 30 */
2641#define RML31 0x8000 /* RX Message Lost In Mailbox 31 */
2642
2643/* CAN_OPSS1 Masks */
2644#define OPSS0 0x0001 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 0 */
2645#define OPSS1 0x0002 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 1 */
2646#define OPSS2 0x0004 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 2 */
2647#define OPSS3 0x0008 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 3 */
2648#define OPSS4 0x0010 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 4 */
2649#define OPSS5 0x0020 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 5 */
2650#define OPSS6 0x0040 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 6 */
2651#define OPSS7 0x0080 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 7 */
2652#define OPSS8 0x0100 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 8 */
2653#define OPSS9 0x0200 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 9 */
2654#define OPSS10 0x0400 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 10 */
2655#define OPSS11 0x0800 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 11 */
2656#define OPSS12 0x1000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 12 */
2657#define OPSS13 0x2000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 13 */
2658#define OPSS14 0x4000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 14 */
2659#define OPSS15 0x8000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 15 */
2660
2661/* CAN_OPSS2 Masks */
2662#define OPSS16 0x0001 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 16 */
2663#define OPSS17 0x0002 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 17 */
2664#define OPSS18 0x0004 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 18 */
2665#define OPSS19 0x0008 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 19 */
2666#define OPSS20 0x0010 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 20 */
2667#define OPSS21 0x0020 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 21 */
2668#define OPSS22 0x0040 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 22 */
2669#define OPSS23 0x0080 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 23 */
2670#define OPSS24 0x0100 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 24 */
2671#define OPSS25 0x0200 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 25 */
2672#define OPSS26 0x0400 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 26 */
2673#define OPSS27 0x0800 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 27 */
2674#define OPSS28 0x1000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 28 */
2675#define OPSS29 0x2000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 29 */
2676#define OPSS30 0x4000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 30 */
2677#define OPSS31 0x8000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 31 */
2678
2679/* CAN_TRR1 Masks */
2680#define TRR0 0x0001 /* Deny But Don't Lock Access To Mailbox 0 */
2681#define TRR1 0x0002 /* Deny But Don't Lock Access To Mailbox 1 */
2682#define TRR2 0x0004 /* Deny But Don't Lock Access To Mailbox 2 */
2683#define TRR3 0x0008 /* Deny But Don't Lock Access To Mailbox 3 */
2684#define TRR4 0x0010 /* Deny But Don't Lock Access To Mailbox 4 */
2685#define TRR5 0x0020 /* Deny But Don't Lock Access To Mailbox 5 */
2686#define TRR6 0x0040 /* Deny But Don't Lock Access To Mailbox 6 */
2687#define TRR7 0x0080 /* Deny But Don't Lock Access To Mailbox 7 */
2688#define TRR8 0x0100 /* Deny But Don't Lock Access To Mailbox 8 */
2689#define TRR9 0x0200 /* Deny But Don't Lock Access To Mailbox 9 */
2690#define TRR10 0x0400 /* Deny But Don't Lock Access To Mailbox 10 */
2691#define TRR11 0x0800 /* Deny But Don't Lock Access To Mailbox 11 */
2692#define TRR12 0x1000 /* Deny But Don't Lock Access To Mailbox 12 */
2693#define TRR13 0x2000 /* Deny But Don't Lock Access To Mailbox 13 */
2694#define TRR14 0x4000 /* Deny But Don't Lock Access To Mailbox 14 */
2695#define TRR15 0x8000 /* Deny But Don't Lock Access To Mailbox 15 */
2696
2697/* CAN_TRR2 Masks */
2698#define TRR16 0x0001 /* Deny But Don't Lock Access To Mailbox 16 */
2699#define TRR17 0x0002 /* Deny But Don't Lock Access To Mailbox 17 */
2700#define TRR18 0x0004 /* Deny But Don't Lock Access To Mailbox 18 */
2701#define TRR19 0x0008 /* Deny But Don't Lock Access To Mailbox 19 */
2702#define TRR20 0x0010 /* Deny But Don't Lock Access To Mailbox 20 */
2703#define TRR21 0x0020 /* Deny But Don't Lock Access To Mailbox 21 */
2704#define TRR22 0x0040 /* Deny But Don't Lock Access To Mailbox 22 */
2705#define TRR23 0x0080 /* Deny But Don't Lock Access To Mailbox 23 */
2706#define TRR24 0x0100 /* Deny But Don't Lock Access To Mailbox 24 */
2707#define TRR25 0x0200 /* Deny But Don't Lock Access To Mailbox 25 */
2708#define TRR26 0x0400 /* Deny But Don't Lock Access To Mailbox 26 */
2709#define TRR27 0x0800 /* Deny But Don't Lock Access To Mailbox 27 */
2710#define TRR28 0x1000 /* Deny But Don't Lock Access To Mailbox 28 */
2711#define TRR29 0x2000 /* Deny But Don't Lock Access To Mailbox 29 */
2712#define TRR30 0x4000 /* Deny But Don't Lock Access To Mailbox 30 */
2713#define TRR31 0x8000 /* Deny But Don't Lock Access To Mailbox 31 */
2714
2715/* CAN_TRS1 Masks */
2716#define TRS0 0x0001 /* Remote Frame Request For Mailbox 0 */
2717#define TRS1 0x0002 /* Remote Frame Request For Mailbox 1 */
2718#define TRS2 0x0004 /* Remote Frame Request For Mailbox 2 */
2719#define TRS3 0x0008 /* Remote Frame Request For Mailbox 3 */
2720#define TRS4 0x0010 /* Remote Frame Request For Mailbox 4 */
2721#define TRS5 0x0020 /* Remote Frame Request For Mailbox 5 */
2722#define TRS6 0x0040 /* Remote Frame Request For Mailbox 6 */
2723#define TRS7 0x0080 /* Remote Frame Request For Mailbox 7 */
2724#define TRS8 0x0100 /* Remote Frame Request For Mailbox 8 */
2725#define TRS9 0x0200 /* Remote Frame Request For Mailbox 9 */
2726#define TRS10 0x0400 /* Remote Frame Request For Mailbox 10 */
2727#define TRS11 0x0800 /* Remote Frame Request For Mailbox 11 */
2728#define TRS12 0x1000 /* Remote Frame Request For Mailbox 12 */
2729#define TRS13 0x2000 /* Remote Frame Request For Mailbox 13 */
2730#define TRS14 0x4000 /* Remote Frame Request For Mailbox 14 */
2731#define TRS15 0x8000 /* Remote Frame Request For Mailbox 15 */
2732
2733/* CAN_TRS2 Masks */
2734#define TRS16 0x0001 /* Remote Frame Request For Mailbox 16 */
2735#define TRS17 0x0002 /* Remote Frame Request For Mailbox 17 */
2736#define TRS18 0x0004 /* Remote Frame Request For Mailbox 18 */
2737#define TRS19 0x0008 /* Remote Frame Request For Mailbox 19 */
2738#define TRS20 0x0010 /* Remote Frame Request For Mailbox 20 */
2739#define TRS21 0x0020 /* Remote Frame Request For Mailbox 21 */
2740#define TRS22 0x0040 /* Remote Frame Request For Mailbox 22 */
2741#define TRS23 0x0080 /* Remote Frame Request For Mailbox 23 */
2742#define TRS24 0x0100 /* Remote Frame Request For Mailbox 24 */
2743#define TRS25 0x0200 /* Remote Frame Request For Mailbox 25 */
2744#define TRS26 0x0400 /* Remote Frame Request For Mailbox 26 */
2745#define TRS27 0x0800 /* Remote Frame Request For Mailbox 27 */
2746#define TRS28 0x1000 /* Remote Frame Request For Mailbox 28 */
2747#define TRS29 0x2000 /* Remote Frame Request For Mailbox 29 */
2748#define TRS30 0x4000 /* Remote Frame Request For Mailbox 30 */
2749#define TRS31 0x8000 /* Remote Frame Request For Mailbox 31 */
2750
2751/* CAN_AA1 Masks */
2752#define AA0 0x0001 /* Aborted Message In Mailbox 0 */
2753#define AA1 0x0002 /* Aborted Message In Mailbox 1 */
2754#define AA2 0x0004 /* Aborted Message In Mailbox 2 */
2755#define AA3 0x0008 /* Aborted Message In Mailbox 3 */
2756#define AA4 0x0010 /* Aborted Message In Mailbox 4 */
2757#define AA5 0x0020 /* Aborted Message In Mailbox 5 */
2758#define AA6 0x0040 /* Aborted Message In Mailbox 6 */
2759#define AA7 0x0080 /* Aborted Message In Mailbox 7 */
2760#define AA8 0x0100 /* Aborted Message In Mailbox 8 */
2761#define AA9 0x0200 /* Aborted Message In Mailbox 9 */
2762#define AA10 0x0400 /* Aborted Message In Mailbox 10 */
2763#define AA11 0x0800 /* Aborted Message In Mailbox 11 */
2764#define AA12 0x1000 /* Aborted Message In Mailbox 12 */
2765#define AA13 0x2000 /* Aborted Message In Mailbox 13 */
2766#define AA14 0x4000 /* Aborted Message In Mailbox 14 */
2767#define AA15 0x8000 /* Aborted Message In Mailbox 15 */
2768
2769/* CAN_AA2 Masks */
2770#define AA16 0x0001 /* Aborted Message In Mailbox 16 */
2771#define AA17 0x0002 /* Aborted Message In Mailbox 17 */
2772#define AA18 0x0004 /* Aborted Message In Mailbox 18 */
2773#define AA19 0x0008 /* Aborted Message In Mailbox 19 */
2774#define AA20 0x0010 /* Aborted Message In Mailbox 20 */
2775#define AA21 0x0020 /* Aborted Message In Mailbox 21 */
2776#define AA22 0x0040 /* Aborted Message In Mailbox 22 */
2777#define AA23 0x0080 /* Aborted Message In Mailbox 23 */
2778#define AA24 0x0100 /* Aborted Message In Mailbox 24 */
2779#define AA25 0x0200 /* Aborted Message In Mailbox 25 */
2780#define AA26 0x0400 /* Aborted Message In Mailbox 26 */
2781#define AA27 0x0800 /* Aborted Message In Mailbox 27 */
2782#define AA28 0x1000 /* Aborted Message In Mailbox 28 */
2783#define AA29 0x2000 /* Aborted Message In Mailbox 29 */
2784#define AA30 0x4000 /* Aborted Message In Mailbox 30 */
2785#define AA31 0x8000 /* Aborted Message In Mailbox 31 */
2786
2787/* CAN_TA1 Masks */
2788#define TA0 0x0001 /* Transmit Successful From Mailbox 0 */
2789#define TA1 0x0002 /* Transmit Successful From Mailbox 1 */
2790#define TA2 0x0004 /* Transmit Successful From Mailbox 2 */
2791#define TA3 0x0008 /* Transmit Successful From Mailbox 3 */
2792#define TA4 0x0010 /* Transmit Successful From Mailbox 4 */
2793#define TA5 0x0020 /* Transmit Successful From Mailbox 5 */
2794#define TA6 0x0040 /* Transmit Successful From Mailbox 6 */
2795#define TA7 0x0080 /* Transmit Successful From Mailbox 7 */
2796#define TA8 0x0100 /* Transmit Successful From Mailbox 8 */
2797#define TA9 0x0200 /* Transmit Successful From Mailbox 9 */
2798#define TA10 0x0400 /* Transmit Successful From Mailbox 10 */
2799#define TA11 0x0800 /* Transmit Successful From Mailbox 11 */
2800#define TA12 0x1000 /* Transmit Successful From Mailbox 12 */
2801#define TA13 0x2000 /* Transmit Successful From Mailbox 13 */
2802#define TA14 0x4000 /* Transmit Successful From Mailbox 14 */
2803#define TA15 0x8000 /* Transmit Successful From Mailbox 15 */
2804
2805/* CAN_TA2 Masks */
2806#define TA16 0x0001 /* Transmit Successful From Mailbox 16 */
2807#define TA17 0x0002 /* Transmit Successful From Mailbox 17 */
2808#define TA18 0x0004 /* Transmit Successful From Mailbox 18 */
2809#define TA19 0x0008 /* Transmit Successful From Mailbox 19 */
2810#define TA20 0x0010 /* Transmit Successful From Mailbox 20 */
2811#define TA21 0x0020 /* Transmit Successful From Mailbox 21 */
2812#define TA22 0x0040 /* Transmit Successful From Mailbox 22 */
2813#define TA23 0x0080 /* Transmit Successful From Mailbox 23 */
2814#define TA24 0x0100 /* Transmit Successful From Mailbox 24 */
2815#define TA25 0x0200 /* Transmit Successful From Mailbox 25 */
2816#define TA26 0x0400 /* Transmit Successful From Mailbox 26 */
2817#define TA27 0x0800 /* Transmit Successful From Mailbox 27 */
2818#define TA28 0x1000 /* Transmit Successful From Mailbox 28 */
2819#define TA29 0x2000 /* Transmit Successful From Mailbox 29 */
2820#define TA30 0x4000 /* Transmit Successful From Mailbox 30 */
2821#define TA31 0x8000 /* Transmit Successful From Mailbox 31 */
2822
2823/* CAN_MBTD Masks */
2824#define TDPTR 0x001F /* Mailbox To Temporarily Disable */
2825#define TDA 0x0040 /* Temporary Disable Acknowledge */
2826#define TDR 0x0080 /* Temporary Disable Request */
2827
2828/* CAN_RFH1 Masks */
2829#define RFH0 0x0001 /* Enable Automatic Remote Frame Handling For Mailbox 0 */
2830#define RFH1 0x0002 /* Enable Automatic Remote Frame Handling For Mailbox 1 */
2831#define RFH2 0x0004 /* Enable Automatic Remote Frame Handling For Mailbox 2 */
2832#define RFH3 0x0008 /* Enable Automatic Remote Frame Handling For Mailbox 3 */
2833#define RFH4 0x0010 /* Enable Automatic Remote Frame Handling For Mailbox 4 */
2834#define RFH5 0x0020 /* Enable Automatic Remote Frame Handling For Mailbox 5 */
2835#define RFH6 0x0040 /* Enable Automatic Remote Frame Handling For Mailbox 6 */
2836#define RFH7 0x0080 /* Enable Automatic Remote Frame Handling For Mailbox 7 */
2837#define RFH8 0x0100 /* Enable Automatic Remote Frame Handling For Mailbox 8 */
2838#define RFH9 0x0200 /* Enable Automatic Remote Frame Handling For Mailbox 9 */
2839#define RFH10 0x0400 /* Enable Automatic Remote Frame Handling For Mailbox 10 */
2840#define RFH11 0x0800 /* Enable Automatic Remote Frame Handling For Mailbox 11 */
2841#define RFH12 0x1000 /* Enable Automatic Remote Frame Handling For Mailbox 12 */
2842#define RFH13 0x2000 /* Enable Automatic Remote Frame Handling For Mailbox 13 */
2843#define RFH14 0x4000 /* Enable Automatic Remote Frame Handling For Mailbox 14 */
2844#define RFH15 0x8000 /* Enable Automatic Remote Frame Handling For Mailbox 15 */
2845
2846/* CAN_RFH2 Masks */
2847#define RFH16 0x0001 /* Enable Automatic Remote Frame Handling For Mailbox 16 */
2848#define RFH17 0x0002 /* Enable Automatic Remote Frame Handling For Mailbox 17 */
2849#define RFH18 0x0004 /* Enable Automatic Remote Frame Handling For Mailbox 18 */
2850#define RFH19 0x0008 /* Enable Automatic Remote Frame Handling For Mailbox 19 */
2851#define RFH20 0x0010 /* Enable Automatic Remote Frame Handling For Mailbox 20 */
2852#define RFH21 0x0020 /* Enable Automatic Remote Frame Handling For Mailbox 21 */
2853#define RFH22 0x0040 /* Enable Automatic Remote Frame Handling For Mailbox 22 */
2854#define RFH23 0x0080 /* Enable Automatic Remote Frame Handling For Mailbox 23 */
2855#define RFH24 0x0100 /* Enable Automatic Remote Frame Handling For Mailbox 24 */
2856#define RFH25 0x0200 /* Enable Automatic Remote Frame Handling For Mailbox 25 */
2857#define RFH26 0x0400 /* Enable Automatic Remote Frame Handling For Mailbox 26 */
2858#define RFH27 0x0800 /* Enable Automatic Remote Frame Handling For Mailbox 27 */
2859#define RFH28 0x1000 /* Enable Automatic Remote Frame Handling For Mailbox 28 */
2860#define RFH29 0x2000 /* Enable Automatic Remote Frame Handling For Mailbox 29 */
2861#define RFH30 0x4000 /* Enable Automatic Remote Frame Handling For Mailbox 30 */
2862#define RFH31 0x8000 /* Enable Automatic Remote Frame Handling For Mailbox 31 */
2863
2864/* CAN_MBTIF1 Masks */
2865#define MBTIF0 0x0001 /* TX Interrupt Active In Mailbox 0 */
2866#define MBTIF1 0x0002 /* TX Interrupt Active In Mailbox 1 */
2867#define MBTIF2 0x0004 /* TX Interrupt Active In Mailbox 2 */
2868#define MBTIF3 0x0008 /* TX Interrupt Active In Mailbox 3 */
2869#define MBTIF4 0x0010 /* TX Interrupt Active In Mailbox 4 */
2870#define MBTIF5 0x0020 /* TX Interrupt Active In Mailbox 5 */
2871#define MBTIF6 0x0040 /* TX Interrupt Active In Mailbox 6 */
2872#define MBTIF7 0x0080 /* TX Interrupt Active In Mailbox 7 */
2873#define MBTIF8 0x0100 /* TX Interrupt Active In Mailbox 8 */
2874#define MBTIF9 0x0200 /* TX Interrupt Active In Mailbox 9 */
2875#define MBTIF10 0x0400 /* TX Interrupt Active In Mailbox 10 */
2876#define MBTIF11 0x0800 /* TX Interrupt Active In Mailbox 11 */
2877#define MBTIF12 0x1000 /* TX Interrupt Active In Mailbox 12 */
2878#define MBTIF13 0x2000 /* TX Interrupt Active In Mailbox 13 */
2879#define MBTIF14 0x4000 /* TX Interrupt Active In Mailbox 14 */
2880#define MBTIF15 0x8000 /* TX Interrupt Active In Mailbox 15 */
2881
2882/* CAN_MBTIF2 Masks */
2883#define MBTIF16 0x0001 /* TX Interrupt Active In Mailbox 16 */
2884#define MBTIF17 0x0002 /* TX Interrupt Active In Mailbox 17 */
2885#define MBTIF18 0x0004 /* TX Interrupt Active In Mailbox 18 */
2886#define MBTIF19 0x0008 /* TX Interrupt Active In Mailbox 19 */
2887#define MBTIF20 0x0010 /* TX Interrupt Active In Mailbox 20 */
2888#define MBTIF21 0x0020 /* TX Interrupt Active In Mailbox 21 */
2889#define MBTIF22 0x0040 /* TX Interrupt Active In Mailbox 22 */
2890#define MBTIF23 0x0080 /* TX Interrupt Active In Mailbox 23 */
2891#define MBTIF24 0x0100 /* TX Interrupt Active In Mailbox 24 */
2892#define MBTIF25 0x0200 /* TX Interrupt Active In Mailbox 25 */
2893#define MBTIF26 0x0400 /* TX Interrupt Active In Mailbox 26 */
2894#define MBTIF27 0x0800 /* TX Interrupt Active In Mailbox 27 */
2895#define MBTIF28 0x1000 /* TX Interrupt Active In Mailbox 28 */
2896#define MBTIF29 0x2000 /* TX Interrupt Active In Mailbox 29 */
2897#define MBTIF30 0x4000 /* TX Interrupt Active In Mailbox 30 */
2898#define MBTIF31 0x8000 /* TX Interrupt Active In Mailbox 31 */
2899
2900/* CAN_MBRIF1 Masks */
2901#define MBRIF0 0x0001 /* RX Interrupt Active In Mailbox 0 */
2902#define MBRIF1 0x0002 /* RX Interrupt Active In Mailbox 1 */
2903#define MBRIF2 0x0004 /* RX Interrupt Active In Mailbox 2 */
2904#define MBRIF3 0x0008 /* RX Interrupt Active In Mailbox 3 */
2905#define MBRIF4 0x0010 /* RX Interrupt Active In Mailbox 4 */
2906#define MBRIF5 0x0020 /* RX Interrupt Active In Mailbox 5 */
2907#define MBRIF6 0x0040 /* RX Interrupt Active In Mailbox 6 */
2908#define MBRIF7 0x0080 /* RX Interrupt Active In Mailbox 7 */
2909#define MBRIF8 0x0100 /* RX Interrupt Active In Mailbox 8 */
2910#define MBRIF9 0x0200 /* RX Interrupt Active In Mailbox 9 */
2911#define MBRIF10 0x0400 /* RX Interrupt Active In Mailbox 10 */
2912#define MBRIF11 0x0800 /* RX Interrupt Active In Mailbox 11 */
2913#define MBRIF12 0x1000 /* RX Interrupt Active In Mailbox 12 */
2914#define MBRIF13 0x2000 /* RX Interrupt Active In Mailbox 13 */
2915#define MBRIF14 0x4000 /* RX Interrupt Active In Mailbox 14 */
2916#define MBRIF15 0x8000 /* RX Interrupt Active In Mailbox 15 */
2917
2918/* CAN_MBRIF2 Masks */
2919#define MBRIF16 0x0001 /* RX Interrupt Active In Mailbox 16 */
2920#define MBRIF17 0x0002 /* RX Interrupt Active In Mailbox 17 */
2921#define MBRIF18 0x0004 /* RX Interrupt Active In Mailbox 18 */
2922#define MBRIF19 0x0008 /* RX Interrupt Active In Mailbox 19 */
2923#define MBRIF20 0x0010 /* RX Interrupt Active In Mailbox 20 */
2924#define MBRIF21 0x0020 /* RX Interrupt Active In Mailbox 21 */
2925#define MBRIF22 0x0040 /* RX Interrupt Active In Mailbox 22 */
2926#define MBRIF23 0x0080 /* RX Interrupt Active In Mailbox 23 */
2927#define MBRIF24 0x0100 /* RX Interrupt Active In Mailbox 24 */
2928#define MBRIF25 0x0200 /* RX Interrupt Active In Mailbox 25 */
2929#define MBRIF26 0x0400 /* RX Interrupt Active In Mailbox 26 */
2930#define MBRIF27 0x0800 /* RX Interrupt Active In Mailbox 27 */
2931#define MBRIF28 0x1000 /* RX Interrupt Active In Mailbox 28 */
2932#define MBRIF29 0x2000 /* RX Interrupt Active In Mailbox 29 */
2933#define MBRIF30 0x4000 /* RX Interrupt Active In Mailbox 30 */
2934#define MBRIF31 0x8000 /* RX Interrupt Active In Mailbox 31 */
2935
2936/* CAN_MBIM1 Masks */
2937#define MBIM0 0x0001 /* Enable Interrupt For Mailbox 0 */
2938#define MBIM1 0x0002 /* Enable Interrupt For Mailbox 1 */
2939#define MBIM2 0x0004 /* Enable Interrupt For Mailbox 2 */
2940#define MBIM3 0x0008 /* Enable Interrupt For Mailbox 3 */
2941#define MBIM4 0x0010 /* Enable Interrupt For Mailbox 4 */
2942#define MBIM5 0x0020 /* Enable Interrupt For Mailbox 5 */
2943#define MBIM6 0x0040 /* Enable Interrupt For Mailbox 6 */
2944#define MBIM7 0x0080 /* Enable Interrupt For Mailbox 7 */
2945#define MBIM8 0x0100 /* Enable Interrupt For Mailbox 8 */
2946#define MBIM9 0x0200 /* Enable Interrupt For Mailbox 9 */
2947#define MBIM10 0x0400 /* Enable Interrupt For Mailbox 10 */
2948#define MBIM11 0x0800 /* Enable Interrupt For Mailbox 11 */
2949#define MBIM12 0x1000 /* Enable Interrupt For Mailbox 12 */
2950#define MBIM13 0x2000 /* Enable Interrupt For Mailbox 13 */
2951#define MBIM14 0x4000 /* Enable Interrupt For Mailbox 14 */
2952#define MBIM15 0x8000 /* Enable Interrupt For Mailbox 15 */
2953
2954/* CAN_MBIM2 Masks */
2955#define MBIM16 0x0001 /* Enable Interrupt For Mailbox 16 */
2956#define MBIM17 0x0002 /* Enable Interrupt For Mailbox 17 */
2957#define MBIM18 0x0004 /* Enable Interrupt For Mailbox 18 */
2958#define MBIM19 0x0008 /* Enable Interrupt For Mailbox 19 */
2959#define MBIM20 0x0010 /* Enable Interrupt For Mailbox 20 */
2960#define MBIM21 0x0020 /* Enable Interrupt For Mailbox 21 */
2961#define MBIM22 0x0040 /* Enable Interrupt For Mailbox 22 */
2962#define MBIM23 0x0080 /* Enable Interrupt For Mailbox 23 */
2963#define MBIM24 0x0100 /* Enable Interrupt For Mailbox 24 */
2964#define MBIM25 0x0200 /* Enable Interrupt For Mailbox 25 */
2965#define MBIM26 0x0400 /* Enable Interrupt For Mailbox 26 */
2966#define MBIM27 0x0800 /* Enable Interrupt For Mailbox 27 */
2967#define MBIM28 0x1000 /* Enable Interrupt For Mailbox 28 */
2968#define MBIM29 0x2000 /* Enable Interrupt For Mailbox 29 */
2969#define MBIM30 0x4000 /* Enable Interrupt For Mailbox 30 */
2970#define MBIM31 0x8000 /* Enable Interrupt For Mailbox 31 */
2971
2972/* CAN_GIM Masks */
2973#define EWTIM 0x0001 /* Enable TX Error Count Interrupt */
2974#define EWRIM 0x0002 /* Enable RX Error Count Interrupt */
2975#define EPIM 0x0004 /* Enable Error-Passive Mode Interrupt */
2976#define BOIM 0x0008 /* Enable Bus Off Interrupt */
2977#define WUIM 0x0010 /* Enable Wake-Up Interrupt */
2978#define UIAIM 0x0020 /* Enable Access To Unimplemented Address Interrupt */
2979#define AAIM 0x0040 /* Enable Abort Acknowledge Interrupt */
2980#define RMLIM 0x0080 /* Enable RX Message Lost Interrupt */
2981#define UCEIM 0x0100 /* Enable Universal Counter Overflow Interrupt */
2982#define EXTIM 0x0200 /* Enable External Trigger Output Interrupt */
2983#define ADIM 0x0400 /* Enable Access Denied Interrupt */
2984
2985/* CAN_GIS Masks */
2986#define EWTIS 0x0001 /* TX Error Count IRQ Status */
2987#define EWRIS 0x0002 /* RX Error Count IRQ Status */
2988#define EPIS 0x0004 /* Error-Passive Mode IRQ Status */
2989#define BOIS 0x0008 /* Bus Off IRQ Status */
2990#define WUIS 0x0010 /* Wake-Up IRQ Status */
2991#define UIAIS 0x0020 /* Access To Unimplemented Address IRQ Status */
2992#define AAIS 0x0040 /* Abort Acknowledge IRQ Status */
2993#define RMLIS 0x0080 /* RX Message Lost IRQ Status */
2994#define UCEIS 0x0100 /* Universal Counter Overflow IRQ Status */
2995#define EXTIS 0x0200 /* External Trigger Output IRQ Status */
2996#define ADIS 0x0400 /* Access Denied IRQ Status */
2997
2998/* CAN_GIF Masks */
2999#define EWTIF 0x0001 /* TX Error Count IRQ Flag */
3000#define EWRIF 0x0002 /* RX Error Count IRQ Flag */
3001#define EPIF 0x0004 /* Error-Passive Mode IRQ Flag */
3002#define BOIF 0x0008 /* Bus Off IRQ Flag */
3003#define WUIF 0x0010 /* Wake-Up IRQ Flag */
3004#define UIAIF 0x0020 /* Access To Unimplemented Address IRQ Flag */
3005#define AAIF 0x0040 /* Abort Acknowledge IRQ Flag */
3006#define RMLIF 0x0080 /* RX Message Lost IRQ Flag */
3007#define UCEIF 0x0100 /* Universal Counter Overflow IRQ Flag */
3008#define EXTIF 0x0200 /* External Trigger Output IRQ Flag */
3009#define ADIF 0x0400 /* Access Denied IRQ Flag */
3010
3011/* CAN_UCCNF Masks */
3012#define UCCNF 0x000F /* Universal Counter Mode */
3013#define UC_STAMP 0x0001 /* Timestamp Mode */
3014#define UC_WDOG 0x0002 /* Watchdog Mode */
3015#define UC_AUTOTX 0x0003 /* Auto-Transmit Mode */
3016#define UC_ERROR 0x0006 /* CAN Error Frame Count */
3017#define UC_OVER 0x0007 /* CAN Overload Frame Count */
3018#define UC_LOST 0x0008 /* Arbitration Lost During TX Count */
3019#define UC_AA 0x0009 /* TX Abort Count */
3020#define UC_TA 0x000A /* TX Successful Count */
3021#define UC_REJECT 0x000B /* RX Message Rejected Count */
3022#define UC_RML 0x000C /* RX Message Lost Count */
3023#define UC_RX 0x000D /* Total Successful RX Messages Count */
3024#define UC_RMP 0x000E /* Successful RX W/Matching ID Count */
3025#define UC_ALL 0x000F /* Correct Message On CAN Bus Line Count */
3026#define UCRC 0x0020 /* Universal Counter Reload/Clear */
3027#define UCCT 0x0040 /* Universal Counter CAN Trigger */
3028#define UCE 0x0080 /* Universal Counter Enable */
3029
3030/* CAN_ESR Masks */
3031#define ACKE 0x0004 /* Acknowledge Error */
3032#define SER 0x0008 /* Stuff Error */
3033#define CRCE 0x0010 /* CRC Error */
3034#define SA0 0x0020 /* Stuck At Dominant Error */
3035#define BEF 0x0040 /* Bit Error Flag */
3036#define FER 0x0080 /* Form Error Flag */
3037
3038/* CAN_EWR Masks */
3039#define EWLREC 0x00FF /* RX Error Count Limit (For EWRIS) */
3040#define EWLTEC 0xFF00 /* TX Error Count Limit (For EWTIS) */
3041
3042#endif /* _DEF_BF539_H */ 2421#endif /* _DEF_BF539_H */
diff --git a/arch/blackfin/mach-bf538/include/mach/irq.h b/arch/blackfin/mach-bf538/include/mach/irq.h
index a4b7fcbc556b..7a479d224dc7 100644
--- a/arch/blackfin/mach-bf538/include/mach/irq.h
+++ b/arch/blackfin/mach-bf538/include/mach/irq.h
@@ -110,7 +110,8 @@
110 110
111#define GPIO_IRQ_BASE IRQ_PF0 111#define GPIO_IRQ_BASE IRQ_PF0
112 112
113#define NR_IRQS (IRQ_PF15+1) 113#define NR_MACH_IRQS (IRQ_PF15 + 1)
114#define NR_IRQS (NR_MACH_IRQS + NR_SPARE_IRQS)
114 115
115#define IVG7 7 116#define IVG7 7
116#define IVG8 8 117#define IVG8 8
diff --git a/arch/blackfin/mach-bf548/boards/cm_bf548.c b/arch/blackfin/mach-bf548/boards/cm_bf548.c
index ccdcd6da2e9f..dbb6b1d83f6d 100644
--- a/arch/blackfin/mach-bf548/boards/cm_bf548.c
+++ b/arch/blackfin/mach-bf548/boards/cm_bf548.c
@@ -127,44 +127,211 @@ static struct platform_device rtc_device = {
127#endif 127#endif
128 128
129#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 129#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
130static struct resource bfin_uart_resources[] = {
131#ifdef CONFIG_SERIAL_BFIN_UART0 130#ifdef CONFIG_SERIAL_BFIN_UART0
131static struct resource bfin_uart0_resources[] = {
132 { 132 {
133 .start = 0xFFC00400, 133 .start = UART0_DLL,
134 .end = 0xFFC004FF, 134 .end = UART0_RBR+2,
135 .flags = IORESOURCE_MEM, 135 .flags = IORESOURCE_MEM,
136 }, 136 },
137 {
138 .start = IRQ_UART0_RX,
139 .end = IRQ_UART0_RX+1,
140 .flags = IORESOURCE_IRQ,
141 },
142 {
143 .start = IRQ_UART0_ERROR,
144 .end = IRQ_UART0_ERROR,
145 .flags = IORESOURCE_IRQ,
146 },
147 {
148 .start = CH_UART0_TX,
149 .end = CH_UART0_TX,
150 .flags = IORESOURCE_DMA,
151 },
152 {
153 .start = CH_UART0_RX,
154 .end = CH_UART0_RX,
155 .flags = IORESOURCE_DMA,
156 },
157};
158
159unsigned short bfin_uart0_peripherals[] = {
160 P_UART0_TX, P_UART0_RX, 0
161};
162
163static struct platform_device bfin_uart0_device = {
164 .name = "bfin-uart",
165 .id = 0,
166 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
167 .resource = bfin_uart0_resources,
168 .dev = {
169 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
170 },
171};
137#endif 172#endif
138#ifdef CONFIG_SERIAL_BFIN_UART1 173#ifdef CONFIG_SERIAL_BFIN_UART1
174static struct resource bfin_uart1_resources[] = {
139 { 175 {
140 .start = 0xFFC02000, 176 .start = UART1_DLL,
141 .end = 0xFFC020FF, 177 .end = UART1_RBR+2,
142 .flags = IORESOURCE_MEM, 178 .flags = IORESOURCE_MEM,
143 }, 179 },
180 {
181 .start = IRQ_UART1_RX,
182 .end = IRQ_UART1_RX+1,
183 .flags = IORESOURCE_IRQ,
184 },
185 {
186 .start = IRQ_UART1_ERROR,
187 .end = IRQ_UART1_ERROR,
188 .flags = IORESOURCE_IRQ,
189 },
190 {
191 .start = CH_UART1_TX,
192 .end = CH_UART1_TX,
193 .flags = IORESOURCE_DMA,
194 },
195 {
196 .start = CH_UART1_RX,
197 .end = CH_UART1_RX,
198 .flags = IORESOURCE_DMA,
199 },
200#ifdef CONFIG_BFIN_UART1_CTSRTS
201 { /* CTS pin -- 0 means not supported */
202 .start = GPIO_PE10,
203 .end = GPIO_PE10,
204 .flags = IORESOURCE_IO,
205 },
206 { /* RTS pin -- 0 means not supported */
207 .start = GPIO_PE9,
208 .end = GPIO_PE9,
209 .flags = IORESOURCE_IO,
210 },
211#endif
212};
213
214unsigned short bfin_uart1_peripherals[] = {
215 P_UART1_TX, P_UART1_RX,
216#ifdef CONFIG_BFIN_UART1_CTSRTS
217 P_UART1_RTS, P_UART1_CTS,
218#endif
219 0
220};
221
222static struct platform_device bfin_uart1_device = {
223 .name = "bfin-uart",
224 .id = 1,
225 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
226 .resource = bfin_uart1_resources,
227 .dev = {
228 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
229 },
230};
144#endif 231#endif
145#ifdef CONFIG_SERIAL_BFIN_UART2 232#ifdef CONFIG_SERIAL_BFIN_UART2
233static struct resource bfin_uart2_resources[] = {
146 { 234 {
147 .start = 0xFFC02100, 235 .start = UART2_DLL,
148 .end = 0xFFC021FF, 236 .end = UART2_RBR+2,
149 .flags = IORESOURCE_MEM, 237 .flags = IORESOURCE_MEM,
150 }, 238 },
239 {
240 .start = IRQ_UART2_RX,
241 .end = IRQ_UART2_RX+1,
242 .flags = IORESOURCE_IRQ,
243 },
244 {
245 .start = IRQ_UART2_ERROR,
246 .end = IRQ_UART2_ERROR,
247 .flags = IORESOURCE_IRQ,
248 },
249 {
250 .start = CH_UART2_TX,
251 .end = CH_UART2_TX,
252 .flags = IORESOURCE_DMA,
253 },
254 {
255 .start = CH_UART2_RX,
256 .end = CH_UART2_RX,
257 .flags = IORESOURCE_DMA,
258 },
259};
260
261unsigned short bfin_uart2_peripherals[] = {
262 P_UART2_TX, P_UART2_RX, 0
263};
264
265static struct platform_device bfin_uart2_device = {
266 .name = "bfin-uart",
267 .id = 2,
268 .num_resources = ARRAY_SIZE(bfin_uart2_resources),
269 .resource = bfin_uart2_resources,
270 .dev = {
271 .platform_data = &bfin_uart2_peripherals, /* Passed to driver */
272 },
273};
151#endif 274#endif
152#ifdef CONFIG_SERIAL_BFIN_UART3 275#ifdef CONFIG_SERIAL_BFIN_UART3
276static struct resource bfin_uart3_resources[] = {
153 { 277 {
154 .start = 0xFFC03100, 278 .start = UART3_DLL,
155 .end = 0xFFC031FF, 279 .end = UART3_RBR+2,
156 .flags = IORESOURCE_MEM, 280 .flags = IORESOURCE_MEM,
157 }, 281 },
282 {
283 .start = IRQ_UART3_RX,
284 .end = IRQ_UART3_RX+1,
285 .flags = IORESOURCE_IRQ,
286 },
287 {
288 .start = IRQ_UART3_ERROR,
289 .end = IRQ_UART3_ERROR,
290 .flags = IORESOURCE_IRQ,
291 },
292 {
293 .start = CH_UART3_TX,
294 .end = CH_UART3_TX,
295 .flags = IORESOURCE_DMA,
296 },
297 {
298 .start = CH_UART3_RX,
299 .end = CH_UART3_RX,
300 .flags = IORESOURCE_DMA,
301 },
302#ifdef CONFIG_BFIN_UART3_CTSRTS
303 { /* CTS pin -- 0 means not supported */
304 .start = GPIO_PB3,
305 .end = GPIO_PB3,
306 .flags = IORESOURCE_IO,
307 },
308 { /* RTS pin -- 0 means not supported */
309 .start = GPIO_PB2,
310 .end = GPIO_PB2,
311 .flags = IORESOURCE_IO,
312 },
158#endif 313#endif
159}; 314};
160 315
161static struct platform_device bfin_uart_device = { 316unsigned short bfin_uart3_peripherals[] = {
317 P_UART3_TX, P_UART3_RX,
318#ifdef CONFIG_BFIN_UART3_CTSRTS
319 P_UART3_RTS, P_UART3_CTS,
320#endif
321 0
322};
323
324static struct platform_device bfin_uart3_device = {
162 .name = "bfin-uart", 325 .name = "bfin-uart",
163 .id = 1, 326 .id = 3,
164 .num_resources = ARRAY_SIZE(bfin_uart_resources), 327 .num_resources = ARRAY_SIZE(bfin_uart3_resources),
165 .resource = bfin_uart_resources, 328 .resource = bfin_uart3_resources,
329 .dev = {
330 .platform_data = &bfin_uart3_peripherals, /* Passed to driver */
331 },
166}; 332};
167#endif 333#endif
334#endif
168 335
169#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 336#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
170#ifdef CONFIG_BFIN_SIR0 337#ifdef CONFIG_BFIN_SIR0
@@ -331,6 +498,10 @@ static struct musb_hdrc_config musb_config = {
331 .num_eps = 8, 498 .num_eps = 8,
332 .dma_channels = 8, 499 .dma_channels = 8,
333 .gpio_vrsel = GPIO_PH6, 500 .gpio_vrsel = GPIO_PH6,
501 /* Some custom boards need to be active low, just set it to "0"
502 * if it is the case.
503 */
504 .gpio_vrsel_active = 1,
334}; 505};
335 506
336static struct musb_hdrc_platform_data musb_plat = { 507static struct musb_hdrc_platform_data musb_plat = {
@@ -359,6 +530,145 @@ static struct platform_device musb_device = {
359}; 530};
360#endif 531#endif
361 532
533#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
534#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
535static struct resource bfin_sport0_uart_resources[] = {
536 {
537 .start = SPORT0_TCR1,
538 .end = SPORT0_MRCS3+4,
539 .flags = IORESOURCE_MEM,
540 },
541 {
542 .start = IRQ_SPORT0_RX,
543 .end = IRQ_SPORT0_RX+1,
544 .flags = IORESOURCE_IRQ,
545 },
546 {
547 .start = IRQ_SPORT0_ERROR,
548 .end = IRQ_SPORT0_ERROR,
549 .flags = IORESOURCE_IRQ,
550 },
551};
552
553unsigned short bfin_sport0_peripherals[] = {
554 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
555 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
556};
557
558static struct platform_device bfin_sport0_uart_device = {
559 .name = "bfin-sport-uart",
560 .id = 0,
561 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
562 .resource = bfin_sport0_uart_resources,
563 .dev = {
564 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
565 },
566};
567#endif
568#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
569static struct resource bfin_sport1_uart_resources[] = {
570 {
571 .start = SPORT1_TCR1,
572 .end = SPORT1_MRCS3+4,
573 .flags = IORESOURCE_MEM,
574 },
575 {
576 .start = IRQ_SPORT1_RX,
577 .end = IRQ_SPORT1_RX+1,
578 .flags = IORESOURCE_IRQ,
579 },
580 {
581 .start = IRQ_SPORT1_ERROR,
582 .end = IRQ_SPORT1_ERROR,
583 .flags = IORESOURCE_IRQ,
584 },
585};
586
587unsigned short bfin_sport1_peripherals[] = {
588 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
589 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
590};
591
592static struct platform_device bfin_sport1_uart_device = {
593 .name = "bfin-sport-uart",
594 .id = 1,
595 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
596 .resource = bfin_sport1_uart_resources,
597 .dev = {
598 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
599 },
600};
601#endif
602#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
603static struct resource bfin_sport2_uart_resources[] = {
604 {
605 .start = SPORT2_TCR1,
606 .end = SPORT2_MRCS3+4,
607 .flags = IORESOURCE_MEM,
608 },
609 {
610 .start = IRQ_SPORT2_RX,
611 .end = IRQ_SPORT2_RX+1,
612 .flags = IORESOURCE_IRQ,
613 },
614 {
615 .start = IRQ_SPORT2_ERROR,
616 .end = IRQ_SPORT2_ERROR,
617 .flags = IORESOURCE_IRQ,
618 },
619};
620
621unsigned short bfin_sport2_peripherals[] = {
622 P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
623 P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
624};
625
626static struct platform_device bfin_sport2_uart_device = {
627 .name = "bfin-sport-uart",
628 .id = 2,
629 .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
630 .resource = bfin_sport2_uart_resources,
631 .dev = {
632 .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
633 },
634};
635#endif
636#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
637static struct resource bfin_sport3_uart_resources[] = {
638 {
639 .start = SPORT3_TCR1,
640 .end = SPORT3_MRCS3+4,
641 .flags = IORESOURCE_MEM,
642 },
643 {
644 .start = IRQ_SPORT3_RX,
645 .end = IRQ_SPORT3_RX+1,
646 .flags = IORESOURCE_IRQ,
647 },
648 {
649 .start = IRQ_SPORT3_ERROR,
650 .end = IRQ_SPORT3_ERROR,
651 .flags = IORESOURCE_IRQ,
652 },
653};
654
655unsigned short bfin_sport3_peripherals[] = {
656 P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, P_SPORT3_RFS,
657 P_SPORT3_DRPRI, P_SPORT3_RSCLK, P_SPORT3_DRSEC, P_SPORT3_DTSEC, 0
658};
659
660static struct platform_device bfin_sport3_uart_device = {
661 .name = "bfin-sport-uart",
662 .id = 3,
663 .num_resources = ARRAY_SIZE(bfin_sport3_uart_resources),
664 .resource = bfin_sport3_uart_resources,
665 .dev = {
666 .platform_data = &bfin_sport3_peripherals, /* Passed to driver */
667 },
668};
669#endif
670#endif
671
362#if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE) 672#if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
363static struct resource bfin_atapi_resources[] = { 673static struct resource bfin_atapi_resources[] = {
364 { 674 {
@@ -752,7 +1062,18 @@ static struct platform_device *cm_bf548_devices[] __initdata = {
752#endif 1062#endif
753 1063
754#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 1064#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
755 &bfin_uart_device, 1065#ifdef CONFIG_SERIAL_BFIN_UART0
1066 &bfin_uart0_device,
1067#endif
1068#ifdef CONFIG_SERIAL_BFIN_UART1
1069 &bfin_uart1_device,
1070#endif
1071#ifdef CONFIG_SERIAL_BFIN_UART2
1072 &bfin_uart2_device,
1073#endif
1074#ifdef CONFIG_SERIAL_BFIN_UART3
1075 &bfin_uart3_device,
1076#endif
756#endif 1077#endif
757 1078
758#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 1079#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
@@ -782,6 +1103,21 @@ static struct platform_device *cm_bf548_devices[] __initdata = {
782 &musb_device, 1103 &musb_device,
783#endif 1104#endif
784 1105
1106#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
1107#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1108 &bfin_sport0_uart_device,
1109#endif
1110#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1111 &bfin_sport1_uart_device,
1112#endif
1113#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
1114 &bfin_sport2_uart_device,
1115#endif
1116#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
1117 &bfin_sport3_uart_device,
1118#endif
1119#endif
1120
785#if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE) 1121#if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
786 &bfin_atapi_device, 1122 &bfin_atapi_device,
787#endif 1123#endif
@@ -833,3 +1169,42 @@ static int __init cm_bf548_init(void)
833} 1169}
834 1170
835arch_initcall(cm_bf548_init); 1171arch_initcall(cm_bf548_init);
1172
1173static struct platform_device *cm_bf548_early_devices[] __initdata = {
1174#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1175#ifdef CONFIG_SERIAL_BFIN_UART0
1176 &bfin_uart0_device,
1177#endif
1178#ifdef CONFIG_SERIAL_BFIN_UART1
1179 &bfin_uart1_device,
1180#endif
1181#ifdef CONFIG_SERIAL_BFIN_UART2
1182 &bfin_uart2_device,
1183#endif
1184#ifdef CONFIG_SERIAL_BFIN_UART3
1185 &bfin_uart3_device,
1186#endif
1187#endif
1188
1189#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
1190#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1191 &bfin_sport0_uart_device,
1192#endif
1193#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1194 &bfin_sport1_uart_device,
1195#endif
1196#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
1197 &bfin_sport2_uart_device,
1198#endif
1199#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
1200 &bfin_sport3_uart_device,
1201#endif
1202#endif
1203};
1204
1205void __init native_machine_early_platform_add_devices(void)
1206{
1207 printk(KERN_INFO "register early platform devices\n");
1208 early_platform_add_devices(cm_bf548_early_devices,
1209 ARRAY_SIZE(cm_bf548_early_devices));
1210}
diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c
index 60193f72777c..6fcfb9187c35 100644
--- a/arch/blackfin/mach-bf548/boards/ezkit.c
+++ b/arch/blackfin/mach-bf548/boards/ezkit.c
@@ -232,44 +232,211 @@ static struct platform_device rtc_device = {
232#endif 232#endif
233 233
234#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 234#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
235static struct resource bfin_uart_resources[] = {
236#ifdef CONFIG_SERIAL_BFIN_UART0 235#ifdef CONFIG_SERIAL_BFIN_UART0
236static struct resource bfin_uart0_resources[] = {
237 { 237 {
238 .start = 0xFFC00400, 238 .start = UART0_DLL,
239 .end = 0xFFC004FF, 239 .end = UART0_RBR+2,
240 .flags = IORESOURCE_MEM, 240 .flags = IORESOURCE_MEM,
241 }, 241 },
242 {
243 .start = IRQ_UART0_RX,
244 .end = IRQ_UART0_RX+1,
245 .flags = IORESOURCE_IRQ,
246 },
247 {
248 .start = IRQ_UART0_ERROR,
249 .end = IRQ_UART0_ERROR,
250 .flags = IORESOURCE_IRQ,
251 },
252 {
253 .start = CH_UART0_TX,
254 .end = CH_UART0_TX,
255 .flags = IORESOURCE_DMA,
256 },
257 {
258 .start = CH_UART0_RX,
259 .end = CH_UART0_RX,
260 .flags = IORESOURCE_DMA,
261 },
262};
263
264unsigned short bfin_uart0_peripherals[] = {
265 P_UART0_TX, P_UART0_RX, 0
266};
267
268static struct platform_device bfin_uart0_device = {
269 .name = "bfin-uart",
270 .id = 0,
271 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
272 .resource = bfin_uart0_resources,
273 .dev = {
274 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
275 },
276};
242#endif 277#endif
243#ifdef CONFIG_SERIAL_BFIN_UART1 278#ifdef CONFIG_SERIAL_BFIN_UART1
279static struct resource bfin_uart1_resources[] = {
244 { 280 {
245 .start = 0xFFC02000, 281 .start = UART1_DLL,
246 .end = 0xFFC020FF, 282 .end = UART1_RBR+2,
247 .flags = IORESOURCE_MEM, 283 .flags = IORESOURCE_MEM,
248 }, 284 },
285 {
286 .start = IRQ_UART1_RX,
287 .end = IRQ_UART1_RX+1,
288 .flags = IORESOURCE_IRQ,
289 },
290 {
291 .start = IRQ_UART1_ERROR,
292 .end = IRQ_UART1_ERROR,
293 .flags = IORESOURCE_IRQ,
294 },
295 {
296 .start = CH_UART1_TX,
297 .end = CH_UART1_TX,
298 .flags = IORESOURCE_DMA,
299 },
300 {
301 .start = CH_UART1_RX,
302 .end = CH_UART1_RX,
303 .flags = IORESOURCE_DMA,
304 },
305#ifdef CONFIG_BFIN_UART1_CTSRTS
306 { /* CTS pin -- 0 means not supported */
307 .start = GPIO_PE10,
308 .end = GPIO_PE10,
309 .flags = IORESOURCE_IO,
310 },
311 { /* RTS pin -- 0 means not supported */
312 .start = GPIO_PE9,
313 .end = GPIO_PE9,
314 .flags = IORESOURCE_IO,
315 },
316#endif
317};
318
319unsigned short bfin_uart1_peripherals[] = {
320 P_UART1_TX, P_UART1_RX,
321#ifdef CONFIG_BFIN_UART1_CTSRTS
322 P_UART1_RTS, P_UART1_CTS,
323#endif
324 0
325};
326
327static struct platform_device bfin_uart1_device = {
328 .name = "bfin-uart",
329 .id = 1,
330 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
331 .resource = bfin_uart1_resources,
332 .dev = {
333 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
334 },
335};
249#endif 336#endif
250#ifdef CONFIG_SERIAL_BFIN_UART2 337#ifdef CONFIG_SERIAL_BFIN_UART2
338static struct resource bfin_uart2_resources[] = {
251 { 339 {
252 .start = 0xFFC02100, 340 .start = UART2_DLL,
253 .end = 0xFFC021FF, 341 .end = UART2_RBR+2,
254 .flags = IORESOURCE_MEM, 342 .flags = IORESOURCE_MEM,
255 }, 343 },
344 {
345 .start = IRQ_UART2_RX,
346 .end = IRQ_UART2_RX+1,
347 .flags = IORESOURCE_IRQ,
348 },
349 {
350 .start = IRQ_UART2_ERROR,
351 .end = IRQ_UART2_ERROR,
352 .flags = IORESOURCE_IRQ,
353 },
354 {
355 .start = CH_UART2_TX,
356 .end = CH_UART2_TX,
357 .flags = IORESOURCE_DMA,
358 },
359 {
360 .start = CH_UART2_RX,
361 .end = CH_UART2_RX,
362 .flags = IORESOURCE_DMA,
363 },
364};
365
366unsigned short bfin_uart2_peripherals[] = {
367 P_UART2_TX, P_UART2_RX, 0
368};
369
370static struct platform_device bfin_uart2_device = {
371 .name = "bfin-uart",
372 .id = 2,
373 .num_resources = ARRAY_SIZE(bfin_uart2_resources),
374 .resource = bfin_uart2_resources,
375 .dev = {
376 .platform_data = &bfin_uart2_peripherals, /* Passed to driver */
377 },
378};
256#endif 379#endif
257#ifdef CONFIG_SERIAL_BFIN_UART3 380#ifdef CONFIG_SERIAL_BFIN_UART3
381static struct resource bfin_uart3_resources[] = {
258 { 382 {
259 .start = 0xFFC03100, 383 .start = UART3_DLL,
260 .end = 0xFFC031FF, 384 .end = UART3_RBR+2,
261 .flags = IORESOURCE_MEM, 385 .flags = IORESOURCE_MEM,
262 }, 386 },
387 {
388 .start = IRQ_UART3_RX,
389 .end = IRQ_UART3_RX+1,
390 .flags = IORESOURCE_IRQ,
391 },
392 {
393 .start = IRQ_UART3_ERROR,
394 .end = IRQ_UART3_ERROR,
395 .flags = IORESOURCE_IRQ,
396 },
397 {
398 .start = CH_UART3_TX,
399 .end = CH_UART3_TX,
400 .flags = IORESOURCE_DMA,
401 },
402 {
403 .start = CH_UART3_RX,
404 .end = CH_UART3_RX,
405 .flags = IORESOURCE_DMA,
406 },
407#ifdef CONFIG_BFIN_UART3_CTSRTS
408 { /* CTS pin -- 0 means not supported */
409 .start = GPIO_PB3,
410 .end = GPIO_PB3,
411 .flags = IORESOURCE_IO,
412 },
413 { /* RTS pin -- 0 means not supported */
414 .start = GPIO_PB2,
415 .end = GPIO_PB2,
416 .flags = IORESOURCE_IO,
417 },
263#endif 418#endif
264}; 419};
265 420
266static struct platform_device bfin_uart_device = { 421unsigned short bfin_uart3_peripherals[] = {
422 P_UART3_TX, P_UART3_RX,
423#ifdef CONFIG_BFIN_UART3_CTSRTS
424 P_UART3_RTS, P_UART3_CTS,
425#endif
426 0
427};
428
429static struct platform_device bfin_uart3_device = {
267 .name = "bfin-uart", 430 .name = "bfin-uart",
268 .id = 1, 431 .id = 3,
269 .num_resources = ARRAY_SIZE(bfin_uart_resources), 432 .num_resources = ARRAY_SIZE(bfin_uart3_resources),
270 .resource = bfin_uart_resources, 433 .resource = bfin_uart3_resources,
434 .dev = {
435 .platform_data = &bfin_uart3_peripherals, /* Passed to driver */
436 },
271}; 437};
272#endif 438#endif
439#endif
273 440
274#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 441#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
275#ifdef CONFIG_BFIN_SIR0 442#ifdef CONFIG_BFIN_SIR0
@@ -436,6 +603,10 @@ static struct musb_hdrc_config musb_config = {
436 .num_eps = 8, 603 .num_eps = 8,
437 .dma_channels = 8, 604 .dma_channels = 8,
438 .gpio_vrsel = GPIO_PE7, 605 .gpio_vrsel = GPIO_PE7,
606 /* Some custom boards need to be active low, just set it to "0"
607 * if it is the case.
608 */
609 .gpio_vrsel_active = 1,
439}; 610};
440 611
441static struct musb_hdrc_platform_data musb_plat = { 612static struct musb_hdrc_platform_data musb_plat = {
@@ -464,6 +635,145 @@ static struct platform_device musb_device = {
464}; 635};
465#endif 636#endif
466 637
638#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
639#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
640static struct resource bfin_sport0_uart_resources[] = {
641 {
642 .start = SPORT0_TCR1,
643 .end = SPORT0_MRCS3+4,
644 .flags = IORESOURCE_MEM,
645 },
646 {
647 .start = IRQ_SPORT0_RX,
648 .end = IRQ_SPORT0_RX+1,
649 .flags = IORESOURCE_IRQ,
650 },
651 {
652 .start = IRQ_SPORT0_ERROR,
653 .end = IRQ_SPORT0_ERROR,
654 .flags = IORESOURCE_IRQ,
655 },
656};
657
658unsigned short bfin_sport0_peripherals[] = {
659 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
660 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
661};
662
663static struct platform_device bfin_sport0_uart_device = {
664 .name = "bfin-sport-uart",
665 .id = 0,
666 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
667 .resource = bfin_sport0_uart_resources,
668 .dev = {
669 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
670 },
671};
672#endif
673#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
674static struct resource bfin_sport1_uart_resources[] = {
675 {
676 .start = SPORT1_TCR1,
677 .end = SPORT1_MRCS3+4,
678 .flags = IORESOURCE_MEM,
679 },
680 {
681 .start = IRQ_SPORT1_RX,
682 .end = IRQ_SPORT1_RX+1,
683 .flags = IORESOURCE_IRQ,
684 },
685 {
686 .start = IRQ_SPORT1_ERROR,
687 .end = IRQ_SPORT1_ERROR,
688 .flags = IORESOURCE_IRQ,
689 },
690};
691
692unsigned short bfin_sport1_peripherals[] = {
693 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
694 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
695};
696
697static struct platform_device bfin_sport1_uart_device = {
698 .name = "bfin-sport-uart",
699 .id = 1,
700 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
701 .resource = bfin_sport1_uart_resources,
702 .dev = {
703 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
704 },
705};
706#endif
707#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
708static struct resource bfin_sport2_uart_resources[] = {
709 {
710 .start = SPORT2_TCR1,
711 .end = SPORT2_MRCS3+4,
712 .flags = IORESOURCE_MEM,
713 },
714 {
715 .start = IRQ_SPORT2_RX,
716 .end = IRQ_SPORT2_RX+1,
717 .flags = IORESOURCE_IRQ,
718 },
719 {
720 .start = IRQ_SPORT2_ERROR,
721 .end = IRQ_SPORT2_ERROR,
722 .flags = IORESOURCE_IRQ,
723 },
724};
725
726unsigned short bfin_sport2_peripherals[] = {
727 P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
728 P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
729};
730
731static struct platform_device bfin_sport2_uart_device = {
732 .name = "bfin-sport-uart",
733 .id = 2,
734 .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
735 .resource = bfin_sport2_uart_resources,
736 .dev = {
737 .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
738 },
739};
740#endif
741#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
742static struct resource bfin_sport3_uart_resources[] = {
743 {
744 .start = SPORT3_TCR1,
745 .end = SPORT3_MRCS3+4,
746 .flags = IORESOURCE_MEM,
747 },
748 {
749 .start = IRQ_SPORT3_RX,
750 .end = IRQ_SPORT3_RX+1,
751 .flags = IORESOURCE_IRQ,
752 },
753 {
754 .start = IRQ_SPORT3_ERROR,
755 .end = IRQ_SPORT3_ERROR,
756 .flags = IORESOURCE_IRQ,
757 },
758};
759
760unsigned short bfin_sport3_peripherals[] = {
761 P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, P_SPORT3_RFS,
762 P_SPORT3_DRPRI, P_SPORT3_RSCLK, P_SPORT3_DRSEC, P_SPORT3_DTSEC, 0
763};
764
765static struct platform_device bfin_sport3_uart_device = {
766 .name = "bfin-sport-uart",
767 .id = 3,
768 .num_resources = ARRAY_SIZE(bfin_sport3_uart_resources),
769 .resource = bfin_sport3_uart_resources,
770 .dev = {
771 .platform_data = &bfin_sport3_peripherals, /* Passed to driver */
772 },
773};
774#endif
775#endif
776
467#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE) 777#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
468unsigned short bfin_can_peripherals[] = { 778unsigned short bfin_can_peripherals[] = {
469 P_CAN0_RX, P_CAN0_TX, 0 779 P_CAN0_RX, P_CAN0_TX, 0
@@ -657,8 +967,8 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = {
657}; 967};
658#endif 968#endif
659 969
660#if defined(CONFIG_SND_BLACKFIN_AD1836) \ 970#if defined(CONFIG_SND_BLACKFIN_AD183X) \
661 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) 971 || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
662static struct bfin5xx_spi_chip ad1836_spi_chip_info = { 972static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
663 .enable_dma = 0, 973 .enable_dma = 0,
664 .bits_per_word = 16, 974 .bits_per_word = 16,
@@ -714,8 +1024,8 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
714 .mode = SPI_MODE_3, 1024 .mode = SPI_MODE_3,
715 }, 1025 },
716#endif 1026#endif
717#if defined(CONFIG_SND_BLACKFIN_AD1836) \ 1027#if defined(CONFIG_SND_BLACKFIN_AD183X) \
718 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) 1028 || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
719 { 1029 {
720 .modalias = "ad1836", 1030 .modalias = "ad1836",
721 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 1031 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
@@ -951,6 +1261,30 @@ static struct platform_device bfin_dpmc = {
951 }, 1261 },
952}; 1262};
953 1263
1264#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
1265static struct platform_device bfin_i2s = {
1266 .name = "bfin-i2s",
1267 .id = CONFIG_SND_BF5XX_SPORT_NUM,
1268 /* TODO: add platform data here */
1269};
1270#endif
1271
1272#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
1273static struct platform_device bfin_tdm = {
1274 .name = "bfin-tdm",
1275 .id = CONFIG_SND_BF5XX_SPORT_NUM,
1276 /* TODO: add platform data here */
1277};
1278#endif
1279
1280#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
1281static struct platform_device bfin_ac97 = {
1282 .name = "bfin-ac97",
1283 .id = CONFIG_SND_BF5XX_SPORT_NUM,
1284 /* TODO: add platform data here */
1285};
1286#endif
1287
954static struct platform_device *ezkit_devices[] __initdata = { 1288static struct platform_device *ezkit_devices[] __initdata = {
955 1289
956 &bfin_dpmc, 1290 &bfin_dpmc,
@@ -960,7 +1294,18 @@ static struct platform_device *ezkit_devices[] __initdata = {
960#endif 1294#endif
961 1295
962#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 1296#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
963 &bfin_uart_device, 1297#ifdef CONFIG_SERIAL_BFIN_UART0
1298 &bfin_uart0_device,
1299#endif
1300#ifdef CONFIG_SERIAL_BFIN_UART1
1301 &bfin_uart1_device,
1302#endif
1303#ifdef CONFIG_SERIAL_BFIN_UART2
1304 &bfin_uart2_device,
1305#endif
1306#ifdef CONFIG_SERIAL_BFIN_UART3
1307 &bfin_uart3_device,
1308#endif
964#endif 1309#endif
965 1310
966#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 1311#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
@@ -994,6 +1339,21 @@ static struct platform_device *ezkit_devices[] __initdata = {
994 &bfin_isp1760_device, 1339 &bfin_isp1760_device,
995#endif 1340#endif
996 1341
1342#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
1343#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1344 &bfin_sport0_uart_device,
1345#endif
1346#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1347 &bfin_sport1_uart_device,
1348#endif
1349#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
1350 &bfin_sport2_uart_device,
1351#endif
1352#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
1353 &bfin_sport3_uart_device,
1354#endif
1355#endif
1356
997#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE) 1357#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
998 &bfin_can_device, 1358 &bfin_can_device,
999#endif 1359#endif
@@ -1037,6 +1397,18 @@ static struct platform_device *ezkit_devices[] __initdata = {
1037#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) 1397#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
1038 &ezkit_flash_device, 1398 &ezkit_flash_device,
1039#endif 1399#endif
1400
1401#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
1402 &bfin_i2s,
1403#endif
1404
1405#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
1406 &bfin_tdm,
1407#endif
1408
1409#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
1410 &bfin_ac97,
1411#endif
1040}; 1412};
1041 1413
1042static int __init ezkit_init(void) 1414static int __init ezkit_init(void)
@@ -1058,3 +1430,42 @@ static int __init ezkit_init(void)
1058} 1430}
1059 1431
1060arch_initcall(ezkit_init); 1432arch_initcall(ezkit_init);
1433
1434static struct platform_device *ezkit_early_devices[] __initdata = {
1435#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1436#ifdef CONFIG_SERIAL_BFIN_UART0
1437 &bfin_uart0_device,
1438#endif
1439#ifdef CONFIG_SERIAL_BFIN_UART1
1440 &bfin_uart1_device,
1441#endif
1442#ifdef CONFIG_SERIAL_BFIN_UART2
1443 &bfin_uart2_device,
1444#endif
1445#ifdef CONFIG_SERIAL_BFIN_UART3
1446 &bfin_uart3_device,
1447#endif
1448#endif
1449
1450#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
1451#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1452 &bfin_sport0_uart_device,
1453#endif
1454#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1455 &bfin_sport1_uart_device,
1456#endif
1457#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
1458 &bfin_sport2_uart_device,
1459#endif
1460#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
1461 &bfin_sport3_uart_device,
1462#endif
1463#endif
1464};
1465
1466void __init native_machine_early_platform_add_devices(void)
1467{
1468 printk(KERN_INFO "register early platform devices\n");
1469 early_platform_add_devices(ezkit_early_devices,
1470 ARRAY_SIZE(ezkit_early_devices));
1471}
diff --git a/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h b/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h
index ab04d137fd8b..0ed06c2366fe 100644
--- a/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h
+++ b/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h
@@ -2104,677 +2104,6 @@
2104 2104
2105#define ECCCNT 0x3ff /* Transfer Count */ 2105#define ECCCNT 0x3ff /* Transfer Count */
2106 2106
2107/* Bit masks for CAN0_CONTROL */
2108
2109#define SRS 0x1 /* Software Reset */
2110#define DNM 0x2 /* DeviceNet Mode */
2111#define ABO 0x4 /* Auto Bus On */
2112#define WBA 0x10 /* Wakeup On CAN Bus Activity */
2113#define SMR 0x20 /* Sleep Mode Request */
2114#define CSR 0x40 /* CAN Suspend Mode Request */
2115#define CCR 0x80 /* CAN Configuration Mode Request */
2116
2117/* Bit masks for CAN0_STATUS */
2118
2119#define WT 0x1 /* CAN Transmit Warning Flag */
2120#define WR 0x2 /* CAN Receive Warning Flag */
2121#define EP 0x4 /* CAN Error Passive Mode */
2122#define EBO 0x8 /* CAN Error Bus Off Mode */
2123#define CSA 0x40 /* CAN Suspend Mode Acknowledge */
2124#define CCA 0x80 /* CAN Configuration Mode Acknowledge */
2125#define MBPTR 0x1f00 /* Mailbox Pointer */
2126#define TRM 0x4000 /* Transmit Mode Status */
2127#define REC 0x8000 /* Receive Mode Status */
2128
2129/* Bit masks for CAN0_DEBUG */
2130
2131#define DEC 0x1 /* Disable Transmit/Receive Error Counters */
2132#define DRI 0x2 /* Disable CANRX Input Pin */
2133#define DTO 0x4 /* Disable CANTX Output Pin */
2134#define DIL 0x8 /* Disable Internal Loop */
2135#define MAA 0x10 /* Mode Auto-Acknowledge */
2136#define MRB 0x20 /* Mode Read Back */
2137#define CDE 0x8000 /* CAN Debug Mode Enable */
2138
2139/* Bit masks for CAN0_CLOCK */
2140
2141#define BRP 0x3ff /* CAN Bit Rate Prescaler */
2142
2143/* Bit masks for CAN0_TIMING */
2144
2145#define SJW 0x300 /* Synchronization Jump Width */
2146#define SAM 0x80 /* Sampling */
2147#define TSEG2 0x70 /* Time Segment 2 */
2148#define TSEG1 0xf /* Time Segment 1 */
2149
2150/* Bit masks for CAN0_INTR */
2151
2152#define CANRX 0x80 /* Serial Input From Transceiver */
2153#define CANTX 0x40 /* Serial Output To Transceiver */
2154#define SMACK 0x8 /* Sleep Mode Acknowledge */
2155#define GIRQ 0x4 /* Global Interrupt Request Status */
2156#define MBTIRQ 0x2 /* Mailbox Transmit Interrupt Request */
2157#define MBRIRQ 0x1 /* Mailbox Receive Interrupt Request */
2158
2159/* Bit masks for CAN0_GIM */
2160
2161#define EWTIM 0x1 /* Error Warning Transmit Interrupt Mask */
2162#define EWRIM 0x2 /* Error Warning Receive Interrupt Mask */
2163#define EPIM 0x4 /* Error Passive Interrupt Mask */
2164#define BOIM 0x8 /* Bus Off Interrupt Mask */
2165#define WUIM 0x10 /* Wakeup Interrupt Mask */
2166#define UIAIM 0x20 /* Unimplemented Address Interrupt Mask */
2167#define AAIM 0x40 /* Abort Acknowledge Interrupt Mask */
2168#define RMLIM 0x80 /* Receive Message Lost Interrupt Mask */
2169#define UCEIM 0x100 /* Universal Counter Exceeded Interrupt Mask */
2170#define ADIM 0x400 /* Access Denied Interrupt Mask */
2171
2172/* Bit masks for CAN0_GIS */
2173
2174#define EWTIS 0x1 /* Error Warning Transmit Interrupt Status */
2175#define EWRIS 0x2 /* Error Warning Receive Interrupt Status */
2176#define EPIS 0x4 /* Error Passive Interrupt Status */
2177#define BOIS 0x8 /* Bus Off Interrupt Status */
2178#define WUIS 0x10 /* Wakeup Interrupt Status */
2179#define UIAIS 0x20 /* Unimplemented Address Interrupt Status */
2180#define AAIS 0x40 /* Abort Acknowledge Interrupt Status */
2181#define RMLIS 0x80 /* Receive Message Lost Interrupt Status */
2182#define UCEIS 0x100 /* Universal Counter Exceeded Interrupt Status */
2183#define ADIS 0x400 /* Access Denied Interrupt Status */
2184
2185/* Bit masks for CAN0_GIF */
2186
2187#define EWTIF 0x1 /* Error Warning Transmit Interrupt Flag */
2188#define EWRIF 0x2 /* Error Warning Receive Interrupt Flag */
2189#define EPIF 0x4 /* Error Passive Interrupt Flag */
2190#define BOIF 0x8 /* Bus Off Interrupt Flag */
2191#define WUIF 0x10 /* Wakeup Interrupt Flag */
2192#define UIAIF 0x20 /* Unimplemented Address Interrupt Flag */
2193#define AAIF 0x40 /* Abort Acknowledge Interrupt Flag */
2194#define RMLIF 0x80 /* Receive Message Lost Interrupt Flag */
2195#define UCEIF 0x100 /* Universal Counter Exceeded Interrupt Flag */
2196#define ADIF 0x400 /* Access Denied Interrupt Flag */
2197
2198/* Bit masks for CAN0_MBTD */
2199
2200#define TDR 0x80 /* Temporary Disable Request */
2201#define TDA 0x40 /* Temporary Disable Acknowledge */
2202#define TDPTR 0x1f /* Temporary Disable Pointer */
2203
2204/* Bit masks for CAN0_UCCNF */
2205
2206#define UCCNF 0xf /* Universal Counter Configuration */
2207#define UCRC 0x20 /* Universal Counter Reload/Clear */
2208#define UCCT 0x40 /* Universal Counter CAN Trigger */
2209#define UCE 0x80 /* Universal Counter Enable */
2210
2211/* Bit masks for CAN0_CEC */
2212
2213#define RXECNT 0xff /* Receive Error Counter */
2214#define TXECNT 0xff00 /* Transmit Error Counter */
2215
2216/* Bit masks for CAN0_ESR */
2217
2218#define FER 0x80 /* Form Error */
2219#define BEF 0x40 /* Bit Error Flag */
2220#define SA0 0x20 /* Stuck At Dominant */
2221#define CRCE 0x10 /* CRC Error */
2222#define SER 0x8 /* Stuff Bit Error */
2223#define ACKE 0x4 /* Acknowledge Error */
2224
2225/* Bit masks for CAN0_EWR */
2226
2227#define EWLTEC 0xff00 /* Transmit Error Warning Limit */
2228#define EWLREC 0xff /* Receive Error Warning Limit */
2229
2230/* Bit masks for CAN0_AMxx_H */
2231
2232#define FDF 0x8000 /* Filter On Data Field */
2233#define FMD 0x4000 /* Full Mask Data */
2234#define AMIDE 0x2000 /* Acceptance Mask Identifier Extension */
2235#define BASEID 0x1ffc /* Base Identifier */
2236#define EXTID_HI 0x3 /* Extended Identifier High Bits */
2237
2238/* Bit masks for CAN0_AMxx_L */
2239
2240#define EXTID_LO 0xffff /* Extended Identifier Low Bits */
2241#define DFM 0xffff /* Data Field Mask */
2242
2243/* Bit masks for CAN0_MBxx_ID1 */
2244
2245#define AME 0x8000 /* Acceptance Mask Enable */
2246#define RTR 0x4000 /* Remote Transmission Request */
2247#define IDE 0x2000 /* Identifier Extension */
2248#define BASEID 0x1ffc /* Base Identifier */
2249#define EXTID_HI 0x3 /* Extended Identifier High Bits */
2250
2251/* Bit masks for CAN0_MBxx_ID0 */
2252
2253#define EXTID_LO 0xffff /* Extended Identifier Low Bits */
2254#define DFM 0xffff /* Data Field Mask */
2255
2256/* Bit masks for CAN0_MBxx_TIMESTAMP */
2257
2258#define TSV 0xffff /* Time Stamp Value */
2259
2260/* Bit masks for CAN0_MBxx_LENGTH */
2261
2262#define DLC 0xf /* Data Length Code */
2263
2264/* Bit masks for CAN0_MBxx_DATA3 */
2265
2266#define CAN_BYTE0 0xff00 /* Data Field Byte 0 */
2267#define CAN_BYTE1 0xff /* Data Field Byte 1 */
2268
2269/* Bit masks for CAN0_MBxx_DATA2 */
2270
2271#define CAN_BYTE2 0xff00 /* Data Field Byte 2 */
2272#define CAN_BYTE3 0xff /* Data Field Byte 3 */
2273
2274/* Bit masks for CAN0_MBxx_DATA1 */
2275
2276#define CAN_BYTE4 0xff00 /* Data Field Byte 4 */
2277#define CAN_BYTE5 0xff /* Data Field Byte 5 */
2278
2279/* Bit masks for CAN0_MBxx_DATA0 */
2280
2281#define CAN_BYTE6 0xff00 /* Data Field Byte 6 */
2282#define CAN_BYTE7 0xff /* Data Field Byte 7 */
2283
2284/* Bit masks for CAN0_MC1 */
2285
2286#define MC0 0x1 /* Mailbox 0 Enable */
2287#define MC1 0x2 /* Mailbox 1 Enable */
2288#define MC2 0x4 /* Mailbox 2 Enable */
2289#define MC3 0x8 /* Mailbox 3 Enable */
2290#define MC4 0x10 /* Mailbox 4 Enable */
2291#define MC5 0x20 /* Mailbox 5 Enable */
2292#define MC6 0x40 /* Mailbox 6 Enable */
2293#define MC7 0x80 /* Mailbox 7 Enable */
2294#define MC8 0x100 /* Mailbox 8 Enable */
2295#define MC9 0x200 /* Mailbox 9 Enable */
2296#define MC10 0x400 /* Mailbox 10 Enable */
2297#define MC11 0x800 /* Mailbox 11 Enable */
2298#define MC12 0x1000 /* Mailbox 12 Enable */
2299#define MC13 0x2000 /* Mailbox 13 Enable */
2300#define MC14 0x4000 /* Mailbox 14 Enable */
2301#define MC15 0x8000 /* Mailbox 15 Enable */
2302
2303/* Bit masks for CAN0_MC2 */
2304
2305#define MC16 0x1 /* Mailbox 16 Enable */
2306#define MC17 0x2 /* Mailbox 17 Enable */
2307#define MC18 0x4 /* Mailbox 18 Enable */
2308#define MC19 0x8 /* Mailbox 19 Enable */
2309#define MC20 0x10 /* Mailbox 20 Enable */
2310#define MC21 0x20 /* Mailbox 21 Enable */
2311#define MC22 0x40 /* Mailbox 22 Enable */
2312#define MC23 0x80 /* Mailbox 23 Enable */
2313#define MC24 0x100 /* Mailbox 24 Enable */
2314#define MC25 0x200 /* Mailbox 25 Enable */
2315#define MC26 0x400 /* Mailbox 26 Enable */
2316#define MC27 0x800 /* Mailbox 27 Enable */
2317#define MC28 0x1000 /* Mailbox 28 Enable */
2318#define MC29 0x2000 /* Mailbox 29 Enable */
2319#define MC30 0x4000 /* Mailbox 30 Enable */
2320#define MC31 0x8000 /* Mailbox 31 Enable */
2321
2322/* Bit masks for CAN0_MD1 */
2323
2324#define MD0 0x1 /* Mailbox 0 Receive Enable */
2325#define MD1 0x2 /* Mailbox 1 Receive Enable */
2326#define MD2 0x4 /* Mailbox 2 Receive Enable */
2327#define MD3 0x8 /* Mailbox 3 Receive Enable */
2328#define MD4 0x10 /* Mailbox 4 Receive Enable */
2329#define MD5 0x20 /* Mailbox 5 Receive Enable */
2330#define MD6 0x40 /* Mailbox 6 Receive Enable */
2331#define MD7 0x80 /* Mailbox 7 Receive Enable */
2332#define MD8 0x100 /* Mailbox 8 Receive Enable */
2333#define MD9 0x200 /* Mailbox 9 Receive Enable */
2334#define MD10 0x400 /* Mailbox 10 Receive Enable */
2335#define MD11 0x800 /* Mailbox 11 Receive Enable */
2336#define MD12 0x1000 /* Mailbox 12 Receive Enable */
2337#define MD13 0x2000 /* Mailbox 13 Receive Enable */
2338#define MD14 0x4000 /* Mailbox 14 Receive Enable */
2339#define MD15 0x8000 /* Mailbox 15 Receive Enable */
2340
2341/* Bit masks for CAN0_MD2 */
2342
2343#define MD16 0x1 /* Mailbox 16 Receive Enable */
2344#define MD17 0x2 /* Mailbox 17 Receive Enable */
2345#define MD18 0x4 /* Mailbox 18 Receive Enable */
2346#define MD19 0x8 /* Mailbox 19 Receive Enable */
2347#define MD20 0x10 /* Mailbox 20 Receive Enable */
2348#define MD21 0x20 /* Mailbox 21 Receive Enable */
2349#define MD22 0x40 /* Mailbox 22 Receive Enable */
2350#define MD23 0x80 /* Mailbox 23 Receive Enable */
2351#define MD24 0x100 /* Mailbox 24 Receive Enable */
2352#define MD25 0x200 /* Mailbox 25 Receive Enable */
2353#define MD26 0x400 /* Mailbox 26 Receive Enable */
2354#define MD27 0x800 /* Mailbox 27 Receive Enable */
2355#define MD28 0x1000 /* Mailbox 28 Receive Enable */
2356#define MD29 0x2000 /* Mailbox 29 Receive Enable */
2357#define MD30 0x4000 /* Mailbox 30 Receive Enable */
2358#define MD31 0x8000 /* Mailbox 31 Receive Enable */
2359
2360/* Bit masks for CAN0_RMP1 */
2361
2362#define RMP0 0x1 /* Mailbox 0 Receive Message Pending */
2363#define RMP1 0x2 /* Mailbox 1 Receive Message Pending */
2364#define RMP2 0x4 /* Mailbox 2 Receive Message Pending */
2365#define RMP3 0x8 /* Mailbox 3 Receive Message Pending */
2366#define RMP4 0x10 /* Mailbox 4 Receive Message Pending */
2367#define RMP5 0x20 /* Mailbox 5 Receive Message Pending */
2368#define RMP6 0x40 /* Mailbox 6 Receive Message Pending */
2369#define RMP7 0x80 /* Mailbox 7 Receive Message Pending */
2370#define RMP8 0x100 /* Mailbox 8 Receive Message Pending */
2371#define RMP9 0x200 /* Mailbox 9 Receive Message Pending */
2372#define RMP10 0x400 /* Mailbox 10 Receive Message Pending */
2373#define RMP11 0x800 /* Mailbox 11 Receive Message Pending */
2374#define RMP12 0x1000 /* Mailbox 12 Receive Message Pending */
2375#define RMP13 0x2000 /* Mailbox 13 Receive Message Pending */
2376#define RMP14 0x4000 /* Mailbox 14 Receive Message Pending */
2377#define RMP15 0x8000 /* Mailbox 15 Receive Message Pending */
2378
2379/* Bit masks for CAN0_RMP2 */
2380
2381#define RMP16 0x1 /* Mailbox 16 Receive Message Pending */
2382#define RMP17 0x2 /* Mailbox 17 Receive Message Pending */
2383#define RMP18 0x4 /* Mailbox 18 Receive Message Pending */
2384#define RMP19 0x8 /* Mailbox 19 Receive Message Pending */
2385#define RMP20 0x10 /* Mailbox 20 Receive Message Pending */
2386#define RMP21 0x20 /* Mailbox 21 Receive Message Pending */
2387#define RMP22 0x40 /* Mailbox 22 Receive Message Pending */
2388#define RMP23 0x80 /* Mailbox 23 Receive Message Pending */
2389#define RMP24 0x100 /* Mailbox 24 Receive Message Pending */
2390#define RMP25 0x200 /* Mailbox 25 Receive Message Pending */
2391#define RMP26 0x400 /* Mailbox 26 Receive Message Pending */
2392#define RMP27 0x800 /* Mailbox 27 Receive Message Pending */
2393#define RMP28 0x1000 /* Mailbox 28 Receive Message Pending */
2394#define RMP29 0x2000 /* Mailbox 29 Receive Message Pending */
2395#define RMP30 0x4000 /* Mailbox 30 Receive Message Pending */
2396#define RMP31 0x8000 /* Mailbox 31 Receive Message Pending */
2397
2398/* Bit masks for CAN0_RML1 */
2399
2400#define RML0 0x1 /* Mailbox 0 Receive Message Lost */
2401#define RML1 0x2 /* Mailbox 1 Receive Message Lost */
2402#define RML2 0x4 /* Mailbox 2 Receive Message Lost */
2403#define RML3 0x8 /* Mailbox 3 Receive Message Lost */
2404#define RML4 0x10 /* Mailbox 4 Receive Message Lost */
2405#define RML5 0x20 /* Mailbox 5 Receive Message Lost */
2406#define RML6 0x40 /* Mailbox 6 Receive Message Lost */
2407#define RML7 0x80 /* Mailbox 7 Receive Message Lost */
2408#define RML8 0x100 /* Mailbox 8 Receive Message Lost */
2409#define RML9 0x200 /* Mailbox 9 Receive Message Lost */
2410#define RML10 0x400 /* Mailbox 10 Receive Message Lost */
2411#define RML11 0x800 /* Mailbox 11 Receive Message Lost */
2412#define RML12 0x1000 /* Mailbox 12 Receive Message Lost */
2413#define RML13 0x2000 /* Mailbox 13 Receive Message Lost */
2414#define RML14 0x4000 /* Mailbox 14 Receive Message Lost */
2415#define RML15 0x8000 /* Mailbox 15 Receive Message Lost */
2416
2417/* Bit masks for CAN0_RML2 */
2418
2419#define RML16 0x1 /* Mailbox 16 Receive Message Lost */
2420#define RML17 0x2 /* Mailbox 17 Receive Message Lost */
2421#define RML18 0x4 /* Mailbox 18 Receive Message Lost */
2422#define RML19 0x8 /* Mailbox 19 Receive Message Lost */
2423#define RML20 0x10 /* Mailbox 20 Receive Message Lost */
2424#define RML21 0x20 /* Mailbox 21 Receive Message Lost */
2425#define RML22 0x40 /* Mailbox 22 Receive Message Lost */
2426#define RML23 0x80 /* Mailbox 23 Receive Message Lost */
2427#define RML24 0x100 /* Mailbox 24 Receive Message Lost */
2428#define RML25 0x200 /* Mailbox 25 Receive Message Lost */
2429#define RML26 0x400 /* Mailbox 26 Receive Message Lost */
2430#define RML27 0x800 /* Mailbox 27 Receive Message Lost */
2431#define RML28 0x1000 /* Mailbox 28 Receive Message Lost */
2432#define RML29 0x2000 /* Mailbox 29 Receive Message Lost */
2433#define RML30 0x4000 /* Mailbox 30 Receive Message Lost */
2434#define RML31 0x8000 /* Mailbox 31 Receive Message Lost */
2435
2436/* Bit masks for CAN0_OPSS1 */
2437
2438#define OPSS0 0x1 /* Mailbox 0 Overwrite Protection/Single-Shot Transmission Enable */
2439#define OPSS1 0x2 /* Mailbox 1 Overwrite Protection/Single-Shot Transmission Enable */
2440#define OPSS2 0x4 /* Mailbox 2 Overwrite Protection/Single-Shot Transmission Enable */
2441#define OPSS3 0x8 /* Mailbox 3 Overwrite Protection/Single-Shot Transmission Enable */
2442#define OPSS4 0x10 /* Mailbox 4 Overwrite Protection/Single-Shot Transmission Enable */
2443#define OPSS5 0x20 /* Mailbox 5 Overwrite Protection/Single-Shot Transmission Enable */
2444#define OPSS6 0x40 /* Mailbox 6 Overwrite Protection/Single-Shot Transmission Enable */
2445#define OPSS7 0x80 /* Mailbox 7 Overwrite Protection/Single-Shot Transmission Enable */
2446#define OPSS8 0x100 /* Mailbox 8 Overwrite Protection/Single-Shot Transmission Enable */
2447#define OPSS9 0x200 /* Mailbox 9 Overwrite Protection/Single-Shot Transmission Enable */
2448#define OPSS10 0x400 /* Mailbox 10 Overwrite Protection/Single-Shot Transmission Enable */
2449#define OPSS11 0x800 /* Mailbox 11 Overwrite Protection/Single-Shot Transmission Enable */
2450#define OPSS12 0x1000 /* Mailbox 12 Overwrite Protection/Single-Shot Transmission Enable */
2451#define OPSS13 0x2000 /* Mailbox 13 Overwrite Protection/Single-Shot Transmission Enable */
2452#define OPSS14 0x4000 /* Mailbox 14 Overwrite Protection/Single-Shot Transmission Enable */
2453#define OPSS15 0x8000 /* Mailbox 15 Overwrite Protection/Single-Shot Transmission Enable */
2454
2455/* Bit masks for CAN0_OPSS2 */
2456
2457#define OPSS16 0x1 /* Mailbox 16 Overwrite Protection/Single-Shot Transmission Enable */
2458#define OPSS17 0x2 /* Mailbox 17 Overwrite Protection/Single-Shot Transmission Enable */
2459#define OPSS18 0x4 /* Mailbox 18 Overwrite Protection/Single-Shot Transmission Enable */
2460#define OPSS19 0x8 /* Mailbox 19 Overwrite Protection/Single-Shot Transmission Enable */
2461#define OPSS20 0x10 /* Mailbox 20 Overwrite Protection/Single-Shot Transmission Enable */
2462#define OPSS21 0x20 /* Mailbox 21 Overwrite Protection/Single-Shot Transmission Enable */
2463#define OPSS22 0x40 /* Mailbox 22 Overwrite Protection/Single-Shot Transmission Enable */
2464#define OPSS23 0x80 /* Mailbox 23 Overwrite Protection/Single-Shot Transmission Enable */
2465#define OPSS24 0x100 /* Mailbox 24 Overwrite Protection/Single-Shot Transmission Enable */
2466#define OPSS25 0x200 /* Mailbox 25 Overwrite Protection/Single-Shot Transmission Enable */
2467#define OPSS26 0x400 /* Mailbox 26 Overwrite Protection/Single-Shot Transmission Enable */
2468#define OPSS27 0x800 /* Mailbox 27 Overwrite Protection/Single-Shot Transmission Enable */
2469#define OPSS28 0x1000 /* Mailbox 28 Overwrite Protection/Single-Shot Transmission Enable */
2470#define OPSS29 0x2000 /* Mailbox 29 Overwrite Protection/Single-Shot Transmission Enable */
2471#define OPSS30 0x4000 /* Mailbox 30 Overwrite Protection/Single-Shot Transmission Enable */
2472#define OPSS31 0x8000 /* Mailbox 31 Overwrite Protection/Single-Shot Transmission Enable */
2473
2474/* Bit masks for CAN0_TRS1 */
2475
2476#define TRS0 0x1 /* Mailbox 0 Transmit Request Set */
2477#define TRS1 0x2 /* Mailbox 1 Transmit Request Set */
2478#define TRS2 0x4 /* Mailbox 2 Transmit Request Set */
2479#define TRS3 0x8 /* Mailbox 3 Transmit Request Set */
2480#define TRS4 0x10 /* Mailbox 4 Transmit Request Set */
2481#define TRS5 0x20 /* Mailbox 5 Transmit Request Set */
2482#define TRS6 0x40 /* Mailbox 6 Transmit Request Set */
2483#define TRS7 0x80 /* Mailbox 7 Transmit Request Set */
2484#define TRS8 0x100 /* Mailbox 8 Transmit Request Set */
2485#define TRS9 0x200 /* Mailbox 9 Transmit Request Set */
2486#define TRS10 0x400 /* Mailbox 10 Transmit Request Set */
2487#define TRS11 0x800 /* Mailbox 11 Transmit Request Set */
2488#define TRS12 0x1000 /* Mailbox 12 Transmit Request Set */
2489#define TRS13 0x2000 /* Mailbox 13 Transmit Request Set */
2490#define TRS14 0x4000 /* Mailbox 14 Transmit Request Set */
2491#define TRS15 0x8000 /* Mailbox 15 Transmit Request Set */
2492
2493/* Bit masks for CAN0_TRS2 */
2494
2495#define TRS16 0x1 /* Mailbox 16 Transmit Request Set */
2496#define TRS17 0x2 /* Mailbox 17 Transmit Request Set */
2497#define TRS18 0x4 /* Mailbox 18 Transmit Request Set */
2498#define TRS19 0x8 /* Mailbox 19 Transmit Request Set */
2499#define TRS20 0x10 /* Mailbox 20 Transmit Request Set */
2500#define TRS21 0x20 /* Mailbox 21 Transmit Request Set */
2501#define TRS22 0x40 /* Mailbox 22 Transmit Request Set */
2502#define TRS23 0x80 /* Mailbox 23 Transmit Request Set */
2503#define TRS24 0x100 /* Mailbox 24 Transmit Request Set */
2504#define TRS25 0x200 /* Mailbox 25 Transmit Request Set */
2505#define TRS26 0x400 /* Mailbox 26 Transmit Request Set */
2506#define TRS27 0x800 /* Mailbox 27 Transmit Request Set */
2507#define TRS28 0x1000 /* Mailbox 28 Transmit Request Set */
2508#define TRS29 0x2000 /* Mailbox 29 Transmit Request Set */
2509#define TRS30 0x4000 /* Mailbox 30 Transmit Request Set */
2510#define TRS31 0x8000 /* Mailbox 31 Transmit Request Set */
2511
2512/* Bit masks for CAN0_TRR1 */
2513
2514#define TRR0 0x1 /* Mailbox 0 Transmit Request Reset */
2515#define TRR1 0x2 /* Mailbox 1 Transmit Request Reset */
2516#define TRR2 0x4 /* Mailbox 2 Transmit Request Reset */
2517#define TRR3 0x8 /* Mailbox 3 Transmit Request Reset */
2518#define TRR4 0x10 /* Mailbox 4 Transmit Request Reset */
2519#define TRR5 0x20 /* Mailbox 5 Transmit Request Reset */
2520#define TRR6 0x40 /* Mailbox 6 Transmit Request Reset */
2521#define TRR7 0x80 /* Mailbox 7 Transmit Request Reset */
2522#define TRR8 0x100 /* Mailbox 8 Transmit Request Reset */
2523#define TRR9 0x200 /* Mailbox 9 Transmit Request Reset */
2524#define TRR10 0x400 /* Mailbox 10 Transmit Request Reset */
2525#define TRR11 0x800 /* Mailbox 11 Transmit Request Reset */
2526#define TRR12 0x1000 /* Mailbox 12 Transmit Request Reset */
2527#define TRR13 0x2000 /* Mailbox 13 Transmit Request Reset */
2528#define TRR14 0x4000 /* Mailbox 14 Transmit Request Reset */
2529#define TRR15 0x8000 /* Mailbox 15 Transmit Request Reset */
2530
2531/* Bit masks for CAN0_TRR2 */
2532
2533#define TRR16 0x1 /* Mailbox 16 Transmit Request Reset */
2534#define TRR17 0x2 /* Mailbox 17 Transmit Request Reset */
2535#define TRR18 0x4 /* Mailbox 18 Transmit Request Reset */
2536#define TRR19 0x8 /* Mailbox 19 Transmit Request Reset */
2537#define TRR20 0x10 /* Mailbox 20 Transmit Request Reset */
2538#define TRR21 0x20 /* Mailbox 21 Transmit Request Reset */
2539#define TRR22 0x40 /* Mailbox 22 Transmit Request Reset */
2540#define TRR23 0x80 /* Mailbox 23 Transmit Request Reset */
2541#define TRR24 0x100 /* Mailbox 24 Transmit Request Reset */
2542#define TRR25 0x200 /* Mailbox 25 Transmit Request Reset */
2543#define TRR26 0x400 /* Mailbox 26 Transmit Request Reset */
2544#define TRR27 0x800 /* Mailbox 27 Transmit Request Reset */
2545#define TRR28 0x1000 /* Mailbox 28 Transmit Request Reset */
2546#define TRR29 0x2000 /* Mailbox 29 Transmit Request Reset */
2547#define TRR30 0x4000 /* Mailbox 30 Transmit Request Reset */
2548#define TRR31 0x8000 /* Mailbox 31 Transmit Request Reset */
2549
2550/* Bit masks for CAN0_AA1 */
2551
2552#define AA0 0x1 /* Mailbox 0 Abort Acknowledge */
2553#define AA1 0x2 /* Mailbox 1 Abort Acknowledge */
2554#define AA2 0x4 /* Mailbox 2 Abort Acknowledge */
2555#define AA3 0x8 /* Mailbox 3 Abort Acknowledge */
2556#define AA4 0x10 /* Mailbox 4 Abort Acknowledge */
2557#define AA5 0x20 /* Mailbox 5 Abort Acknowledge */
2558#define AA6 0x40 /* Mailbox 6 Abort Acknowledge */
2559#define AA7 0x80 /* Mailbox 7 Abort Acknowledge */
2560#define AA8 0x100 /* Mailbox 8 Abort Acknowledge */
2561#define AA9 0x200 /* Mailbox 9 Abort Acknowledge */
2562#define AA10 0x400 /* Mailbox 10 Abort Acknowledge */
2563#define AA11 0x800 /* Mailbox 11 Abort Acknowledge */
2564#define AA12 0x1000 /* Mailbox 12 Abort Acknowledge */
2565#define AA13 0x2000 /* Mailbox 13 Abort Acknowledge */
2566#define AA14 0x4000 /* Mailbox 14 Abort Acknowledge */
2567#define AA15 0x8000 /* Mailbox 15 Abort Acknowledge */
2568
2569/* Bit masks for CAN0_AA2 */
2570
2571#define AA16 0x1 /* Mailbox 16 Abort Acknowledge */
2572#define AA17 0x2 /* Mailbox 17 Abort Acknowledge */
2573#define AA18 0x4 /* Mailbox 18 Abort Acknowledge */
2574#define AA19 0x8 /* Mailbox 19 Abort Acknowledge */
2575#define AA20 0x10 /* Mailbox 20 Abort Acknowledge */
2576#define AA21 0x20 /* Mailbox 21 Abort Acknowledge */
2577#define AA22 0x40 /* Mailbox 22 Abort Acknowledge */
2578#define AA23 0x80 /* Mailbox 23 Abort Acknowledge */
2579#define AA24 0x100 /* Mailbox 24 Abort Acknowledge */
2580#define AA25 0x200 /* Mailbox 25 Abort Acknowledge */
2581#define AA26 0x400 /* Mailbox 26 Abort Acknowledge */
2582#define AA27 0x800 /* Mailbox 27 Abort Acknowledge */
2583#define AA28 0x1000 /* Mailbox 28 Abort Acknowledge */
2584#define AA29 0x2000 /* Mailbox 29 Abort Acknowledge */
2585#define AA30 0x4000 /* Mailbox 30 Abort Acknowledge */
2586#define AA31 0x8000 /* Mailbox 31 Abort Acknowledge */
2587
2588/* Bit masks for CAN0_TA1 */
2589
2590#define TA0 0x1 /* Mailbox 0 Transmit Acknowledge */
2591#define TA1 0x2 /* Mailbox 1 Transmit Acknowledge */
2592#define TA2 0x4 /* Mailbox 2 Transmit Acknowledge */
2593#define TA3 0x8 /* Mailbox 3 Transmit Acknowledge */
2594#define TA4 0x10 /* Mailbox 4 Transmit Acknowledge */
2595#define TA5 0x20 /* Mailbox 5 Transmit Acknowledge */
2596#define TA6 0x40 /* Mailbox 6 Transmit Acknowledge */
2597#define TA7 0x80 /* Mailbox 7 Transmit Acknowledge */
2598#define TA8 0x100 /* Mailbox 8 Transmit Acknowledge */
2599#define TA9 0x200 /* Mailbox 9 Transmit Acknowledge */
2600#define TA10 0x400 /* Mailbox 10 Transmit Acknowledge */
2601#define TA11 0x800 /* Mailbox 11 Transmit Acknowledge */
2602#define TA12 0x1000 /* Mailbox 12 Transmit Acknowledge */
2603#define TA13 0x2000 /* Mailbox 13 Transmit Acknowledge */
2604#define TA14 0x4000 /* Mailbox 14 Transmit Acknowledge */
2605#define TA15 0x8000 /* Mailbox 15 Transmit Acknowledge */
2606
2607/* Bit masks for CAN0_TA2 */
2608
2609#define TA16 0x1 /* Mailbox 16 Transmit Acknowledge */
2610#define TA17 0x2 /* Mailbox 17 Transmit Acknowledge */
2611#define TA18 0x4 /* Mailbox 18 Transmit Acknowledge */
2612#define TA19 0x8 /* Mailbox 19 Transmit Acknowledge */
2613#define TA20 0x10 /* Mailbox 20 Transmit Acknowledge */
2614#define TA21 0x20 /* Mailbox 21 Transmit Acknowledge */
2615#define TA22 0x40 /* Mailbox 22 Transmit Acknowledge */
2616#define TA23 0x80 /* Mailbox 23 Transmit Acknowledge */
2617#define TA24 0x100 /* Mailbox 24 Transmit Acknowledge */
2618#define TA25 0x200 /* Mailbox 25 Transmit Acknowledge */
2619#define TA26 0x400 /* Mailbox 26 Transmit Acknowledge */
2620#define TA27 0x800 /* Mailbox 27 Transmit Acknowledge */
2621#define TA28 0x1000 /* Mailbox 28 Transmit Acknowledge */
2622#define TA29 0x2000 /* Mailbox 29 Transmit Acknowledge */
2623#define TA30 0x4000 /* Mailbox 30 Transmit Acknowledge */
2624#define TA31 0x8000 /* Mailbox 31 Transmit Acknowledge */
2625
2626/* Bit masks for CAN0_RFH1 */
2627
2628#define RFH0 0x1 /* Mailbox 0 Remote Frame Handling Enable */
2629#define RFH1 0x2 /* Mailbox 1 Remote Frame Handling Enable */
2630#define RFH2 0x4 /* Mailbox 2 Remote Frame Handling Enable */
2631#define RFH3 0x8 /* Mailbox 3 Remote Frame Handling Enable */
2632#define RFH4 0x10 /* Mailbox 4 Remote Frame Handling Enable */
2633#define RFH5 0x20 /* Mailbox 5 Remote Frame Handling Enable */
2634#define RFH6 0x40 /* Mailbox 6 Remote Frame Handling Enable */
2635#define RFH7 0x80 /* Mailbox 7 Remote Frame Handling Enable */
2636#define RFH8 0x100 /* Mailbox 8 Remote Frame Handling Enable */
2637#define RFH9 0x200 /* Mailbox 9 Remote Frame Handling Enable */
2638#define RFH10 0x400 /* Mailbox 10 Remote Frame Handling Enable */
2639#define RFH11 0x800 /* Mailbox 11 Remote Frame Handling Enable */
2640#define RFH12 0x1000 /* Mailbox 12 Remote Frame Handling Enable */
2641#define RFH13 0x2000 /* Mailbox 13 Remote Frame Handling Enable */
2642#define RFH14 0x4000 /* Mailbox 14 Remote Frame Handling Enable */
2643#define RFH15 0x8000 /* Mailbox 15 Remote Frame Handling Enable */
2644
2645/* Bit masks for CAN0_RFH2 */
2646
2647#define RFH16 0x1 /* Mailbox 16 Remote Frame Handling Enable */
2648#define RFH17 0x2 /* Mailbox 17 Remote Frame Handling Enable */
2649#define RFH18 0x4 /* Mailbox 18 Remote Frame Handling Enable */
2650#define RFH19 0x8 /* Mailbox 19 Remote Frame Handling Enable */
2651#define RFH20 0x10 /* Mailbox 20 Remote Frame Handling Enable */
2652#define RFH21 0x20 /* Mailbox 21 Remote Frame Handling Enable */
2653#define RFH22 0x40 /* Mailbox 22 Remote Frame Handling Enable */
2654#define RFH23 0x80 /* Mailbox 23 Remote Frame Handling Enable */
2655#define RFH24 0x100 /* Mailbox 24 Remote Frame Handling Enable */
2656#define RFH25 0x200 /* Mailbox 25 Remote Frame Handling Enable */
2657#define RFH26 0x400 /* Mailbox 26 Remote Frame Handling Enable */
2658#define RFH27 0x800 /* Mailbox 27 Remote Frame Handling Enable */
2659#define RFH28 0x1000 /* Mailbox 28 Remote Frame Handling Enable */
2660#define RFH29 0x2000 /* Mailbox 29 Remote Frame Handling Enable */
2661#define RFH30 0x4000 /* Mailbox 30 Remote Frame Handling Enable */
2662#define RFH31 0x8000 /* Mailbox 31 Remote Frame Handling Enable */
2663
2664/* Bit masks for CAN0_MBIM1 */
2665
2666#define MBIM0 0x1 /* Mailbox 0 Mailbox Interrupt Mask */
2667#define MBIM1 0x2 /* Mailbox 1 Mailbox Interrupt Mask */
2668#define MBIM2 0x4 /* Mailbox 2 Mailbox Interrupt Mask */
2669#define MBIM3 0x8 /* Mailbox 3 Mailbox Interrupt Mask */
2670#define MBIM4 0x10 /* Mailbox 4 Mailbox Interrupt Mask */
2671#define MBIM5 0x20 /* Mailbox 5 Mailbox Interrupt Mask */
2672#define MBIM6 0x40 /* Mailbox 6 Mailbox Interrupt Mask */
2673#define MBIM7 0x80 /* Mailbox 7 Mailbox Interrupt Mask */
2674#define MBIM8 0x100 /* Mailbox 8 Mailbox Interrupt Mask */
2675#define MBIM9 0x200 /* Mailbox 9 Mailbox Interrupt Mask */
2676#define MBIM10 0x400 /* Mailbox 10 Mailbox Interrupt Mask */
2677#define MBIM11 0x800 /* Mailbox 11 Mailbox Interrupt Mask */
2678#define MBIM12 0x1000 /* Mailbox 12 Mailbox Interrupt Mask */
2679#define MBIM13 0x2000 /* Mailbox 13 Mailbox Interrupt Mask */
2680#define MBIM14 0x4000 /* Mailbox 14 Mailbox Interrupt Mask */
2681#define MBIM15 0x8000 /* Mailbox 15 Mailbox Interrupt Mask */
2682
2683/* Bit masks for CAN0_MBIM2 */
2684
2685#define MBIM16 0x1 /* Mailbox 16 Mailbox Interrupt Mask */
2686#define MBIM17 0x2 /* Mailbox 17 Mailbox Interrupt Mask */
2687#define MBIM18 0x4 /* Mailbox 18 Mailbox Interrupt Mask */
2688#define MBIM19 0x8 /* Mailbox 19 Mailbox Interrupt Mask */
2689#define MBIM20 0x10 /* Mailbox 20 Mailbox Interrupt Mask */
2690#define MBIM21 0x20 /* Mailbox 21 Mailbox Interrupt Mask */
2691#define MBIM22 0x40 /* Mailbox 22 Mailbox Interrupt Mask */
2692#define MBIM23 0x80 /* Mailbox 23 Mailbox Interrupt Mask */
2693#define MBIM24 0x100 /* Mailbox 24 Mailbox Interrupt Mask */
2694#define MBIM25 0x200 /* Mailbox 25 Mailbox Interrupt Mask */
2695#define MBIM26 0x400 /* Mailbox 26 Mailbox Interrupt Mask */
2696#define MBIM27 0x800 /* Mailbox 27 Mailbox Interrupt Mask */
2697#define MBIM28 0x1000 /* Mailbox 28 Mailbox Interrupt Mask */
2698#define MBIM29 0x2000 /* Mailbox 29 Mailbox Interrupt Mask */
2699#define MBIM30 0x4000 /* Mailbox 30 Mailbox Interrupt Mask */
2700#define MBIM31 0x8000 /* Mailbox 31 Mailbox Interrupt Mask */
2701
2702/* Bit masks for CAN0_MBTIF1 */
2703
2704#define MBTIF0 0x1 /* Mailbox 0 Mailbox Transmit Interrupt Flag */
2705#define MBTIF1 0x2 /* Mailbox 1 Mailbox Transmit Interrupt Flag */
2706#define MBTIF2 0x4 /* Mailbox 2 Mailbox Transmit Interrupt Flag */
2707#define MBTIF3 0x8 /* Mailbox 3 Mailbox Transmit Interrupt Flag */
2708#define MBTIF4 0x10 /* Mailbox 4 Mailbox Transmit Interrupt Flag */
2709#define MBTIF5 0x20 /* Mailbox 5 Mailbox Transmit Interrupt Flag */
2710#define MBTIF6 0x40 /* Mailbox 6 Mailbox Transmit Interrupt Flag */
2711#define MBTIF7 0x80 /* Mailbox 7 Mailbox Transmit Interrupt Flag */
2712#define MBTIF8 0x100 /* Mailbox 8 Mailbox Transmit Interrupt Flag */
2713#define MBTIF9 0x200 /* Mailbox 9 Mailbox Transmit Interrupt Flag */
2714#define MBTIF10 0x400 /* Mailbox 10 Mailbox Transmit Interrupt Flag */
2715#define MBTIF11 0x800 /* Mailbox 11 Mailbox Transmit Interrupt Flag */
2716#define MBTIF12 0x1000 /* Mailbox 12 Mailbox Transmit Interrupt Flag */
2717#define MBTIF13 0x2000 /* Mailbox 13 Mailbox Transmit Interrupt Flag */
2718#define MBTIF14 0x4000 /* Mailbox 14 Mailbox Transmit Interrupt Flag */
2719#define MBTIF15 0x8000 /* Mailbox 15 Mailbox Transmit Interrupt Flag */
2720
2721/* Bit masks for CAN0_MBTIF2 */
2722
2723#define MBTIF16 0x1 /* Mailbox 16 Mailbox Transmit Interrupt Flag */
2724#define MBTIF17 0x2 /* Mailbox 17 Mailbox Transmit Interrupt Flag */
2725#define MBTIF18 0x4 /* Mailbox 18 Mailbox Transmit Interrupt Flag */
2726#define MBTIF19 0x8 /* Mailbox 19 Mailbox Transmit Interrupt Flag */
2727#define MBTIF20 0x10 /* Mailbox 20 Mailbox Transmit Interrupt Flag */
2728#define MBTIF21 0x20 /* Mailbox 21 Mailbox Transmit Interrupt Flag */
2729#define MBTIF22 0x40 /* Mailbox 22 Mailbox Transmit Interrupt Flag */
2730#define MBTIF23 0x80 /* Mailbox 23 Mailbox Transmit Interrupt Flag */
2731#define MBTIF24 0x100 /* Mailbox 24 Mailbox Transmit Interrupt Flag */
2732#define MBTIF25 0x200 /* Mailbox 25 Mailbox Transmit Interrupt Flag */
2733#define MBTIF26 0x400 /* Mailbox 26 Mailbox Transmit Interrupt Flag */
2734#define MBTIF27 0x800 /* Mailbox 27 Mailbox Transmit Interrupt Flag */
2735#define MBTIF28 0x1000 /* Mailbox 28 Mailbox Transmit Interrupt Flag */
2736#define MBTIF29 0x2000 /* Mailbox 29 Mailbox Transmit Interrupt Flag */
2737#define MBTIF30 0x4000 /* Mailbox 30 Mailbox Transmit Interrupt Flag */
2738#define MBTIF31 0x8000 /* Mailbox 31 Mailbox Transmit Interrupt Flag */
2739
2740/* Bit masks for CAN0_MBRIF1 */
2741
2742#define MBRIF0 0x1 /* Mailbox 0 Mailbox Receive Interrupt Flag */
2743#define MBRIF1 0x2 /* Mailbox 1 Mailbox Receive Interrupt Flag */
2744#define MBRIF2 0x4 /* Mailbox 2 Mailbox Receive Interrupt Flag */
2745#define MBRIF3 0x8 /* Mailbox 3 Mailbox Receive Interrupt Flag */
2746#define MBRIF4 0x10 /* Mailbox 4 Mailbox Receive Interrupt Flag */
2747#define MBRIF5 0x20 /* Mailbox 5 Mailbox Receive Interrupt Flag */
2748#define MBRIF6 0x40 /* Mailbox 6 Mailbox Receive Interrupt Flag */
2749#define MBRIF7 0x80 /* Mailbox 7 Mailbox Receive Interrupt Flag */
2750#define MBRIF8 0x100 /* Mailbox 8 Mailbox Receive Interrupt Flag */
2751#define MBRIF9 0x200 /* Mailbox 9 Mailbox Receive Interrupt Flag */
2752#define MBRIF10 0x400 /* Mailbox 10 Mailbox Receive Interrupt Flag */
2753#define MBRIF11 0x800 /* Mailbox 11 Mailbox Receive Interrupt Flag */
2754#define MBRIF12 0x1000 /* Mailbox 12 Mailbox Receive Interrupt Flag */
2755#define MBRIF13 0x2000 /* Mailbox 13 Mailbox Receive Interrupt Flag */
2756#define MBRIF14 0x4000 /* Mailbox 14 Mailbox Receive Interrupt Flag */
2757#define MBRIF15 0x8000 /* Mailbox 15 Mailbox Receive Interrupt Flag */
2758
2759/* Bit masks for CAN0_MBRIF2 */
2760
2761#define MBRIF16 0x1 /* Mailbox 16 Mailbox Receive Interrupt Flag */
2762#define MBRIF17 0x2 /* Mailbox 17 Mailbox Receive Interrupt Flag */
2763#define MBRIF18 0x4 /* Mailbox 18 Mailbox Receive Interrupt Flag */
2764#define MBRIF19 0x8 /* Mailbox 19 Mailbox Receive Interrupt Flag */
2765#define MBRIF20 0x10 /* Mailbox 20 Mailbox Receive Interrupt Flag */
2766#define MBRIF21 0x20 /* Mailbox 21 Mailbox Receive Interrupt Flag */
2767#define MBRIF22 0x40 /* Mailbox 22 Mailbox Receive Interrupt Flag */
2768#define MBRIF23 0x80 /* Mailbox 23 Mailbox Receive Interrupt Flag */
2769#define MBRIF24 0x100 /* Mailbox 24 Mailbox Receive Interrupt Flag */
2770#define MBRIF25 0x200 /* Mailbox 25 Mailbox Receive Interrupt Flag */
2771#define MBRIF26 0x400 /* Mailbox 26 Mailbox Receive Interrupt Flag */
2772#define MBRIF27 0x800 /* Mailbox 27 Mailbox Receive Interrupt Flag */
2773#define MBRIF28 0x1000 /* Mailbox 28 Mailbox Receive Interrupt Flag */
2774#define MBRIF29 0x2000 /* Mailbox 29 Mailbox Receive Interrupt Flag */
2775#define MBRIF30 0x4000 /* Mailbox 30 Mailbox Receive Interrupt Flag */
2776#define MBRIF31 0x8000 /* Mailbox 31 Mailbox Receive Interrupt Flag */
2777
2778/* Bit masks for EPPIx_STATUS */ 2107/* Bit masks for EPPIx_STATUS */
2779 2108
2780#define CFIFO_ERR 0x1 /* Chroma FIFO Error */ 2109#define CFIFO_ERR 0x1 /* Chroma FIFO Error */
diff --git a/arch/blackfin/mach-bf548/include/mach/irq.h b/arch/blackfin/mach-bf548/include/mach/irq.h
index 106db05684ae..1f99b51a3d56 100644
--- a/arch/blackfin/mach-bf548/include/mach/irq.h
+++ b/arch/blackfin/mach-bf548/include/mach/irq.h
@@ -317,7 +317,8 @@ Events (highest priority) EMU 0
317 317
318#define GPIO_IRQ_BASE IRQ_PA0 318#define GPIO_IRQ_BASE IRQ_PA0
319 319
320#define NR_IRQS (IRQ_PJ15+1) 320#define NR_MACH_IRQS (IRQ_PJ15 + 1)
321#define NR_IRQS (NR_MACH_IRQS + NR_SPARE_IRQS)
321 322
322/* For compatibility reasons with existing code */ 323/* For compatibility reasons with existing code */
323 324
diff --git a/arch/blackfin/mach-bf561/Makefile b/arch/blackfin/mach-bf561/Makefile
index 59e18afe28c6..b34029718318 100644
--- a/arch/blackfin/mach-bf561/Makefile
+++ b/arch/blackfin/mach-bf561/Makefile
@@ -6,3 +6,4 @@ obj-y := ints-priority.o dma.o
6 6
7obj-$(CONFIG_BF561_COREB) += coreb.o 7obj-$(CONFIG_BF561_COREB) += coreb.o
8obj-$(CONFIG_SMP) += smp.o secondary.o atomic.o 8obj-$(CONFIG_SMP) += smp.o secondary.o atomic.o
9obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
diff --git a/arch/blackfin/mach-bf561/boards/acvilon.c b/arch/blackfin/mach-bf561/boards/acvilon.c
index 07e8dc8770da..bfcfa86db2b5 100644
--- a/arch/blackfin/mach-bf561/boards/acvilon.c
+++ b/arch/blackfin/mach-bf561/boards/acvilon.c
@@ -44,6 +44,7 @@
44#include <linux/spi/flash.h> 44#include <linux/spi/flash.h>
45#include <linux/irq.h> 45#include <linux/irq.h>
46#include <linux/interrupt.h> 46#include <linux/interrupt.h>
47#include <linux/jiffies.h>
47#include <linux/i2c-pca-platform.h> 48#include <linux/i2c-pca-platform.h>
48#include <linux/delay.h> 49#include <linux/delay.h>
49#include <linux/io.h> 50#include <linux/io.h>
@@ -112,7 +113,7 @@ static struct resource bfin_i2c_pca_resources[] = {
112struct i2c_pca9564_pf_platform_data pca9564_platform_data = { 113struct i2c_pca9564_pf_platform_data pca9564_platform_data = {
113 .gpio = -1, 114 .gpio = -1,
114 .i2c_clock_speed = 330000, 115 .i2c_clock_speed = 330000,
115 .timeout = 10000 116 .timeout = HZ,
116}; 117};
117 118
118/* PCA9564 I2C Bus driver */ 119/* PCA9564 I2C Bus driver */
@@ -176,7 +177,7 @@ static struct resource smsc911x_resources[] = {
176}; 177};
177 178
178static struct smsc911x_platform_config smsc911x_config = { 179static struct smsc911x_platform_config smsc911x_config = {
179 .flags = SMSC911X_USE_32BIT, 180 .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
180 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, 181 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
181 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, 182 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
182 .phy_interface = PHY_INTERFACE_MODE_MII, 183 .phy_interface = PHY_INTERFACE_MODE_MII,
diff --git a/arch/blackfin/mach-bf561/boards/cm_bf561.c b/arch/blackfin/mach-bf561/boards/cm_bf561.c
index dfc8d5b77986..e127aedc1d7f 100644
--- a/arch/blackfin/mach-bf561/boards/cm_bf561.c
+++ b/arch/blackfin/mach-bf561/boards/cm_bf561.c
@@ -72,7 +72,7 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
72}; 72};
73#endif 73#endif
74 74
75#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) 75#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
76static struct bfin5xx_spi_chip ad1836_spi_chip_info = { 76static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
77 .enable_dma = 0, 77 .enable_dma = 0,
78 .bits_per_word = 16, 78 .bits_per_word = 16,
@@ -111,7 +111,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
111 }, 111 },
112#endif 112#endif
113 113
114#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) 114#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
115 { 115 {
116 .modalias = "ad1836", 116 .modalias = "ad1836",
117 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 117 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
@@ -305,21 +305,50 @@ static struct platform_device isp1362_hcd_device = {
305#endif 305#endif
306 306
307#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 307#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
308static struct resource bfin_uart_resources[] = { 308#ifdef CONFIG_SERIAL_BFIN_UART0
309static struct resource bfin_uart0_resources[] = {
309 { 310 {
310 .start = 0xFFC00400, 311 .start = BFIN_UART_THR,
311 .end = 0xFFC004FF, 312 .end = BFIN_UART_GCTL+2,
312 .flags = IORESOURCE_MEM, 313 .flags = IORESOURCE_MEM,
313 }, 314 },
315 {
316 .start = IRQ_UART_RX,
317 .end = IRQ_UART_RX+1,
318 .flags = IORESOURCE_IRQ,
319 },
320 {
321 .start = IRQ_UART_ERROR,
322 .end = IRQ_UART_ERROR,
323 .flags = IORESOURCE_IRQ,
324 },
325 {
326 .start = CH_UART_TX,
327 .end = CH_UART_TX,
328 .flags = IORESOURCE_DMA,
329 },
330 {
331 .start = CH_UART_RX,
332 .end = CH_UART_RX,
333 .flags = IORESOURCE_DMA,
334 },
314}; 335};
315 336
316static struct platform_device bfin_uart_device = { 337unsigned short bfin_uart0_peripherals[] = {
338 P_UART0_TX, P_UART0_RX, 0
339};
340
341static struct platform_device bfin_uart0_device = {
317 .name = "bfin-uart", 342 .name = "bfin-uart",
318 .id = 1, 343 .id = 0,
319 .num_resources = ARRAY_SIZE(bfin_uart_resources), 344 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
320 .resource = bfin_uart_resources, 345 .resource = bfin_uart0_resources,
346 .dev = {
347 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
348 },
321}; 349};
322#endif 350#endif
351#endif
323 352
324#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 353#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
325#ifdef CONFIG_BFIN_SIR0 354#ifdef CONFIG_BFIN_SIR0
@@ -463,7 +492,9 @@ static struct platform_device *cm_bf561_devices[] __initdata = {
463#endif 492#endif
464 493
465#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 494#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
466 &bfin_uart_device, 495#ifdef CONFIG_SERIAL_BFIN_UART0
496 &bfin_uart0_device,
497#endif
467#endif 498#endif
468 499
469#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 500#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
@@ -516,3 +547,18 @@ static int __init cm_bf561_init(void)
516} 547}
517 548
518arch_initcall(cm_bf561_init); 549arch_initcall(cm_bf561_init);
550
551static struct platform_device *cm_bf561_early_devices[] __initdata = {
552#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
553#ifdef CONFIG_SERIAL_BFIN_UART0
554 &bfin_uart0_device,
555#endif
556#endif
557};
558
559void __init native_machine_early_platform_add_devices(void)
560{
561 printk(KERN_INFO "register early platform devices\n");
562 early_platform_add_devices(cm_bf561_early_devices,
563 ARRAY_SIZE(cm_bf561_early_devices));
564}
diff --git a/arch/blackfin/mach-bf561/boards/ezkit.c b/arch/blackfin/mach-bf561/boards/ezkit.c
index ffd3e6a80d1a..9b93e2f95791 100644
--- a/arch/blackfin/mach-bf561/boards/ezkit.c
+++ b/arch/blackfin/mach-bf561/boards/ezkit.c
@@ -160,21 +160,50 @@ static struct platform_device smc91x_device = {
160#endif 160#endif
161 161
162#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 162#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
163static struct resource bfin_uart_resources[] = { 163#ifdef CONFIG_SERIAL_BFIN_UART0
164static struct resource bfin_uart0_resources[] = {
164 { 165 {
165 .start = 0xFFC00400, 166 .start = BFIN_UART_THR,
166 .end = 0xFFC004FF, 167 .end = BFIN_UART_GCTL+2,
167 .flags = IORESOURCE_MEM, 168 .flags = IORESOURCE_MEM,
168 }, 169 },
170 {
171 .start = IRQ_UART_RX,
172 .end = IRQ_UART_RX+1,
173 .flags = IORESOURCE_IRQ,
174 },
175 {
176 .start = IRQ_UART_ERROR,
177 .end = IRQ_UART_ERROR,
178 .flags = IORESOURCE_IRQ,
179 },
180 {
181 .start = CH_UART_TX,
182 .end = CH_UART_TX,
183 .flags = IORESOURCE_DMA,
184 },
185 {
186 .start = CH_UART_RX,
187 .end = CH_UART_RX,
188 .flags = IORESOURCE_DMA,
189 },
169}; 190};
170 191
171static struct platform_device bfin_uart_device = { 192unsigned short bfin_uart0_peripherals[] = {
193 P_UART0_TX, P_UART0_RX, 0
194};
195
196static struct platform_device bfin_uart0_device = {
172 .name = "bfin-uart", 197 .name = "bfin-uart",
173 .id = 1, 198 .id = 0,
174 .num_resources = ARRAY_SIZE(bfin_uart_resources), 199 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
175 .resource = bfin_uart_resources, 200 .resource = bfin_uart0_resources,
201 .dev = {
202 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
203 },
176}; 204};
177#endif 205#endif
206#endif
178 207
179#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 208#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
180#ifdef CONFIG_BFIN_SIR0 209#ifdef CONFIG_BFIN_SIR0
@@ -245,8 +274,8 @@ static struct platform_device ezkit_flash_device = {
245}; 274};
246#endif 275#endif
247 276
248#if defined(CONFIG_SND_BLACKFIN_AD1836) \ 277#if defined(CONFIG_SND_BLACKFIN_AD183X) \
249 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) 278 || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
250static struct bfin5xx_spi_chip ad1836_spi_chip_info = { 279static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
251 .enable_dma = 0, 280 .enable_dma = 0,
252 .bits_per_word = 16, 281 .bits_per_word = 16,
@@ -299,8 +328,8 @@ static struct platform_device bfin_spi0_device = {
299#endif 328#endif
300 329
301static struct spi_board_info bfin_spi_board_info[] __initdata = { 330static struct spi_board_info bfin_spi_board_info[] __initdata = {
302#if defined(CONFIG_SND_BLACKFIN_AD1836) \ 331#if defined(CONFIG_SND_BLACKFIN_AD183X) \
303 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) 332 || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
304 { 333 {
305 .modalias = "ad1836", 334 .modalias = "ad1836",
306 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 335 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
@@ -412,7 +441,9 @@ static struct platform_device *ezkit_devices[] __initdata = {
412#endif 441#endif
413 442
414#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 443#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
415 &bfin_uart_device, 444#ifdef CONFIG_SERIAL_BFIN_UART0
445 &bfin_uart0_device,
446#endif
416#endif 447#endif
417 448
418#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 449#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
@@ -458,3 +489,18 @@ static int __init ezkit_init(void)
458} 489}
459 490
460arch_initcall(ezkit_init); 491arch_initcall(ezkit_init);
492
493static struct platform_device *ezkit_early_devices[] __initdata = {
494#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
495#ifdef CONFIG_SERIAL_BFIN_UART0
496 &bfin_uart0_device,
497#endif
498#endif
499};
500
501void __init native_machine_early_platform_add_devices(void)
502{
503 printk(KERN_INFO "register early platform devices\n");
504 early_platform_add_devices(ezkit_early_devices,
505 ARRAY_SIZE(ezkit_early_devices));
506}
diff --git a/arch/blackfin/mach-bf561/boards/tepla.c b/arch/blackfin/mach-bf561/boards/tepla.c
index 8ba7252455e1..d3017e53686b 100644
--- a/arch/blackfin/mach-bf561/boards/tepla.c
+++ b/arch/blackfin/mach-bf561/boards/tepla.c
@@ -42,6 +42,52 @@ static struct platform_device smc91x_device = {
42 .resource = smc91x_resources, 42 .resource = smc91x_resources,
43}; 43};
44 44
45#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
46#ifdef CONFIG_SERIAL_BFIN_UART0
47static struct resource bfin_uart0_resources[] = {
48 {
49 .start = BFIN_UART_THR,
50 .end = BFIN_UART_GCTL+2,
51 .flags = IORESOURCE_MEM,
52 },
53 {
54 .start = IRQ_UART_RX,
55 .end = IRQ_UART_RX+1,
56 .flags = IORESOURCE_IRQ,
57 },
58 {
59 .start = IRQ_UART_ERROR,
60 .end = IRQ_UART_ERROR,
61 .flags = IORESOURCE_IRQ,
62 },
63 {
64 .start = CH_UART_TX,
65 .end = CH_UART_TX,
66 .flags = IORESOURCE_DMA,
67 },
68 {
69 .start = CH_UART_RX,
70 .end = CH_UART_RX,
71 .flags = IORESOURCE_DMA,
72 },
73};
74
75unsigned short bfin_uart0_peripherals[] = {
76 P_UART0_TX, P_UART0_RX, 0
77};
78
79static struct platform_device bfin_uart0_device = {
80 .name = "bfin-uart",
81 .id = 0,
82 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
83 .resource = bfin_uart0_resources,
84 .dev = {
85 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
86 },
87};
88#endif
89#endif
90
45#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 91#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
46#ifdef CONFIG_BFIN_SIR0 92#ifdef CONFIG_BFIN_SIR0
47static struct resource bfin_sir0_resources[] = { 93static struct resource bfin_sir0_resources[] = {
@@ -73,6 +119,13 @@ static struct platform_device bfin_sir0_device = {
73 119
74static struct platform_device *tepla_devices[] __initdata = { 120static struct platform_device *tepla_devices[] __initdata = {
75 &smc91x_device, 121 &smc91x_device,
122
123#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
124#ifdef CONFIG_SERIAL_BFIN_UART0
125 &bfin_uart0_device,
126#endif
127#endif
128
76#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 129#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
77#ifdef CONFIG_BFIN_SIR0 130#ifdef CONFIG_BFIN_SIR0
78 &bfin_sir0_device, 131 &bfin_sir0_device,
@@ -87,3 +140,18 @@ static int __init tepla_init(void)
87} 140}
88 141
89arch_initcall(tepla_init); 142arch_initcall(tepla_init);
143
144static struct platform_device *tepla_early_devices[] __initdata = {
145#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
146#ifdef CONFIG_SERIAL_BFIN_UART0
147 &bfin_uart0_device,
148#endif
149#endif
150};
151
152void __init native_machine_early_platform_add_devices(void)
153{
154 printk(KERN_INFO "register early platform devices\n");
155 early_platform_add_devices(tepla_early_devices,
156 ARRAY_SIZE(tepla_early_devices));
157}
diff --git a/arch/blackfin/mach-bf561/hotplug.c b/arch/blackfin/mach-bf561/hotplug.c
new file mode 100644
index 000000000000..c95169b612dc
--- /dev/null
+++ b/arch/blackfin/mach-bf561/hotplug.c
@@ -0,0 +1,32 @@
1/*
2 * Copyright 2007-2009 Analog Devices Inc.
3 * Graff Yang <graf.yang@analog.com>
4 *
5 * Licensed under the GPL-2 or later.
6 */
7
8#include <asm/blackfin.h>
9#include <asm/smp.h>
10#define SIC_SYSIRQ(irq) (irq - (IRQ_CORETMR + 1))
11
12int hotplug_coreb;
13
14void platform_cpu_die(void)
15{
16 unsigned long iwr[2] = {0, 0};
17 unsigned long bank = SIC_SYSIRQ(IRQ_SUPPLE_0) / 32;
18 unsigned long bit = 1 << (SIC_SYSIRQ(IRQ_SUPPLE_0) % 32);
19
20 hotplug_coreb = 1;
21
22 iwr[bank] = bit;
23
24 /* disable core timer */
25 bfin_write_TCNTL(0);
26
27 /* clear ipi interrupt IRQ_SUPPLE_0 */
28 bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | (1 << (10 + 1)));
29 SSYNC();
30
31 coreb_sleep(iwr[0], iwr[1], 0);
32}
diff --git a/arch/blackfin/mach-bf561/include/mach/irq.h b/arch/blackfin/mach-bf561/include/mach/irq.h
index 7b208db267bf..c95566ade51b 100644
--- a/arch/blackfin/mach-bf561/include/mach/irq.h
+++ b/arch/blackfin/mach-bf561/include/mach/irq.h
@@ -265,7 +265,8 @@
265 265
266#define GPIO_IRQ_BASE IRQ_PF0 266#define GPIO_IRQ_BASE IRQ_PF0
267 267
268#define NR_IRQS (IRQ_PF47 + 1) 268#define NR_MACH_IRQS (IRQ_PF47 + 1)
269#define NR_IRQS (NR_MACH_IRQS + NR_SPARE_IRQS)
269 270
270#define IVG7 7 271#define IVG7 7
271#define IVG8 8 272#define IVG8 8
diff --git a/arch/blackfin/mach-bf561/include/mach/smp.h b/arch/blackfin/mach-bf561/include/mach/smp.h
index 390c7f4ae7b3..2c8c514dd386 100644
--- a/arch/blackfin/mach-bf561/include/mach/smp.h
+++ b/arch/blackfin/mach-bf561/include/mach/smp.h
@@ -25,4 +25,6 @@ void platform_send_ipi_cpu(unsigned int cpu);
25 25
26void platform_clear_ipi(unsigned int cpu); 26void platform_clear_ipi(unsigned int cpu);
27 27
28void bfin_local_timer_setup(void);
29
28#endif /* !_MACH_BF561_SMP */ 30#endif /* !_MACH_BF561_SMP */
diff --git a/arch/blackfin/mach-bf561/secondary.S b/arch/blackfin/mach-bf561/secondary.S
index 8e6050369c06..4624eebbf9c4 100644
--- a/arch/blackfin/mach-bf561/secondary.S
+++ b/arch/blackfin/mach-bf561/secondary.S
@@ -11,6 +11,7 @@
11#include <linux/init.h> 11#include <linux/init.h>
12#include <asm/blackfin.h> 12#include <asm/blackfin.h>
13#include <asm/asm-offsets.h> 13#include <asm/asm-offsets.h>
14#include <asm/trace.h>
14 15
15__INIT 16__INIT
16 17
@@ -62,6 +63,8 @@ ENTRY(_coreb_trampoline_start)
62 M2 = r0; 63 M2 = r0;
63 M3 = r0; 64 M3 = r0;
64 65
66 trace_buffer_init(p0,r0);
67
65 /* Turn off the icache */ 68 /* Turn off the icache */
66 p0.l = LO(IMEM_CONTROL); 69 p0.l = LO(IMEM_CONTROL);
67 p0.h = HI(IMEM_CONTROL); 70 p0.h = HI(IMEM_CONTROL);
@@ -159,6 +162,41 @@ ENTRY(_coreb_trampoline_start)
159ENDPROC(_coreb_trampoline_start) 162ENDPROC(_coreb_trampoline_start)
160ENTRY(_coreb_trampoline_end) 163ENTRY(_coreb_trampoline_end)
161 164
165.section ".text"
166ENTRY(_set_sicb_iwr)
167 P0.H = hi(SICB_IWR0);
168 P0.L = lo(SICB_IWR0);
169 P1.H = hi(SICB_IWR1);
170 P1.L = lo(SICB_IWR1);
171 [P0] = R0;
172 [P1] = R1;
173 SSYNC;
174 RTS;
175ENDPROC(_set_sicb_iwr)
176
177ENTRY(_coreb_sleep)
178 sp.l = lo(INITIAL_STACK);
179 sp.h = hi(INITIAL_STACK);
180 fp = sp;
181 usp = sp;
182
183 call _set_sicb_iwr;
184
185 CLI R2;
186 SSYNC;
187 IDLE;
188 STI R2;
189
190 R0 = IWR_DISABLE_ALL;
191 R1 = IWR_DISABLE_ALL;
192 call _set_sicb_iwr;
193
194 p0.h = hi(COREB_L1_CODE_START);
195 p0.l = lo(COREB_L1_CODE_START);
196 jump (p0);
197ENDPROC(_coreb_sleep)
198
199__CPUINIT
162ENTRY(_coreb_start) 200ENTRY(_coreb_start)
163 [--sp] = reti; 201 [--sp] = reti;
164 202
@@ -176,12 +214,20 @@ ENTRY(_coreb_start)
176 sp = [p0]; 214 sp = [p0];
177 usp = sp; 215 usp = sp;
178 fp = sp; 216 fp = sp;
217#ifdef CONFIG_HOTPLUG_CPU
218 p0.l = _hotplug_coreb;
219 p0.h = _hotplug_coreb;
220 r0 = [p0];
221 cc = BITTST(r0, 0);
222 if cc jump 3f;
223#endif
179 sp += -12; 224 sp += -12;
180 call _init_pda 225 call _init_pda
181 sp += 12; 226 sp += 12;
227#ifdef CONFIG_HOTPLUG_CPU
2283:
229#endif
182 call _secondary_start_kernel; 230 call _secondary_start_kernel;
183.L_exit: 231.L_exit:
184 jump.s .L_exit; 232 jump.s .L_exit;
185ENDPROC(_coreb_start) 233ENDPROC(_coreb_start)
186
187__FINIT
diff --git a/arch/blackfin/mach-bf561/smp.c b/arch/blackfin/mach-bf561/smp.c
index 0192532e96a2..3b9a4bf7dacc 100644
--- a/arch/blackfin/mach-bf561/smp.c
+++ b/arch/blackfin/mach-bf561/smp.c
@@ -11,11 +11,10 @@
11#include <linux/delay.h> 11#include <linux/delay.h>
12#include <asm/smp.h> 12#include <asm/smp.h>
13#include <asm/dma.h> 13#include <asm/dma.h>
14#include <asm/time.h>
14 15
15static DEFINE_SPINLOCK(boot_lock); 16static DEFINE_SPINLOCK(boot_lock);
16 17
17static cpumask_t cpu_callin_map;
18
19/* 18/*
20 * platform_init_cpus() - Tell the world about how many cores we 19 * platform_init_cpus() - Tell the world about how many cores we
21 * have. This is called while setting up the architecture support 20 * have. This is called while setting up the architecture support
@@ -66,13 +65,15 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
66 bfin_write_SICB_IAR5(bfin_read_SICA_IAR5()); 65 bfin_write_SICB_IAR5(bfin_read_SICA_IAR5());
67 bfin_write_SICB_IAR6(bfin_read_SICA_IAR6()); 66 bfin_write_SICB_IAR6(bfin_read_SICA_IAR6());
68 bfin_write_SICB_IAR7(bfin_read_SICA_IAR7()); 67 bfin_write_SICB_IAR7(bfin_read_SICA_IAR7());
68 bfin_write_SICB_IWR0(IWR_DISABLE_ALL);
69 bfin_write_SICB_IWR1(IWR_DISABLE_ALL);
69 SSYNC(); 70 SSYNC();
70 71
71 /* Store CPU-private information to the cpu_data array. */ 72 /* Store CPU-private information to the cpu_data array. */
72 bfin_setup_cpudata(cpu); 73 bfin_setup_cpudata(cpu);
73 74
74 /* We are done with local CPU inits, unblock the boot CPU. */ 75 /* We are done with local CPU inits, unblock the boot CPU. */
75 cpu_set(cpu, cpu_callin_map); 76 set_cpu_online(cpu, true);
76 spin_lock(&boot_lock); 77 spin_lock(&boot_lock);
77 spin_unlock(&boot_lock); 78 spin_unlock(&boot_lock);
78} 79}
@@ -81,28 +82,28 @@ int __cpuinit platform_boot_secondary(unsigned int cpu, struct task_struct *idle
81{ 82{
82 unsigned long timeout; 83 unsigned long timeout;
83 84
84 /* CoreB already running?! */
85 BUG_ON((bfin_read_SICA_SYSCR() & COREB_SRAM_INIT) == 0);
86
87 printk(KERN_INFO "Booting Core B.\n"); 85 printk(KERN_INFO "Booting Core B.\n");
88 86
89 spin_lock(&boot_lock); 87 spin_lock(&boot_lock);
90 88
91 /* Kick CoreB, which should start execution from CORE_SRAM_BASE. */ 89 if ((bfin_read_SICA_SYSCR() & COREB_SRAM_INIT) == 0) {
92 SSYNC(); 90 /* CoreB already running, sending ipi to wakeup it */
93 bfin_write_SICA_SYSCR(bfin_read_SICA_SYSCR() & ~COREB_SRAM_INIT); 91 platform_send_ipi_cpu(cpu, IRQ_SUPPLE_0);
94 SSYNC(); 92 } else {
93 /* Kick CoreB, which should start execution from CORE_SRAM_BASE. */
94 bfin_write_SICA_SYSCR(bfin_read_SICA_SYSCR() & ~COREB_SRAM_INIT);
95 SSYNC();
96 }
95 97
96 timeout = jiffies + 1 * HZ; 98 timeout = jiffies + 1 * HZ;
97 while (time_before(jiffies, timeout)) { 99 while (time_before(jiffies, timeout)) {
98 if (cpu_isset(cpu, cpu_callin_map)) 100 if (cpu_online(cpu))
99 break; 101 break;
100 udelay(100); 102 udelay(100);
101 barrier(); 103 barrier();
102 } 104 }
103 105
104 if (cpu_isset(cpu, cpu_callin_map)) { 106 if (cpu_online(cpu)) {
105 cpu_set(cpu, cpu_online_map);
106 /* release the lock and let coreb run */ 107 /* release the lock and let coreb run */
107 spin_unlock(&boot_lock); 108 spin_unlock(&boot_lock);
108 return 0; 109 return 0;
@@ -147,3 +148,20 @@ void platform_clear_ipi(unsigned int cpu)
147 bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | (1 << (10 + cpu))); 148 bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | (1 << (10 + cpu)));
148 SSYNC(); 149 SSYNC();
149} 150}
151
152/*
153 * Setup core B's local core timer.
154 * In SMP, core timer is used for clock event device.
155 */
156void __cpuinit bfin_local_timer_setup(void)
157{
158#if defined(CONFIG_TICKSOURCE_CORETMR)
159 bfin_coretmr_init();
160 bfin_coretmr_clockevent_init();
161 get_irq_chip(IRQ_CORETMR)->unmask(IRQ_CORETMR);
162#else
163 /* Power down the core timer, just to play safe. */
164 bfin_write_TCNTL(0);
165#endif
166
167}
diff --git a/arch/blackfin/mach-common/cpufreq.c b/arch/blackfin/mach-common/cpufreq.c
index 777582897253..4391d03dc845 100644
--- a/arch/blackfin/mach-common/cpufreq.c
+++ b/arch/blackfin/mach-common/cpufreq.c
@@ -11,10 +11,13 @@
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/cpufreq.h> 12#include <linux/cpufreq.h>
13#include <linux/fs.h> 13#include <linux/fs.h>
14#include <linux/delay.h>
14#include <asm/blackfin.h> 15#include <asm/blackfin.h>
15#include <asm/time.h> 16#include <asm/time.h>
16#include <asm/dpmc.h> 17#include <asm/dpmc.h>
17 18
19#define CPUFREQ_CPU 0
20
18/* this is the table of CCLK frequencies, in Hz */ 21/* this is the table of CCLK frequencies, in Hz */
19/* .index is the entry in the auxillary dpm_state_table[] */ 22/* .index is the entry in the auxillary dpm_state_table[] */
20static struct cpufreq_frequency_table bfin_freq_table[] = { 23static struct cpufreq_frequency_table bfin_freq_table[] = {
@@ -41,64 +44,124 @@ static struct bfin_dpm_state {
41 unsigned int tscale; /* change the divider on the core timer interrupt */ 44 unsigned int tscale; /* change the divider on the core timer interrupt */
42} dpm_state_table[3]; 45} dpm_state_table[3];
43 46
47#if defined(CONFIG_CYCLES_CLOCKSOURCE)
44/* 48/*
45 normalized to maximum frequncy offset for CYCLES, 49 * normalized to maximum frequncy offset for CYCLES,
46 used in time-ts cycles clock source, but could be used 50 * used in time-ts cycles clock source, but could be used
47 somewhere also. 51 * somewhere also.
48 */ 52 */
49unsigned long long __bfin_cycles_off; 53unsigned long long __bfin_cycles_off;
50unsigned int __bfin_cycles_mod; 54unsigned int __bfin_cycles_mod;
55#endif
51 56
52/**************************************************************************/ 57/**************************************************************************/
58static void __init bfin_init_tables(unsigned long cclk, unsigned long sclk)
59{
53 60
54static unsigned int bfin_getfreq_khz(unsigned int cpu) 61 unsigned long csel, min_cclk;
62 int index;
63
64 /* Anomaly 273 seems to still exist on non-BF54x w/dcache turned on */
65#if ANOMALY_05000273 || ANOMALY_05000274 || \
66 (!defined(CONFIG_BF54x) && defined(CONFIG_BFIN_EXTMEM_DCACHEABLE))
67 min_cclk = sclk * 2;
68#else
69 min_cclk = sclk;
70#endif
71 csel = ((bfin_read_PLL_DIV() & CSEL) >> 4);
72
73 for (index = 0; (cclk >> index) >= min_cclk && csel <= 3; index++, csel++) {
74 bfin_freq_table[index].frequency = cclk >> index;
75 dpm_state_table[index].csel = csel << 4; /* Shift now into PLL_DIV bitpos */
76 dpm_state_table[index].tscale = (TIME_SCALE / (1 << csel)) - 1;
77
78 pr_debug("cpufreq: freq:%d csel:0x%x tscale:%d\n",
79 bfin_freq_table[index].frequency,
80 dpm_state_table[index].csel,
81 dpm_state_table[index].tscale);
82 }
83 return;
84}
85
86static void bfin_adjust_core_timer(void *info)
55{ 87{
56 /* The driver only support single cpu */ 88 unsigned int tscale;
57 if (cpu != 0) 89 unsigned int index = *(unsigned int *)info;
58 return -1;
59 90
60 return get_cclk() / 1000; 91 /* we have to adjust the core timer, because it is using cclk */
92 tscale = dpm_state_table[index].tscale;
93 bfin_write_TSCALE(tscale);
94 return;
61} 95}
62 96
97static unsigned int bfin_getfreq_khz(unsigned int cpu)
98{
99 /* Both CoreA/B have the same core clock */
100 return get_cclk() / 1000;
101}
63 102
64static int bfin_target(struct cpufreq_policy *policy, 103static int bfin_target(struct cpufreq_policy *poli,
65 unsigned int target_freq, unsigned int relation) 104 unsigned int target_freq, unsigned int relation)
66{ 105{
67 unsigned int index, plldiv, tscale; 106 unsigned int index, plldiv, cpu;
68 unsigned long flags, cclk_hz; 107 unsigned long flags, cclk_hz;
69 struct cpufreq_freqs freqs; 108 struct cpufreq_freqs freqs;
109 static unsigned long lpj_ref;
110 static unsigned int lpj_ref_freq;
111
112#if defined(CONFIG_CYCLES_CLOCKSOURCE)
70 cycles_t cycles; 113 cycles_t cycles;
114#endif
71 115
72 if (cpufreq_frequency_table_target(policy, bfin_freq_table, 116 for_each_online_cpu(cpu) {
73 target_freq, relation, &index)) 117 struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);
74 return -EINVAL; 118
75 119 if (!policy)
76 cclk_hz = bfin_freq_table[index].frequency; 120 continue;
77 121
78 freqs.old = bfin_getfreq_khz(0); 122 if (cpufreq_frequency_table_target(policy, bfin_freq_table,
79 freqs.new = cclk_hz; 123 target_freq, relation, &index))
80 freqs.cpu = 0; 124 return -EINVAL;
81 125
82 pr_debug("cpufreq: changing cclk to %lu; target = %u, oldfreq = %u\n", 126 cclk_hz = bfin_freq_table[index].frequency;
83 cclk_hz, target_freq, freqs.old); 127
84 128 freqs.old = bfin_getfreq_khz(0);
85 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); 129 freqs.new = cclk_hz;
86 local_irq_save_hw(flags); 130 freqs.cpu = cpu;
87 plldiv = (bfin_read_PLL_DIV() & SSEL) | dpm_state_table[index].csel; 131
88 tscale = dpm_state_table[index].tscale; 132 pr_debug("cpufreq: changing cclk to %lu; target = %u, oldfreq = %u\n",
89 bfin_write_PLL_DIV(plldiv); 133 cclk_hz, target_freq, freqs.old);
90 /* we have to adjust the core timer, because it is using cclk */ 134
91 bfin_write_TSCALE(tscale); 135 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
92 cycles = get_cycles(); 136 if (cpu == CPUFREQ_CPU) {
93 SSYNC(); 137 local_irq_save_hw(flags);
94 cycles += 10; /* ~10 cycles we lose after get_cycles() */ 138 plldiv = (bfin_read_PLL_DIV() & SSEL) |
95 __bfin_cycles_off += (cycles << __bfin_cycles_mod) - (cycles << index); 139 dpm_state_table[index].csel;
96 __bfin_cycles_mod = index; 140 bfin_write_PLL_DIV(plldiv);
97 local_irq_restore_hw(flags); 141 on_each_cpu(bfin_adjust_core_timer, &index, 1);
98 /* TODO: just test case for cycles clock source, remove later */ 142#if defined(CONFIG_CYCLES_CLOCKSOURCE)
99 pr_debug("cpufreq: done\n"); 143 cycles = get_cycles();
100 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); 144 SSYNC();
145 cycles += 10; /* ~10 cycles we lose after get_cycles() */
146 __bfin_cycles_off +=
147 (cycles << __bfin_cycles_mod) - (cycles << index);
148 __bfin_cycles_mod = index;
149#endif
150 if (!lpj_ref_freq) {
151 lpj_ref = loops_per_jiffy;
152 lpj_ref_freq = freqs.old;
153 }
154 if (freqs.new != freqs.old) {
155 loops_per_jiffy = cpufreq_scale(lpj_ref,
156 lpj_ref_freq, freqs.new);
157 }
158 local_irq_restore_hw(flags);
159 }
160 /* TODO: just test case for cycles clock source, remove later */
161 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
162 }
101 163
164 pr_debug("cpufreq: done\n");
102 return 0; 165 return 0;
103} 166}
104 167
@@ -110,37 +173,16 @@ static int bfin_verify_speed(struct cpufreq_policy *policy)
110static int __init __bfin_cpu_init(struct cpufreq_policy *policy) 173static int __init __bfin_cpu_init(struct cpufreq_policy *policy)
111{ 174{
112 175
113 unsigned long cclk, sclk, csel, min_cclk; 176 unsigned long cclk, sclk;
114 int index;
115
116 if (policy->cpu != 0)
117 return -EINVAL;
118 177
119 cclk = get_cclk() / 1000; 178 cclk = get_cclk() / 1000;
120 sclk = get_sclk() / 1000; 179 sclk = get_sclk() / 1000;
121 180
122#if ANOMALY_05000273 || ANOMALY_05000274 || \ 181 if (policy->cpu == CPUFREQ_CPU)
123 (!defined(CONFIG_BF54x) && defined(CONFIG_BFIN_EXTMEM_DCACHEABLE)) 182 bfin_init_tables(cclk, sclk);
124 min_cclk = sclk * 2;
125#else
126 min_cclk = sclk;
127#endif
128 csel = ((bfin_read_PLL_DIV() & CSEL) >> 4);
129
130 for (index = 0; (cclk >> index) >= min_cclk && csel <= 3; index++, csel++) {
131 bfin_freq_table[index].frequency = cclk >> index;
132 dpm_state_table[index].csel = csel << 4; /* Shift now into PLL_DIV bitpos */
133 dpm_state_table[index].tscale = (TIME_SCALE / (1 << csel)) - 1;
134
135 pr_debug("cpufreq: freq:%d csel:0x%x tscale:%d\n",
136 bfin_freq_table[index].frequency,
137 dpm_state_table[index].csel,
138 dpm_state_table[index].tscale);
139 }
140 183
141 policy->cpuinfo.transition_latency = 50000; /* 50us assumed */ 184 policy->cpuinfo.transition_latency = 50000; /* 50us assumed */
142 185
143 /*Now ,only support one cpu */
144 policy->cur = cclk; 186 policy->cur = cclk;
145 cpufreq_frequency_table_get_attr(bfin_freq_table, policy->cpu); 187 cpufreq_frequency_table_get_attr(bfin_freq_table, policy->cpu);
146 return cpufreq_frequency_table_cpuinfo(policy, bfin_freq_table); 188 return cpufreq_frequency_table_cpuinfo(policy, bfin_freq_table);
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S
index b0ed0b487ff2..a5847f5d67c7 100644
--- a/arch/blackfin/mach-common/entry.S
+++ b/arch/blackfin/mach-common/entry.S
@@ -405,7 +405,7 @@ ENTRY(_double_fault)
405 405
406 r0 = sp; /* stack frame pt_regs pointer argument ==> r0 */ 406 r0 = sp; /* stack frame pt_regs pointer argument ==> r0 */
407 SP += -12; 407 SP += -12;
408 call _double_fault_c; 408 pseudo_long_call _double_fault_c, p5;
409 SP += 12; 409 SP += 12;
410.L_double_fault_panic: 410.L_double_fault_panic:
411 JUMP .L_double_fault_panic 411 JUMP .L_double_fault_panic
@@ -447,7 +447,7 @@ ENTRY(_exception_to_level5)
447 447
448 r0 = sp; /* stack frame pt_regs pointer argument ==> r0 */ 448 r0 = sp; /* stack frame pt_regs pointer argument ==> r0 */
449 SP += -12; 449 SP += -12;
450 call _trap_c; 450 pseudo_long_call _trap_c, p4;
451 SP += 12; 451 SP += 12;
452 452
453 /* If interrupts were off during the exception (IPEND[4] = 1), turn them off 453 /* If interrupts were off during the exception (IPEND[4] = 1), turn them off
@@ -482,6 +482,8 @@ ENTRY(_trap) /* Exception: 4th entry into system event table(supervisor mode)*/
482 [--sp] = ASTAT; 482 [--sp] = ASTAT;
483 [--sp] = (R7:6,P5:4); 483 [--sp] = (R7:6,P5:4);
484 484
485 ANOMALY_283_315_WORKAROUND(p5, r7)
486
485#ifdef CONFIG_EXACT_HWERR 487#ifdef CONFIG_EXACT_HWERR
486 /* Make sure all pending read/writes complete. This will ensure any 488 /* Make sure all pending read/writes complete. This will ensure any
487 * accesses which could cause hardware errors completes, and signal 489 * accesses which could cause hardware errors completes, and signal
@@ -492,8 +494,6 @@ ENTRY(_trap) /* Exception: 4th entry into system event table(supervisor mode)*/
492 ssync; 494 ssync;
493#endif 495#endif
494 496
495 ANOMALY_283_315_WORKAROUND(p5, r7)
496
497#ifdef CONFIG_DEBUG_DOUBLEFAULT 497#ifdef CONFIG_DEBUG_DOUBLEFAULT
498 /* 498 /*
499 * Save these registers, as they are only valid in exception context 499 * Save these registers, as they are only valid in exception context
@@ -551,7 +551,7 @@ ENTRY(_kernel_execve)
551 p0 = sp; 551 p0 = sp;
552 sp += -16; 552 sp += -16;
553 [sp + 12] = p0; 553 [sp + 12] = p0;
554 call _do_execve; 554 pseudo_long_call _do_execve, p5;
555 SP += 16; 555 SP += 16;
556 cc = r0 == 0; 556 cc = r0 == 0;
557 if ! cc jump .Lexecve_failed; 557 if ! cc jump .Lexecve_failed;
@@ -626,13 +626,6 @@ ENTRY(_system_call)
626 p0 = [sp + PT_ORIG_P0]; 626 p0 = [sp + PT_ORIG_P0];
627#endif /* CONFIG_IPIPE */ 627#endif /* CONFIG_IPIPE */
628 628
629 /* Check the System Call */
630 r7 = __NR_syscall;
631 /* System call number is passed in P0 */
632 r6 = p0;
633 cc = r6 < r7;
634 if ! cc jump .Lbadsys;
635
636 /* are we tracing syscalls?*/ 629 /* are we tracing syscalls?*/
637 r7 = sp; 630 r7 = sp;
638 r6.l = lo(ALIGN_PAGE_MASK); 631 r6.l = lo(ALIGN_PAGE_MASK);
@@ -642,6 +635,14 @@ ENTRY(_system_call)
642 r7 = [p2+TI_FLAGS]; 635 r7 = [p2+TI_FLAGS];
643 CC = BITTST(r7,TIF_SYSCALL_TRACE); 636 CC = BITTST(r7,TIF_SYSCALL_TRACE);
644 if CC JUMP _sys_trace; 637 if CC JUMP _sys_trace;
638 CC = BITTST(r7,TIF_SINGLESTEP);
639 if CC JUMP _sys_trace;
640
641 /* Make sure the system call # is valid */
642 p4 = __NR_syscall;
643 /* System call number is passed in P0 */
644 cc = p4 <= p0;
645 if cc jump .Lbadsys;
645 646
646 /* Execute the appropriate system call */ 647 /* Execute the appropriate system call */
647 648
@@ -704,7 +705,7 @@ ENTRY(_system_call)
704 sp += 4; 705 sp += 4;
705 706
706 SP += -12; 707 SP += -12;
707 call _schedule; 708 pseudo_long_call _schedule, p4;
708 SP += 12; 709 SP += 12;
709 710
710 jump .Lresume_userspace_1; 711 jump .Lresume_userspace_1;
@@ -723,7 +724,7 @@ ENTRY(_system_call)
723 724
724 r0 = sp; 725 r0 = sp;
725 SP += -12; 726 SP += -12;
726 call _do_notify_resume; 727 pseudo_long_call _do_notify_resume, p5;
727 SP += 12; 728 SP += 12;
728 729
729.Lsyscall_really_exit: 730.Lsyscall_really_exit:
@@ -736,11 +737,17 @@ ENDPROC(_system_call)
736 * this symbol need not be global anyways, so ... 737 * this symbol need not be global anyways, so ...
737 */ 738 */
738_sys_trace: 739_sys_trace:
739 call _syscall_trace; 740 r0 = sp;
740 741 pseudo_long_call _syscall_trace_enter, p5;
741 /* Execute the appropriate system call */
742 742
743 /* Make sure the system call # is valid */
743 p4 = [SP + PT_P0]; 744 p4 = [SP + PT_P0];
745 p3 = __NR_syscall;
746 cc = p3 <= p4;
747 r0 = -ENOSYS;
748 if cc jump .Lsys_trace_badsys;
749
750 /* Execute the appropriate system call */
744 p5.l = _sys_call_table; 751 p5.l = _sys_call_table;
745 p5.h = _sys_call_table; 752 p5.h = _sys_call_table;
746 p5 = p5 + (p4 << 2); 753 p5 = p5 + (p4 << 2);
@@ -758,9 +765,11 @@ _sys_trace:
758 SP += -12; 765 SP += -12;
759 call (p5); 766 call (p5);
760 SP += 24; 767 SP += 24;
768.Lsys_trace_badsys:
761 [sp + PT_R0] = r0; 769 [sp + PT_R0] = r0;
762 770
763 call _syscall_trace; 771 r0 = sp;
772 pseudo_long_call _syscall_trace_leave, p5;
764 jump .Lresume_userspace; 773 jump .Lresume_userspace;
765ENDPROC(_sys_trace) 774ENDPROC(_sys_trace)
766 775
@@ -816,8 +825,8 @@ ENDPROC(_resume)
816 825
817ENTRY(_ret_from_exception) 826ENTRY(_ret_from_exception)
818#ifdef CONFIG_IPIPE 827#ifdef CONFIG_IPIPE
819 p2.l = _per_cpu__ipipe_percpu_domain; 828 p2.l = _ipipe_percpu_domain;
820 p2.h = _per_cpu__ipipe_percpu_domain; 829 p2.h = _ipipe_percpu_domain;
821 r0.l = _ipipe_root; 830 r0.l = _ipipe_root;
822 r0.h = _ipipe_root; 831 r0.h = _ipipe_root;
823 r2 = [p2]; 832 r2 = [p2];
@@ -966,6 +975,13 @@ ENTRY(_evt_evt14)
966#else 975#else
967 cli r0; 976 cli r0;
968#endif 977#endif
978#ifdef CONFIG_TRACE_IRQFLAGS
979 [--sp] = rets;
980 sp += -12;
981 call _trace_hardirqs_off;
982 sp += 12;
983 rets = [sp++];
984#endif
969 [--sp] = RETI; 985 [--sp] = RETI;
970 SP += 4; 986 SP += 4;
971 rts; 987 rts;
@@ -989,6 +1005,14 @@ ENTRY(_schedule_and_signal_from_int)
989 p1 = rets; 1005 p1 = rets;
990 [sp + PT_RESERVED] = p1; 1006 [sp + PT_RESERVED] = p1;
991 1007
1008#ifdef CONFIG_TRACE_IRQFLAGS
1009 /* trace_hardirqs_on() checks if all irqs are disabled. But here IRQ 15
1010 * is turned on, so disable all irqs. */
1011 cli r0;
1012 sp += -12;
1013 call _trace_hardirqs_on;
1014 sp += 12;
1015#endif
992#ifdef CONFIG_SMP 1016#ifdef CONFIG_SMP
993 GET_PDA(p0, r0); /* Fetch current PDA (can't migrate to other CPU here) */ 1017 GET_PDA(p0, r0); /* Fetch current PDA (can't migrate to other CPU here) */
994 r0 = [p0 + PDA_IRQFLAGS]; 1018 r0 = [p0 + PDA_IRQFLAGS];
@@ -1007,7 +1031,8 @@ ENTRY(_schedule_and_signal_from_int)
1007 1031
1008 r0 = sp; 1032 r0 = sp;
1009 sp += -12; 1033 sp += -12;
1010 call _finish_atomic_sections; 1034
1035 pseudo_long_call _finish_atomic_sections, p5;
1011 sp += 12; 1036 sp += 12;
1012 jump.s .Lresume_userspace; 1037 jump.s .Lresume_userspace;
1013ENDPROC(_schedule_and_signal_from_int) 1038ENDPROC(_schedule_and_signal_from_int)
@@ -1357,7 +1382,7 @@ ENTRY(_sys_call_table)
1357 .long _sys_newuname 1382 .long _sys_newuname
1358 .long _sys_ni_syscall /* old sys_modify_ldt */ 1383 .long _sys_ni_syscall /* old sys_modify_ldt */
1359 .long _sys_adjtimex 1384 .long _sys_adjtimex
1360 .long _sys_ni_syscall /* 125 */ /* sys_mprotect */ 1385 .long _sys_mprotect /* 125 */
1361 .long _sys_ni_syscall /* old sys_sigprocmask */ 1386 .long _sys_ni_syscall /* old sys_sigprocmask */
1362 .long _sys_ni_syscall /* old "creat_module" */ 1387 .long _sys_ni_syscall /* old "creat_module" */
1363 .long _sys_init_module 1388 .long _sys_init_module
@@ -1376,16 +1401,16 @@ ENTRY(_sys_call_table)
1376 .long _sys_getdents 1401 .long _sys_getdents
1377 .long _sys_ni_syscall /* sys_select */ 1402 .long _sys_ni_syscall /* sys_select */
1378 .long _sys_flock 1403 .long _sys_flock
1379 .long _sys_ni_syscall /* sys_msync */ 1404 .long _sys_msync
1380 .long _sys_readv /* 145 */ 1405 .long _sys_readv /* 145 */
1381 .long _sys_writev 1406 .long _sys_writev
1382 .long _sys_getsid 1407 .long _sys_getsid
1383 .long _sys_fdatasync 1408 .long _sys_fdatasync
1384 .long _sys_sysctl 1409 .long _sys_sysctl
1385 .long _sys_ni_syscall /* 150 */ /* sys_mlock */ 1410 .long _sys_mlock /* 150 */
1386 .long _sys_ni_syscall /* sys_munlock */ 1411 .long _sys_munlock
1387 .long _sys_ni_syscall /* sys_mlockall */ 1412 .long _sys_mlockall
1388 .long _sys_ni_syscall /* sys_munlockall */ 1413 .long _sys_munlockall
1389 .long _sys_sched_setparam 1414 .long _sys_sched_setparam
1390 .long _sys_sched_getparam /* 155 */ 1415 .long _sys_sched_getparam /* 155 */
1391 .long _sys_sched_setscheduler 1416 .long _sys_sched_setscheduler
@@ -1450,8 +1475,8 @@ ENTRY(_sys_call_table)
1450 .long _sys_setfsuid /* 215 */ 1475 .long _sys_setfsuid /* 215 */
1451 .long _sys_setfsgid 1476 .long _sys_setfsgid
1452 .long _sys_pivot_root 1477 .long _sys_pivot_root
1453 .long _sys_ni_syscall /* sys_mincore */ 1478 .long _sys_mincore
1454 .long _sys_ni_syscall /* sys_madvise */ 1479 .long _sys_madvise
1455 .long _sys_getdents64 /* 220 */ 1480 .long _sys_getdents64 /* 220 */
1456 .long _sys_fcntl64 1481 .long _sys_fcntl64
1457 .long _sys_ni_syscall /* reserved for TUX */ 1482 .long _sys_ni_syscall /* reserved for TUX */
@@ -1507,7 +1532,7 @@ ENTRY(_sys_call_table)
1507 .long _sys_utimes 1532 .long _sys_utimes
1508 .long _sys_fadvise64_64 1533 .long _sys_fadvise64_64
1509 .long _sys_ni_syscall /* vserver */ 1534 .long _sys_ni_syscall /* vserver */
1510 .long _sys_ni_syscall /* 275, mbind */ 1535 .long _sys_mbind /* 275 */
1511 .long _sys_ni_syscall /* get_mempolicy */ 1536 .long _sys_ni_syscall /* get_mempolicy */
1512 .long _sys_ni_syscall /* set_mempolicy */ 1537 .long _sys_ni_syscall /* set_mempolicy */
1513 .long _sys_mq_open 1538 .long _sys_mq_open
diff --git a/arch/blackfin/mach-common/head.S b/arch/blackfin/mach-common/head.S
index cab0a0031eee..4391621d9048 100644
--- a/arch/blackfin/mach-common/head.S
+++ b/arch/blackfin/mach-common/head.S
@@ -144,8 +144,8 @@ ENTRY(__start)
144#endif 144#endif
145 145
146 /* Initialize stack pointer */ 146 /* Initialize stack pointer */
147 sp.l = _init_thread_union; 147 sp.l = _init_thread_union + THREAD_SIZE;
148 sp.h = _init_thread_union; 148 sp.h = _init_thread_union + THREAD_SIZE;
149 fp = sp; 149 fp = sp;
150 usp = sp; 150 usp = sp;
151 151
@@ -186,6 +186,11 @@ ENTRY(__start)
186 186
187 /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */ 187 /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */
188 call _bfin_relocate_l1_mem; 188 call _bfin_relocate_l1_mem;
189
190#ifdef CONFIG_ROMKERNEL
191 call _bfin_relocate_xip_data;
192#endif
193
189#ifdef CONFIG_BFIN_KERNEL_CLOCK 194#ifdef CONFIG_BFIN_KERNEL_CLOCK
190 /* Only use on-chip scratch space for stack when absolutely required 195 /* Only use on-chip scratch space for stack when absolutely required
191 * to avoid Anomaly 05000227 ... we know the init_clocks() func only 196 * to avoid Anomaly 05000227 ... we know the init_clocks() func only
@@ -257,12 +262,7 @@ ENTRY(_real_start)
257 R0 = R7; 262 R0 = R7;
258 call _cmdline_init; 263 call _cmdline_init;
259 264
260 /* Load the current thread pointer and stack */ 265 sp += -12 + 4; /* +4 is for reti loading above */
261 p1 = THREAD_SIZE + 4 (z); /* +4 is for reti loading */
262 sp = sp + p1;
263 usp = sp;
264 fp = sp;
265 sp += -12;
266 call _init_pda 266 call _init_pda
267 sp += 12; 267 sp += 12;
268 jump.l _start_kernel; 268 jump.l _start_kernel;
diff --git a/arch/blackfin/mach-common/interrupt.S b/arch/blackfin/mach-common/interrupt.S
index 8085ff1cce00..cee62cf4acd4 100644
--- a/arch/blackfin/mach-common/interrupt.S
+++ b/arch/blackfin/mach-common/interrupt.S
@@ -88,6 +88,13 @@ __common_int_entry:
88#else 88#else
89 cli r1; 89 cli r1;
90#endif 90#endif
91#ifdef CONFIG_TRACE_IRQFLAGS
92 [--sp] = r0;
93 sp += -12;
94 call _trace_hardirqs_off;
95 sp += 12;
96 r0 = [sp++];
97#endif
91 [--sp] = RETI; /* orig_pc */ 98 [--sp] = RETI; /* orig_pc */
92 /* Clear all L registers. */ 99 /* Clear all L registers. */
93 r1 = 0 (x); 100 r1 = 0 (x);
@@ -109,10 +116,10 @@ __common_int_entry:
109 cc = r0 == 0; 116 cc = r0 == 0;
110 if cc jump .Lcommon_restore_context; 117 if cc jump .Lcommon_restore_context;
111#else /* CONFIG_IPIPE */ 118#else /* CONFIG_IPIPE */
112 call _do_irq; 119 pseudo_long_call _do_irq, p2;
113 SP += 12; 120 SP += 12;
114#endif /* CONFIG_IPIPE */ 121#endif /* CONFIG_IPIPE */
115 call _return_from_int; 122 pseudo_long_call _return_from_int, p2;
116.Lcommon_restore_context: 123.Lcommon_restore_context:
117 RESTORE_CONTEXT 124 RESTORE_CONTEXT
118 rti; 125 rti;
@@ -168,7 +175,7 @@ ENTRY(_evt_ivhw)
168 175
169 r0 = sp; /* stack frame pt_regs pointer argument ==> r0 */ 176 r0 = sp; /* stack frame pt_regs pointer argument ==> r0 */
170 SP += -12; 177 SP += -12;
171 call _trap_c; 178 pseudo_long_call _trap_c, p5;
172 SP += 12; 179 SP += 12;
173 180
174#ifdef EBIU_ERRMST 181#ifdef EBIU_ERRMST
@@ -179,7 +186,7 @@ ENTRY(_evt_ivhw)
179 w[p0] = r0.l; 186 w[p0] = r0.l;
180#endif 187#endif
181 188
182 call _ret_from_exception; 189 pseudo_long_call _ret_from_exception, p2;
183 190
184.Lcommon_restore_all_sys: 191.Lcommon_restore_all_sys:
185 RESTORE_ALL_SYS 192 RESTORE_ALL_SYS
@@ -187,12 +194,28 @@ ENTRY(_evt_ivhw)
187ENDPROC(_evt_ivhw) 194ENDPROC(_evt_ivhw)
188 195
189/* Interrupt routine for evt2 (NMI). 196/* Interrupt routine for evt2 (NMI).
190 * We don't actually use this, so just return.
191 * For inner circle type details, please see: 197 * For inner circle type details, please see:
192 * http://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:nmi 198 * http://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:nmi
193 */ 199 */
194ENTRY(_evt_nmi) 200ENTRY(_evt_nmi)
201#ifndef CONFIG_NMI_WATCHDOG
195.weak _evt_nmi 202.weak _evt_nmi
203#else
204 /* Not take account of CPLBs, this handler will not return */
205 SAVE_ALL_SYS
206 r0 = sp;
207 r1 = retn;
208 [sp + PT_PC] = r1;
209 trace_buffer_save(p4,r5);
210
211 ANOMALY_283_315_WORKAROUND(p4, r5)
212
213 SP += -12;
214 call _do_nmi;
215 SP += 12;
2161:
217 jump 1b;
218#endif
196 rtn; 219 rtn;
197ENDPROC(_evt_nmi) 220ENDPROC(_evt_nmi)
198 221
@@ -223,7 +246,7 @@ ENTRY(_evt_system_call)
223#ifdef CONFIG_FRAME_POINTER 246#ifdef CONFIG_FRAME_POINTER
224 fp = 0; 247 fp = 0;
225#endif 248#endif
226 call _system_call; 249 pseudo_long_call _system_call, p2;
227 jump .Lcommon_restore_context; 250 jump .Lcommon_restore_context;
228ENDPROC(_evt_system_call) 251ENDPROC(_evt_system_call)
229 252
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c
index 1873b2c1fede..1c8c4c7245c3 100644
--- a/arch/blackfin/mach-common/ints-priority.c
+++ b/arch/blackfin/mach-common/ints-priority.c
@@ -28,6 +28,7 @@
28#include <asm/dpmc.h> 28#include <asm/dpmc.h>
29#include <asm/bfin5xx_spi.h> 29#include <asm/bfin5xx_spi.h>
30#include <asm/bfin_sport.h> 30#include <asm/bfin_sport.h>
31#include <asm/bfin_can.h>
31 32
32#define SIC_SYSIRQ(irq) (irq - (IRQ_CORETMR + 1)) 33#define SIC_SYSIRQ(irq) (irq - (IRQ_CORETMR + 1))
33 34
@@ -91,26 +92,29 @@ static void __init search_IAR(void)
91{ 92{
92 unsigned ivg, irq_pos = 0; 93 unsigned ivg, irq_pos = 0;
93 for (ivg = 0; ivg <= IVG13 - IVG7; ivg++) { 94 for (ivg = 0; ivg <= IVG13 - IVG7; ivg++) {
94 int irqn; 95 int irqN;
95 96
96 ivg7_13[ivg].istop = ivg7_13[ivg].ifirst = &ivg_table[irq_pos]; 97 ivg7_13[ivg].istop = ivg7_13[ivg].ifirst = &ivg_table[irq_pos];
97 98
98 for (irqn = 0; irqn < NR_PERI_INTS; irqn++) { 99 for (irqN = 0; irqN < NR_PERI_INTS; irqN += 4) {
99 int iar_shift = (irqn & 7) * 4; 100 int irqn;
100 if (ivg == (0xf & 101 u32 iar = bfin_read32((unsigned long *)SIC_IAR0 +
101#if defined(CONFIG_BF52x) || defined(CONFIG_BF538) \ 102#if defined(CONFIG_BF51x) || defined(CONFIG_BF52x) || \
102 || defined(CONFIG_BF539) || defined(CONFIG_BF51x) 103 defined(CONFIG_BF538) || defined(CONFIG_BF539)
103 bfin_read32((unsigned long *)SIC_IAR0 + 104 ((irqN % 32) >> 3) + ((irqN / 32) * ((SIC_IAR4 - SIC_IAR0) / 4))
104 ((irqn % 32) >> 3) + ((irqn / 32) *
105 ((SIC_IAR4 - SIC_IAR0) / 4))) >> iar_shift)) {
106#else 105#else
107 bfin_read32((unsigned long *)SIC_IAR0 + 106 (irqN >> 3)
108 (irqn >> 3)) >> iar_shift)) {
109#endif 107#endif
110 ivg_table[irq_pos].irqno = IVG7 + irqn; 108 );
111 ivg_table[irq_pos].isrflag = 1 << (irqn % 32); 109
112 ivg7_13[ivg].istop++; 110 for (irqn = irqN; irqn < irqN + 4; ++irqn) {
113 irq_pos++; 111 int iar_shift = (irqn & 7) * 4;
112 if (ivg == (0xf & (iar >> iar_shift))) {
113 ivg_table[irq_pos].irqno = IVG7 + irqn;
114 ivg_table[irq_pos].isrflag = 1 << (irqn % 32);
115 ivg7_13[ivg].istop++;
116 irq_pos++;
117 }
114 } 118 }
115 } 119 }
116 } 120 }
@@ -172,7 +176,12 @@ static void bfin_internal_mask_irq(unsigned int irq)
172 local_irq_restore_hw(flags); 176 local_irq_restore_hw(flags);
173} 177}
174 178
179#ifdef CONFIG_SMP
180static void bfin_internal_unmask_irq_affinity(unsigned int irq,
181 const struct cpumask *affinity)
182#else
175static void bfin_internal_unmask_irq(unsigned int irq) 183static void bfin_internal_unmask_irq(unsigned int irq)
184#endif
176{ 185{
177 unsigned long flags; 186 unsigned long flags;
178 187
@@ -185,16 +194,38 @@ static void bfin_internal_unmask_irq(unsigned int irq)
185 local_irq_save_hw(flags); 194 local_irq_save_hw(flags);
186 mask_bank = SIC_SYSIRQ(irq) / 32; 195 mask_bank = SIC_SYSIRQ(irq) / 32;
187 mask_bit = SIC_SYSIRQ(irq) % 32; 196 mask_bit = SIC_SYSIRQ(irq) % 32;
188 bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) |
189 (1 << mask_bit));
190#ifdef CONFIG_SMP 197#ifdef CONFIG_SMP
191 bfin_write_SICB_IMASK(mask_bank, bfin_read_SICB_IMASK(mask_bank) | 198 if (cpumask_test_cpu(0, affinity))
192 (1 << mask_bit)); 199#endif
200 bfin_write_SIC_IMASK(mask_bank,
201 bfin_read_SIC_IMASK(mask_bank) |
202 (1 << mask_bit));
203#ifdef CONFIG_SMP
204 if (cpumask_test_cpu(1, affinity))
205 bfin_write_SICB_IMASK(mask_bank,
206 bfin_read_SICB_IMASK(mask_bank) |
207 (1 << mask_bit));
193#endif 208#endif
194#endif 209#endif
195 local_irq_restore_hw(flags); 210 local_irq_restore_hw(flags);
196} 211}
197 212
213#ifdef CONFIG_SMP
214static void bfin_internal_unmask_irq(unsigned int irq)
215{
216 struct irq_desc *desc = irq_to_desc(irq);
217 bfin_internal_unmask_irq_affinity(irq, desc->affinity);
218}
219
220static int bfin_internal_set_affinity(unsigned int irq, const struct cpumask *mask)
221{
222 bfin_internal_mask_irq(irq);
223 bfin_internal_unmask_irq_affinity(irq, mask);
224
225 return 0;
226}
227#endif
228
198#ifdef CONFIG_PM 229#ifdef CONFIG_PM
199int bfin_internal_set_wake(unsigned int irq, unsigned int state) 230int bfin_internal_set_wake(unsigned int irq, unsigned int state)
200{ 231{
@@ -224,11 +255,6 @@ int bfin_internal_set_wake(unsigned int irq, unsigned int state)
224 wakeup |= USBWE; 255 wakeup |= USBWE;
225 break; 256 break;
226#endif 257#endif
227#ifdef IRQ_KEY
228 case IRQ_KEY:
229 wakeup |= KPADWE;
230 break;
231#endif
232#ifdef CONFIG_BF54x 258#ifdef CONFIG_BF54x
233 case IRQ_CNT: 259 case IRQ_CNT:
234 wakeup |= ROTWE; 260 wakeup |= ROTWE;
@@ -270,6 +296,9 @@ static struct irq_chip bfin_internal_irqchip = {
270 .mask_ack = bfin_internal_mask_irq, 296 .mask_ack = bfin_internal_mask_irq,
271 .disable = bfin_internal_mask_irq, 297 .disable = bfin_internal_mask_irq,
272 .enable = bfin_internal_unmask_irq, 298 .enable = bfin_internal_unmask_irq,
299#ifdef CONFIG_SMP
300 .set_affinity = bfin_internal_set_affinity,
301#endif
273#ifdef CONFIG_PM 302#ifdef CONFIG_PM
274 .set_wake = bfin_internal_set_wake, 303 .set_wake = bfin_internal_set_wake,
275#endif 304#endif
@@ -294,7 +323,6 @@ static int error_int_mask;
294static void bfin_generic_error_mask_irq(unsigned int irq) 323static void bfin_generic_error_mask_irq(unsigned int irq)
295{ 324{
296 error_int_mask &= ~(1L << (irq - IRQ_PPI_ERROR)); 325 error_int_mask &= ~(1L << (irq - IRQ_PPI_ERROR));
297
298 if (!error_int_mask) 326 if (!error_int_mask)
299 bfin_internal_mask_irq(IRQ_GENERIC_ERROR); 327 bfin_internal_mask_irq(IRQ_GENERIC_ERROR);
300} 328}
@@ -385,6 +413,127 @@ static void bfin_demux_error_irq(unsigned int int_err_irq,
385} 413}
386#endif /* BF537_GENERIC_ERROR_INT_DEMUX */ 414#endif /* BF537_GENERIC_ERROR_INT_DEMUX */
387 415
416#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
417static int mac_stat_int_mask;
418
419static void bfin_mac_status_ack_irq(unsigned int irq)
420{
421 switch (irq) {
422 case IRQ_MAC_MMCINT:
423 bfin_write_EMAC_MMC_TIRQS(
424 bfin_read_EMAC_MMC_TIRQE() &
425 bfin_read_EMAC_MMC_TIRQS());
426 bfin_write_EMAC_MMC_RIRQS(
427 bfin_read_EMAC_MMC_RIRQE() &
428 bfin_read_EMAC_MMC_RIRQS());
429 break;
430 case IRQ_MAC_RXFSINT:
431 bfin_write_EMAC_RX_STKY(
432 bfin_read_EMAC_RX_IRQE() &
433 bfin_read_EMAC_RX_STKY());
434 break;
435 case IRQ_MAC_TXFSINT:
436 bfin_write_EMAC_TX_STKY(
437 bfin_read_EMAC_TX_IRQE() &
438 bfin_read_EMAC_TX_STKY());
439 break;
440 case IRQ_MAC_WAKEDET:
441 bfin_write_EMAC_WKUP_CTL(
442 bfin_read_EMAC_WKUP_CTL() | MPKS | RWKS);
443 break;
444 default:
445 /* These bits are W1C */
446 bfin_write_EMAC_SYSTAT(1L << (irq - IRQ_MAC_PHYINT));
447 break;
448 }
449}
450
451static void bfin_mac_status_mask_irq(unsigned int irq)
452{
453 mac_stat_int_mask &= ~(1L << (irq - IRQ_MAC_PHYINT));
454#ifdef BF537_GENERIC_ERROR_INT_DEMUX
455 switch (irq) {
456 case IRQ_MAC_PHYINT:
457 bfin_write_EMAC_SYSCTL(bfin_read_EMAC_SYSCTL() & ~PHYIE);
458 break;
459 default:
460 break;
461 }
462#else
463 if (!mac_stat_int_mask)
464 bfin_internal_mask_irq(IRQ_MAC_ERROR);
465#endif
466 bfin_mac_status_ack_irq(irq);
467}
468
469static void bfin_mac_status_unmask_irq(unsigned int irq)
470{
471#ifdef BF537_GENERIC_ERROR_INT_DEMUX
472 switch (irq) {
473 case IRQ_MAC_PHYINT:
474 bfin_write_EMAC_SYSCTL(bfin_read_EMAC_SYSCTL() | PHYIE);
475 break;
476 default:
477 break;
478 }
479#else
480 if (!mac_stat_int_mask)
481 bfin_internal_unmask_irq(IRQ_MAC_ERROR);
482#endif
483 mac_stat_int_mask |= 1L << (irq - IRQ_MAC_PHYINT);
484}
485
486#ifdef CONFIG_PM
487int bfin_mac_status_set_wake(unsigned int irq, unsigned int state)
488{
489#ifdef BF537_GENERIC_ERROR_INT_DEMUX
490 return bfin_internal_set_wake(IRQ_GENERIC_ERROR, state);
491#else
492 return bfin_internal_set_wake(IRQ_MAC_ERROR, state);
493#endif
494}
495#endif
496
497static struct irq_chip bfin_mac_status_irqchip = {
498 .name = "MACST",
499 .ack = bfin_ack_noop,
500 .mask_ack = bfin_mac_status_mask_irq,
501 .mask = bfin_mac_status_mask_irq,
502 .unmask = bfin_mac_status_unmask_irq,
503#ifdef CONFIG_PM
504 .set_wake = bfin_mac_status_set_wake,
505#endif
506};
507
508static void bfin_demux_mac_status_irq(unsigned int int_err_irq,
509 struct irq_desc *inta_desc)
510{
511 int i, irq = 0;
512 u32 status = bfin_read_EMAC_SYSTAT();
513
514 for (i = 0; i < (IRQ_MAC_STMDONE - IRQ_MAC_PHYINT); i++)
515 if (status & (1L << i)) {
516 irq = IRQ_MAC_PHYINT + i;
517 break;
518 }
519
520 if (irq) {
521 if (mac_stat_int_mask & (1L << (irq - IRQ_MAC_PHYINT))) {
522 bfin_handle_irq(irq);
523 } else {
524 bfin_mac_status_ack_irq(irq);
525 pr_debug("IRQ %d:"
526 " MASKED MAC ERROR INTERRUPT ASSERTED\n",
527 irq);
528 }
529 } else
530 printk(KERN_ERR
531 "%s : %s : LINE %d :\nIRQ ?: MAC ERROR"
532 " INTERRUPT ASSERTED BUT NO SOURCE FOUND\n",
533 __func__, __FILE__, __LINE__);
534}
535#endif
536
388static inline void bfin_set_irq_handler(unsigned irq, irq_flow_handler_t handle) 537static inline void bfin_set_irq_handler(unsigned irq, irq_flow_handler_t handle)
389{ 538{
390#ifdef CONFIG_IPIPE 539#ifdef CONFIG_IPIPE
@@ -516,14 +665,7 @@ static int bfin_gpio_irq_type(unsigned int irq, unsigned int type)
516#ifdef CONFIG_PM 665#ifdef CONFIG_PM
517int bfin_gpio_set_wake(unsigned int irq, unsigned int state) 666int bfin_gpio_set_wake(unsigned int irq, unsigned int state)
518{ 667{
519 unsigned gpio = irq_to_gpio(irq); 668 return gpio_pm_wakeup_ctrl(irq_to_gpio(irq), state);
520
521 if (state)
522 gpio_pm_wakeup_request(gpio, PM_WAKE_IGNORE);
523 else
524 gpio_pm_wakeup_free(gpio);
525
526 return 0;
527} 669}
528#endif 670#endif
529 671
@@ -1031,7 +1173,6 @@ int __init init_arch_irq(void)
1031#elif defined(CONFIG_BF538) || defined(CONFIG_BF539) 1173#elif defined(CONFIG_BF538) || defined(CONFIG_BF539)
1032 case IRQ_PORTF_INTA: 1174 case IRQ_PORTF_INTA:
1033#endif 1175#endif
1034
1035 set_irq_chained_handler(irq, 1176 set_irq_chained_handler(irq,
1036 bfin_demux_gpio_irq); 1177 bfin_demux_gpio_irq);
1037 break; 1178 break;
@@ -1040,29 +1181,36 @@ int __init init_arch_irq(void)
1040 set_irq_chained_handler(irq, bfin_demux_error_irq); 1181 set_irq_chained_handler(irq, bfin_demux_error_irq);
1041 break; 1182 break;
1042#endif 1183#endif
1043 1184#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
1044#ifdef CONFIG_SMP 1185 case IRQ_MAC_ERROR:
1045#ifdef CONFIG_TICKSOURCE_GPTMR0 1186 set_irq_chained_handler(irq, bfin_demux_mac_status_irq);
1046 case IRQ_TIMER0: 1187 break;
1047#endif
1048#ifdef CONFIG_TICKSOURCE_CORETMR
1049 case IRQ_CORETMR:
1050#endif 1188#endif
1189#ifdef CONFIG_SMP
1051 case IRQ_SUPPLE_0: 1190 case IRQ_SUPPLE_0:
1052 case IRQ_SUPPLE_1: 1191 case IRQ_SUPPLE_1:
1053 set_irq_handler(irq, handle_percpu_irq); 1192 set_irq_handler(irq, handle_percpu_irq);
1054 break; 1193 break;
1055#endif 1194#endif
1056 1195
1057#ifdef CONFIG_IPIPE 1196#ifdef CONFIG_TICKSOURCE_CORETMR
1058#ifndef CONFIG_TICKSOURCE_CORETMR 1197 case IRQ_CORETMR:
1059 case IRQ_TIMER0: 1198# ifdef CONFIG_SMP
1199 set_irq_handler(irq, handle_percpu_irq);
1200 break;
1201# else
1060 set_irq_handler(irq, handle_simple_irq); 1202 set_irq_handler(irq, handle_simple_irq);
1061 break; 1203 break;
1204# endif
1062#endif 1205#endif
1063 case IRQ_CORETMR: 1206
1207#ifdef CONFIG_TICKSOURCE_GPTMR0
1208 case IRQ_TIMER0:
1064 set_irq_handler(irq, handle_simple_irq); 1209 set_irq_handler(irq, handle_simple_irq);
1065 break; 1210 break;
1211#endif
1212
1213#ifdef CONFIG_IPIPE
1066 default: 1214 default:
1067 set_irq_handler(irq, handle_level_irq); 1215 set_irq_handler(irq, handle_level_irq);
1068 break; 1216 break;
@@ -1078,14 +1226,22 @@ int __init init_arch_irq(void)
1078 for (irq = IRQ_PPI_ERROR; irq <= IRQ_UART1_ERROR; irq++) 1226 for (irq = IRQ_PPI_ERROR; irq <= IRQ_UART1_ERROR; irq++)
1079 set_irq_chip_and_handler(irq, &bfin_generic_error_irqchip, 1227 set_irq_chip_and_handler(irq, &bfin_generic_error_irqchip,
1080 handle_level_irq); 1228 handle_level_irq);
1229#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
1230 set_irq_chained_handler(IRQ_MAC_ERROR, bfin_demux_mac_status_irq);
1231#endif
1081#endif 1232#endif
1082 1233
1234#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
1235 for (irq = IRQ_MAC_PHYINT; irq <= IRQ_MAC_STMDONE; irq++)
1236 set_irq_chip_and_handler(irq, &bfin_mac_status_irqchip,
1237 handle_level_irq);
1238#endif
1083 /* if configured as edge, then will be changed to do_edge_IRQ */ 1239 /* if configured as edge, then will be changed to do_edge_IRQ */
1084 for (irq = GPIO_IRQ_BASE; irq < NR_IRQS; irq++) 1240 for (irq = GPIO_IRQ_BASE;
1241 irq < (GPIO_IRQ_BASE + MAX_BLACKFIN_GPIOS); irq++)
1085 set_irq_chip_and_handler(irq, &bfin_gpio_irqchip, 1242 set_irq_chip_and_handler(irq, &bfin_gpio_irqchip,
1086 handle_level_irq); 1243 handle_level_irq);
1087 1244
1088
1089 bfin_write_IMASK(0); 1245 bfin_write_IMASK(0);
1090 CSYNC(); 1246 CSYNC();
1091 ilat = bfin_read_ILAT(); 1247 ilat = bfin_read_ILAT();
diff --git a/arch/blackfin/mach-common/pm.c b/arch/blackfin/mach-common/pm.c
index 8837be4edb4a..ea7f95f6bb4c 100644
--- a/arch/blackfin/mach-common/pm.c
+++ b/arch/blackfin/mach-common/pm.c
@@ -11,6 +11,7 @@
11#include <linux/suspend.h> 11#include <linux/suspend.h>
12#include <linux/sched.h> 12#include <linux/sched.h>
13#include <linux/proc_fs.h> 13#include <linux/proc_fs.h>
14#include <linux/slab.h>
14#include <linux/io.h> 15#include <linux/io.h>
15#include <linux/irq.h> 16#include <linux/irq.h>
16 17
@@ -19,35 +20,11 @@
19#include <asm/dma.h> 20#include <asm/dma.h>
20#include <asm/dpmc.h> 21#include <asm/dpmc.h>
21 22
22#ifdef CONFIG_PM_WAKEUP_GPIO_POLAR_H
23#define WAKEUP_TYPE PM_WAKE_HIGH
24#endif
25
26#ifdef CONFIG_PM_WAKEUP_GPIO_POLAR_L
27#define WAKEUP_TYPE PM_WAKE_LOW
28#endif
29
30#ifdef CONFIG_PM_WAKEUP_GPIO_POLAR_EDGE_F
31#define WAKEUP_TYPE PM_WAKE_FALLING
32#endif
33
34#ifdef CONFIG_PM_WAKEUP_GPIO_POLAR_EDGE_R
35#define WAKEUP_TYPE PM_WAKE_RISING
36#endif
37
38#ifdef CONFIG_PM_WAKEUP_GPIO_POLAR_EDGE_B
39#define WAKEUP_TYPE PM_WAKE_BOTH_EDGES
40#endif
41
42 23
43void bfin_pm_suspend_standby_enter(void) 24void bfin_pm_suspend_standby_enter(void)
44{ 25{
45 unsigned long flags; 26 unsigned long flags;
46 27
47#ifdef CONFIG_PM_WAKEUP_BY_GPIO
48 gpio_pm_wakeup_request(CONFIG_PM_WAKEUP_GPIO_NUMBER, WAKEUP_TYPE);
49#endif
50
51 local_irq_save_hw(flags); 28 local_irq_save_hw(flags);
52 bfin_pm_standby_setup(); 29 bfin_pm_standby_setup();
53 30
diff --git a/arch/blackfin/mach-common/smp.c b/arch/blackfin/mach-common/smp.c
index 369e687582b7..a17107a700d5 100644
--- a/arch/blackfin/mach-common/smp.c
+++ b/arch/blackfin/mach-common/smp.c
@@ -21,6 +21,7 @@
21#include <linux/smp.h> 21#include <linux/smp.h>
22#include <linux/seq_file.h> 22#include <linux/seq_file.h>
23#include <linux/irq.h> 23#include <linux/irq.h>
24#include <linux/slab.h>
24#include <asm/atomic.h> 25#include <asm/atomic.h>
25#include <asm/cacheflush.h> 26#include <asm/cacheflush.h>
26#include <asm/mmu_context.h> 27#include <asm/mmu_context.h>
@@ -122,9 +123,17 @@ static void ipi_call_function(unsigned int cpu, struct ipi_message *msg)
122 wait = msg->call_struct.wait; 123 wait = msg->call_struct.wait;
123 cpu_clear(cpu, msg->call_struct.pending); 124 cpu_clear(cpu, msg->call_struct.pending);
124 func(info); 125 func(info);
125 if (wait) 126 if (wait) {
127#ifdef __ARCH_SYNC_CORE_DCACHE
128 /*
129 * 'wait' usually means synchronization between CPUs.
130 * Invalidate D cache in case shared data was changed
131 * by func() to ensure cache coherence.
132 */
133 resync_core_dcache();
134#endif
126 cpu_clear(cpu, msg->call_struct.waitmask); 135 cpu_clear(cpu, msg->call_struct.waitmask);
127 else 136 } else
128 kfree(msg); 137 kfree(msg);
129} 138}
130 139
@@ -161,8 +170,8 @@ static irqreturn_t ipi_handler(int irq, void *dev_instance)
161 kfree(msg); 170 kfree(msg);
162 break; 171 break;
163 default: 172 default:
164 printk(KERN_CRIT "CPU%u: Unknown IPI message \ 173 printk(KERN_CRIT "CPU%u: Unknown IPI message 0x%lx\n",
165 0x%lx\n", cpu, msg->type); 174 cpu, msg->type);
166 kfree(msg); 175 kfree(msg);
167 break; 176 break;
168 } 177 }
@@ -219,6 +228,13 @@ int smp_call_function(void (*func)(void *info), void *info, int wait)
219 blackfin_dcache_invalidate_range( 228 blackfin_dcache_invalidate_range(
220 (unsigned long)(&msg->call_struct.waitmask), 229 (unsigned long)(&msg->call_struct.waitmask),
221 (unsigned long)(&msg->call_struct.waitmask)); 230 (unsigned long)(&msg->call_struct.waitmask));
231#ifdef __ARCH_SYNC_CORE_DCACHE
232 /*
233 * Invalidate D cache in case shared data was changed by
234 * other processors to ensure cache coherence.
235 */
236 resync_core_dcache();
237#endif
222 kfree(msg); 238 kfree(msg);
223 } 239 }
224 return 0; 240 return 0;
@@ -261,6 +277,13 @@ int smp_call_function_single(int cpuid, void (*func) (void *info), void *info,
261 blackfin_dcache_invalidate_range( 277 blackfin_dcache_invalidate_range(
262 (unsigned long)(&msg->call_struct.waitmask), 278 (unsigned long)(&msg->call_struct.waitmask),
263 (unsigned long)(&msg->call_struct.waitmask)); 279 (unsigned long)(&msg->call_struct.waitmask));
280#ifdef __ARCH_SYNC_CORE_DCACHE
281 /*
282 * Invalidate D cache in case shared data was changed by
283 * other processors to ensure cache coherence.
284 */
285 resync_core_dcache();
286#endif
264 kfree(msg); 287 kfree(msg);
265 } 288 }
266 return 0; 289 return 0;
@@ -322,8 +345,11 @@ void smp_send_stop(void)
322 345
323int __cpuinit __cpu_up(unsigned int cpu) 346int __cpuinit __cpu_up(unsigned int cpu)
324{ 347{
325 struct task_struct *idle;
326 int ret; 348 int ret;
349 static struct task_struct *idle;
350
351 if (idle)
352 free_task(idle);
327 353
328 idle = fork_idle(cpu); 354 idle = fork_idle(cpu);
329 if (IS_ERR(idle)) { 355 if (IS_ERR(idle)) {
@@ -332,7 +358,6 @@ int __cpuinit __cpu_up(unsigned int cpu)
332 } 358 }
333 359
334 secondary_stack = task_stack_page(idle) + THREAD_SIZE; 360 secondary_stack = task_stack_page(idle) + THREAD_SIZE;
335 smp_wmb();
336 361
337 ret = platform_boot_secondary(cpu, idle); 362 ret = platform_boot_secondary(cpu, idle);
338 363
@@ -343,9 +368,6 @@ int __cpuinit __cpu_up(unsigned int cpu)
343 368
344static void __cpuinit setup_secondary(unsigned int cpu) 369static void __cpuinit setup_secondary(unsigned int cpu)
345{ 370{
346#if !defined(CONFIG_TICKSOURCE_GPTMR0)
347 struct irq_desc *timer_desc;
348#endif
349 unsigned long ilat; 371 unsigned long ilat;
350 372
351 bfin_write_IMASK(0); 373 bfin_write_IMASK(0);
@@ -360,17 +382,6 @@ static void __cpuinit setup_secondary(unsigned int cpu)
360 bfin_irq_flags |= IMASK_IVG15 | 382 bfin_irq_flags |= IMASK_IVG15 |
361 IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 | 383 IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 |
362 IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW; 384 IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW;
363
364#if defined(CONFIG_TICKSOURCE_GPTMR0)
365 /* Power down the core timer, just to play safe. */
366 bfin_write_TCNTL(0);
367
368 /* system timer0 has been setup by CoreA. */
369#else
370 timer_desc = irq_desc + IRQ_CORETMR;
371 setup_core_timer();
372 timer_desc->chip->enable(IRQ_CORETMR);
373#endif
374} 385}
375 386
376void __cpuinit secondary_start_kernel(void) 387void __cpuinit secondary_start_kernel(void)
@@ -405,7 +416,6 @@ void __cpuinit secondary_start_kernel(void)
405 atomic_inc(&mm->mm_users); 416 atomic_inc(&mm->mm_users);
406 atomic_inc(&mm->mm_count); 417 atomic_inc(&mm->mm_count);
407 current->active_mm = mm; 418 current->active_mm = mm;
408 BUG_ON(current->mm); /* Can't be, but better be safe than sorry. */
409 419
410 preempt_disable(); 420 preempt_disable();
411 421
@@ -413,6 +423,9 @@ void __cpuinit secondary_start_kernel(void)
413 423
414 platform_secondary_init(cpu); 424 platform_secondary_init(cpu);
415 425
426 /* setup local core timer */
427 bfin_local_timer_setup();
428
416 local_irq_enable(); 429 local_irq_enable();
417 430
418 /* 431 /*
@@ -462,25 +475,58 @@ void smp_icache_flush_range_others(unsigned long start, unsigned long end)
462EXPORT_SYMBOL_GPL(smp_icache_flush_range_others); 475EXPORT_SYMBOL_GPL(smp_icache_flush_range_others);
463 476
464#ifdef __ARCH_SYNC_CORE_ICACHE 477#ifdef __ARCH_SYNC_CORE_ICACHE
478unsigned long icache_invld_count[NR_CPUS];
465void resync_core_icache(void) 479void resync_core_icache(void)
466{ 480{
467 unsigned int cpu = get_cpu(); 481 unsigned int cpu = get_cpu();
468 blackfin_invalidate_entire_icache(); 482 blackfin_invalidate_entire_icache();
469 ++per_cpu(cpu_data, cpu).icache_invld_count; 483 icache_invld_count[cpu]++;
470 put_cpu(); 484 put_cpu();
471} 485}
472EXPORT_SYMBOL(resync_core_icache); 486EXPORT_SYMBOL(resync_core_icache);
473#endif 487#endif
474 488
475#ifdef __ARCH_SYNC_CORE_DCACHE 489#ifdef __ARCH_SYNC_CORE_DCACHE
490unsigned long dcache_invld_count[NR_CPUS];
476unsigned long barrier_mask __attribute__ ((__section__(".l2.bss"))); 491unsigned long barrier_mask __attribute__ ((__section__(".l2.bss")));
477 492
478void resync_core_dcache(void) 493void resync_core_dcache(void)
479{ 494{
480 unsigned int cpu = get_cpu(); 495 unsigned int cpu = get_cpu();
481 blackfin_invalidate_entire_dcache(); 496 blackfin_invalidate_entire_dcache();
482 ++per_cpu(cpu_data, cpu).dcache_invld_count; 497 dcache_invld_count[cpu]++;
483 put_cpu(); 498 put_cpu();
484} 499}
485EXPORT_SYMBOL(resync_core_dcache); 500EXPORT_SYMBOL(resync_core_dcache);
486#endif 501#endif
502
503#ifdef CONFIG_HOTPLUG_CPU
504int __cpuexit __cpu_disable(void)
505{
506 unsigned int cpu = smp_processor_id();
507
508 if (cpu == 0)
509 return -EPERM;
510
511 set_cpu_online(cpu, false);
512 return 0;
513}
514
515static DECLARE_COMPLETION(cpu_killed);
516
517int __cpuexit __cpu_die(unsigned int cpu)
518{
519 return wait_for_completion_timeout(&cpu_killed, 5000);
520}
521
522void cpu_die(void)
523{
524 complete(&cpu_killed);
525
526 atomic_dec(&init_mm.mm_users);
527 atomic_dec(&init_mm.mm_count);
528
529 local_irq_disable();
530 platform_cpu_die();
531}
532#endif
diff --git a/arch/blackfin/mm/init.c b/arch/blackfin/mm/init.c
index bb9c98f9cb5b..bb4e8fff4b55 100644
--- a/arch/blackfin/mm/init.c
+++ b/arch/blackfin/mm/init.c
@@ -4,6 +4,7 @@
4 * Licensed under the GPL-2 or later. 4 * Licensed under the GPL-2 or later.
5 */ 5 */
6 6
7#include <linux/gfp.h>
7#include <linux/swap.h> 8#include <linux/swap.h>
8#include <linux/bootmem.h> 9#include <linux/bootmem.h>
9#include <linux/uaccess.h> 10#include <linux/uaccess.h>
@@ -14,23 +15,11 @@
14#include "blackfin_sram.h" 15#include "blackfin_sram.h"
15 16
16/* 17/*
17 * BAD_PAGE is the page that is used for page faults when linux 18 * ZERO_PAGE is a special page that is used for zero-initialized data and COW.
18 * is out-of-memory. Older versions of linux just did a 19 * Let the bss do its zero-init magic so we don't have to do it ourselves.
19 * do_exit(), but using this instead means there is less risk
20 * for a process dying in kernel mode, possibly leaving a inode
21 * unused etc..
22 *
23 * BAD_PAGETABLE is the accompanying page-table: it is initialized
24 * to point to BAD_PAGE entries.
25 *
26 * ZERO_PAGE is a special page that is used for zero-initialized
27 * data and COW.
28 */ 20 */
29static unsigned long empty_bad_page_table; 21char empty_zero_page[PAGE_SIZE] __attribute__((aligned(PAGE_SIZE)));
30 22EXPORT_SYMBOL(empty_zero_page);
31static unsigned long empty_bad_page;
32
33static unsigned long empty_zero_page;
34 23
35#ifndef CONFIG_EXCEPTION_L1_SCRATCH 24#ifndef CONFIG_EXCEPTION_L1_SCRATCH
36#if defined CONFIG_SYSCALL_TAB_L1 25#if defined CONFIG_SYSCALL_TAB_L1
@@ -51,40 +40,26 @@ EXPORT_SYMBOL(cpu_pda);
51void __init paging_init(void) 40void __init paging_init(void)
52{ 41{
53 /* 42 /*
54 * make sure start_mem is page aligned, otherwise bootmem and 43 * make sure start_mem is page aligned, otherwise bootmem and
55 * page_alloc get different views og the world 44 * page_alloc get different views of the world
56 */ 45 */
57 unsigned long end_mem = memory_end & PAGE_MASK; 46 unsigned long end_mem = memory_end & PAGE_MASK;
58 47
59 pr_debug("start_mem is %#lx virtual_end is %#lx\n", PAGE_ALIGN(memory_start), end_mem); 48 unsigned long zones_size[MAX_NR_ZONES] = {
60 49 [0] = 0,
61 /* 50 [ZONE_DMA] = (end_mem - PAGE_OFFSET) >> PAGE_SHIFT,
62 * initialize the bad page table and bad page to point 51 [ZONE_NORMAL] = 0,
63 * to a couple of allocated pages 52#ifdef CONFIG_HIGHMEM
64 */ 53 [ZONE_HIGHMEM] = 0,
65 empty_bad_page_table = (unsigned long)alloc_bootmem_pages(PAGE_SIZE); 54#endif
66 empty_bad_page = (unsigned long)alloc_bootmem_pages(PAGE_SIZE); 55 };
67 empty_zero_page = (unsigned long)alloc_bootmem_pages(PAGE_SIZE);
68 memset((void *)empty_zero_page, 0, PAGE_SIZE);
69 56
70 /* 57 /* Set up SFC/DFC registers (user data space) */
71 * Set up SFC/DFC registers (user data space)
72 */
73 set_fs(KERNEL_DS); 58 set_fs(KERNEL_DS);
74 59
75 pr_debug("free_area_init -> start_mem is %#lx virtual_end is %#lx\n", 60 pr_debug("free_area_init -> start_mem is %#lx virtual_end is %#lx\n",
76 PAGE_ALIGN(memory_start), end_mem); 61 PAGE_ALIGN(memory_start), end_mem);
77 62 free_area_init(zones_size);
78 {
79 unsigned long zones_size[MAX_NR_ZONES] = { 0, };
80
81 zones_size[ZONE_DMA] = (end_mem - PAGE_OFFSET) >> PAGE_SHIFT;
82 zones_size[ZONE_NORMAL] = 0;
83#ifdef CONFIG_HIGHMEM
84 zones_size[ZONE_HIGHMEM] = 0;
85#endif
86 free_area_init(zones_size);
87 }
88} 63}
89 64
90asmlinkage void __init init_pda(void) 65asmlinkage void __init init_pda(void)
diff --git a/arch/blackfin/mm/isram-driver.c b/arch/blackfin/mm/isram-driver.c
index 84cdc5a1c139..7e2e674ed444 100644
--- a/arch/blackfin/mm/isram-driver.c
+++ b/arch/blackfin/mm/isram-driver.c
@@ -11,6 +11,7 @@
11#include <linux/module.h> 11#include <linux/module.h>
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/types.h> 13#include <linux/types.h>
14#include <linux/slab.h>
14#include <linux/spinlock.h> 15#include <linux/spinlock.h>
15#include <linux/sched.h> 16#include <linux/sched.h>
16 17
@@ -42,13 +43,12 @@ static DEFINE_SPINLOCK(dtest_lock);
42/* Takes a void pointer */ 43/* Takes a void pointer */
43#define IADDR2DTEST(x) \ 44#define IADDR2DTEST(x) \
44 ({ unsigned long __addr = (unsigned long)(x); \ 45 ({ unsigned long __addr = (unsigned long)(x); \
45 (__addr & 0x47F8) | /* address bits 14 & 10:3 */ \ 46 ((__addr & (1 << 11)) << (26 - 11)) | /* addr bit 11 (Way0/Way1) */ \
46 (__addr & 0x8000) << 23 | /* Bank A/B */ \ 47 (1 << 24) | /* instruction access = 1 */ \
47 (__addr & 0x0800) << 15 | /* address bit 11 */ \ 48 ((__addr & (1 << 15)) << (23 - 15)) | /* addr bit 15 (Data Bank) */ \
48 (__addr & 0x3000) << 4 | /* address bits 13:12 */ \ 49 ((__addr & (3 << 12)) << (16 - 12)) | /* addr bits 13:12 (Subbank) */ \
49 (__addr & 0x8000) << 8 | /* address bit 15 */ \ 50 (__addr & 0x47F8) | /* addr bits 14 & 10:3 */ \
50 (0x1000000) | /* instruction access = 1 */ \ 51 (1 << 2); /* data array = 1 */ \
51 (0x4); /* data array = 1 */ \
52 }) 52 })
53 53
54/* Takes a pointer, and returns the offset (in bits) which things should be shifted */ 54/* Takes a pointer, and returns the offset (in bits) which things should be shifted */
@@ -62,7 +62,7 @@ static void isram_write(const void *addr, uint64_t data)
62 uint32_t cmd; 62 uint32_t cmd;
63 unsigned long flags; 63 unsigned long flags;
64 64
65 if (addr >= (void *)(L1_CODE_START + L1_CODE_LENGTH)) 65 if (unlikely(addr >= (void *)(L1_CODE_START + L1_CODE_LENGTH)))
66 return; 66 return;
67 67
68 cmd = IADDR2DTEST(addr) | 2; /* write */ 68 cmd = IADDR2DTEST(addr) | 2; /* write */
@@ -93,7 +93,7 @@ static uint64_t isram_read(const void *addr)
93 unsigned long flags; 93 unsigned long flags;
94 uint64_t ret; 94 uint64_t ret;
95 95
96 if (addr > (void *)(L1_CODE_START + L1_CODE_LENGTH)) 96 if (unlikely(addr > (void *)(L1_CODE_START + L1_CODE_LENGTH)))
97 return 0; 97 return 0;
98 98
99 cmd = IADDR2DTEST(addr) | 0; /* read */ 99 cmd = IADDR2DTEST(addr) | 0; /* read */
@@ -120,7 +120,7 @@ static bool isram_check_addr(const void *addr, size_t n)
120{ 120{
121 if ((addr >= (void *)L1_CODE_START) && 121 if ((addr >= (void *)L1_CODE_START) &&
122 (addr < (void *)(L1_CODE_START + L1_CODE_LENGTH))) { 122 (addr < (void *)(L1_CODE_START + L1_CODE_LENGTH))) {
123 if ((addr + n) > (void *)(L1_CODE_START + L1_CODE_LENGTH)) { 123 if (unlikely((addr + n) > (void *)(L1_CODE_START + L1_CODE_LENGTH))) {
124 show_stack(NULL, NULL); 124 show_stack(NULL, NULL);
125 pr_err("copy involving %p length (%zu) too long\n", addr, n); 125 pr_err("copy involving %p length (%zu) too long\n", addr, n);
126 } 126 }
@@ -195,7 +195,7 @@ EXPORT_SYMBOL(isram_memcpy);
195 195
196#ifdef CONFIG_BFIN_ISRAM_SELF_TEST 196#ifdef CONFIG_BFIN_ISRAM_SELF_TEST
197 197
198#define TEST_LEN 0x100 198static int test_len = 0x20000;
199 199
200static __init void hex_dump(unsigned char *buf, int len) 200static __init void hex_dump(unsigned char *buf, int len)
201{ 201{
@@ -211,15 +211,15 @@ static __init int isram_read_test(char *sdram, void *l1inst)
211 pr_info("INFO: running isram_read tests\n"); 211 pr_info("INFO: running isram_read tests\n");
212 212
213 /* setup some different data to play with */ 213 /* setup some different data to play with */
214 for (i = 0; i < TEST_LEN; ++i) 214 for (i = 0; i < test_len; ++i)
215 sdram[i] = i; 215 sdram[i] = i % 255;
216 dma_memcpy(l1inst, sdram, TEST_LEN); 216 dma_memcpy(l1inst, sdram, test_len);
217 217
218 /* make sure we can read the L1 inst */ 218 /* make sure we can read the L1 inst */
219 for (i = 0; i < TEST_LEN; i += sizeof(uint64_t)) { 219 for (i = 0; i < test_len; i += sizeof(uint64_t)) {
220 data1 = isram_read(l1inst + i); 220 data1 = isram_read(l1inst + i);
221 memcpy(&data2, sdram + i, sizeof(data2)); 221 memcpy(&data2, sdram + i, sizeof(data2));
222 if (memcmp(&data1, &data2, sizeof(uint64_t))) { 222 if (data1 != data2) {
223 pr_err("FAIL: isram_read(%p) returned %#llx but wanted %#llx\n", 223 pr_err("FAIL: isram_read(%p) returned %#llx but wanted %#llx\n",
224 l1inst + i, data1, data2); 224 l1inst + i, data1, data2);
225 ++ret; 225 ++ret;
@@ -237,25 +237,25 @@ static __init int isram_write_test(char *sdram, void *l1inst)
237 pr_info("INFO: running isram_write tests\n"); 237 pr_info("INFO: running isram_write tests\n");
238 238
239 /* setup some different data to play with */ 239 /* setup some different data to play with */
240 memset(sdram, 0, TEST_LEN * 2); 240 memset(sdram, 0, test_len * 2);
241 dma_memcpy(l1inst, sdram, TEST_LEN); 241 dma_memcpy(l1inst, sdram, test_len);
242 for (i = 0; i < TEST_LEN; ++i) 242 for (i = 0; i < test_len; ++i)
243 sdram[i] = i; 243 sdram[i] = i % 255;
244 244
245 /* make sure we can write the L1 inst */ 245 /* make sure we can write the L1 inst */
246 for (i = 0; i < TEST_LEN; i += sizeof(uint64_t)) { 246 for (i = 0; i < test_len; i += sizeof(uint64_t)) {
247 memcpy(&data1, sdram + i, sizeof(data1)); 247 memcpy(&data1, sdram + i, sizeof(data1));
248 isram_write(l1inst + i, data1); 248 isram_write(l1inst + i, data1);
249 data2 = isram_read(l1inst + i); 249 data2 = isram_read(l1inst + i);
250 if (memcmp(&data1, &data2, sizeof(uint64_t))) { 250 if (data1 != data2) {
251 pr_err("FAIL: isram_write(%p, %#llx) != %#llx\n", 251 pr_err("FAIL: isram_write(%p, %#llx) != %#llx\n",
252 l1inst + i, data1, data2); 252 l1inst + i, data1, data2);
253 ++ret; 253 ++ret;
254 } 254 }
255 } 255 }
256 256
257 dma_memcpy(sdram + TEST_LEN, l1inst, TEST_LEN); 257 dma_memcpy(sdram + test_len, l1inst, test_len);
258 if (memcmp(sdram, sdram + TEST_LEN, TEST_LEN)) { 258 if (memcmp(sdram, sdram + test_len, test_len)) {
259 pr_err("FAIL: isram_write() did not work properly\n"); 259 pr_err("FAIL: isram_write() did not work properly\n");
260 ++ret; 260 ++ret;
261 } 261 }
@@ -267,12 +267,12 @@ static __init int
267_isram_memcpy_test(char pattern, void *sdram, void *l1inst, const char *smemcpy, 267_isram_memcpy_test(char pattern, void *sdram, void *l1inst, const char *smemcpy,
268 void *(*fmemcpy)(void *, const void *, size_t)) 268 void *(*fmemcpy)(void *, const void *, size_t))
269{ 269{
270 memset(sdram, pattern, TEST_LEN); 270 memset(sdram, pattern, test_len);
271 fmemcpy(l1inst, sdram, TEST_LEN); 271 fmemcpy(l1inst, sdram, test_len);
272 fmemcpy(sdram + TEST_LEN, l1inst, TEST_LEN); 272 fmemcpy(sdram + test_len, l1inst, test_len);
273 if (memcmp(sdram, sdram + TEST_LEN, TEST_LEN)) { 273 if (memcmp(sdram, sdram + test_len, test_len)) {
274 pr_err("FAIL: %s(%p <=> %p, %#x) failed (data is %#x)\n", 274 pr_err("FAIL: %s(%p <=> %p, %#x) failed (data is %#x)\n",
275 smemcpy, l1inst, sdram, TEST_LEN, pattern); 275 smemcpy, l1inst, sdram, test_len, pattern);
276 return 1; 276 return 1;
277 } 277 }
278 return 0; 278 return 0;
@@ -291,12 +291,13 @@ static __init int isram_memcpy_test(char *sdram, void *l1inst)
291 /* check read of small, unaligned, and hardware 64bit limits */ 291 /* check read of small, unaligned, and hardware 64bit limits */
292 pr_info("INFO: running isram_memcpy (read) tests\n"); 292 pr_info("INFO: running isram_memcpy (read) tests\n");
293 293
294 for (i = 0; i < TEST_LEN; ++i) 294 /* setup some different data to play with */
295 sdram[i] = i; 295 for (i = 0; i < test_len; ++i)
296 dma_memcpy(l1inst, sdram, TEST_LEN); 296 sdram[i] = i % 255;
297 dma_memcpy(l1inst, sdram, test_len);
297 298
298 thisret = 0; 299 thisret = 0;
299 for (i = 0; i < TEST_LEN - 32; ++i) { 300 for (i = 0; i < test_len - 32; ++i) {
300 unsigned char cmp[32]; 301 unsigned char cmp[32];
301 for (j = 1; j <= 32; ++j) { 302 for (j = 1; j <= 32; ++j) {
302 memset(cmp, 0, sizeof(cmp)); 303 memset(cmp, 0, sizeof(cmp));
@@ -309,7 +310,7 @@ static __init int isram_memcpy_test(char *sdram, void *l1inst)
309 pr_cont("\n"); 310 pr_cont("\n");
310 if (++thisret > 20) { 311 if (++thisret > 20) {
311 pr_err("FAIL: skipping remaining series\n"); 312 pr_err("FAIL: skipping remaining series\n");
312 i = TEST_LEN; 313 i = test_len;
313 break; 314 break;
314 } 315 }
315 } 316 }
@@ -320,11 +321,11 @@ static __init int isram_memcpy_test(char *sdram, void *l1inst)
320 /* check write of small, unaligned, and hardware 64bit limits */ 321 /* check write of small, unaligned, and hardware 64bit limits */
321 pr_info("INFO: running isram_memcpy (write) tests\n"); 322 pr_info("INFO: running isram_memcpy (write) tests\n");
322 323
323 memset(sdram + TEST_LEN, 0, TEST_LEN); 324 memset(sdram + test_len, 0, test_len);
324 dma_memcpy(l1inst, sdram + TEST_LEN, TEST_LEN); 325 dma_memcpy(l1inst, sdram + test_len, test_len);
325 326
326 thisret = 0; 327 thisret = 0;
327 for (i = 0; i < TEST_LEN - 32; ++i) { 328 for (i = 0; i < test_len - 32; ++i) {
328 unsigned char cmp[32]; 329 unsigned char cmp[32];
329 for (j = 1; j <= 32; ++j) { 330 for (j = 1; j <= 32; ++j) {
330 isram_memcpy(l1inst + i, sdram + i, j); 331 isram_memcpy(l1inst + i, sdram + i, j);
@@ -337,7 +338,7 @@ static __init int isram_memcpy_test(char *sdram, void *l1inst)
337 pr_cont("\n"); 338 pr_cont("\n");
338 if (++thisret > 20) { 339 if (++thisret > 20) {
339 pr_err("FAIL: skipping remaining series\n"); 340 pr_err("FAIL: skipping remaining series\n");
340 i = TEST_LEN; 341 i = test_len;
341 break; 342 break;
342 } 343 }
343 } 344 }
@@ -354,22 +355,30 @@ static __init int isram_test_init(void)
354 char *sdram; 355 char *sdram;
355 void *l1inst; 356 void *l1inst;
356 357
357 sdram = kmalloc(TEST_LEN * 2, GFP_KERNEL); 358 /* Try to test as much of L1SRAM as possible */
358 if (!sdram) { 359 while (test_len) {
359 pr_warning("SKIP: could not allocate sdram\n"); 360 test_len >>= 1;
360 return 0; 361 l1inst = l1_inst_sram_alloc(test_len);
362 if (l1inst)
363 break;
361 } 364 }
362
363 l1inst = l1_inst_sram_alloc(TEST_LEN);
364 if (!l1inst) { 365 if (!l1inst) {
365 kfree(sdram);
366 pr_warning("SKIP: could not allocate L1 inst\n"); 366 pr_warning("SKIP: could not allocate L1 inst\n");
367 return 0; 367 return 0;
368 } 368 }
369 pr_info("INFO: testing %#x bytes (%p - %p)\n",
370 test_len, l1inst, l1inst + test_len);
371
372 sdram = kmalloc(test_len * 2, GFP_KERNEL);
373 if (!sdram) {
374 sram_free(l1inst);
375 pr_warning("SKIP: could not allocate sdram\n");
376 return 0;
377 }
369 378
370 /* sanity check initial L1 inst state */ 379 /* sanity check initial L1 inst state */
371 ret = 1; 380 ret = 1;
372 pr_info("INFO: running initial dma_memcpy checks\n"); 381 pr_info("INFO: running initial dma_memcpy checks %p\n", sdram);
373 if (_isram_memcpy_test(0xa, sdram, l1inst, dma_memcpy)) 382 if (_isram_memcpy_test(0xa, sdram, l1inst, dma_memcpy))
374 goto abort; 383 goto abort;
375 if (_isram_memcpy_test(0x5, sdram, l1inst, dma_memcpy)) 384 if (_isram_memcpy_test(0x5, sdram, l1inst, dma_memcpy))
diff --git a/arch/blackfin/mm/sram-alloc.c b/arch/blackfin/mm/sram-alloc.c
index f068c11ea98f..627e04b5ba9a 100644
--- a/arch/blackfin/mm/sram-alloc.c
+++ b/arch/blackfin/mm/sram-alloc.c
@@ -17,6 +17,7 @@
17#include <linux/proc_fs.h> 17#include <linux/proc_fs.h>
18#include <linux/spinlock.h> 18#include <linux/spinlock.h>
19#include <linux/rtc.h> 19#include <linux/rtc.h>
20#include <linux/slab.h>
20#include <asm/blackfin.h> 21#include <asm/blackfin.h>
21#include <asm/mem_map.h> 22#include <asm/mem_map.h>
22#include "blackfin_sram.h" 23#include "blackfin_sram.h"
@@ -255,7 +256,8 @@ static void *_sram_alloc(size_t size, struct sram_piece *pfree_head,
255 plast->next = pslot->next; 256 plast->next = pslot->next;
256 pavail = pslot; 257 pavail = pslot;
257 } else { 258 } else {
258 pavail = kmem_cache_alloc(sram_piece_cache, GFP_KERNEL); 259 /* use atomic so our L1 allocator can be used atomically */
260 pavail = kmem_cache_alloc(sram_piece_cache, GFP_ATOMIC);
259 261
260 if (!pavail) 262 if (!pavail)
261 return NULL; 263 return NULL;
@@ -402,7 +404,7 @@ void *l1_data_A_sram_alloc(size_t size)
402 void *addr; 404 void *addr;
403 unsigned int cpu; 405 unsigned int cpu;
404 406
405 cpu = get_cpu(); 407 cpu = smp_processor_id();
406 /* add mutex operation */ 408 /* add mutex operation */
407 spin_lock_irqsave(&per_cpu(l1_data_sram_lock, cpu), flags); 409 spin_lock_irqsave(&per_cpu(l1_data_sram_lock, cpu), flags);
408 410
@@ -411,7 +413,6 @@ void *l1_data_A_sram_alloc(size_t size)
411 413
412 /* add mutex operation */ 414 /* add mutex operation */
413 spin_unlock_irqrestore(&per_cpu(l1_data_sram_lock, cpu), flags); 415 spin_unlock_irqrestore(&per_cpu(l1_data_sram_lock, cpu), flags);
414 put_cpu();
415 416
416 pr_debug("Allocated address in l1_data_A_sram_alloc is 0x%lx+0x%lx\n", 417 pr_debug("Allocated address in l1_data_A_sram_alloc is 0x%lx+0x%lx\n",
417 (long unsigned int)addr, size); 418 (long unsigned int)addr, size);
@@ -430,7 +431,7 @@ int l1_data_A_sram_free(const void *addr)
430 int ret; 431 int ret;
431 unsigned int cpu; 432 unsigned int cpu;
432 433
433 cpu = get_cpu(); 434 cpu = smp_processor_id();
434 /* add mutex operation */ 435 /* add mutex operation */
435 spin_lock_irqsave(&per_cpu(l1_data_sram_lock, cpu), flags); 436 spin_lock_irqsave(&per_cpu(l1_data_sram_lock, cpu), flags);
436 437
@@ -439,7 +440,6 @@ int l1_data_A_sram_free(const void *addr)
439 440
440 /* add mutex operation */ 441 /* add mutex operation */
441 spin_unlock_irqrestore(&per_cpu(l1_data_sram_lock, cpu), flags); 442 spin_unlock_irqrestore(&per_cpu(l1_data_sram_lock, cpu), flags);
442 put_cpu();
443 443
444 return ret; 444 return ret;
445#else 445#else
@@ -455,7 +455,7 @@ void *l1_data_B_sram_alloc(size_t size)
455 void *addr; 455 void *addr;
456 unsigned int cpu; 456 unsigned int cpu;
457 457
458 cpu = get_cpu(); 458 cpu = smp_processor_id();
459 /* add mutex operation */ 459 /* add mutex operation */
460 spin_lock_irqsave(&per_cpu(l1_data_sram_lock, cpu), flags); 460 spin_lock_irqsave(&per_cpu(l1_data_sram_lock, cpu), flags);
461 461
@@ -464,7 +464,6 @@ void *l1_data_B_sram_alloc(size_t size)
464 464
465 /* add mutex operation */ 465 /* add mutex operation */
466 spin_unlock_irqrestore(&per_cpu(l1_data_sram_lock, cpu), flags); 466 spin_unlock_irqrestore(&per_cpu(l1_data_sram_lock, cpu), flags);
467 put_cpu();
468 467
469 pr_debug("Allocated address in l1_data_B_sram_alloc is 0x%lx+0x%lx\n", 468 pr_debug("Allocated address in l1_data_B_sram_alloc is 0x%lx+0x%lx\n",
470 (long unsigned int)addr, size); 469 (long unsigned int)addr, size);
@@ -483,7 +482,7 @@ int l1_data_B_sram_free(const void *addr)
483 int ret; 482 int ret;
484 unsigned int cpu; 483 unsigned int cpu;
485 484
486 cpu = get_cpu(); 485 cpu = smp_processor_id();
487 /* add mutex operation */ 486 /* add mutex operation */
488 spin_lock_irqsave(&per_cpu(l1_data_sram_lock, cpu), flags); 487 spin_lock_irqsave(&per_cpu(l1_data_sram_lock, cpu), flags);
489 488
@@ -492,7 +491,6 @@ int l1_data_B_sram_free(const void *addr)
492 491
493 /* add mutex operation */ 492 /* add mutex operation */
494 spin_unlock_irqrestore(&per_cpu(l1_data_sram_lock, cpu), flags); 493 spin_unlock_irqrestore(&per_cpu(l1_data_sram_lock, cpu), flags);
495 put_cpu();
496 494
497 return ret; 495 return ret;
498#else 496#else
@@ -540,7 +538,7 @@ void *l1_inst_sram_alloc(size_t size)
540 void *addr; 538 void *addr;
541 unsigned int cpu; 539 unsigned int cpu;
542 540
543 cpu = get_cpu(); 541 cpu = smp_processor_id();
544 /* add mutex operation */ 542 /* add mutex operation */
545 spin_lock_irqsave(&per_cpu(l1_inst_sram_lock, cpu), flags); 543 spin_lock_irqsave(&per_cpu(l1_inst_sram_lock, cpu), flags);
546 544
@@ -549,7 +547,6 @@ void *l1_inst_sram_alloc(size_t size)
549 547
550 /* add mutex operation */ 548 /* add mutex operation */
551 spin_unlock_irqrestore(&per_cpu(l1_inst_sram_lock, cpu), flags); 549 spin_unlock_irqrestore(&per_cpu(l1_inst_sram_lock, cpu), flags);
552 put_cpu();
553 550
554 pr_debug("Allocated address in l1_inst_sram_alloc is 0x%lx+0x%lx\n", 551 pr_debug("Allocated address in l1_inst_sram_alloc is 0x%lx+0x%lx\n",
555 (long unsigned int)addr, size); 552 (long unsigned int)addr, size);
@@ -568,7 +565,7 @@ int l1_inst_sram_free(const void *addr)
568 int ret; 565 int ret;
569 unsigned int cpu; 566 unsigned int cpu;
570 567
571 cpu = get_cpu(); 568 cpu = smp_processor_id();
572 /* add mutex operation */ 569 /* add mutex operation */
573 spin_lock_irqsave(&per_cpu(l1_inst_sram_lock, cpu), flags); 570 spin_lock_irqsave(&per_cpu(l1_inst_sram_lock, cpu), flags);
574 571
@@ -577,7 +574,6 @@ int l1_inst_sram_free(const void *addr)
577 574
578 /* add mutex operation */ 575 /* add mutex operation */
579 spin_unlock_irqrestore(&per_cpu(l1_inst_sram_lock, cpu), flags); 576 spin_unlock_irqrestore(&per_cpu(l1_inst_sram_lock, cpu), flags);
580 put_cpu();
581 577
582 return ret; 578 return ret;
583#else 579#else
@@ -593,7 +589,7 @@ void *l1sram_alloc(size_t size)
593 void *addr; 589 void *addr;
594 unsigned int cpu; 590 unsigned int cpu;
595 591
596 cpu = get_cpu(); 592 cpu = smp_processor_id();
597 /* add mutex operation */ 593 /* add mutex operation */
598 spin_lock_irqsave(&per_cpu(l1sram_lock, cpu), flags); 594 spin_lock_irqsave(&per_cpu(l1sram_lock, cpu), flags);
599 595
@@ -602,7 +598,6 @@ void *l1sram_alloc(size_t size)
602 598
603 /* add mutex operation */ 599 /* add mutex operation */
604 spin_unlock_irqrestore(&per_cpu(l1sram_lock, cpu), flags); 600 spin_unlock_irqrestore(&per_cpu(l1sram_lock, cpu), flags);
605 put_cpu();
606 601
607 return addr; 602 return addr;
608} 603}
@@ -614,7 +609,7 @@ void *l1sram_alloc_max(size_t *psize)
614 void *addr; 609 void *addr;
615 unsigned int cpu; 610 unsigned int cpu;
616 611
617 cpu = get_cpu(); 612 cpu = smp_processor_id();
618 /* add mutex operation */ 613 /* add mutex operation */
619 spin_lock_irqsave(&per_cpu(l1sram_lock, cpu), flags); 614 spin_lock_irqsave(&per_cpu(l1sram_lock, cpu), flags);
620 615
@@ -623,7 +618,6 @@ void *l1sram_alloc_max(size_t *psize)
623 618
624 /* add mutex operation */ 619 /* add mutex operation */
625 spin_unlock_irqrestore(&per_cpu(l1sram_lock, cpu), flags); 620 spin_unlock_irqrestore(&per_cpu(l1sram_lock, cpu), flags);
626 put_cpu();
627 621
628 return addr; 622 return addr;
629} 623}
@@ -635,7 +629,7 @@ int l1sram_free(const void *addr)
635 int ret; 629 int ret;
636 unsigned int cpu; 630 unsigned int cpu;
637 631
638 cpu = get_cpu(); 632 cpu = smp_processor_id();
639 /* add mutex operation */ 633 /* add mutex operation */
640 spin_lock_irqsave(&per_cpu(l1sram_lock, cpu), flags); 634 spin_lock_irqsave(&per_cpu(l1sram_lock, cpu), flags);
641 635
@@ -644,7 +638,6 @@ int l1sram_free(const void *addr)
644 638
645 /* add mutex operation */ 639 /* add mutex operation */
646 spin_unlock_irqrestore(&per_cpu(l1sram_lock, cpu), flags); 640 spin_unlock_irqrestore(&per_cpu(l1sram_lock, cpu), flags);
647 put_cpu();
648 641
649 return ret; 642 return ret;
650} 643}
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-08 08:46:17 -0500