diff options
author | Mike Frysinger <vapier@gentoo.org> | 2009-10-15 00:13:29 -0400 |
---|---|---|
committer | Mike Frysinger <vapier@gentoo.org> | 2010-10-18 02:49:35 -0400 |
commit | 0d2c6de2255cb299fdd77d4543738adee45f4f3f (patch) | |
tree | 0d71e83b2bb0dc2fcb73416c9bbc2d4a8c0b47e9 /arch/blackfin | |
parent | 90008a641dd832cc2e2c4d21b7da94de91e9d0a4 (diff) |
Blackfin: SPI: expand SPI bitmasks
Expand the BIT_CTL defines to use the naming convention of the hardware,
and expand the masks to cover all documented bits.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin')
-rw-r--r-- | arch/blackfin/include/asm/bfin5xx_spi.h | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/arch/blackfin/include/asm/bfin5xx_spi.h b/arch/blackfin/include/asm/bfin5xx_spi.h index ee3ecb96aa12..126d25e2afa8 100644 --- a/arch/blackfin/include/asm/bfin5xx_spi.h +++ b/arch/blackfin/include/asm/bfin5xx_spi.h | |||
@@ -26,11 +26,14 @@ | |||
26 | #define BIT_CTL_ENABLE 0x4000 | 26 | #define BIT_CTL_ENABLE 0x4000 |
27 | #define BIT_CTL_OPENDRAIN 0x2000 | 27 | #define BIT_CTL_OPENDRAIN 0x2000 |
28 | #define BIT_CTL_MASTER 0x1000 | 28 | #define BIT_CTL_MASTER 0x1000 |
29 | #define BIT_CTL_POLAR 0x0800 | 29 | #define BIT_CTL_CPOL 0x0800 |
30 | #define BIT_CTL_PHASE 0x0400 | 30 | #define BIT_CTL_CPHA 0x0400 |
31 | #define BIT_CTL_BITORDER 0x0200 | 31 | #define BIT_CTL_LSBF 0x0200 |
32 | #define BIT_CTL_WORDSIZE 0x0100 | 32 | #define BIT_CTL_WORDSIZE 0x0100 |
33 | #define BIT_CTL_MISOENABLE 0x0020 | 33 | #define BIT_CTL_EMISO 0x0020 |
34 | #define BIT_CTL_PSSE 0x0010 | ||
35 | #define BIT_CTL_GM 0x0008 | ||
36 | #define BIT_CTL_SZ 0x0004 | ||
34 | #define BIT_CTL_RXMOD 0x0000 | 37 | #define BIT_CTL_RXMOD 0x0000 |
35 | #define BIT_CTL_TXMOD 0x0001 | 38 | #define BIT_CTL_TXMOD 0x0001 |
36 | #define BIT_CTL_TIMOD_DMA_TX 0x0003 | 39 | #define BIT_CTL_TIMOD_DMA_TX 0x0003 |