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authorRobin Getz <robin.getz@analog.com>2007-10-10 05:28:27 -0400
committerBryan Wu <bryan.wu@analog.com>2007-10-10 05:28:27 -0400
commitb3f8b9276314f4942ef9033aa5f4dc184901d640 (patch)
tree98c6848363f8a480759116f9cb50f2060d1e6601 /arch/blackfin
parentb76f98761acc909c20c1e65c8af11dc1decae935 (diff)
Blackfin arch: the load address is not safe to point to as a workaround for ANOMALY 05000281
Now that we have moved head.S into the init section, the load address is not safe to point to as a workaround for ANOMALY 05000281 Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'arch/blackfin')
-rw-r--r--arch/blackfin/mach-common/entry.S17
1 files changed, 13 insertions, 4 deletions
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S
index a56b231d94ce..e3ad5802868a 100644
--- a/arch/blackfin/mach-common/entry.S
+++ b/arch/blackfin/mach-common/entry.S
@@ -52,6 +52,15 @@
52# define EX_SCRATCH_REG CYCLES 52# define EX_SCRATCH_REG CYCLES
53#endif 53#endif
54 54
55#if ANOMALY_05000281
56ENTRY(_safe_speculative_execution)
57 NOP;
58 NOP;
59 NOP;
60 jump _safe_speculative_execution;
61ENDPROC(_safe_speculative_execution)
62#endif
63
55#ifdef CONFIG_EXCPT_IRQ_SYSC_L1 64#ifdef CONFIG_EXCPT_IRQ_SYSC_L1
56.section .l1.text 65.section .l1.text
57#else 66#else
@@ -685,8 +694,8 @@ ENTRY(_return_from_int)
685 [p0] = p1; 694 [p0] = p1;
686 csync; 695 csync;
687#if ANOMALY_05000281 696#if ANOMALY_05000281
688 r0.l = lo(CONFIG_BOOT_LOAD); 697 r0.l = _safe_speculative_execution;
689 r0.h = hi(CONFIG_BOOT_LOAD); 698 r0.h = _safe_speculative_execution;
690 reti = r0; 699 reti = r0;
691#endif 700#endif
692 r0 = 0x801f (z); 701 r0 = 0x801f (z);
@@ -699,8 +708,8 @@ ENDPROC(_return_from_int)
699 708
700ENTRY(_lower_to_irq14) 709ENTRY(_lower_to_irq14)
701#if ANOMALY_05000281 710#if ANOMALY_05000281
702 r0.l = lo(CONFIG_BOOT_LOAD); 711 r0.l = _safe_speculative_execution;
703 r0.h = hi(CONFIG_BOOT_LOAD); 712 r0.h = _safe_speculative_execution;
704 reti = r0; 713 reti = r0;
705#endif 714#endif
706 r0 = 0x401f; 715 r0 = 0x401f;