aboutsummaryrefslogtreecommitdiffstats
path: root/arch/blackfin
diff options
context:
space:
mode:
authorMike Frysinger <vapier@gentoo.org>2009-11-30 13:41:58 -0500
committerMike Frysinger <vapier@gentoo.org>2009-12-15 00:16:04 -0500
commit2d40292b5a7bf104e3a386bf272641f5de532ae9 (patch)
treec0a1cba15bf6da99206d9b2c872f9e3b2a81d966 /arch/blackfin
parentdd3b0e3e6a322184313e47e2fd5955ab113ad463 (diff)
Blackfin: io.h: fix random busted whitespace
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin')
-rw-r--r--arch/blackfin/include/asm/io.h95
1 files changed, 51 insertions, 44 deletions
diff --git a/arch/blackfin/include/asm/io.h b/arch/blackfin/include/asm/io.h
index d1f5029189a7..29e55b9d88bc 100644
--- a/arch/blackfin/include/asm/io.h
+++ b/arch/blackfin/include/asm/io.h
@@ -31,12 +31,14 @@ static inline unsigned char readb(const volatile void __iomem *addr)
31 unsigned int val; 31 unsigned int val;
32 int tmp; 32 int tmp;
33 33
34 __asm__ __volatile__ ("cli %1;\n\t" 34 __asm__ __volatile__ (
35 "NOP; NOP; SSYNC;\n\t" 35 "cli %1;"
36 "%0 = b [%2] (z);\n\t" 36 "NOP; NOP; SSYNC;"
37 "sti %1;\n\t" 37 "%0 = b [%2] (z);"
38 : "=d"(val), "=d"(tmp): "a"(addr) 38 "sti %1;"
39 ); 39 : "=d"(val), "=d"(tmp)
40 : "a"(addr)
41 );
40 42
41 return (unsigned char) val; 43 return (unsigned char) val;
42} 44}
@@ -46,12 +48,14 @@ static inline unsigned short readw(const volatile void __iomem *addr)
46 unsigned int val; 48 unsigned int val;
47 int tmp; 49 int tmp;
48 50
49 __asm__ __volatile__ ("cli %1;\n\t" 51 __asm__ __volatile__ (
50 "NOP; NOP; SSYNC;\n\t" 52 "cli %1;"
51 "%0 = w [%2] (z);\n\t" 53 "NOP; NOP; SSYNC;"
52 "sti %1;\n\t" 54 "%0 = w [%2] (z);"
53 : "=d"(val), "=d"(tmp): "a"(addr) 55 "sti %1;"
54 ); 56 : "=d"(val), "=d"(tmp)
57 : "a"(addr)
58 );
55 59
56 return (unsigned short) val; 60 return (unsigned short) val;
57} 61}
@@ -61,20 +65,23 @@ static inline unsigned int readl(const volatile void __iomem *addr)
61 unsigned int val; 65 unsigned int val;
62 int tmp; 66 int tmp;
63 67
64 __asm__ __volatile__ ("cli %1;\n\t" 68 __asm__ __volatile__ (
65 "NOP; NOP; SSYNC;\n\t" 69 "cli %1;"
66 "%0 = [%2];\n\t" 70 "NOP; NOP; SSYNC;"
67 "sti %1;\n\t" 71 "%0 = [%2];"
68 : "=d"(val), "=d"(tmp): "a"(addr) 72 "sti %1;"
69 ); 73 : "=d"(val), "=d"(tmp)
74 : "a"(addr)
75 );
76
70 return val; 77 return val;
71} 78}
72 79
73#endif /* __ASSEMBLY__ */ 80#endif /* __ASSEMBLY__ */
74 81
75#define writeb(b,addr) (void)((*(volatile unsigned char *) (addr)) = (b)) 82#define writeb(b, addr) (void)((*(volatile unsigned char *) (addr)) = (b))
76#define writew(b,addr) (void)((*(volatile unsigned short *) (addr)) = (b)) 83#define writew(b, addr) (void)((*(volatile unsigned short *) (addr)) = (b))
77#define writel(b,addr) (void)((*(volatile unsigned int *) (addr)) = (b)) 84#define writel(b, addr) (void)((*(volatile unsigned int *) (addr)) = (b))
78 85
79#define __raw_readb readb 86#define __raw_readb readb
80#define __raw_readw readw 87#define __raw_readw readw
@@ -82,9 +89,9 @@ static inline unsigned int readl(const volatile void __iomem *addr)
82#define __raw_writeb writeb 89#define __raw_writeb writeb
83#define __raw_writew writew 90#define __raw_writew writew
84#define __raw_writel writel 91#define __raw_writel writel
85#define memset_io(a,b,c) memset((void *)(a),(b),(c)) 92#define memset_io(a, b, c) memset((void *)(a), (b), (c))
86#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c)) 93#define memcpy_fromio(a, b, c) memcpy((a), (void *)(b), (c))
87#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c)) 94#define memcpy_toio(a, b, c) memcpy((void *)(a), (b), (c))
88 95
89/* Convert "I/O port addresses" to actual addresses. i.e. ugly casts. */ 96/* Convert "I/O port addresses" to actual addresses. i.e. ugly casts. */
90#define __io(port) ((void *)(unsigned long)(port)) 97#define __io(port) ((void *)(unsigned long)(port))
@@ -92,30 +99,30 @@ static inline unsigned int readl(const volatile void __iomem *addr)
92#define inb(port) readb(__io(port)) 99#define inb(port) readb(__io(port))
93#define inw(port) readw(__io(port)) 100#define inw(port) readw(__io(port))
94#define inl(port) readl(__io(port)) 101#define inl(port) readl(__io(port))
95#define outb(x,port) writeb(x,__io(port)) 102#define outb(x, port) writeb(x, __io(port))
96#define outw(x,port) writew(x,__io(port)) 103#define outw(x, port) writew(x, __io(port))
97#define outl(x,port) writel(x,__io(port)) 104#define outl(x, port) writel(x, __io(port))
98 105
99#define inb_p(port) inb(__io(port)) 106#define inb_p(port) inb(__io(port))
100#define inw_p(port) inw(__io(port)) 107#define inw_p(port) inw(__io(port))
101#define inl_p(port) inl(__io(port)) 108#define inl_p(port) inl(__io(port))
102#define outb_p(x,port) outb(x,__io(port)) 109#define outb_p(x, port) outb(x, __io(port))
103#define outw_p(x,port) outw(x,__io(port)) 110#define outw_p(x, port) outw(x, __io(port))
104#define outl_p(x,port) outl(x,__io(port)) 111#define outl_p(x, port) outl(x, __io(port))
105 112
106#define ioread8_rep(a,d,c) readsb(a,d,c) 113#define ioread8_rep(a, d, c) readsb(a, d, c)
107#define ioread16_rep(a,d,c) readsw(a,d,c) 114#define ioread16_rep(a, d, c) readsw(a, d, c)
108#define ioread32_rep(a,d,c) readsl(a,d,c) 115#define ioread32_rep(a, d, c) readsl(a, d, c)
109#define iowrite8_rep(a,s,c) writesb(a,s,c) 116#define iowrite8_rep(a, s, c) writesb(a, s, c)
110#define iowrite16_rep(a,s,c) writesw(a,s,c) 117#define iowrite16_rep(a, s, c) writesw(a, s, c)
111#define iowrite32_rep(a,s,c) writesl(a,s,c) 118#define iowrite32_rep(a, s, c) writesl(a, s, c)
112 119
113#define ioread8(X) readb(X) 120#define ioread8(x) readb(x)
114#define ioread16(X) readw(X) 121#define ioread16(x) readw(x)
115#define ioread32(X) readl(X) 122#define ioread32(x) readl(x)
116#define iowrite8(val,X) writeb(val,X) 123#define iowrite8(val, x) writeb(val, x)
117#define iowrite16(val,X) writew(val,X) 124#define iowrite16(val, x) writew(val, x)
118#define iowrite32(val,X) writel(val,X) 125#define iowrite32(val, x) writel(val, x)
119 126
120#define mmiowb() wmb() 127#define mmiowb() wmb()
121 128