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authorMike Frysinger <vapier.adi@gmail.com>2009-01-07 10:14:38 -0500
committerBryan Wu <cooloney@kernel.org>2009-01-07 10:14:38 -0500
commit8f9f0e2f5c0af81656bf0d08451c7d09af412baf (patch)
tree01cf2fecd055dacd3a356c7a1886f3709e8d5540 /arch/blackfin
parente60cb8a9eb2d76ac072a45112dfaf365837d86aa (diff)
Blackfin arch: add () to avoid warnings from gcc
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin')
-rw-r--r--arch/blackfin/mach-bf527/include/mach/anomaly.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/blackfin/mach-bf527/include/mach/anomaly.h b/arch/blackfin/mach-bf527/include/mach/anomaly.h
index 6ee56eee63c9..035e8d835058 100644
--- a/arch/blackfin/mach-bf527/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf527/include/mach/anomaly.h
@@ -152,7 +152,7 @@
152/* bfrom_SysControl() Does Not Clear SIC_IWR1 Before Executing PLL Programming Sequence */ 152/* bfrom_SysControl() Does Not Clear SIC_IWR1 Before Executing PLL Programming Sequence */
153#define ANOMALY_05000432 (ANOMALY_BF526) 153#define ANOMALY_05000432 (ANOMALY_BF526)
154/* Certain SIC Registers are not Reset After Soft or Core Double Fault Reset */ 154/* Certain SIC Registers are not Reset After Soft or Core Double Fault Reset */
155#define ANOMALY_05000435 (ANOMALY_BF526 && __SILICON_REVISION__ < 1 || ANOMALY_BF527) 155#define ANOMALY_05000435 ((ANOMALY_BF526 && __SILICON_REVISION__ < 1) || ANOMALY_BF527)
156/* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */ 156/* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */
157#define ANOMALY_05000443 (1) 157#define ANOMALY_05000443 (1)
158 158