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authorMike Frysinger <vapier@gentoo.org>2011-05-26 17:26:58 -0400
committerMike Frysinger <vapier@gentoo.org>2011-05-28 17:02:55 -0400
commita4ffd956924e265865a4425bd888927059fd46a9 (patch)
treef814f866a1d1528a0d9490e3d9f7fcfc143ef1ae /arch/blackfin
parent427472c967977256db42ffbf16f65f2770278b7f (diff)
Blackfin: gptimers: add structure for hardware register layout
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin')
-rw-r--r--arch/blackfin/include/asm/gptimers.h18
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/blackfin/include/asm/gptimers.h b/arch/blackfin/include/asm/gptimers.h
index c722acdda0d3..38657dac1235 100644
--- a/arch/blackfin/include/asm/gptimers.h
+++ b/arch/blackfin/include/asm/gptimers.h
@@ -193,4 +193,22 @@ uint16_t get_enabled_gptimers(void);
193uint32_t get_gptimer_status(unsigned int group); 193uint32_t get_gptimer_status(unsigned int group);
194void set_gptimer_status(unsigned int group, uint32_t value); 194void set_gptimer_status(unsigned int group, uint32_t value);
195 195
196/*
197 * All Blackfin system MMRs are padded to 32bits even if the register
198 * itself is only 16bits. So use a helper macro to streamline this.
199 */
200#define __BFP(m) u16 m; u16 __pad_##m
201
202/*
203 * bfin timer registers layout
204 */
205struct bfin_gptimer_regs {
206 __BFP(config);
207 u32 counter;
208 u32 period;
209 u32 width;
210};
211
212#undef __BFP
213
196#endif 214#endif