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authorBryan Wu <cooloney@kernel.org>2008-11-18 04:48:22 -0500
committerBryan Wu <cooloney@kernel.org>2008-11-18 04:48:22 -0500
commit397861cd8046549957a04d34a0b97b267cbb9589 (patch)
treefeb9a74acdf782205e2eef186a86f3141bc84ef3 /arch/blackfin
parent10a88a2be569002ddbb669278c598d8ee11e2f50 (diff)
Blackfin arch: fix bug - gpio_bank() macros messed up bank number caculating with positioning a gpio
The whole story: Before BF51x merged, all the MAX_BLACKFIN_GPIOS are integral multiple of GPIO_BANKSIZE (= 16). But BF51x provides MAX_BLACKFIN_GPIOS = 40 which includes 3 banks and the 3rd bank has only 8 GPIO pins. Therefore, gpio_bank() macros is correct when you try to find a GPIO in which bank (GPIO_35 is in bank 2). But on BF51x gpio_bank(MAX_BLACKFIN_GPIOS) only gives out 2 banks instead of 3 banks for some static array initialization. This patch add a new macros gpio_bank_n() and GPIO_BANK_NUM to do bank number caculating and remain the gpio_bank() macros for positioning a gpio in which bank. Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin')
-rw-r--r--arch/blackfin/include/asm/gpio.h2
-rw-r--r--arch/blackfin/kernel/bfin_gpio.c30
-rw-r--r--arch/blackfin/mach-common/ints-priority.c6
3 files changed, 20 insertions, 18 deletions
diff --git a/arch/blackfin/include/asm/gpio.h b/arch/blackfin/include/asm/gpio.h
index d8485624006a..2a5e846a5382 100644
--- a/arch/blackfin/include/asm/gpio.h
+++ b/arch/blackfin/include/asm/gpio.h
@@ -85,10 +85,12 @@
85#define __ARCH_BLACKFIN_GPIO_H__ 85#define __ARCH_BLACKFIN_GPIO_H__
86 86
87#define gpio_bank(x) ((x) >> 4) 87#define gpio_bank(x) ((x) >> 4)
88#define gpio_bank_n(x) ((x) & 0xF ? ((x) >> 4) + 1 : (x) >> 4)
88#define gpio_bit(x) (1<<((x) & 0xF)) 89#define gpio_bit(x) (1<<((x) & 0xF))
89#define gpio_sub_n(x) ((x) & 0xF) 90#define gpio_sub_n(x) ((x) & 0xF)
90 91
91#define GPIO_BANKSIZE 16 92#define GPIO_BANKSIZE 16
93#define GPIO_BANK_NUM gpio_bank_n(MAX_BLACKFIN_GPIOS)
92 94
93#define GPIO_0 0 95#define GPIO_0 0
94#define GPIO_1 1 96#define GPIO_1 1
diff --git a/arch/blackfin/kernel/bfin_gpio.c b/arch/blackfin/kernel/bfin_gpio.c
index 3e698d651f17..6939272e9ed4 100644
--- a/arch/blackfin/kernel/bfin_gpio.c
+++ b/arch/blackfin/kernel/bfin_gpio.c
@@ -120,19 +120,19 @@ enum {
120#endif 120#endif
121 121
122#if defined(BF533_FAMILY) || defined(BF538_FAMILY) 122#if defined(BF533_FAMILY) || defined(BF538_FAMILY)
123static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = { 123static struct gpio_port_t *gpio_bankb[] = {
124 (struct gpio_port_t *) FIO_FLAG_D, 124 (struct gpio_port_t *) FIO_FLAG_D,
125}; 125};
126#endif 126#endif
127 127
128#if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY) 128#if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
129static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = { 129static struct gpio_port_t *gpio_bankb[] = {
130 (struct gpio_port_t *) PORTFIO, 130 (struct gpio_port_t *) PORTFIO,
131 (struct gpio_port_t *) PORTGIO, 131 (struct gpio_port_t *) PORTGIO,
132 (struct gpio_port_t *) PORTHIO, 132 (struct gpio_port_t *) PORTHIO,
133}; 133};
134 134
135static unsigned short *port_fer[gpio_bank(MAX_BLACKFIN_GPIOS)] = { 135static unsigned short *port_fer[] = {
136 (unsigned short *) PORTF_FER, 136 (unsigned short *) PORTF_FER,
137 (unsigned short *) PORTG_FER, 137 (unsigned short *) PORTG_FER,
138 (unsigned short *) PORTH_FER, 138 (unsigned short *) PORTH_FER,
@@ -140,7 +140,7 @@ static unsigned short *port_fer[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
140#endif 140#endif
141 141
142#if defined(BF527_FAMILY) || defined(BF518_FAMILY) 142#if defined(BF527_FAMILY) || defined(BF518_FAMILY)
143static unsigned short *port_mux[gpio_bank(MAX_BLACKFIN_GPIOS)] = { 143static unsigned short *port_mux[] = {
144 (unsigned short *) PORTF_MUX, 144 (unsigned short *) PORTF_MUX,
145 (unsigned short *) PORTG_MUX, 145 (unsigned short *) PORTG_MUX,
146 (unsigned short *) PORTH_MUX, 146 (unsigned short *) PORTH_MUX,
@@ -155,7 +155,7 @@ u8 pmux_offset[][16] =
155#endif 155#endif
156 156
157#ifdef BF561_FAMILY 157#ifdef BF561_FAMILY
158static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = { 158static struct gpio_port_t *gpio_bankb[] = {
159 (struct gpio_port_t *) FIO0_FLAG_D, 159 (struct gpio_port_t *) FIO0_FLAG_D,
160 (struct gpio_port_t *) FIO1_FLAG_D, 160 (struct gpio_port_t *) FIO1_FLAG_D,
161 (struct gpio_port_t *) FIO2_FLAG_D, 161 (struct gpio_port_t *) FIO2_FLAG_D,
@@ -163,7 +163,7 @@ static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
163#endif 163#endif
164 164
165#ifdef BF548_FAMILY 165#ifdef BF548_FAMILY
166static struct gpio_port_t *gpio_array[gpio_bank(MAX_BLACKFIN_GPIOS)] = { 166static struct gpio_port_t *gpio_array[] = {
167 (struct gpio_port_t *)PORTA_FER, 167 (struct gpio_port_t *)PORTA_FER,
168 (struct gpio_port_t *)PORTB_FER, 168 (struct gpio_port_t *)PORTB_FER,
169 (struct gpio_port_t *)PORTC_FER, 169 (struct gpio_port_t *)PORTC_FER,
@@ -177,7 +177,7 @@ static struct gpio_port_t *gpio_array[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
177}; 177};
178#endif 178#endif
179 179
180static unsigned short reserved_gpio_map[gpio_bank(MAX_BLACKFIN_GPIOS)]; 180static unsigned short reserved_gpio_map[GPIO_BANK_NUM];
181static unsigned short reserved_peri_map[gpio_bank(MAX_RESOURCES)]; 181static unsigned short reserved_peri_map[gpio_bank(MAX_RESOURCES)];
182 182
183#define RESOURCE_LABEL_SIZE 16 183#define RESOURCE_LABEL_SIZE 16
@@ -188,30 +188,30 @@ static struct str_ident {
188 188
189#if defined(CONFIG_PM) 189#if defined(CONFIG_PM)
190#if defined(CONFIG_BF54x) 190#if defined(CONFIG_BF54x)
191static struct gpio_port_s gpio_bank_saved[gpio_bank(MAX_BLACKFIN_GPIOS)]; 191static struct gpio_port_s gpio_bank_saved[GPIO_BANK_NUM];
192#else 192#else
193static unsigned short wakeup_map[gpio_bank(MAX_BLACKFIN_GPIOS)]; 193static unsigned short wakeup_map[GPIO_BANK_NUM];
194static unsigned char wakeup_flags_map[MAX_BLACKFIN_GPIOS]; 194static unsigned char wakeup_flags_map[MAX_BLACKFIN_GPIOS];
195static struct gpio_port_s gpio_bank_saved[gpio_bank(MAX_BLACKFIN_GPIOS)]; 195static struct gpio_port_s gpio_bank_saved[GPIO_BANK_NUM];
196 196
197#ifdef BF533_FAMILY 197#ifdef BF533_FAMILY
198static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB}; 198static unsigned int sic_iwr_irqs[] = {IRQ_PROG_INTB};
199#endif 199#endif
200 200
201#ifdef BF537_FAMILY 201#ifdef BF537_FAMILY
202static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX}; 202static unsigned int sic_iwr_irqs[] = {IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX};
203#endif 203#endif
204 204
205#ifdef BF538_FAMILY 205#ifdef BF538_FAMILY
206static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PORTF_INTB}; 206static unsigned int sic_iwr_irqs[] = {IRQ_PORTF_INTB};
207#endif 207#endif
208 208
209#if defined(BF527_FAMILY) || defined(BF518_FAMILY) 209#if defined(BF527_FAMILY) || defined(BF518_FAMILY)
210static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB}; 210static unsigned int sic_iwr_irqs[] = {IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB};
211#endif 211#endif
212 212
213#ifdef BF561_FAMILY 213#ifdef BF561_FAMILY
214static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB}; 214static unsigned int sic_iwr_irqs[] = {IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB};
215#endif 215#endif
216#endif 216#endif
217#endif /* CONFIG_PM */ 217#endif /* CONFIG_PM */
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c
index c32fa695f8cc..5b374ff1c96e 100644
--- a/arch/blackfin/mach-common/ints-priority.c
+++ b/arch/blackfin/mach-common/ints-priority.c
@@ -377,8 +377,8 @@ static inline void bfin_set_irq_handler(unsigned irq, irq_flow_handler_t handle)
377 377
378#if !defined(CONFIG_BF54x) 378#if !defined(CONFIG_BF54x)
379 379
380static unsigned short gpio_enabled[gpio_bank(MAX_BLACKFIN_GPIOS)]; 380static unsigned short gpio_enabled[GPIO_BANK_NUM];
381static unsigned short gpio_edge_triggered[gpio_bank(MAX_BLACKFIN_GPIOS)]; 381static unsigned short gpio_edge_triggered[GPIO_BANK_NUM];
382 382
383extern void bfin_gpio_irq_prepare(unsigned gpio); 383extern void bfin_gpio_irq_prepare(unsigned gpio);
384 384
@@ -620,7 +620,7 @@ static unsigned char irq2pint_lut[NR_PINTS];
620static unsigned char pint2irq_lut[NR_PINT_SYS_IRQS * NR_PINT_BITS]; 620static unsigned char pint2irq_lut[NR_PINT_SYS_IRQS * NR_PINT_BITS];
621 621
622static unsigned int gpio_both_edge_triggered[NR_PINT_SYS_IRQS]; 622static unsigned int gpio_both_edge_triggered[NR_PINT_SYS_IRQS];
623static unsigned short gpio_enabled[gpio_bank(MAX_BLACKFIN_GPIOS)]; 623static unsigned short gpio_enabled[GPIO_BANK_NUM];
624 624
625 625
626struct pin_int_t { 626struct pin_int_t {