diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-04-30 18:21:02 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-04-30 18:21:02 -0400 |
commit | 3ed1c478eff8db80e234d5446cb378b503135888 (patch) | |
tree | e1c8e0f488ca49c49b5a31fe59add4254381dd4b /arch/blackfin | |
parent | 151173e8ce9b95bbbbd7eedb9035cfaffbdb7cb2 (diff) | |
parent | 371deb9500831ad1afbf9ea00e373f650deaed2f (diff) |
Merge tag 'pm+acpi-3.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
Pull power management and ACPI updates from Rafael J Wysocki:
- ARM big.LITTLE cpufreq driver from Viresh Kumar.
- exynos5440 cpufreq driver from Amit Daniel Kachhap.
- cpufreq core cleanup and code consolidation from Viresh Kumar and
Stratos Karafotis.
- cpufreq scalability improvement from Nathan Zimmer.
- AMD "frequency sensitivity feedback" powersave bias for the ondemand
cpufreq governor from Jacob Shin.
- cpuidle code consolidation and cleanups from Daniel Lezcano.
- ARM OMAP cpuidle fixes from Santosh Shilimkar and Daniel Lezcano.
- ACPICA fixes and other improvements from Bob Moore, Jung-uk Kim, Lv
Zheng, Yinghai Lu, Tang Chen, Colin Ian King, and Linn Crosetto.
- ACPI core updates related to hotplug from Toshi Kani, Paul Bolle,
Yasuaki Ishimatsu, and Rafael J Wysocki.
- Intel Lynxpoint LPSS (Low-Power Subsystem) support improvements from
Rafael J Wysocki and Andy Shevchenko.
* tag 'pm+acpi-3.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (192 commits)
cpufreq: Revert incorrect commit 5800043
cpufreq: MAINTAINERS: Add co-maintainer
cpuidle: add maintainer entry
ACPI / thermal: do not always return THERMAL_TREND_RAISING for active trip points
ARM: s3c64xx: cpuidle: use init/exit common routine
cpufreq: pxa2xx: initialize variables
ACPI: video: correct acpi_video_bus_add error processing
SH: cpuidle: use init/exit common routine
ARM: S5pv210: compiling issue, ARM_S5PV210_CPUFREQ needs CONFIG_CPU_FREQ_TABLE=y
ACPI: Fix wrong parameter passed to memblock_reserve
cpuidle: fix comment format
pnp: use %*phC to dump small buffers
isapnp: remove debug leftovers
ARM: imx: cpuidle: use init/exit common routine
ARM: davinci: cpuidle: use init/exit common routine
ARM: kirkwood: cpuidle: use init/exit common routine
ARM: calxeda: cpuidle: use init/exit common routine
ARM: tegra: cpuidle: use init/exit common routine for tegra3
ARM: tegra: cpuidle: use init/exit common routine for tegra2
ARM: OMAP4: cpuidle: use init/exit common routine
...
Diffstat (limited to 'arch/blackfin')
-rw-r--r-- | arch/blackfin/mach-common/Makefile | 1 | ||||
-rw-r--r-- | arch/blackfin/mach-common/cpufreq.c | 258 |
2 files changed, 0 insertions, 259 deletions
diff --git a/arch/blackfin/mach-common/Makefile b/arch/blackfin/mach-common/Makefile index 75f0ba29ebb9..675466d490d4 100644 --- a/arch/blackfin/mach-common/Makefile +++ b/arch/blackfin/mach-common/Makefile | |||
@@ -10,7 +10,6 @@ obj-$(CONFIG_PM) += pm.o | |||
10 | ifneq ($(CONFIG_BF60x),y) | 10 | ifneq ($(CONFIG_BF60x),y) |
11 | obj-$(CONFIG_PM) += dpmc_modes.o | 11 | obj-$(CONFIG_PM) += dpmc_modes.o |
12 | endif | 12 | endif |
13 | obj-$(CONFIG_CPU_FREQ) += cpufreq.o | ||
14 | obj-$(CONFIG_CPU_VOLTAGE) += dpmc.o | 13 | obj-$(CONFIG_CPU_VOLTAGE) += dpmc.o |
15 | obj-$(CONFIG_SMP) += smp.o | 14 | obj-$(CONFIG_SMP) += smp.o |
16 | obj-$(CONFIG_BFIN_KERNEL_CLOCK) += clocks-init.o | 15 | obj-$(CONFIG_BFIN_KERNEL_CLOCK) += clocks-init.o |
diff --git a/arch/blackfin/mach-common/cpufreq.c b/arch/blackfin/mach-common/cpufreq.c deleted file mode 100644 index d88bd31319e6..000000000000 --- a/arch/blackfin/mach-common/cpufreq.c +++ /dev/null | |||
@@ -1,258 +0,0 @@ | |||
1 | /* | ||
2 | * Blackfin core clock scaling | ||
3 | * | ||
4 | * Copyright 2008-2011 Analog Devices Inc. | ||
5 | * | ||
6 | * Licensed under the GPL-2 or later. | ||
7 | */ | ||
8 | |||
9 | #include <linux/kernel.h> | ||
10 | #include <linux/module.h> | ||
11 | #include <linux/types.h> | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/clk.h> | ||
14 | #include <linux/cpufreq.h> | ||
15 | #include <linux/fs.h> | ||
16 | #include <linux/delay.h> | ||
17 | #include <asm/blackfin.h> | ||
18 | #include <asm/time.h> | ||
19 | #include <asm/dpmc.h> | ||
20 | |||
21 | |||
22 | /* this is the table of CCLK frequencies, in Hz */ | ||
23 | /* .index is the entry in the auxiliary dpm_state_table[] */ | ||
24 | static struct cpufreq_frequency_table bfin_freq_table[] = { | ||
25 | { | ||
26 | .frequency = CPUFREQ_TABLE_END, | ||
27 | .index = 0, | ||
28 | }, | ||
29 | { | ||
30 | .frequency = CPUFREQ_TABLE_END, | ||
31 | .index = 1, | ||
32 | }, | ||
33 | { | ||
34 | .frequency = CPUFREQ_TABLE_END, | ||
35 | .index = 2, | ||
36 | }, | ||
37 | { | ||
38 | .frequency = CPUFREQ_TABLE_END, | ||
39 | .index = 0, | ||
40 | }, | ||
41 | }; | ||
42 | |||
43 | static struct bfin_dpm_state { | ||
44 | unsigned int csel; /* system clock divider */ | ||
45 | unsigned int tscale; /* change the divider on the core timer interrupt */ | ||
46 | } dpm_state_table[3]; | ||
47 | |||
48 | #if defined(CONFIG_CYCLES_CLOCKSOURCE) | ||
49 | /* | ||
50 | * normalized to maximum frequency offset for CYCLES, | ||
51 | * used in time-ts cycles clock source, but could be used | ||
52 | * somewhere also. | ||
53 | */ | ||
54 | unsigned long long __bfin_cycles_off; | ||
55 | unsigned int __bfin_cycles_mod; | ||
56 | #endif | ||
57 | |||
58 | /**************************************************************************/ | ||
59 | static void __init bfin_init_tables(unsigned long cclk, unsigned long sclk) | ||
60 | { | ||
61 | |||
62 | unsigned long csel, min_cclk; | ||
63 | int index; | ||
64 | |||
65 | /* Anomaly 273 seems to still exist on non-BF54x w/dcache turned on */ | ||
66 | #if ANOMALY_05000273 || ANOMALY_05000274 || \ | ||
67 | (!(defined(CONFIG_BF54x) || defined(CONFIG_BF60x)) \ | ||
68 | && defined(CONFIG_BFIN_EXTMEM_DCACHEABLE)) | ||
69 | min_cclk = sclk * 2; | ||
70 | #else | ||
71 | min_cclk = sclk; | ||
72 | #endif | ||
73 | |||
74 | #ifndef CONFIG_BF60x | ||
75 | csel = ((bfin_read_PLL_DIV() & CSEL) >> 4); | ||
76 | #else | ||
77 | csel = bfin_read32(CGU0_DIV) & 0x1F; | ||
78 | #endif | ||
79 | |||
80 | for (index = 0; (cclk >> index) >= min_cclk && csel <= 3 && index < 3; index++, csel++) { | ||
81 | bfin_freq_table[index].frequency = cclk >> index; | ||
82 | #ifndef CONFIG_BF60x | ||
83 | dpm_state_table[index].csel = csel << 4; /* Shift now into PLL_DIV bitpos */ | ||
84 | #else | ||
85 | dpm_state_table[index].csel = csel; | ||
86 | #endif | ||
87 | dpm_state_table[index].tscale = (TIME_SCALE >> index) - 1; | ||
88 | |||
89 | pr_debug("cpufreq: freq:%d csel:0x%x tscale:%d\n", | ||
90 | bfin_freq_table[index].frequency, | ||
91 | dpm_state_table[index].csel, | ||
92 | dpm_state_table[index].tscale); | ||
93 | } | ||
94 | return; | ||
95 | } | ||
96 | |||
97 | static void bfin_adjust_core_timer(void *info) | ||
98 | { | ||
99 | unsigned int tscale; | ||
100 | unsigned int index = *(unsigned int *)info; | ||
101 | |||
102 | /* we have to adjust the core timer, because it is using cclk */ | ||
103 | tscale = dpm_state_table[index].tscale; | ||
104 | bfin_write_TSCALE(tscale); | ||
105 | return; | ||
106 | } | ||
107 | |||
108 | static unsigned int bfin_getfreq_khz(unsigned int cpu) | ||
109 | { | ||
110 | /* Both CoreA/B have the same core clock */ | ||
111 | return get_cclk() / 1000; | ||
112 | } | ||
113 | |||
114 | #ifdef CONFIG_BF60x | ||
115 | unsigned long cpu_set_cclk(int cpu, unsigned long new) | ||
116 | { | ||
117 | struct clk *clk; | ||
118 | int ret; | ||
119 | |||
120 | clk = clk_get(NULL, "CCLK"); | ||
121 | if (IS_ERR(clk)) | ||
122 | return -ENODEV; | ||
123 | |||
124 | ret = clk_set_rate(clk, new); | ||
125 | clk_put(clk); | ||
126 | return ret; | ||
127 | } | ||
128 | #endif | ||
129 | |||
130 | static int bfin_target(struct cpufreq_policy *poli, | ||
131 | unsigned int target_freq, unsigned int relation) | ||
132 | { | ||
133 | #ifndef CONFIG_BF60x | ||
134 | unsigned int plldiv; | ||
135 | #endif | ||
136 | unsigned int index, cpu; | ||
137 | unsigned long cclk_hz; | ||
138 | struct cpufreq_freqs freqs; | ||
139 | static unsigned long lpj_ref; | ||
140 | static unsigned int lpj_ref_freq; | ||
141 | int ret = 0; | ||
142 | |||
143 | #if defined(CONFIG_CYCLES_CLOCKSOURCE) | ||
144 | cycles_t cycles; | ||
145 | #endif | ||
146 | |||
147 | for_each_online_cpu(cpu) { | ||
148 | struct cpufreq_policy *policy = cpufreq_cpu_get(cpu); | ||
149 | |||
150 | if (!policy) | ||
151 | continue; | ||
152 | |||
153 | if (cpufreq_frequency_table_target(policy, bfin_freq_table, | ||
154 | target_freq, relation, &index)) | ||
155 | return -EINVAL; | ||
156 | |||
157 | cclk_hz = bfin_freq_table[index].frequency; | ||
158 | |||
159 | freqs.old = bfin_getfreq_khz(0); | ||
160 | freqs.new = cclk_hz; | ||
161 | freqs.cpu = cpu; | ||
162 | |||
163 | pr_debug("cpufreq: changing cclk to %lu; target = %u, oldfreq = %u\n", | ||
164 | cclk_hz, target_freq, freqs.old); | ||
165 | |||
166 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | ||
167 | if (cpu == CPUFREQ_CPU) { | ||
168 | #ifndef CONFIG_BF60x | ||
169 | plldiv = (bfin_read_PLL_DIV() & SSEL) | | ||
170 | dpm_state_table[index].csel; | ||
171 | bfin_write_PLL_DIV(plldiv); | ||
172 | #else | ||
173 | ret = cpu_set_cclk(cpu, freqs.new * 1000); | ||
174 | if (ret != 0) { | ||
175 | WARN_ONCE(ret, "cpufreq set freq failed %d\n", ret); | ||
176 | break; | ||
177 | } | ||
178 | #endif | ||
179 | on_each_cpu(bfin_adjust_core_timer, &index, 1); | ||
180 | #if defined(CONFIG_CYCLES_CLOCKSOURCE) | ||
181 | cycles = get_cycles(); | ||
182 | SSYNC(); | ||
183 | cycles += 10; /* ~10 cycles we lose after get_cycles() */ | ||
184 | __bfin_cycles_off += | ||
185 | (cycles << __bfin_cycles_mod) - (cycles << index); | ||
186 | __bfin_cycles_mod = index; | ||
187 | #endif | ||
188 | if (!lpj_ref_freq) { | ||
189 | lpj_ref = loops_per_jiffy; | ||
190 | lpj_ref_freq = freqs.old; | ||
191 | } | ||
192 | if (freqs.new != freqs.old) { | ||
193 | loops_per_jiffy = cpufreq_scale(lpj_ref, | ||
194 | lpj_ref_freq, freqs.new); | ||
195 | } | ||
196 | } | ||
197 | /* TODO: just test case for cycles clock source, remove later */ | ||
198 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | ||
199 | } | ||
200 | |||
201 | pr_debug("cpufreq: done\n"); | ||
202 | return ret; | ||
203 | } | ||
204 | |||
205 | static int bfin_verify_speed(struct cpufreq_policy *policy) | ||
206 | { | ||
207 | return cpufreq_frequency_table_verify(policy, bfin_freq_table); | ||
208 | } | ||
209 | |||
210 | static int __bfin_cpu_init(struct cpufreq_policy *policy) | ||
211 | { | ||
212 | |||
213 | unsigned long cclk, sclk; | ||
214 | |||
215 | cclk = get_cclk() / 1000; | ||
216 | sclk = get_sclk() / 1000; | ||
217 | |||
218 | if (policy->cpu == CPUFREQ_CPU) | ||
219 | bfin_init_tables(cclk, sclk); | ||
220 | |||
221 | policy->cpuinfo.transition_latency = 50000; /* 50us assumed */ | ||
222 | |||
223 | policy->cur = cclk; | ||
224 | cpufreq_frequency_table_get_attr(bfin_freq_table, policy->cpu); | ||
225 | return cpufreq_frequency_table_cpuinfo(policy, bfin_freq_table); | ||
226 | } | ||
227 | |||
228 | static struct freq_attr *bfin_freq_attr[] = { | ||
229 | &cpufreq_freq_attr_scaling_available_freqs, | ||
230 | NULL, | ||
231 | }; | ||
232 | |||
233 | static struct cpufreq_driver bfin_driver = { | ||
234 | .verify = bfin_verify_speed, | ||
235 | .target = bfin_target, | ||
236 | .get = bfin_getfreq_khz, | ||
237 | .init = __bfin_cpu_init, | ||
238 | .name = "bfin cpufreq", | ||
239 | .owner = THIS_MODULE, | ||
240 | .attr = bfin_freq_attr, | ||
241 | }; | ||
242 | |||
243 | static int __init bfin_cpu_init(void) | ||
244 | { | ||
245 | return cpufreq_register_driver(&bfin_driver); | ||
246 | } | ||
247 | |||
248 | static void __exit bfin_cpu_exit(void) | ||
249 | { | ||
250 | cpufreq_unregister_driver(&bfin_driver); | ||
251 | } | ||
252 | |||
253 | MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); | ||
254 | MODULE_DESCRIPTION("cpufreq driver for Blackfin"); | ||
255 | MODULE_LICENSE("GPL"); | ||
256 | |||
257 | module_init(bfin_cpu_init); | ||
258 | module_exit(bfin_cpu_exit); | ||