aboutsummaryrefslogtreecommitdiffstats
path: root/arch/blackfin
diff options
context:
space:
mode:
authorMike Frysinger <vapier.adi@gmail.com>2009-01-07 10:14:39 -0500
committerBryan Wu <cooloney@kernel.org>2009-01-07 10:14:39 -0500
commit211daf9d7252288ad88ab6b97268a8d828e6b696 (patch)
treeb86f5b2aae10a1c6d91e4d2d6ef82374cb42764a /arch/blackfin
parent3e706cfcce591e50163d6e979b7fc64d91ced6a0 (diff)
Blackfin arch: rename MAX_BLACKFIN_DMA_CHANNEL to MAX_DMA_CHANNELS to match everyone else
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin')
-rw-r--r--arch/blackfin/include/asm/dma.h2
-rw-r--r--arch/blackfin/kernel/bfin_dma_5xx.c14
-rw-r--r--arch/blackfin/mach-bf518/dma.c2
-rw-r--r--arch/blackfin/mach-bf518/include/mach/dma.h2
-rw-r--r--arch/blackfin/mach-bf527/dma.c2
-rw-r--r--arch/blackfin/mach-bf527/include/mach/dma.h2
-rw-r--r--arch/blackfin/mach-bf533/dma.c2
-rw-r--r--arch/blackfin/mach-bf533/include/mach/dma.h2
-rw-r--r--arch/blackfin/mach-bf537/dma.c2
-rw-r--r--arch/blackfin/mach-bf537/include/mach/dma.h2
-rw-r--r--arch/blackfin/mach-bf538/dma.c2
-rw-r--r--arch/blackfin/mach-bf538/include/mach/dma.h2
-rw-r--r--arch/blackfin/mach-bf548/dma.c2
-rw-r--r--arch/blackfin/mach-bf548/include/mach/dma.h2
-rw-r--r--arch/blackfin/mach-bf561/dma.c2
-rw-r--r--arch/blackfin/mach-bf561/include/mach/dma.h2
-rw-r--r--arch/blackfin/mach-common/clocks-init.c2
17 files changed, 23 insertions, 23 deletions
diff --git a/arch/blackfin/include/asm/dma.h b/arch/blackfin/include/asm/dma.h
index 3aa4dd3e5fe8..7d1cfa71a9d7 100644
--- a/arch/blackfin/include/asm/dma.h
+++ b/arch/blackfin/include/asm/dma.h
@@ -201,6 +201,6 @@ void *dma_memcpy(void *dest, const void *src, size_t count);
201void *safe_dma_memcpy(void *dest, const void *src, size_t count); 201void *safe_dma_memcpy(void *dest, const void *src, size_t count);
202 202
203extern int channel2irq(unsigned int channel); 203extern int channel2irq(unsigned int channel);
204extern struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL]; 204extern struct dma_register *dma_io_base_addr[MAX_DMA_CHANNELS];
205 205
206#endif 206#endif
diff --git a/arch/blackfin/kernel/bfin_dma_5xx.c b/arch/blackfin/kernel/bfin_dma_5xx.c
index 22bce17bbb02..ad936843ecda 100644
--- a/arch/blackfin/kernel/bfin_dma_5xx.c
+++ b/arch/blackfin/kernel/bfin_dma_5xx.c
@@ -44,7 +44,7 @@
44 * Global Variables 44 * Global Variables
45***************************************************************************/ 45***************************************************************************/
46 46
47static struct dma_channel dma_ch[MAX_BLACKFIN_DMA_CHANNEL]; 47static struct dma_channel dma_ch[MAX_DMA_CHANNELS];
48 48
49/*------------------------------------------------------------------------------ 49/*------------------------------------------------------------------------------
50 * Set the Buffer Clear bit in the Configuration register of specific DMA 50 * Set the Buffer Clear bit in the Configuration register of specific DMA
@@ -63,7 +63,7 @@ static int __init blackfin_dma_init(void)
63 63
64 printk(KERN_INFO "Blackfin DMA Controller\n"); 64 printk(KERN_INFO "Blackfin DMA Controller\n");
65 65
66 for (i = 0; i < MAX_BLACKFIN_DMA_CHANNEL; i++) { 66 for (i = 0; i < MAX_DMA_CHANNELS; i++) {
67 dma_ch[i].chan_status = DMA_CHANNEL_FREE; 67 dma_ch[i].chan_status = DMA_CHANNEL_FREE;
68 dma_ch[i].regs = dma_io_base_addr[i]; 68 dma_ch[i].regs = dma_io_base_addr[i];
69 mutex_init(&(dma_ch[i].dmalock)); 69 mutex_init(&(dma_ch[i].dmalock));
@@ -87,7 +87,7 @@ static int proc_dma_show(struct seq_file *m, void *v)
87{ 87{
88 int i; 88 int i;
89 89
90 for (i = 0 ; i < MAX_BLACKFIN_DMA_CHANNEL; ++i) 90 for (i = 0 ; i < MAX_DMA_CHANNELS; ++i)
91 if (dma_ch[i].chan_status != DMA_CHANNEL_FREE) 91 if (dma_ch[i].chan_status != DMA_CHANNEL_FREE)
92 seq_printf(m, "%2d: %s\n", i, dma_ch[i].device_id); 92 seq_printf(m, "%2d: %s\n", i, dma_ch[i].device_id);
93 93
@@ -175,7 +175,7 @@ EXPORT_SYMBOL(request_dma);
175int set_dma_callback(unsigned int channel, dma_interrupt_t callback, void *data) 175int set_dma_callback(unsigned int channel, dma_interrupt_t callback, void *data)
176{ 176{
177 BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE 177 BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE
178 && channel < MAX_BLACKFIN_DMA_CHANNEL)); 178 && channel < MAX_DMA_CHANNELS));
179 179
180 if (callback != NULL) { 180 if (callback != NULL) {
181 int ret_val; 181 int ret_val;
@@ -200,7 +200,7 @@ void free_dma(unsigned int channel)
200{ 200{
201 pr_debug("freedma() : BEGIN \n"); 201 pr_debug("freedma() : BEGIN \n");
202 BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE 202 BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE
203 && channel < MAX_BLACKFIN_DMA_CHANNEL)); 203 && channel < MAX_DMA_CHANNELS));
204 204
205 /* Halt the DMA */ 205 /* Halt the DMA */
206 disable_dma(channel); 206 disable_dma(channel);
@@ -418,7 +418,7 @@ int blackfin_dma_suspend(void)
418#ifdef CONFIG_BF561 /* IMDMA channels doesn't have a PERIPHERAL_MAP */ 418#ifdef CONFIG_BF561 /* IMDMA channels doesn't have a PERIPHERAL_MAP */
419 for (i = 0; i <= CH_MEM_STREAM3_SRC; i++) { 419 for (i = 0; i <= CH_MEM_STREAM3_SRC; i++) {
420#else 420#else
421 for (i = 0; i < MAX_BLACKFIN_DMA_CHANNEL; i++) { 421 for (i = 0; i < MAX_DMA_CHANNELS; i++) {
422#endif 422#endif
423 if (dma_ch[i].chan_status == DMA_CHANNEL_ENABLED) { 423 if (dma_ch[i].chan_status == DMA_CHANNEL_ENABLED) {
424 printk(KERN_ERR "DMA Channel %d failed to suspend\n", i); 424 printk(KERN_ERR "DMA Channel %d failed to suspend\n", i);
@@ -438,7 +438,7 @@ void blackfin_dma_resume(void)
438#ifdef CONFIG_BF561 /* IMDMA channels doesn't have a PERIPHERAL_MAP */ 438#ifdef CONFIG_BF561 /* IMDMA channels doesn't have a PERIPHERAL_MAP */
439 for (i = 0; i <= CH_MEM_STREAM3_SRC; i++) 439 for (i = 0; i <= CH_MEM_STREAM3_SRC; i++)
440#else 440#else
441 for (i = 0; i < MAX_BLACKFIN_DMA_CHANNEL; i++) 441 for (i = 0; i < MAX_DMA_CHANNELS; i++)
442#endif 442#endif
443 dma_ch[i].regs->peripheral_map = dma_ch[i].saved_peripheral_map; 443 dma_ch[i].regs->peripheral_map = dma_ch[i].saved_peripheral_map;
444} 444}
diff --git a/arch/blackfin/mach-bf518/dma.c b/arch/blackfin/mach-bf518/dma.c
index 0d06ced01ced..698e88ca5104 100644
--- a/arch/blackfin/mach-bf518/dma.c
+++ b/arch/blackfin/mach-bf518/dma.c
@@ -31,7 +31,7 @@
31#include <asm/blackfin.h> 31#include <asm/blackfin.h>
32#include <asm/dma.h> 32#include <asm/dma.h>
33 33
34struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = { 34struct dma_register *dma_io_base_addr[MAX_DMA_CHANNELS] = {
35 (struct dma_register *) DMA0_NEXT_DESC_PTR, 35 (struct dma_register *) DMA0_NEXT_DESC_PTR,
36 (struct dma_register *) DMA1_NEXT_DESC_PTR, 36 (struct dma_register *) DMA1_NEXT_DESC_PTR,
37 (struct dma_register *) DMA2_NEXT_DESC_PTR, 37 (struct dma_register *) DMA2_NEXT_DESC_PTR,
diff --git a/arch/blackfin/mach-bf518/include/mach/dma.h b/arch/blackfin/mach-bf518/include/mach/dma.h
index e2a71ba907e9..f46bce087015 100644
--- a/arch/blackfin/mach-bf518/include/mach/dma.h
+++ b/arch/blackfin/mach-bf518/include/mach/dma.h
@@ -32,7 +32,7 @@
32#ifndef _MACH_DMA_H_ 32#ifndef _MACH_DMA_H_
33#define _MACH_DMA_H_ 33#define _MACH_DMA_H_
34 34
35#define MAX_BLACKFIN_DMA_CHANNEL 16 35#define MAX_DMA_CHANNELS 16
36 36
37#define CH_PPI 0 /* PPI receive/transmit */ 37#define CH_PPI 0 /* PPI receive/transmit */
38#define CH_EMAC_RX 1 /* Ethernet MAC receive */ 38#define CH_EMAC_RX 1 /* Ethernet MAC receive */
diff --git a/arch/blackfin/mach-bf527/dma.c b/arch/blackfin/mach-bf527/dma.c
index dfd080cda787..231877578243 100644
--- a/arch/blackfin/mach-bf527/dma.c
+++ b/arch/blackfin/mach-bf527/dma.c
@@ -31,7 +31,7 @@
31#include <asm/blackfin.h> 31#include <asm/blackfin.h>
32#include <asm/dma.h> 32#include <asm/dma.h>
33 33
34struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = { 34struct dma_register *dma_io_base_addr[MAX_DMA_CHANNELS] = {
35 (struct dma_register *) DMA0_NEXT_DESC_PTR, 35 (struct dma_register *) DMA0_NEXT_DESC_PTR,
36 (struct dma_register *) DMA1_NEXT_DESC_PTR, 36 (struct dma_register *) DMA1_NEXT_DESC_PTR,
37 (struct dma_register *) DMA2_NEXT_DESC_PTR, 37 (struct dma_register *) DMA2_NEXT_DESC_PTR,
diff --git a/arch/blackfin/mach-bf527/include/mach/dma.h b/arch/blackfin/mach-bf527/include/mach/dma.h
index 49dd693223e8..ab9b274312a5 100644
--- a/arch/blackfin/mach-bf527/include/mach/dma.h
+++ b/arch/blackfin/mach-bf527/include/mach/dma.h
@@ -32,7 +32,7 @@
32#ifndef _MACH_DMA_H_ 32#ifndef _MACH_DMA_H_
33#define _MACH_DMA_H_ 33#define _MACH_DMA_H_
34 34
35#define MAX_BLACKFIN_DMA_CHANNEL 16 35#define MAX_DMA_CHANNELS 16
36 36
37#define CH_PPI 0 /* PPI receive/transmit or NFC */ 37#define CH_PPI 0 /* PPI receive/transmit or NFC */
38#define CH_EMAC_RX 1 /* Ethernet MAC receive or HOSTDP */ 38#define CH_EMAC_RX 1 /* Ethernet MAC receive or HOSTDP */
diff --git a/arch/blackfin/mach-bf533/dma.c b/arch/blackfin/mach-bf533/dma.c
index 28655c1cb7dc..0a6eb8f24d98 100644
--- a/arch/blackfin/mach-bf533/dma.c
+++ b/arch/blackfin/mach-bf533/dma.c
@@ -31,7 +31,7 @@
31#include <asm/blackfin.h> 31#include <asm/blackfin.h>
32#include <asm/dma.h> 32#include <asm/dma.h>
33 33
34struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = { 34struct dma_register *dma_io_base_addr[MAX_DMA_CHANNELS] = {
35 (struct dma_register *) DMA0_NEXT_DESC_PTR, 35 (struct dma_register *) DMA0_NEXT_DESC_PTR,
36 (struct dma_register *) DMA1_NEXT_DESC_PTR, 36 (struct dma_register *) DMA1_NEXT_DESC_PTR,
37 (struct dma_register *) DMA2_NEXT_DESC_PTR, 37 (struct dma_register *) DMA2_NEXT_DESC_PTR,
diff --git a/arch/blackfin/mach-bf533/include/mach/dma.h b/arch/blackfin/mach-bf533/include/mach/dma.h
index bd9d5e94307d..4ff787e3559d 100644
--- a/arch/blackfin/mach-bf533/include/mach/dma.h
+++ b/arch/blackfin/mach-bf533/include/mach/dma.h
@@ -36,7 +36,7 @@
36#ifndef _MACH_DMA_H_ 36#ifndef _MACH_DMA_H_
37#define _MACH_DMA_H_ 37#define _MACH_DMA_H_
38 38
39#define MAX_BLACKFIN_DMA_CHANNEL 12 39#define MAX_DMA_CHANNELS 12
40 40
41#define CH_PPI 0 41#define CH_PPI 0
42#define CH_SPORT0_RX 1 42#define CH_SPORT0_RX 1
diff --git a/arch/blackfin/mach-bf537/dma.c b/arch/blackfin/mach-bf537/dma.c
index 4edb363ff99c..81185051de91 100644
--- a/arch/blackfin/mach-bf537/dma.c
+++ b/arch/blackfin/mach-bf537/dma.c
@@ -31,7 +31,7 @@
31#include <asm/blackfin.h> 31#include <asm/blackfin.h>
32#include <asm/dma.h> 32#include <asm/dma.h>
33 33
34struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = { 34struct dma_register *dma_io_base_addr[MAX_DMA_CHANNELS] = {
35 (struct dma_register *) DMA0_NEXT_DESC_PTR, 35 (struct dma_register *) DMA0_NEXT_DESC_PTR,
36 (struct dma_register *) DMA1_NEXT_DESC_PTR, 36 (struct dma_register *) DMA1_NEXT_DESC_PTR,
37 (struct dma_register *) DMA2_NEXT_DESC_PTR, 37 (struct dma_register *) DMA2_NEXT_DESC_PTR,
diff --git a/arch/blackfin/mach-bf537/include/mach/dma.h b/arch/blackfin/mach-bf537/include/mach/dma.h
index 7a964040870a..4be361a7ff08 100644
--- a/arch/blackfin/mach-bf537/include/mach/dma.h
+++ b/arch/blackfin/mach-bf537/include/mach/dma.h
@@ -32,7 +32,7 @@
32#ifndef _MACH_DMA_H_ 32#ifndef _MACH_DMA_H_
33#define _MACH_DMA_H_ 33#define _MACH_DMA_H_
34 34
35#define MAX_BLACKFIN_DMA_CHANNEL 16 35#define MAX_DMA_CHANNELS 16
36 36
37#define CH_PPI 0 37#define CH_PPI 0
38#define CH_EMAC_RX 1 38#define CH_EMAC_RX 1
diff --git a/arch/blackfin/mach-bf538/dma.c b/arch/blackfin/mach-bf538/dma.c
index 359fdaa12b8f..d6837fbf94ea 100644
--- a/arch/blackfin/mach-bf538/dma.c
+++ b/arch/blackfin/mach-bf538/dma.c
@@ -31,7 +31,7 @@
31#include <asm/blackfin.h> 31#include <asm/blackfin.h>
32#include <asm/dma.h> 32#include <asm/dma.h>
33 33
34struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = { 34struct dma_register *dma_io_base_addr[MAX_DMA_CHANNELS] = {
35 (struct dma_register *) DMA0_NEXT_DESC_PTR, 35 (struct dma_register *) DMA0_NEXT_DESC_PTR,
36 (struct dma_register *) DMA1_NEXT_DESC_PTR, 36 (struct dma_register *) DMA1_NEXT_DESC_PTR,
37 (struct dma_register *) DMA2_NEXT_DESC_PTR, 37 (struct dma_register *) DMA2_NEXT_DESC_PTR,
diff --git a/arch/blackfin/mach-bf538/include/mach/dma.h b/arch/blackfin/mach-bf538/include/mach/dma.h
index c2210a996e68..a52ec3a17b05 100644
--- a/arch/blackfin/mach-bf538/include/mach/dma.h
+++ b/arch/blackfin/mach-bf538/include/mach/dma.h
@@ -60,6 +60,6 @@
60#define CH_MEM_STREAM3_DEST 26 60#define CH_MEM_STREAM3_DEST 26
61#define CH_MEM_STREAM3_SRC 27 61#define CH_MEM_STREAM3_SRC 27
62 62
63#define MAX_BLACKFIN_DMA_CHANNEL 28 63#define MAX_DMA_CHANNELS 28
64 64
65#endif 65#endif
diff --git a/arch/blackfin/mach-bf548/dma.c b/arch/blackfin/mach-bf548/dma.c
index 74730eb8ae1b..535980652bf6 100644
--- a/arch/blackfin/mach-bf548/dma.c
+++ b/arch/blackfin/mach-bf548/dma.c
@@ -32,7 +32,7 @@
32#include <asm/blackfin.h> 32#include <asm/blackfin.h>
33#include <asm/dma.h> 33#include <asm/dma.h>
34 34
35struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = { 35struct dma_register *dma_io_base_addr[MAX_DMA_CHANNELS] = {
36 (struct dma_register *) DMA0_NEXT_DESC_PTR, 36 (struct dma_register *) DMA0_NEXT_DESC_PTR,
37 (struct dma_register *) DMA1_NEXT_DESC_PTR, 37 (struct dma_register *) DMA1_NEXT_DESC_PTR,
38 (struct dma_register *) DMA2_NEXT_DESC_PTR, 38 (struct dma_register *) DMA2_NEXT_DESC_PTR,
diff --git a/arch/blackfin/mach-bf548/include/mach/dma.h b/arch/blackfin/mach-bf548/include/mach/dma.h
index 36a2ef7e7849..796c205d8177 100644
--- a/arch/blackfin/mach-bf548/include/mach/dma.h
+++ b/arch/blackfin/mach-bf548/include/mach/dma.h
@@ -71,6 +71,6 @@
71#define CH_MEM_STREAM3_DEST 30 71#define CH_MEM_STREAM3_DEST 30
72#define CH_MEM_STREAM3_SRC 31 72#define CH_MEM_STREAM3_SRC 31
73 73
74#define MAX_BLACKFIN_DMA_CHANNEL 32 74#define MAX_DMA_CHANNELS 32
75 75
76#endif 76#endif
diff --git a/arch/blackfin/mach-bf561/dma.c b/arch/blackfin/mach-bf561/dma.c
index 24415eb82698..42b0037afe61 100644
--- a/arch/blackfin/mach-bf561/dma.c
+++ b/arch/blackfin/mach-bf561/dma.c
@@ -31,7 +31,7 @@
31#include <asm/blackfin.h> 31#include <asm/blackfin.h>
32#include <asm/dma.h> 32#include <asm/dma.h>
33 33
34struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = { 34struct dma_register *dma_io_base_addr[MAX_DMA_CHANNELS] = {
35 (struct dma_register *) DMA1_0_NEXT_DESC_PTR, 35 (struct dma_register *) DMA1_0_NEXT_DESC_PTR,
36 (struct dma_register *) DMA1_1_NEXT_DESC_PTR, 36 (struct dma_register *) DMA1_1_NEXT_DESC_PTR,
37 (struct dma_register *) DMA1_2_NEXT_DESC_PTR, 37 (struct dma_register *) DMA1_2_NEXT_DESC_PTR,
diff --git a/arch/blackfin/mach-bf561/include/mach/dma.h b/arch/blackfin/mach-bf561/include/mach/dma.h
index 8bc46cd89a02..38ce66ae6c30 100644
--- a/arch/blackfin/mach-bf561/include/mach/dma.h
+++ b/arch/blackfin/mach-bf561/include/mach/dma.h
@@ -7,7 +7,7 @@
7#ifndef _MACH_DMA_H_ 7#ifndef _MACH_DMA_H_
8#define _MACH_DMA_H_ 8#define _MACH_DMA_H_
9 9
10#define MAX_BLACKFIN_DMA_CHANNEL 36 10#define MAX_DMA_CHANNELS 36
11 11
12#define CH_PPI0 0 12#define CH_PPI0 0
13#define CH_PPI (CH_PPI0) 13#define CH_PPI (CH_PPI0)
diff --git a/arch/blackfin/mach-common/clocks-init.c b/arch/blackfin/mach-common/clocks-init.c
index 39a94b3a2ed7..5d182abefc7b 100644
--- a/arch/blackfin/mach-common/clocks-init.c
+++ b/arch/blackfin/mach-common/clocks-init.c
@@ -32,7 +32,7 @@ void init_clocks(void)
32 * For example, any automatic DMAs left by U-Boot for splash screens. 32 * For example, any automatic DMAs left by U-Boot for splash screens.
33 */ 33 */
34 size_t i; 34 size_t i;
35 for (i = 0; i < MAX_BLACKFIN_DMA_CHANNEL; ++i) { 35 for (i = 0; i < MAX_DMA_CHANNELS; ++i) {
36 struct dma_register *dma = dma_io_base_addr[i]; 36 struct dma_register *dma = dma_io_base_addr[i];
37 dma->cfg = 0; 37 dma->cfg = 0;
38 } 38 }