diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-10-16 15:45:08 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-10-16 15:45:08 -0400 |
commit | 1b821bfb034c5db5af62b463e3001243905179ba (patch) | |
tree | a5c1090f41716a6912742c9bc960dc2d3ae82899 /arch/blackfin | |
parent | a45fbc33137b11e479ea8b7d478a1d7e6488971b (diff) | |
parent | 1390da4ee75168b6e4d8354e93e3b5f0a0291f2f (diff) |
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6:
Blackfin arch: make sure cycles is marked as volatile so gcc doesnt reorder on us
Blackfin arch: disable CONFIG_HW_RANDOM and CONFIG_DAB in defconfig files
Blackfin arch: update cache flush prototypes with argument names to make them less mysterious
Blackfin arch: move bfin_addr_dcachable() and friends into the cacheflush header where it belongs
Blackfin arch: use the new bfin_addr_dcachable() function
Blackfin arch: fix bug - build kernel failed at head.S when reprogram clock on all platforms
Blackfin arch: unify/cleanup cache code
Blackfin arch: update AD7879 platform resources in board file
Blackfin arch: Zero out bss region in L1/L2 memory.
Blackfin arch: add read/write IO accessor functions to Blackfin
Blackfin arch: fix bug - some serial header files set RTS to an input when they should all be outputs
Diffstat (limited to 'arch/blackfin')
29 files changed, 210 insertions, 174 deletions
diff --git a/arch/blackfin/configs/BF526-EZBRD_defconfig b/arch/blackfin/configs/BF526-EZBRD_defconfig index c33bf6f83813..4443a47e516f 100644 --- a/arch/blackfin/configs/BF526-EZBRD_defconfig +++ b/arch/blackfin/configs/BF526-EZBRD_defconfig | |||
@@ -748,7 +748,7 @@ CONFIG_BFIN_OTP=y | |||
748 | # | 748 | # |
749 | # CONFIG_CAN4LINUX is not set | 749 | # CONFIG_CAN4LINUX is not set |
750 | # CONFIG_IPMI_HANDLER is not set | 750 | # CONFIG_IPMI_HANDLER is not set |
751 | CONFIG_HW_RANDOM=y | 751 | # CONFIG_HW_RANDOM is not set |
752 | # CONFIG_R3964 is not set | 752 | # CONFIG_R3964 is not set |
753 | # CONFIG_RAW_DRIVER is not set | 753 | # CONFIG_RAW_DRIVER is not set |
754 | # CONFIG_TCG_TPM is not set | 754 | # CONFIG_TCG_TPM is not set |
diff --git a/arch/blackfin/configs/BF527-EZKIT_defconfig b/arch/blackfin/configs/BF527-EZKIT_defconfig index 66854a83c0de..4a2a660a6b35 100644 --- a/arch/blackfin/configs/BF527-EZKIT_defconfig +++ b/arch/blackfin/configs/BF527-EZKIT_defconfig | |||
@@ -772,7 +772,7 @@ CONFIG_UNIX98_PTYS=y | |||
772 | # | 772 | # |
773 | # CONFIG_CAN4LINUX is not set | 773 | # CONFIG_CAN4LINUX is not set |
774 | # CONFIG_IPMI_HANDLER is not set | 774 | # CONFIG_IPMI_HANDLER is not set |
775 | CONFIG_HW_RANDOM=y | 775 | # CONFIG_HW_RANDOM is not set |
776 | # CONFIG_GEN_RTC is not set | 776 | # CONFIG_GEN_RTC is not set |
777 | # CONFIG_R3964 is not set | 777 | # CONFIG_R3964 is not set |
778 | # CONFIG_RAW_DRIVER is not set | 778 | # CONFIG_RAW_DRIVER is not set |
diff --git a/arch/blackfin/configs/BF533-EZKIT_defconfig b/arch/blackfin/configs/BF533-EZKIT_defconfig index 6bc11db12690..deeb5e45effb 100644 --- a/arch/blackfin/configs/BF533-EZKIT_defconfig +++ b/arch/blackfin/configs/BF533-EZKIT_defconfig | |||
@@ -674,7 +674,7 @@ CONFIG_UNIX98_PTYS=y | |||
674 | # | 674 | # |
675 | # CONFIG_CAN4LINUX is not set | 675 | # CONFIG_CAN4LINUX is not set |
676 | # CONFIG_IPMI_HANDLER is not set | 676 | # CONFIG_IPMI_HANDLER is not set |
677 | CONFIG_HW_RANDOM=y | 677 | # CONFIG_HW_RANDOM is not set |
678 | # CONFIG_GEN_RTC is not set | 678 | # CONFIG_GEN_RTC is not set |
679 | # CONFIG_R3964 is not set | 679 | # CONFIG_R3964 is not set |
680 | # CONFIG_RAW_DRIVER is not set | 680 | # CONFIG_RAW_DRIVER is not set |
@@ -740,7 +740,7 @@ CONFIG_SSB_POSSIBLE=y | |||
740 | # | 740 | # |
741 | # CONFIG_VIDEO_DEV is not set | 741 | # CONFIG_VIDEO_DEV is not set |
742 | # CONFIG_DVB_CORE is not set | 742 | # CONFIG_DVB_CORE is not set |
743 | CONFIG_DAB=y | 743 | # CONFIG_DAB is not set |
744 | 744 | ||
745 | # | 745 | # |
746 | # Graphics support | 746 | # Graphics support |
diff --git a/arch/blackfin/configs/BF533-STAMP_defconfig b/arch/blackfin/configs/BF533-STAMP_defconfig index d77d991a1f61..c23267ed880b 100644 --- a/arch/blackfin/configs/BF533-STAMP_defconfig +++ b/arch/blackfin/configs/BF533-STAMP_defconfig | |||
@@ -681,7 +681,7 @@ CONFIG_UNIX98_PTYS=y | |||
681 | # | 681 | # |
682 | # CONFIG_CAN4LINUX is not set | 682 | # CONFIG_CAN4LINUX is not set |
683 | # CONFIG_IPMI_HANDLER is not set | 683 | # CONFIG_IPMI_HANDLER is not set |
684 | CONFIG_HW_RANDOM=y | 684 | # CONFIG_HW_RANDOM is not set |
685 | # CONFIG_GEN_RTC is not set | 685 | # CONFIG_GEN_RTC is not set |
686 | # CONFIG_R3964 is not set | 686 | # CONFIG_R3964 is not set |
687 | # CONFIG_RAW_DRIVER is not set | 687 | # CONFIG_RAW_DRIVER is not set |
diff --git a/arch/blackfin/configs/BF537-STAMP_defconfig b/arch/blackfin/configs/BF537-STAMP_defconfig index 5fd7c4b143df..63a0f854745c 100644 --- a/arch/blackfin/configs/BF537-STAMP_defconfig +++ b/arch/blackfin/configs/BF537-STAMP_defconfig | |||
@@ -731,7 +731,7 @@ CONFIG_CAN4LINUX=y | |||
731 | # CONFIG_CAN_UNCTWINCAN is not set | 731 | # CONFIG_CAN_UNCTWINCAN is not set |
732 | CONFIG_CAN_BLACKFIN=m | 732 | CONFIG_CAN_BLACKFIN=m |
733 | # CONFIG_IPMI_HANDLER is not set | 733 | # CONFIG_IPMI_HANDLER is not set |
734 | CONFIG_HW_RANDOM=y | 734 | # CONFIG_HW_RANDOM is not set |
735 | # CONFIG_GEN_RTC is not set | 735 | # CONFIG_GEN_RTC is not set |
736 | # CONFIG_R3964 is not set | 736 | # CONFIG_R3964 is not set |
737 | # CONFIG_RAW_DRIVER is not set | 737 | # CONFIG_RAW_DRIVER is not set |
@@ -871,7 +871,7 @@ CONFIG_SSB_POSSIBLE=y | |||
871 | # | 871 | # |
872 | # CONFIG_VIDEO_DEV is not set | 872 | # CONFIG_VIDEO_DEV is not set |
873 | # CONFIG_DVB_CORE is not set | 873 | # CONFIG_DVB_CORE is not set |
874 | CONFIG_DAB=y | 874 | # CONFIG_DAB is not set |
875 | 875 | ||
876 | # | 876 | # |
877 | # Graphics support | 877 | # Graphics support |
diff --git a/arch/blackfin/configs/BF548-EZKIT_defconfig b/arch/blackfin/configs/BF548-EZKIT_defconfig index 390669e8668e..bf63660815b9 100644 --- a/arch/blackfin/configs/BF548-EZKIT_defconfig +++ b/arch/blackfin/configs/BF548-EZKIT_defconfig | |||
@@ -855,7 +855,7 @@ CONFIG_UNIX98_PTYS=y | |||
855 | # | 855 | # |
856 | # CONFIG_CAN4LINUX is not set | 856 | # CONFIG_CAN4LINUX is not set |
857 | # CONFIG_IPMI_HANDLER is not set | 857 | # CONFIG_IPMI_HANDLER is not set |
858 | CONFIG_HW_RANDOM=y | 858 | # CONFIG_HW_RANDOM is not set |
859 | # CONFIG_GEN_RTC is not set | 859 | # CONFIG_GEN_RTC is not set |
860 | # CONFIG_R3964 is not set | 860 | # CONFIG_R3964 is not set |
861 | # CONFIG_RAW_DRIVER is not set | 861 | # CONFIG_RAW_DRIVER is not set |
@@ -1001,7 +1001,7 @@ CONFIG_SSB_POSSIBLE=y | |||
1001 | # | 1001 | # |
1002 | # CONFIG_VIDEO_DEV is not set | 1002 | # CONFIG_VIDEO_DEV is not set |
1003 | # CONFIG_DVB_CORE is not set | 1003 | # CONFIG_DVB_CORE is not set |
1004 | CONFIG_DAB=y | 1004 | # CONFIG_DAB is not set |
1005 | # CONFIG_USB_DABUSB is not set | 1005 | # CONFIG_USB_DABUSB is not set |
1006 | 1006 | ||
1007 | # | 1007 | # |
diff --git a/arch/blackfin/configs/BF561-EZKIT_defconfig b/arch/blackfin/configs/BF561-EZKIT_defconfig index 976a4d7ba175..3c70d6230a12 100644 --- a/arch/blackfin/configs/BF561-EZKIT_defconfig +++ b/arch/blackfin/configs/BF561-EZKIT_defconfig | |||
@@ -719,7 +719,7 @@ CONFIG_UNIX98_PTYS=y | |||
719 | # | 719 | # |
720 | # CONFIG_CAN4LINUX is not set | 720 | # CONFIG_CAN4LINUX is not set |
721 | # CONFIG_IPMI_HANDLER is not set | 721 | # CONFIG_IPMI_HANDLER is not set |
722 | CONFIG_HW_RANDOM=y | 722 | # CONFIG_HW_RANDOM is not set |
723 | # CONFIG_GEN_RTC is not set | 723 | # CONFIG_GEN_RTC is not set |
724 | # CONFIG_R3964 is not set | 724 | # CONFIG_R3964 is not set |
725 | # CONFIG_RAW_DRIVER is not set | 725 | # CONFIG_RAW_DRIVER is not set |
@@ -785,7 +785,7 @@ CONFIG_SSB_POSSIBLE=y | |||
785 | # | 785 | # |
786 | # CONFIG_VIDEO_DEV is not set | 786 | # CONFIG_VIDEO_DEV is not set |
787 | # CONFIG_DVB_CORE is not set | 787 | # CONFIG_DVB_CORE is not set |
788 | CONFIG_DAB=y | 788 | # CONFIG_DAB is not set |
789 | 789 | ||
790 | # | 790 | # |
791 | # Graphics support | 791 | # Graphics support |
diff --git a/arch/blackfin/configs/CM-BF527_defconfig b/arch/blackfin/configs/CM-BF527_defconfig index 0799aa9bba9d..b6a14635fb91 100644 --- a/arch/blackfin/configs/CM-BF527_defconfig +++ b/arch/blackfin/configs/CM-BF527_defconfig | |||
@@ -679,7 +679,7 @@ CONFIG_UNIX98_PTYS=y | |||
679 | # | 679 | # |
680 | # CONFIG_CAN4LINUX is not set | 680 | # CONFIG_CAN4LINUX is not set |
681 | # CONFIG_IPMI_HANDLER is not set | 681 | # CONFIG_IPMI_HANDLER is not set |
682 | CONFIG_HW_RANDOM=y | 682 | # CONFIG_HW_RANDOM is not set |
683 | # CONFIG_GEN_RTC is not set | 683 | # CONFIG_GEN_RTC is not set |
684 | # CONFIG_R3964 is not set | 684 | # CONFIG_R3964 is not set |
685 | # CONFIG_RAW_DRIVER is not set | 685 | # CONFIG_RAW_DRIVER is not set |
diff --git a/arch/blackfin/configs/CM-BF533_defconfig b/arch/blackfin/configs/CM-BF533_defconfig index 09deea44480b..c3ba9066b935 100644 --- a/arch/blackfin/configs/CM-BF533_defconfig +++ b/arch/blackfin/configs/CM-BF533_defconfig | |||
@@ -672,7 +672,7 @@ CONFIG_HWMON=y | |||
672 | # | 672 | # |
673 | # CONFIG_VIDEO_DEV is not set | 673 | # CONFIG_VIDEO_DEV is not set |
674 | # CONFIG_DVB_CORE is not set | 674 | # CONFIG_DVB_CORE is not set |
675 | CONFIG_DAB=y | 675 | # CONFIG_DAB is not set |
676 | 676 | ||
677 | # | 677 | # |
678 | # Graphics support | 678 | # Graphics support |
diff --git a/arch/blackfin/configs/CM-BF537E_defconfig b/arch/blackfin/configs/CM-BF537E_defconfig index 219fc345a5f5..cdc6b7feb59e 100644 --- a/arch/blackfin/configs/CM-BF537E_defconfig +++ b/arch/blackfin/configs/CM-BF537E_defconfig | |||
@@ -703,7 +703,7 @@ CONFIG_HWMON=y | |||
703 | # | 703 | # |
704 | # CONFIG_VIDEO_DEV is not set | 704 | # CONFIG_VIDEO_DEV is not set |
705 | # CONFIG_DVB_CORE is not set | 705 | # CONFIG_DVB_CORE is not set |
706 | CONFIG_DAB=y | 706 | # CONFIG_DAB is not set |
707 | 707 | ||
708 | # | 708 | # |
709 | # Graphics support | 709 | # Graphics support |
diff --git a/arch/blackfin/configs/CM-BF537U_defconfig b/arch/blackfin/configs/CM-BF537U_defconfig index 9873d586fc77..f074bdcd1ce5 100644 --- a/arch/blackfin/configs/CM-BF537U_defconfig +++ b/arch/blackfin/configs/CM-BF537U_defconfig | |||
@@ -683,7 +683,7 @@ CONFIG_HWMON=y | |||
683 | # | 683 | # |
684 | # CONFIG_VIDEO_DEV is not set | 684 | # CONFIG_VIDEO_DEV is not set |
685 | # CONFIG_DVB_CORE is not set | 685 | # CONFIG_DVB_CORE is not set |
686 | CONFIG_DAB=y | 686 | # CONFIG_DAB is not set |
687 | 687 | ||
688 | # | 688 | # |
689 | # Graphics support | 689 | # Graphics support |
diff --git a/arch/blackfin/configs/CM-BF548_defconfig b/arch/blackfin/configs/CM-BF548_defconfig index 0e3605fdb7b0..5c44fdb8e6e3 100644 --- a/arch/blackfin/configs/CM-BF548_defconfig +++ b/arch/blackfin/configs/CM-BF548_defconfig | |||
@@ -762,7 +762,7 @@ CONFIG_UNIX98_PTYS=y | |||
762 | # | 762 | # |
763 | # CONFIG_CAN4LINUX is not set | 763 | # CONFIG_CAN4LINUX is not set |
764 | # CONFIG_IPMI_HANDLER is not set | 764 | # CONFIG_IPMI_HANDLER is not set |
765 | CONFIG_HW_RANDOM=y | 765 | # CONFIG_HW_RANDOM is not set |
766 | # CONFIG_GEN_RTC is not set | 766 | # CONFIG_GEN_RTC is not set |
767 | # CONFIG_R3964 is not set | 767 | # CONFIG_R3964 is not set |
768 | # CONFIG_RAW_DRIVER is not set | 768 | # CONFIG_RAW_DRIVER is not set |
@@ -909,7 +909,7 @@ CONFIG_SSB_POSSIBLE=y | |||
909 | # | 909 | # |
910 | # CONFIG_VIDEO_DEV is not set | 910 | # CONFIG_VIDEO_DEV is not set |
911 | # CONFIG_DVB_CORE is not set | 911 | # CONFIG_DVB_CORE is not set |
912 | CONFIG_DAB=y | 912 | # CONFIG_DAB is not set |
913 | # CONFIG_USB_DABUSB is not set | 913 | # CONFIG_USB_DABUSB is not set |
914 | 914 | ||
915 | # | 915 | # |
diff --git a/arch/blackfin/configs/CM-BF561_defconfig b/arch/blackfin/configs/CM-BF561_defconfig index 59c7cdbee904..086fe5dda495 100644 --- a/arch/blackfin/configs/CM-BF561_defconfig +++ b/arch/blackfin/configs/CM-BF561_defconfig | |||
@@ -684,7 +684,7 @@ CONFIG_SSB_POSSIBLE=y | |||
684 | # | 684 | # |
685 | # CONFIG_VIDEO_DEV is not set | 685 | # CONFIG_VIDEO_DEV is not set |
686 | # CONFIG_DVB_CORE is not set | 686 | # CONFIG_DVB_CORE is not set |
687 | CONFIG_DAB=y | 687 | # CONFIG_DAB is not set |
688 | 688 | ||
689 | # | 689 | # |
690 | # Graphics support | 690 | # Graphics support |
diff --git a/arch/blackfin/include/asm/cacheflush.h b/arch/blackfin/include/asm/cacheflush.h index 5ef9e35e9c3b..4403415583fa 100644 --- a/arch/blackfin/include/asm/cacheflush.h +++ b/arch/blackfin/include/asm/cacheflush.h | |||
@@ -30,11 +30,11 @@ | |||
30 | #ifndef _BLACKFIN_CACHEFLUSH_H | 30 | #ifndef _BLACKFIN_CACHEFLUSH_H |
31 | #define _BLACKFIN_CACHEFLUSH_H | 31 | #define _BLACKFIN_CACHEFLUSH_H |
32 | 32 | ||
33 | extern void blackfin_icache_dcache_flush_range(unsigned int, unsigned int); | 33 | extern void blackfin_icache_dcache_flush_range(unsigned long start_address, unsigned long end_address); |
34 | extern void blackfin_icache_flush_range(unsigned int, unsigned int); | 34 | extern void blackfin_icache_flush_range(unsigned long start_address, unsigned long end_address); |
35 | extern void blackfin_dcache_flush_range(unsigned int, unsigned int); | 35 | extern void blackfin_dcache_flush_range(unsigned long start_address, unsigned long end_address); |
36 | extern void blackfin_dcache_invalidate_range(unsigned int, unsigned int); | 36 | extern void blackfin_dcache_invalidate_range(unsigned long start_address, unsigned long end_address); |
37 | extern void blackfin_dflush_page(void *); | 37 | extern void blackfin_dflush_page(void *page); |
38 | 38 | ||
39 | #define flush_dcache_mmap_lock(mapping) do { } while (0) | 39 | #define flush_dcache_mmap_lock(mapping) do { } while (0) |
40 | #define flush_dcache_mmap_unlock(mapping) do { } while (0) | 40 | #define flush_dcache_mmap_unlock(mapping) do { } while (0) |
@@ -85,4 +85,21 @@ do { memcpy(dst, src, len); \ | |||
85 | # define flush_dcache_page(page) do { } while (0) | 85 | # define flush_dcache_page(page) do { } while (0) |
86 | #endif | 86 | #endif |
87 | 87 | ||
88 | extern unsigned long reserved_mem_dcache_on; | ||
89 | extern unsigned long reserved_mem_icache_on; | ||
90 | |||
91 | static inline int bfin_addr_dcachable(unsigned long addr) | ||
92 | { | ||
93 | #ifdef CONFIG_BFIN_DCACHE | ||
94 | if (addr < (_ramend - DMA_UNCACHED_REGION)) | ||
95 | return 1; | ||
96 | #endif | ||
97 | |||
98 | if (reserved_mem_dcache_on && | ||
99 | addr >= _ramend && addr < physical_mem_end) | ||
100 | return 1; | ||
101 | |||
102 | return 0; | ||
103 | } | ||
104 | |||
88 | #endif /* _BLACKFIN_ICACHEFLUSH_H */ | 105 | #endif /* _BLACKFIN_ICACHEFLUSH_H */ |
diff --git a/arch/blackfin/include/asm/cplbinit.h b/arch/blackfin/include/asm/cplbinit.h index d179b747ff03..f845b41147ba 100644 --- a/arch/blackfin/include/asm/cplbinit.h +++ b/arch/blackfin/include/asm/cplbinit.h | |||
@@ -87,23 +87,6 @@ extern u_long dpdt_swapcount_table[]; | |||
87 | 87 | ||
88 | #endif /* CONFIG_MPU */ | 88 | #endif /* CONFIG_MPU */ |
89 | 89 | ||
90 | extern unsigned long reserved_mem_dcache_on; | ||
91 | extern unsigned long reserved_mem_icache_on; | ||
92 | |||
93 | extern void generate_cplb_tables(void); | 90 | extern void generate_cplb_tables(void); |
94 | 91 | ||
95 | static inline int bfin_addr_dcachable(unsigned long addr) | ||
96 | { | ||
97 | #ifdef CONFIG_BFIN_DCACHE | ||
98 | if (addr < (_ramend - DMA_UNCACHED_REGION)) | ||
99 | return 1; | ||
100 | #endif | ||
101 | |||
102 | if (reserved_mem_dcache_on && | ||
103 | addr >= _ramend && addr < physical_mem_end) | ||
104 | return 1; | ||
105 | |||
106 | return 0; | ||
107 | } | ||
108 | |||
109 | #endif | 92 | #endif |
diff --git a/arch/blackfin/include/asm/io.h b/arch/blackfin/include/asm/io.h index cbbf7ffdbbff..7dc77a21fdf3 100644 --- a/arch/blackfin/include/asm/io.h +++ b/arch/blackfin/include/asm/io.h | |||
@@ -134,6 +134,36 @@ extern void dma_insb(unsigned long port, void *addr, unsigned short count); | |||
134 | extern void dma_insw(unsigned long port, void *addr, unsigned short count); | 134 | extern void dma_insw(unsigned long port, void *addr, unsigned short count); |
135 | extern void dma_insl(unsigned long port, void *addr, unsigned short count); | 135 | extern void dma_insl(unsigned long port, void *addr, unsigned short count); |
136 | 136 | ||
137 | static inline void readsl(const void __iomem *addr, void *buf, int len) | ||
138 | { | ||
139 | insl((unsigned long)addr, buf, len); | ||
140 | } | ||
141 | |||
142 | static inline void readsw(const void __iomem *addr, void *buf, int len) | ||
143 | { | ||
144 | insw((unsigned long)addr, buf, len); | ||
145 | } | ||
146 | |||
147 | static inline void readsb(const void __iomem *addr, void *buf, int len) | ||
148 | { | ||
149 | insb((unsigned long)addr, buf, len); | ||
150 | } | ||
151 | |||
152 | static inline void writesl(const void __iomem *addr, const void *buf, int len) | ||
153 | { | ||
154 | outsl((unsigned long)addr, buf, len); | ||
155 | } | ||
156 | |||
157 | static inline void writesw(const void __iomem *addr, const void *buf, int len) | ||
158 | { | ||
159 | outsw((unsigned long)addr, buf, len); | ||
160 | } | ||
161 | |||
162 | static inline void writesb(const void __iomem *addr, const void *buf, int len) | ||
163 | { | ||
164 | outsb((unsigned long)addr, buf, len); | ||
165 | } | ||
166 | |||
137 | /* | 167 | /* |
138 | * Map some physical address range into the kernel address space. | 168 | * Map some physical address range into the kernel address space. |
139 | */ | 169 | */ |
diff --git a/arch/blackfin/include/asm/timex.h b/arch/blackfin/include/asm/timex.h index 22b0806161bb..248aeb066805 100644 --- a/arch/blackfin/include/asm/timex.h +++ b/arch/blackfin/include/asm/timex.h | |||
@@ -16,7 +16,7 @@ typedef unsigned long long cycles_t; | |||
16 | static inline cycles_t get_cycles(void) | 16 | static inline cycles_t get_cycles(void) |
17 | { | 17 | { |
18 | unsigned long tmp, tmp2; | 18 | unsigned long tmp, tmp2; |
19 | __asm__("%0 = cycles; %1 = cycles2;" : "=d"(tmp), "=d"(tmp2)); | 19 | __asm__ __volatile__("%0 = cycles; %1 = cycles2;" : "=d"(tmp), "=d"(tmp2)); |
20 | return tmp | ((cycles_t)tmp2 << 32); | 20 | return tmp | ((cycles_t)tmp2 << 32); |
21 | } | 21 | } |
22 | 22 | ||
diff --git a/arch/blackfin/kernel/cplb-mpu/cplbmgr.c b/arch/blackfin/kernel/cplb-mpu/cplbmgr.c index 5094677fd09e..baa52e261f0d 100644 --- a/arch/blackfin/kernel/cplb-mpu/cplbmgr.c +++ b/arch/blackfin/kernel/cplb-mpu/cplbmgr.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <linux/mm.h> | 21 | #include <linux/mm.h> |
22 | 22 | ||
23 | #include <asm/blackfin.h> | 23 | #include <asm/blackfin.h> |
24 | #include <asm/cacheflush.h> | ||
24 | #include <asm/cplbinit.h> | 25 | #include <asm/cplbinit.h> |
25 | #include <asm/mmu_context.h> | 26 | #include <asm/mmu_context.h> |
26 | 27 | ||
@@ -144,9 +145,7 @@ static noinline int dcplb_miss(void) | |||
144 | 145 | ||
145 | d_data = CPLB_SUPV_WR | CPLB_VALID | CPLB_DIRTY | PAGE_SIZE_4KB; | 146 | d_data = CPLB_SUPV_WR | CPLB_VALID | CPLB_DIRTY | PAGE_SIZE_4KB; |
146 | #ifdef CONFIG_BFIN_DCACHE | 147 | #ifdef CONFIG_BFIN_DCACHE |
147 | if (addr < _ramend - DMA_UNCACHED_REGION || | 148 | if (bfin_addr_dcachable(addr)) { |
148 | (reserved_mem_dcache_on && addr >= _ramend && | ||
149 | addr < physical_mem_end)) { | ||
150 | d_data |= CPLB_L1_CHBL | ANOMALY_05000158_WORKAROUND; | 149 | d_data |= CPLB_L1_CHBL | ANOMALY_05000158_WORKAROUND; |
151 | #ifdef CONFIG_BFIN_WT | 150 | #ifdef CONFIG_BFIN_WT |
152 | d_data |= CPLB_L1_AOW | CPLB_WT; | 151 | d_data |= CPLB_L1_AOW | CPLB_WT; |
diff --git a/arch/blackfin/kernel/cplb-nompu/cplbinit.c b/arch/blackfin/kernel/cplb-nompu/cplbinit.c index 301252e84441..512f8c92ead5 100644 --- a/arch/blackfin/kernel/cplb-nompu/cplbinit.c +++ b/arch/blackfin/kernel/cplb-nompu/cplbinit.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <linux/module.h> | 23 | #include <linux/module.h> |
24 | 24 | ||
25 | #include <asm/blackfin.h> | 25 | #include <asm/blackfin.h> |
26 | #include <asm/cacheflush.h> | ||
26 | #include <asm/cplb.h> | 27 | #include <asm/cplb.h> |
27 | #include <asm/cplbinit.h> | 28 | #include <asm/cplbinit.h> |
28 | 29 | ||
diff --git a/arch/blackfin/mach-bf527/head.S b/arch/blackfin/mach-bf527/head.S index 6588170e3845..0eb1da85db73 100644 --- a/arch/blackfin/mach-bf527/head.S +++ b/arch/blackfin/mach-bf527/head.S | |||
@@ -88,7 +88,7 @@ ENTRY(_start_dma_code) | |||
88 | r1 = r1 << 8; /* Shift it over */ | 88 | r1 = r1 << 8; /* Shift it over */ |
89 | r0 = r1 | r0; /* add them all together */ | 89 | r0 = r1 | r0; /* add them all together */ |
90 | #ifdef ANOMALY_05000265 | 90 | #ifdef ANOMALY_05000265 |
91 | r0 = BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */ | 91 | BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */ |
92 | #endif | 92 | #endif |
93 | 93 | ||
94 | p0.h = hi(PLL_CTL); | 94 | p0.h = hi(PLL_CTL); |
diff --git a/arch/blackfin/mach-bf533/head.S b/arch/blackfin/mach-bf533/head.S index 619685b94d90..9fc95aaca439 100644 --- a/arch/blackfin/mach-bf533/head.S +++ b/arch/blackfin/mach-bf533/head.S | |||
@@ -79,7 +79,7 @@ ENTRY(_start_dma_code) | |||
79 | r1 = r1 << 8; /* Shift it over */ | 79 | r1 = r1 << 8; /* Shift it over */ |
80 | r0 = r1 | r0; /* add them all together */ | 80 | r0 = r1 | r0; /* add them all together */ |
81 | #ifdef ANOMALY_05000265 | 81 | #ifdef ANOMALY_05000265 |
82 | r0 = BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */ | 82 | BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */ |
83 | #endif | 83 | #endif |
84 | 84 | ||
85 | p0.h = hi(PLL_CTL); | 85 | p0.h = hi(PLL_CTL); |
diff --git a/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h index 34ab0e4e4242..f3d9e495230c 100644 --- a/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h +++ b/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h | |||
@@ -158,7 +158,7 @@ static void bfin_serial_hw_init(struct bfin_serial_port *uart) | |||
158 | } | 158 | } |
159 | if (uart->rts_pin >= 0) { | 159 | if (uart->rts_pin >= 0) { |
160 | gpio_request(uart->rts_pin, DRIVER_NAME); | 160 | gpio_request(uart->rts_pin, DRIVER_NAME); |
161 | gpio_direction_input(uart->rts_pin, 0); | 161 | gpio_direction_output(uart->rts_pin, 0); |
162 | } | 162 | } |
163 | #endif | 163 | #endif |
164 | } | 164 | } |
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c index dc5a30849c15..8d394393201f 100644 --- a/arch/blackfin/mach-bf537/boards/stamp.c +++ b/arch/blackfin/mach-bf537/boards/stamp.c | |||
@@ -577,11 +577,6 @@ static const struct ad7877_platform_data bfin_ad7877_ts_info = { | |||
577 | 577 | ||
578 | #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE) | 578 | #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE) |
579 | #include <linux/spi/ad7879.h> | 579 | #include <linux/spi/ad7879.h> |
580 | static struct bfin5xx_spi_chip spi_ad7879_chip_info = { | ||
581 | .enable_dma = 0, | ||
582 | .bits_per_word = 16, | ||
583 | }; | ||
584 | |||
585 | static const struct ad7879_platform_data bfin_ad7879_ts_info = { | 580 | static const struct ad7879_platform_data bfin_ad7879_ts_info = { |
586 | .model = 7879, /* Model = AD7879 */ | 581 | .model = 7879, /* Model = AD7879 */ |
587 | .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */ | 582 | .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */ |
@@ -597,6 +592,13 @@ static const struct ad7879_platform_data bfin_ad7879_ts_info = { | |||
597 | }; | 592 | }; |
598 | #endif | 593 | #endif |
599 | 594 | ||
595 | #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE) | ||
596 | static struct bfin5xx_spi_chip spi_ad7879_chip_info = { | ||
597 | .enable_dma = 0, | ||
598 | .bits_per_word = 16, | ||
599 | }; | ||
600 | #endif | ||
601 | |||
600 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) | 602 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) |
601 | static struct bfin5xx_spi_chip spidev_chip_info = { | 603 | static struct bfin5xx_spi_chip spidev_chip_info = { |
602 | .enable_dma = 0, | 604 | .enable_dma = 0, |
@@ -750,7 +752,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
750 | .controller_data = &spi_ad7877_chip_info, | 752 | .controller_data = &spi_ad7877_chip_info, |
751 | }, | 753 | }, |
752 | #endif | 754 | #endif |
753 | #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE) | 755 | #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE) |
754 | { | 756 | { |
755 | .modalias = "ad7879", | 757 | .modalias = "ad7879", |
756 | .platform_data = &bfin_ad7879_ts_info, | 758 | .platform_data = &bfin_ad7879_ts_info, |
@@ -935,7 +937,7 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = { | |||
935 | #if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE) | 937 | #if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE) |
936 | { | 938 | { |
937 | I2C_BOARD_INFO("ad7142_joystick", 0x2C), | 939 | I2C_BOARD_INFO("ad7142_joystick", 0x2C), |
938 | .irq = 55, | 940 | .irq = IRQ_PF5, |
939 | }, | 941 | }, |
940 | #endif | 942 | #endif |
941 | #if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) | 943 | #if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) |
@@ -946,7 +948,14 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = { | |||
946 | #if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE) | 948 | #if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE) |
947 | { | 949 | { |
948 | I2C_BOARD_INFO("pcf8574_keypad", 0x27), | 950 | I2C_BOARD_INFO("pcf8574_keypad", 0x27), |
949 | .irq = 72, | 951 | .irq = IRQ_PG6, |
952 | }, | ||
953 | #endif | ||
954 | #if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE) | ||
955 | { | ||
956 | I2C_BOARD_INFO("ad7879", 0x2F), | ||
957 | .irq = IRQ_PG5, | ||
958 | .platform_data = (void *)&bfin_ad7879_ts_info, | ||
950 | }, | 959 | }, |
951 | #endif | 960 | #endif |
952 | }; | 961 | }; |
diff --git a/arch/blackfin/mach-bf537/head.S b/arch/blackfin/mach-bf537/head.S index 559a7eef7a38..f5c94bf80e3b 100644 --- a/arch/blackfin/mach-bf537/head.S +++ b/arch/blackfin/mach-bf537/head.S | |||
@@ -88,7 +88,7 @@ ENTRY(_start_dma_code) | |||
88 | r1 = r1 << 8; /* Shift it over */ | 88 | r1 = r1 << 8; /* Shift it over */ |
89 | r0 = r1 | r0; /* add them all together */ | 89 | r0 = r1 | r0; /* add them all together */ |
90 | #ifdef ANOMALY_05000265 | 90 | #ifdef ANOMALY_05000265 |
91 | r0 = BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */ | 91 | BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */ |
92 | #endif | 92 | #endif |
93 | 93 | ||
94 | p0.h = hi(PLL_CTL); | 94 | p0.h = hi(PLL_CTL); |
diff --git a/arch/blackfin/mach-bf548/head.S b/arch/blackfin/mach-bf548/head.S index 051b05c88027..93b361dff27b 100644 --- a/arch/blackfin/mach-bf548/head.S +++ b/arch/blackfin/mach-bf548/head.S | |||
@@ -95,7 +95,7 @@ ENTRY(_start_dma_code) | |||
95 | r1 = r1 << 8; /* Shift it over */ | 95 | r1 = r1 << 8; /* Shift it over */ |
96 | r0 = r1 | r0; /* add them all together */ | 96 | r0 = r1 | r0; /* add them all together */ |
97 | #ifdef ANOMALY_05000265 | 97 | #ifdef ANOMALY_05000265 |
98 | r0 = BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */ | 98 | BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */ |
99 | #endif | 99 | #endif |
100 | 100 | ||
101 | p0.h = hi(PLL_CTL); | 101 | p0.h = hi(PLL_CTL); |
diff --git a/arch/blackfin/mach-bf561/head.S b/arch/blackfin/mach-bf561/head.S index 0b28137b3dea..31a777a9e699 100644 --- a/arch/blackfin/mach-bf561/head.S +++ b/arch/blackfin/mach-bf561/head.S | |||
@@ -78,7 +78,7 @@ ENTRY(_start_dma_code) | |||
78 | r1 = r1 << 8; /* Shift it over */ | 78 | r1 = r1 << 8; /* Shift it over */ |
79 | r0 = r1 | r0; /* add them all together */ | 79 | r0 = r1 | r0; /* add them all together */ |
80 | #ifdef ANOMALY_05000265 | 80 | #ifdef ANOMALY_05000265 |
81 | r0 = BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */ | 81 | BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */ |
82 | #endif | 82 | #endif |
83 | 83 | ||
84 | p0.h = hi(PLL_CTL); | 84 | p0.h = hi(PLL_CTL); |
diff --git a/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h index f5327264357c..043bfcf26c52 100644 --- a/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h +++ b/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h | |||
@@ -158,7 +158,7 @@ static void bfin_serial_hw_init(struct bfin_serial_port *uart) | |||
158 | } | 158 | } |
159 | if (uart->rts_pin >= 0) { | 159 | if (uart->rts_pin >= 0) { |
160 | gpio_request(uart->rts_pin, DRIVER_NAME); | 160 | gpio_request(uart->rts_pin, DRIVER_NAME); |
161 | gpio_direction_input(uart->rts_pin, 0); | 161 | gpio_direction_output(uart->rts_pin, 0); |
162 | } | 162 | } |
163 | #endif | 163 | #endif |
164 | } | 164 | } |
diff --git a/arch/blackfin/mach-common/cache.S b/arch/blackfin/mach-common/cache.S index 85f8c79b3c37..db532181fbde 100644 --- a/arch/blackfin/mach-common/cache.S +++ b/arch/blackfin/mach-common/cache.S | |||
@@ -1,148 +1,91 @@ | |||
1 | /* | 1 | /* |
2 | * File: arch/blackfin/mach-common/cache.S | 2 | * Blackfin cache control code |
3 | * Based on: | ||
4 | * Author: LG Soft India | ||
5 | * | 3 | * |
6 | * Created: | 4 | * Copyright 2004-2008 Analog Devices Inc. |
7 | * Description: cache control support | ||
8 | * | 5 | * |
9 | * Modified: | 6 | * Enter bugs at http://blackfin.uclinux.org/ |
10 | * Copyright 2004-2006 Analog Devices Inc. | ||
11 | * | 7 | * |
12 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | 8 | * Licensed under the GPL-2 or later. |
13 | * | ||
14 | * This program is free software; you can redistribute it and/or modify | ||
15 | * it under the terms of the GNU General Public License as published by | ||
16 | * the Free Software Foundation; either version 2 of the License, or | ||
17 | * (at your option) any later version. | ||
18 | * | ||
19 | * This program is distributed in the hope that it will be useful, | ||
20 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
22 | * GNU General Public License for more details. | ||
23 | * | ||
24 | * You should have received a copy of the GNU General Public License | ||
25 | * along with this program; if not, see the file COPYING, or write | ||
26 | * to the Free Software Foundation, Inc., | ||
27 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
28 | */ | 9 | */ |
29 | 10 | ||
30 | #include <linux/linkage.h> | 11 | #include <linux/linkage.h> |
31 | #include <asm/cplb.h> | ||
32 | #include <asm/entry.h> | ||
33 | #include <asm/blackfin.h> | 12 | #include <asm/blackfin.h> |
34 | #include <asm/cache.h> | 13 | #include <asm/cache.h> |
14 | #include <asm/page.h> | ||
35 | 15 | ||
36 | .text | 16 | .text |
37 | 17 | ||
38 | /* | 18 | /* Since all L1 caches work the same way, we use the same method for flushing |
39 | * blackfin_cache_flush_range(start, end) | 19 | * them. Only the actual flush instruction differs. We write this in asm as |
40 | * Invalidate all cache lines assocoiated with this | 20 | * GCC can be hard to coax into writing nice hardware loops. |
41 | * area of memory. | ||
42 | * | 21 | * |
43 | * start: Start address | 22 | * Also, we assume the following register setup: |
44 | * end: End address | 23 | * R0 = start address |
24 | * R1 = end address | ||
45 | */ | 25 | */ |
46 | ENTRY(_blackfin_icache_flush_range) | 26 | .macro do_flush flushins:req optflushins optnopins label |
27 | |||
28 | /* end = ((end - 1) & -L1_CACHE_BYTES) + L1_CACHE_BYTES; */ | ||
29 | R1 += -1; | ||
47 | R2 = -L1_CACHE_BYTES; | 30 | R2 = -L1_CACHE_BYTES; |
48 | R2 = R0 & R2; | 31 | R1 = R1 & R2; |
49 | P0 = R2; | 32 | R1 += L1_CACHE_BYTES; |
50 | P1 = R1; | 33 | |
51 | CSYNC(R3); | 34 | /* count = (end - start) >> L1_CACHE_SHIFT */ |
52 | IFLUSH [P0]; | 35 | R2 = R1 - R0; |
36 | R2 >>= L1_CACHE_SHIFT; | ||
37 | P1 = R2; | ||
38 | |||
39 | .ifnb \label | ||
40 | \label : | ||
41 | .endif | ||
42 | P0 = R0; | ||
43 | LSETUP (1f, 2f) LC1 = P1; | ||
53 | 1: | 44 | 1: |
54 | IFLUSH [P0++]; | 45 | .ifnb \optflushins |
55 | CC = P0 < P1 (iu); | 46 | \optflushins [P0]; |
56 | IF CC JUMP 1b (bp); | 47 | .endif |
57 | IFLUSH [P0]; | 48 | .ifb \optnopins |
58 | SSYNC(R3); | 49 | 2: |
50 | .endif | ||
51 | \flushins [P0++]; | ||
52 | .ifnb \optnopins | ||
53 | 2: \optnopins; | ||
54 | .endif | ||
55 | |||
59 | RTS; | 56 | RTS; |
60 | ENDPROC(_blackfin_icache_flush_range) | 57 | .endm |
61 | 58 | ||
62 | /* | 59 | /* Invalidate all instruction cache lines assocoiated with this memory area */ |
63 | * blackfin_icache_dcache_flush_range(start, end) | 60 | ENTRY(_blackfin_icache_flush_range) |
64 | * FLUSH all cache lines assocoiated with this | 61 | do_flush IFLUSH, , nop |
65 | * area of memory. | 62 | ENDPROC(_blackfin_icache_flush_range) |
66 | * | ||
67 | * start: Start address | ||
68 | * end: End address | ||
69 | */ | ||
70 | 63 | ||
64 | /* Flush all cache lines assocoiated with this area of memory. */ | ||
71 | ENTRY(_blackfin_icache_dcache_flush_range) | 65 | ENTRY(_blackfin_icache_dcache_flush_range) |
72 | R2 = -L1_CACHE_BYTES; | 66 | do_flush IFLUSH, FLUSH |
73 | R2 = R0 & R2; | ||
74 | P0 = R2; | ||
75 | P1 = R1; | ||
76 | CSYNC(R3); | ||
77 | IFLUSH [P0]; | ||
78 | 1: | ||
79 | FLUSH [P0]; | ||
80 | IFLUSH [P0++]; | ||
81 | CC = P0 < P1 (iu); | ||
82 | IF CC JUMP 1b (bp); | ||
83 | IFLUSH [P0]; | ||
84 | FLUSH [P0]; | ||
85 | SSYNC(R3); | ||
86 | RTS; | ||
87 | ENDPROC(_blackfin_icache_dcache_flush_range) | 67 | ENDPROC(_blackfin_icache_dcache_flush_range) |
88 | 68 | ||
89 | /* Throw away all D-cached data in specified region without any obligation to | 69 | /* Throw away all D-cached data in specified region without any obligation to |
90 | * write them back. However, we must clean the D-cached entries around the | 70 | * write them back. Since the Blackfin ISA does not have an "invalidate" |
91 | * boundaries of the start and/or end address is not cache aligned. | 71 | * instruction, we use flush/invalidate. Perhaps as a speed optimization we |
92 | * | 72 | * could bang on the DTEST MMRs ... |
93 | * Start: start address, | ||
94 | * end : end address. | ||
95 | */ | 73 | */ |
96 | |||
97 | ENTRY(_blackfin_dcache_invalidate_range) | 74 | ENTRY(_blackfin_dcache_invalidate_range) |
98 | R2 = -L1_CACHE_BYTES; | 75 | do_flush FLUSHINV |
99 | R2 = R0 & R2; | ||
100 | P0 = R2; | ||
101 | P1 = R1; | ||
102 | CSYNC(R3); | ||
103 | FLUSHINV[P0]; | ||
104 | 1: | ||
105 | FLUSHINV[P0++]; | ||
106 | CC = P0 < P1 (iu); | ||
107 | IF CC JUMP 1b (bp); | ||
108 | |||
109 | /* If the data crosses a cache line, then we'll be pointing to | ||
110 | * the last cache line, but won't have flushed/invalidated it yet, | ||
111 | * so do one more. | ||
112 | */ | ||
113 | FLUSHINV[P0]; | ||
114 | SSYNC(R3); | ||
115 | RTS; | ||
116 | ENDPROC(_blackfin_dcache_invalidate_range) | 76 | ENDPROC(_blackfin_dcache_invalidate_range) |
117 | 77 | ||
78 | /* Flush all data cache lines assocoiated with this memory area */ | ||
118 | ENTRY(_blackfin_dcache_flush_range) | 79 | ENTRY(_blackfin_dcache_flush_range) |
119 | R2 = -L1_CACHE_BYTES; | 80 | do_flush FLUSH, , , .Ldfr |
120 | R2 = R0 & R2; | ||
121 | P0 = R2; | ||
122 | P1 = R1; | ||
123 | CSYNC(R3); | ||
124 | FLUSH[P0]; | ||
125 | 1: | ||
126 | FLUSH[P0++]; | ||
127 | CC = P0 < P1 (iu); | ||
128 | IF CC JUMP 1b (bp); | ||
129 | |||
130 | /* If the data crosses a cache line, then we'll be pointing to | ||
131 | * the last cache line, but won't have flushed it yet, so do | ||
132 | * one more. | ||
133 | */ | ||
134 | FLUSH[P0]; | ||
135 | SSYNC(R3); | ||
136 | RTS; | ||
137 | ENDPROC(_blackfin_dcache_flush_range) | 81 | ENDPROC(_blackfin_dcache_flush_range) |
138 | 82 | ||
83 | /* Our headers convert the page structure to an address, so just need to flush | ||
84 | * its contents like normal. We know the start address is page aligned (which | ||
85 | * greater than our cache alignment), as is the end address. So just jump into | ||
86 | * the middle of the dcache flush function. | ||
87 | */ | ||
139 | ENTRY(_blackfin_dflush_page) | 88 | ENTRY(_blackfin_dflush_page) |
140 | P1 = 1 << (PAGE_SHIFT - L1_CACHE_SHIFT); | 89 | P1 = 1 << (PAGE_SHIFT - L1_CACHE_SHIFT); |
141 | P0 = R0; | 90 | jump .Ldfr; |
142 | CSYNC(R3); | ||
143 | FLUSH[P0]; | ||
144 | LSETUP (.Lfl1, .Lfl1) LC0 = P1; | ||
145 | .Lfl1: FLUSH [P0++]; | ||
146 | SSYNC(R3); | ||
147 | RTS; | ||
148 | ENDPROC(_blackfin_dflush_page) | 91 | ENDPROC(_blackfin_dflush_page) |
diff --git a/arch/blackfin/mach-common/head.S b/arch/blackfin/mach-common/head.S index 3069df580729..f123a62e2451 100644 --- a/arch/blackfin/mach-common/head.S +++ b/arch/blackfin/mach-common/head.S | |||
@@ -206,6 +206,60 @@ ENTRY(_real_start) | |||
206 | w[p0] = r0; | 206 | w[p0] = r0; |
207 | ssync; | 207 | ssync; |
208 | 208 | ||
209 | #if L1_DATA_A_LENGTH > 0 | ||
210 | r1.l = __sbss_l1; | ||
211 | r1.h = __sbss_l1; | ||
212 | r2.l = __ebss_l1; | ||
213 | r2.h = __ebss_l1; | ||
214 | r0 = 0 (z); | ||
215 | r2 = r2 - r1; | ||
216 | cc = r2 == 0; | ||
217 | if cc jump .L_a_l1_done; | ||
218 | r2 >>= 2; | ||
219 | p1 = r1; | ||
220 | p2 = r2; | ||
221 | lsetup (.L_clear_a_l1, .L_clear_a_l1 ) lc0 = p2; | ||
222 | .L_clear_a_l1: | ||
223 | [p1++] = r0; | ||
224 | .L_a_l1_done: | ||
225 | #endif | ||
226 | |||
227 | #if L1_DATA_B_LENGTH > 0 | ||
228 | r1.l = __sbss_b_l1; | ||
229 | r1.h = __sbss_b_l1; | ||
230 | r2.l = __ebss_b_l1; | ||
231 | r2.h = __ebss_b_l1; | ||
232 | r0 = 0 (z); | ||
233 | r2 = r2 - r1; | ||
234 | cc = r2 == 0; | ||
235 | if cc jump .L_b_l1_done; | ||
236 | r2 >>= 2; | ||
237 | p1 = r1; | ||
238 | p2 = r2; | ||
239 | lsetup (.L_clear_b_l1, .L_clear_b_l1 ) lc0 = p2; | ||
240 | .L_clear_b_l1: | ||
241 | [p1++] = r0; | ||
242 | .L_b_l1_done: | ||
243 | #endif | ||
244 | |||
245 | #if L2_LENGTH > 0 | ||
246 | r1.l = __sbss_l2; | ||
247 | r1.h = __sbss_l2; | ||
248 | r2.l = __ebss_l2; | ||
249 | r2.h = __ebss_l2; | ||
250 | r0 = 0 (z); | ||
251 | r2 = r2 - r1; | ||
252 | cc = r2 == 0; | ||
253 | if cc jump .L_l2_done; | ||
254 | r2 >>= 2; | ||
255 | p1 = r1; | ||
256 | p2 = r2; | ||
257 | lsetup (.L_clear_l2, .L_clear_l2 ) lc0 = p2; | ||
258 | .L_clear_l2: | ||
259 | [p1++] = r0; | ||
260 | .L_l2_done: | ||
261 | #endif | ||
262 | |||
209 | /* Zero out the bss region | 263 | /* Zero out the bss region |
210 | * Note: this will fail if bss is 0 bytes ... | 264 | * Note: this will fail if bss is 0 bytes ... |
211 | */ | 265 | */ |