diff options
author | Tejun Heo <tj@kernel.org> | 2009-06-24 02:13:47 -0400 |
---|---|---|
committer | Tejun Heo <tj@kernel.org> | 2009-06-24 02:13:47 -0400 |
commit | b9bf3121af348d9255f1c917830fe8c2df52efcb (patch) | |
tree | 477f93b1000d7ac4bd283ee75d632b107eaf9600 /arch/blackfin/mm/sram-alloc.c | |
parent | 204fba4aa303ea4a7bb726a539bf4a5b9e3203d0 (diff) |
percpu: use DEFINE_PER_CPU_SHARED_ALIGNED()
There are a few places where ___cacheline_aligned* is used with
DEFINE_PER_CPU(). Use DEFINE_PER_CPU_SHARED_ALIGNED() instead.
DEFINE_PER_CPU_SHARED_ALIGNED() applies alignment only on SMPs. While
all other converted places used _in_smp variant or only get compiled
for SMP, net/rds used unconditional ____cacheline_aligned. I don't
see any reason these data structures should be aligned on UP and thus
converted together.
Signed-off-by: Tejun Heo <tj@kernel.org>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Andy Grover <andy.grover@oracle.com>
Diffstat (limited to 'arch/blackfin/mm/sram-alloc.c')
-rw-r--r-- | arch/blackfin/mm/sram-alloc.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/blackfin/mm/sram-alloc.c b/arch/blackfin/mm/sram-alloc.c index 0bc3c4ef0aad..99e4dbb1dfd1 100644 --- a/arch/blackfin/mm/sram-alloc.c +++ b/arch/blackfin/mm/sram-alloc.c | |||
@@ -42,9 +42,9 @@ | |||
42 | #include <asm/mem_map.h> | 42 | #include <asm/mem_map.h> |
43 | #include "blackfin_sram.h" | 43 | #include "blackfin_sram.h" |
44 | 44 | ||
45 | static DEFINE_PER_CPU(spinlock_t, l1sram_lock) ____cacheline_aligned_in_smp; | 45 | static DEFINE_PER_CPU_SHARED_ALIGNED(spinlock_t, l1sram_lock); |
46 | static DEFINE_PER_CPU(spinlock_t, l1_data_sram_lock) ____cacheline_aligned_in_smp; | 46 | static DEFINE_PER_CPU_SHARED_ALIGNED(spinlock_t, l1_data_sram_lock); |
47 | static DEFINE_PER_CPU(spinlock_t, l1_inst_sram_lock) ____cacheline_aligned_in_smp; | 47 | static DEFINE_PER_CPU_SHARED_ALIGNED(spinlock_t, l1_inst_sram_lock); |
48 | static spinlock_t l2_sram_lock ____cacheline_aligned_in_smp; | 48 | static spinlock_t l2_sram_lock ____cacheline_aligned_in_smp; |
49 | 49 | ||
50 | /* the data structure for L1 scratchpad and DATA SRAM */ | 50 | /* the data structure for L1 scratchpad and DATA SRAM */ |