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authorMike Frysinger <vapier.adi@gmail.com>2008-11-18 04:48:22 -0500
committerBryan Wu <cooloney@kernel.org>2008-11-18 04:48:22 -0500
commitb7e11293a4340dc20674144f7e83883a7a40049e (patch)
tree71e3cd327d8da0ff5cdd8592d6125a7b84559071 /arch/blackfin/mach-common
parent94b28211d83a7d8e86a8452a1bc65c95853af448 (diff)
Blackfin arch: fix bug - reboot fails on BF527
add ANOMALY_05000435 to handle SIC_IWR1 workaround for rebooting Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/mach-common')
-rw-r--r--arch/blackfin/mach-common/ints-priority.c5
-rw-r--r--arch/blackfin/mach-common/pm.c5
2 files changed, 8 insertions, 2 deletions
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c
index 5a7c1c177d23..f7e35e7965fc 100644
--- a/arch/blackfin/mach-common/ints-priority.c
+++ b/arch/blackfin/mach-common/ints-priority.c
@@ -1069,7 +1069,10 @@ int __init init_arch_irq(void)
1069 * up from IDLE instructions. See this report for more info: 1069 * up from IDLE instructions. See this report for more info:
1070 * http://blackfin.uclinux.org/gf/tracker/4323 1070 * http://blackfin.uclinux.org/gf/tracker/4323
1071 */ 1071 */
1072 bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11)); 1072 if (ANOMALY_05000435)
1073 bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11));
1074 else
1075 bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
1073#else 1076#else
1074 bfin_write_SIC_IWR1(IWR_DISABLE_ALL); 1077 bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
1075#endif 1078#endif
diff --git a/arch/blackfin/mach-common/pm.c b/arch/blackfin/mach-common/pm.c
index ee33a8a988bd..96600b8cb6ad 100644
--- a/arch/blackfin/mach-common/pm.c
+++ b/arch/blackfin/mach-common/pm.c
@@ -91,7 +91,10 @@ void bfin_pm_suspend_standby_enter(void)
91 * up from IDLE instructions. See this report for more info: 91 * up from IDLE instructions. See this report for more info:
92 * http://blackfin.uclinux.org/gf/tracker/4323 92 * http://blackfin.uclinux.org/gf/tracker/4323
93 */ 93 */
94 bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11)); 94 if (ANOMALY_05000435)
95 bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11));
96 else
97 bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
95#else 98#else
96 bfin_write_SIC_IWR1(IWR_DISABLE_ALL); 99 bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
97#endif 100#endif