diff options
author | Bryan Wu <cooloney@kernel.org> | 2008-11-18 04:48:21 -0500 |
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committer | Bryan Wu <cooloney@kernel.org> | 2008-11-18 04:48:21 -0500 |
commit | 2f6f4bcdd611cb968b800f7569c4383727856668 (patch) | |
tree | e9de0755bfa40a932c2ca44e532aef8ae704ab9b /arch/blackfin/mach-common | |
parent | 2563265bdb5fb21396cdc2125c8260e57f7c3991 (diff) |
Blackfin arch: add support for Blackfin latest processor family BF51x
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/mach-common')
-rw-r--r-- | arch/blackfin/mach-common/dpmc_modes.S | 2 | ||||
-rw-r--r-- | arch/blackfin/mach-common/ints-priority.c | 20 | ||||
-rw-r--r-- | arch/blackfin/mach-common/pm.c | 4 |
3 files changed, 15 insertions, 11 deletions
diff --git a/arch/blackfin/mach-common/dpmc_modes.S b/arch/blackfin/mach-common/dpmc_modes.S index 21f61605f1f3..4da50bcd9300 100644 --- a/arch/blackfin/mach-common/dpmc_modes.S +++ b/arch/blackfin/mach-common/dpmc_modes.S | |||
@@ -248,7 +248,7 @@ ENDPROC(_unset_dram_srfs) | |||
248 | 248 | ||
249 | ENTRY(_set_sic_iwr) | 249 | ENTRY(_set_sic_iwr) |
250 | #if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) || \ | 250 | #if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) || \ |
251 | defined(CONFIG_BF538) || defined(CONFIG_BF539) | 251 | defined(CONFIG_BF538) || defined(CONFIG_BF539) || defined(CONFIG_BF51x) |
252 | P0.H = hi(SIC_IWR0); | 252 | P0.H = hi(SIC_IWR0); |
253 | P0.L = lo(SIC_IWR0); | 253 | P0.L = lo(SIC_IWR0); |
254 | P1.H = hi(SIC_IWR1); | 254 | P1.H = hi(SIC_IWR1); |
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c index 5ae507f59885..c32fa695f8cc 100644 --- a/arch/blackfin/mach-common/ints-priority.c +++ b/arch/blackfin/mach-common/ints-priority.c | |||
@@ -104,7 +104,8 @@ static void __init search_IAR(void) | |||
104 | for (irqn = 0; irqn < NR_PERI_INTS; irqn++) { | 104 | for (irqn = 0; irqn < NR_PERI_INTS; irqn++) { |
105 | int iar_shift = (irqn & 7) * 4; | 105 | int iar_shift = (irqn & 7) * 4; |
106 | if (ivg == (0xf & | 106 | if (ivg == (0xf & |
107 | #if defined(CONFIG_BF52x) || defined(CONFIG_BF538) || defined(CONFIG_BF539) | 107 | #if defined(CONFIG_BF52x) || defined(CONFIG_BF538) \ |
108 | || defined(CONFIG_BF539) || defined(CONFIG_BF51x) | ||
108 | bfin_read32((unsigned long *)SIC_IAR0 + | 109 | bfin_read32((unsigned long *)SIC_IAR0 + |
109 | ((irqn % 32) >> 3) + ((irqn / 32) * | 110 | ((irqn % 32) >> 3) + ((irqn / 32) * |
110 | ((SIC_IAR4 - SIC_IAR0) / 4))) >> iar_shift)) { | 111 | ((SIC_IAR4 - SIC_IAR0) / 4))) >> iar_shift)) { |
@@ -543,7 +544,7 @@ static void bfin_demux_gpio_irq(unsigned int inta_irq, | |||
543 | case IRQ_PORTF_INTA: | 544 | case IRQ_PORTF_INTA: |
544 | irq = IRQ_PF0; | 545 | irq = IRQ_PF0; |
545 | break; | 546 | break; |
546 | #elif defined(CONFIG_BF52x) | 547 | #elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x) |
547 | case IRQ_PORTF_INTA: | 548 | case IRQ_PORTF_INTA: |
548 | irq = IRQ_PF0; | 549 | irq = IRQ_PF0; |
549 | break; | 550 | break; |
@@ -990,7 +991,8 @@ int __init init_arch_irq(void) | |||
990 | int irq; | 991 | int irq; |
991 | unsigned long ilat = 0; | 992 | unsigned long ilat = 0; |
992 | /* Disable all the peripheral intrs - page 4-29 HW Ref manual */ | 993 | /* Disable all the peripheral intrs - page 4-29 HW Ref manual */ |
993 | #if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) || defined(BF538_FAMILY) | 994 | #if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) \ |
995 | || defined(BF538_FAMILY) || defined(CONFIG_BF51x) | ||
994 | bfin_write_SIC_IMASK0(SIC_UNMASK_ALL); | 996 | bfin_write_SIC_IMASK0(SIC_UNMASK_ALL); |
995 | bfin_write_SIC_IMASK1(SIC_UNMASK_ALL); | 997 | bfin_write_SIC_IMASK1(SIC_UNMASK_ALL); |
996 | # ifdef CONFIG_BF54x | 998 | # ifdef CONFIG_BF54x |
@@ -1035,7 +1037,7 @@ int __init init_arch_irq(void) | |||
1035 | case IRQ_PINT1: | 1037 | case IRQ_PINT1: |
1036 | case IRQ_PINT2: | 1038 | case IRQ_PINT2: |
1037 | case IRQ_PINT3: | 1039 | case IRQ_PINT3: |
1038 | #elif defined(CONFIG_BF52x) | 1040 | #elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x) |
1039 | case IRQ_PORTF_INTA: | 1041 | case IRQ_PORTF_INTA: |
1040 | case IRQ_PORTG_INTA: | 1042 | case IRQ_PORTG_INTA: |
1041 | case IRQ_PORTH_INTA: | 1043 | case IRQ_PORTH_INTA: |
@@ -1094,10 +1096,11 @@ int __init init_arch_irq(void) | |||
1094 | IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 | | 1096 | IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 | |
1095 | IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW; | 1097 | IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW; |
1096 | 1098 | ||
1097 | #if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) || defined(BF538_FAMILY) | 1099 | #if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) \ |
1100 | || defined(BF538_FAMILY) || defined(CONFIG_BF51x) | ||
1098 | bfin_write_SIC_IWR0(IWR_DISABLE_ALL); | 1101 | bfin_write_SIC_IWR0(IWR_DISABLE_ALL); |
1099 | #if defined(CONFIG_BF52x) | 1102 | #if defined(CONFIG_BF52x) || defined(CONFIG_BF51x) |
1100 | /* BF52x system reset does not properly reset SIC_IWR1 which | 1103 | /* BF52x/BF51x system reset does not properly reset SIC_IWR1 which |
1101 | * will screw up the bootrom as it relies on MDMA0/1 waking it | 1104 | * will screw up the bootrom as it relies on MDMA0/1 waking it |
1102 | * up from IDLE instructions. See this report for more info: | 1105 | * up from IDLE instructions. See this report for more info: |
1103 | * http://blackfin.uclinux.org/gf/tracker/4323 | 1106 | * http://blackfin.uclinux.org/gf/tracker/4323 |
@@ -1126,7 +1129,8 @@ void do_irq(int vec, struct pt_regs *fp) | |||
1126 | } else { | 1129 | } else { |
1127 | struct ivgx *ivg = ivg7_13[vec - IVG7].ifirst; | 1130 | struct ivgx *ivg = ivg7_13[vec - IVG7].ifirst; |
1128 | struct ivgx *ivg_stop = ivg7_13[vec - IVG7].istop; | 1131 | struct ivgx *ivg_stop = ivg7_13[vec - IVG7].istop; |
1129 | #if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) || defined(BF538_FAMILY) | 1132 | #if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) \ |
1133 | || defined(BF538_FAMILY) || defined(CONFIG_BF51x) | ||
1130 | unsigned long sic_status[3]; | 1134 | unsigned long sic_status[3]; |
1131 | 1135 | ||
1132 | sic_status[0] = bfin_read_SIC_ISR0() & bfin_read_SIC_IMASK0(); | 1136 | sic_status[0] = bfin_read_SIC_ISR0() & bfin_read_SIC_IMASK0(); |
diff --git a/arch/blackfin/mach-common/pm.c b/arch/blackfin/mach-common/pm.c index f774d8aa5b03..ee33a8a988bd 100644 --- a/arch/blackfin/mach-common/pm.c +++ b/arch/blackfin/mach-common/pm.c | |||
@@ -83,9 +83,9 @@ void bfin_pm_suspend_standby_enter(void) | |||
83 | bfin_pm_standby_restore(); | 83 | bfin_pm_standby_restore(); |
84 | 84 | ||
85 | #if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) || \ | 85 | #if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) || \ |
86 | defined(CONFIG_BF538) || defined(CONFIG_BF539) | 86 | defined(CONFIG_BF538) || defined(CONFIG_BF539) || defined(CONFIG_BF51x) |
87 | bfin_write_SIC_IWR0(IWR_DISABLE_ALL); | 87 | bfin_write_SIC_IWR0(IWR_DISABLE_ALL); |
88 | #if defined(CONFIG_BF52x) | 88 | #if defined(CONFIG_BF52x) || defined(CONFIG_BF51x) |
89 | /* BF52x system reset does not properly reset SIC_IWR1 which | 89 | /* BF52x system reset does not properly reset SIC_IWR1 which |
90 | * will screw up the bootrom as it relies on MDMA0/1 waking it | 90 | * will screw up the bootrom as it relies on MDMA0/1 waking it |
91 | * up from IDLE instructions. See this report for more info: | 91 | * up from IDLE instructions. See this report for more info: |