Blackfin arch: clean up some coding style issues

Signed-off-by: Bryan Wu <bryan.wu@analog.com>

2 files changed, 8 insertions, 9 deletions

diff --git a/arch/blackfin/mach-common/ints-priority-dc.c b/arch/blackfin/mach-common/ints-priority-dc.c
index 7977c2c40867..6b9fd03ce835 100644
--- a/arch/blackfin/mach-common/ints-priority-dc.c
+++ b/arch/blackfin/mach-common/ints-priority-dc.c
@@ -371,8 +371,8 @@ int __init init_arch_irq(void)
         bfin_write_SICA_IMASK1(SIC_UNMASK_ALL);
         SSYNC();
 
-        bfin_write_SICA_IWR0(IWR_ENABLE_ALL);  
-        bfin_write_SICA_IWR1(IWR_ENABLE_ALL);  
+        bfin_write_SICA_IWR0(IWR_ENABLE_ALL);
+        bfin_write_SICA_IWR1(IWR_ENABLE_ALL);
 
         local_irq_disable();
 
diff --git a/arch/blackfin/mach-common/ints-priority-sc.c b/arch/blackfin/mach-common/ints-priority-sc.c
index c3bb2fbd6428..28a878c3577a 100644
--- a/arch/blackfin/mach-common/ints-priority-sc.c
+++ b/arch/blackfin/mach-common/ints-priority-sc.c
@@ -147,8 +147,8 @@ static void bfin_internal_mask_irq(unsigned int irq)
         unsigned mask_bank, mask_bit;
         mask_bank = (irq - (IRQ_CORETMR + 1)) / 32;
         mask_bit = (irq - (IRQ_CORETMR + 1)) % 32;
-        bfin_write_SIC_IMASK( mask_bank, bfin_read_SIC_IMASK(mask_bank) & \
-                            ~(1 << mask_bit));
+        bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) &
+                             ~(1 << mask_bit));
 #endif
         SSYNC();
 }
@@ -161,9 +161,9 @@ static void bfin_internal_unmask_irq(unsigned int irq)
 #else
         unsigned mask_bank, mask_bit;
         mask_bank = (irq - (IRQ_CORETMR + 1)) / 32;
-        mask_bit = (irq - (IRQ_CORETMR + 1))%32;
-        bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) | \
-                        ( 1 << mask_bit));
+        mask_bit = (irq - (IRQ_CORETMR + 1)) % 32;
+        bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) |
+                             (1 << mask_bit));
 #endif
         SSYNC();
 }
@@ -728,7 +728,7 @@ int __init init_arch_irq(void)
         bfin_write_SIC_IMASK2(SIC_UNMASK_ALL);
         bfin_write_SIC_IWR0(IWR_ENABLE_ALL);
         bfin_write_SIC_IWR1(IWR_ENABLE_ALL);
-        bfin_write_SIC_IWR2(IWR_ENABLE_ALL);            
+        bfin_write_SIC_IWR2(IWR_ENABLE_ALL);
 #else
         bfin_write_SIC_IMASK(SIC_UNMASK_ALL);
         bfin_write_SIC_IWR(IWR_ENABLE_ALL);
@@ -878,7 +878,6 @@ void do_irq(int vec, struct pt_regs *fp)
                 sic_status[0] = bfin_read_SIC_ISR(0) & bfin_read_SIC_IMASK(0);
                 sic_status[1] = bfin_read_SIC_ISR(1) & bfin_read_SIC_IMASK(1);
                 sic_status[2] = bfin_read_SIC_ISR(2) & bfin_read_SIC_IMASK(2);
-                
 
                 for (;; ivg++) {
                         if (ivg >= ivg_stop) {