diff options
author | Yi Li <yi.li@analog.com> | 2009-12-28 05:21:49 -0500 |
---|---|---|
committer | Mike Frysinger <vapier@gentoo.org> | 2010-03-09 00:30:48 -0500 |
commit | 0d152c27e336b5fd777da7dd3e814617e7305afd (patch) | |
tree | 2863b1b2f0fe0676a5928b197c8d1d289ab71777 /arch/blackfin/mach-common | |
parent | 682f5dc4ed7cdef1f55e40ee505c4346dfa6fa91 (diff) |
Blackfin: SMP: make core timers per-cpu clock events for HRT
SMP systems require per-cpu local clock event devices in order to enable
HRT support. One a BF561, we can use local core timer for this purpose.
Originally, there was one global core-timer clock event device set up for
core A.
To accomplish this feat, we need to split the gptimer0/core timer logic
so that each is a standalone clock event. There is no requirement that
we only have one clock event source anyways. Once we have this, we just
define per-cpu clock event devices for each local core timer.
Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/mach-common')
-rw-r--r-- | arch/blackfin/mach-common/ints-priority.c | 3 | ||||
-rw-r--r-- | arch/blackfin/mach-common/smp.c | 17 |
2 files changed, 3 insertions, 17 deletions
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c index a5d243409d23..efbdb6a19418 100644 --- a/arch/blackfin/mach-common/ints-priority.c +++ b/arch/blackfin/mach-common/ints-priority.c | |||
@@ -1073,9 +1073,6 @@ int __init init_arch_irq(void) | |||
1073 | #endif | 1073 | #endif |
1074 | 1074 | ||
1075 | #ifdef CONFIG_SMP | 1075 | #ifdef CONFIG_SMP |
1076 | #ifdef CONFIG_TICKSOURCE_GPTMR0 | ||
1077 | case IRQ_TIMER0: | ||
1078 | #endif | ||
1079 | #ifdef CONFIG_TICKSOURCE_CORETMR | 1076 | #ifdef CONFIG_TICKSOURCE_CORETMR |
1080 | case IRQ_CORETMR: | 1077 | case IRQ_CORETMR: |
1081 | #endif | 1078 | #endif |
diff --git a/arch/blackfin/mach-common/smp.c b/arch/blackfin/mach-common/smp.c index eddb720c718e..b343ab3764a1 100644 --- a/arch/blackfin/mach-common/smp.c +++ b/arch/blackfin/mach-common/smp.c | |||
@@ -365,9 +365,6 @@ int __cpuinit __cpu_up(unsigned int cpu) | |||
365 | 365 | ||
366 | static void __cpuinit setup_secondary(unsigned int cpu) | 366 | static void __cpuinit setup_secondary(unsigned int cpu) |
367 | { | 367 | { |
368 | #if !defined(CONFIG_TICKSOURCE_GPTMR0) | ||
369 | struct irq_desc *timer_desc; | ||
370 | #endif | ||
371 | unsigned long ilat; | 368 | unsigned long ilat; |
372 | 369 | ||
373 | bfin_write_IMASK(0); | 370 | bfin_write_IMASK(0); |
@@ -382,17 +379,6 @@ static void __cpuinit setup_secondary(unsigned int cpu) | |||
382 | bfin_irq_flags |= IMASK_IVG15 | | 379 | bfin_irq_flags |= IMASK_IVG15 | |
383 | IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 | | 380 | IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 | |
384 | IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW; | 381 | IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW; |
385 | |||
386 | #if defined(CONFIG_TICKSOURCE_GPTMR0) | ||
387 | /* Power down the core timer, just to play safe. */ | ||
388 | bfin_write_TCNTL(0); | ||
389 | |||
390 | /* system timer0 has been setup by CoreA. */ | ||
391 | #else | ||
392 | timer_desc = irq_desc + IRQ_CORETMR; | ||
393 | setup_core_timer(); | ||
394 | timer_desc->chip->enable(IRQ_CORETMR); | ||
395 | #endif | ||
396 | } | 382 | } |
397 | 383 | ||
398 | void __cpuinit secondary_start_kernel(void) | 384 | void __cpuinit secondary_start_kernel(void) |
@@ -435,6 +421,9 @@ void __cpuinit secondary_start_kernel(void) | |||
435 | 421 | ||
436 | platform_secondary_init(cpu); | 422 | platform_secondary_init(cpu); |
437 | 423 | ||
424 | /* setup local core timer */ | ||
425 | bfin_local_timer_setup(); | ||
426 | |||
438 | local_irq_enable(); | 427 | local_irq_enable(); |
439 | 428 | ||
440 | /* | 429 | /* |