diff options
author | Bernd Schmidt <bernd.schmidt@analog.com> | 2008-01-27 05:39:16 -0500 |
---|---|---|
committer | Bryan Wu <bryan.wu@analog.com> | 2008-01-27 05:39:16 -0500 |
commit | b97b8a998397e8c64699559099fa9febffae2b4d (patch) | |
tree | 689188b6336cf45b4391f5bc764878e342b9ac90 /arch/blackfin/mach-common | |
parent | 2047e40d724d42928c0b5994a1568c1b738efdb7 (diff) |
[Blackfin] arch: Initial checkin of the memory protection support.
Enable it with CONFIG_MPU.
Signed-off-by: Bernd Schmidt <bernd.schmidt@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'arch/blackfin/mach-common')
-rw-r--r-- | arch/blackfin/mach-common/entry.S | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S index 58f7ad617992..c2e81a10c47b 100644 --- a/arch/blackfin/mach-common/entry.S +++ b/arch/blackfin/mach-common/entry.S | |||
@@ -95,6 +95,9 @@ ENTRY(_ex_workaround_261) | |||
95 | R6 = 0x26; /* Data CPLB Miss */ | 95 | R6 = 0x26; /* Data CPLB Miss */ |
96 | cc = R6 == R7; | 96 | cc = R6 == R7; |
97 | if cc jump _ex_dcplb_miss (BP); | 97 | if cc jump _ex_dcplb_miss (BP); |
98 | R6 = 0x23; /* Data CPLB Miss */ | ||
99 | cc = R6 == R7; | ||
100 | if cc jump _ex_dcplb_viol (BP); | ||
98 | /* Handle 0x23 Data CPLB Protection Violation | 101 | /* Handle 0x23 Data CPLB Protection Violation |
99 | * and Data CPLB Multiple Hits - Linux Trap Zero | 102 | * and Data CPLB Multiple Hits - Linux Trap Zero |
100 | */ | 103 | */ |
@@ -102,17 +105,33 @@ ENTRY(_ex_workaround_261) | |||
102 | ENDPROC(_ex_workaround_261) | 105 | ENDPROC(_ex_workaround_261) |
103 | 106 | ||
104 | #else | 107 | #else |
108 | #ifdef CONFIG_MPU | ||
109 | #define _ex_dviol _ex_dcplb_viol | ||
110 | #else | ||
105 | #define _ex_dviol _ex_trap_c | 111 | #define _ex_dviol _ex_trap_c |
112 | #endif | ||
106 | #define _ex_dmiss _ex_dcplb_miss | 113 | #define _ex_dmiss _ex_dcplb_miss |
107 | #define _ex_dmult _ex_trap_c | 114 | #define _ex_dmult _ex_trap_c |
108 | #endif | 115 | #endif |
109 | 116 | ||
117 | |||
118 | ENTRY(_ex_dcplb_viol) | ||
110 | ENTRY(_ex_dcplb_miss) | 119 | ENTRY(_ex_dcplb_miss) |
111 | ENTRY(_ex_icplb_miss) | 120 | ENTRY(_ex_icplb_miss) |
112 | (R7:6,P5:4) = [sp++]; | 121 | (R7:6,P5:4) = [sp++]; |
113 | ASTAT = [sp++]; | 122 | ASTAT = [sp++]; |
114 | SAVE_ALL_SYS | 123 | SAVE_ALL_SYS |
124 | #ifdef CONFIG_MPU | ||
125 | R0 = SEQSTAT; | ||
126 | R1 = SP; | ||
127 | sp += -12; | ||
128 | call _cplb_hdr; | ||
129 | sp += 12; | ||
130 | CC = R0 == 0; | ||
131 | IF !CC JUMP _handle_bad_cplb; | ||
132 | #else | ||
115 | call __cplb_hdr; | 133 | call __cplb_hdr; |
134 | #endif | ||
116 | DEBUG_START_HWTRACE(p5, r7) | 135 | DEBUG_START_HWTRACE(p5, r7) |
117 | RESTORE_ALL_SYS | 136 | RESTORE_ALL_SYS |
118 | SP = EX_SCRATCH_REG; | 137 | SP = EX_SCRATCH_REG; |