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authorH. Peter Anvin <hpa@zytor.com>2008-09-04 12:04:45 -0400
committerH. Peter Anvin <hpa@zytor.com>2008-09-04 12:04:45 -0400
commitfe47784ba5cbb6b713c013e046859946789b45e4 (patch)
tree6384958d55e29be0d2eb8ae78fa437c10636d8d6 /arch/blackfin/mach-common/pm.c
parent83b8e28b14d63db928cb39e5c5ed2a548246bd71 (diff)
parentaf2e1f276ff08f17192411ea3b71c13a758dfe12 (diff)
Merge branch 'x86/cpu' into x86/xsave
Conflicts: arch/x86/kernel/cpu/feature_names.c include/asm-x86/cpufeature.h
Diffstat (limited to 'arch/blackfin/mach-common/pm.c')
-rw-r--r--arch/blackfin/mach-common/pm.c35
1 files changed, 14 insertions, 21 deletions
diff --git a/arch/blackfin/mach-common/pm.c b/arch/blackfin/mach-common/pm.c
index 4fe6a2366b13..e28c6af1f415 100644
--- a/arch/blackfin/mach-common/pm.c
+++ b/arch/blackfin/mach-common/pm.c
@@ -83,13 +83,22 @@ void bfin_pm_suspend_standby_enter(void)
83 bfin_pm_standby_restore(); 83 bfin_pm_standby_restore();
84 84
85#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) 85#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561)
86 bfin_write_SIC_IWR0(IWR_ENABLE_ALL); 86 bfin_write_SIC_IWR0(IWR_DISABLE_ALL);
87 bfin_write_SIC_IWR1(IWR_ENABLE_ALL); 87#if defined(CONFIG_BF52x)
88 /* BF52x system reset does not properly reset SIC_IWR1 which
89 * will screw up the bootrom as it relies on MDMA0/1 waking it
90 * up from IDLE instructions. See this report for more info:
91 * http://blackfin.uclinux.org/gf/tracker/4323
92 */
93 bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11));
94#else
95 bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
96#endif
88# ifdef CONFIG_BF54x 97# ifdef CONFIG_BF54x
89 bfin_write_SIC_IWR2(IWR_ENABLE_ALL); 98 bfin_write_SIC_IWR2(IWR_DISABLE_ALL);
90# endif 99# endif
91#else 100#else
92 bfin_write_SIC_IWR(IWR_ENABLE_ALL); 101 bfin_write_SIC_IWR(IWR_DISABLE_ALL);
93#endif 102#endif
94 103
95 local_irq_restore(flags); 104 local_irq_restore(flags);
@@ -229,28 +238,12 @@ int bfin_pm_suspend_mem_enter(void)
229 wakeup = bfin_read_VR_CTL() & ~FREQ; 238 wakeup = bfin_read_VR_CTL() & ~FREQ;
230 wakeup |= SCKELOW; 239 wakeup |= SCKELOW;
231 240
232 /* FIXME: merge this somehow with set_irq_wake */
233#ifdef CONFIG_PM_BFIN_WAKE_RTC
234 wakeup |= WAKE;
235#endif
236#ifdef CONFIG_PM_BFIN_WAKE_PH6 241#ifdef CONFIG_PM_BFIN_WAKE_PH6
237 wakeup |= PHYWE; 242 wakeup |= PHYWE;
238#endif 243#endif
239#ifdef CONFIG_PM_BFIN_WAKE_CAN
240 wakeup |= CANWE;
241#endif
242#ifdef CONFIG_PM_BFIN_WAKE_GP 244#ifdef CONFIG_PM_BFIN_WAKE_GP
243 wakeup |= GPWE; 245 wakeup |= GPWE;
244#endif 246#endif
245#ifdef CONFIG_PM_BFIN_WAKE_USB
246 wakeup |= USBWE;
247#endif
248#ifdef CONFIG_PM_BFIN_WAKE_KEYPAD
249 wakeup |= KPADWE;
250#endif
251#ifdef CONFIG_PM_BFIN_WAKE_ROTARY
252 wakeup |= ROTWE;
253#endif
254 247
255 local_irq_save(flags); 248 local_irq_save(flags);
256 249
@@ -268,7 +261,7 @@ int bfin_pm_suspend_mem_enter(void)
268 icache_disable(); 261 icache_disable();
269 bf53x_suspend_l1_mem(memptr); 262 bf53x_suspend_l1_mem(memptr);
270 263
271 do_hibernate(wakeup); /* Goodbye */ 264 do_hibernate(wakeup | vr_wakeup); /* Goodbye */
272 265
273 bf53x_resume_l1_mem(memptr); 266 bf53x_resume_l1_mem(memptr);
274 267