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authorMichael Hennerich <michael.hennerich@analog.com>2008-11-18 04:48:22 -0500
committerBryan Wu <cooloney@kernel.org>2008-11-18 04:48:22 -0500
commitdc26aec25d1a4e2690df166dbe843344728994ce (patch)
tree36717399eff88602af964f9f80814f9210698d95 /arch/blackfin/mach-common/ints-priority.c
parentf940260a980a1ad7570dfd7a4b73c6ad2207f738 (diff)
Blackfin arch: BF538/9 Linux kernel Support
Add supporing for Blackfin BF538 and BF539 processors. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/mach-common/ints-priority.c')
-rw-r--r--arch/blackfin/mach-common/ints-priority.c20
1 files changed, 14 insertions, 6 deletions
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c
index 34e8a726ffda..67700e6c90c7 100644
--- a/arch/blackfin/mach-common/ints-priority.c
+++ b/arch/blackfin/mach-common/ints-priority.c
@@ -103,12 +103,13 @@ static void __init search_IAR(void)
103 for (irqn = 0; irqn < NR_PERI_INTS; irqn++) { 103 for (irqn = 0; irqn < NR_PERI_INTS; irqn++) {
104 int iar_shift = (irqn & 7) * 4; 104 int iar_shift = (irqn & 7) * 4;
105 if (ivg == (0xf & 105 if (ivg == (0xf &
106#ifndef CONFIG_BF52x 106#if defined(CONFIG_BF52x) || defined(CONFIG_BF538) || defined(CONFIG_BF539)
107 bfin_read32((unsigned long *)SIC_IAR0 + 107 bfin_read32((unsigned long *)SIC_IAR0 +
108 (irqn >> 3)) >> iar_shift)) { 108 ((irqn % 32) >> 3) + ((irqn / 32) *
109 ((SIC_IAR4 - SIC_IAR0) / 4))) >> iar_shift)) {
109#else 110#else
110 bfin_read32((unsigned long *)SIC_IAR0 + 111 bfin_read32((unsigned long *)SIC_IAR0 +
111 ((irqn%32) >> 3) + ((irqn / 32) * 16)) >> iar_shift)) { 112 (irqn >> 3)) >> iar_shift)) {
112#endif 113#endif
113 ivg_table[irq_pos].irqno = IVG7 + irqn; 114 ivg_table[irq_pos].irqno = IVG7 + irqn;
114 ivg_table[irq_pos].isrflag = 1 << (irqn % 32); 115 ivg_table[irq_pos].isrflag = 1 << (irqn % 32);
@@ -537,6 +538,10 @@ static void bfin_demux_gpio_irq(unsigned int inta_irq,
537 irq = IRQ_PH0; 538 irq = IRQ_PH0;
538 break; 539 break;
539# endif 540# endif
541#elif defined(CONFIG_BF538) || defined(CONFIG_BF539)
542 case IRQ_PORTF_INTA:
543 irq = IRQ_PF0;
544 break;
540#elif defined(CONFIG_BF52x) 545#elif defined(CONFIG_BF52x)
541 case IRQ_PORTF_INTA: 546 case IRQ_PORTF_INTA:
542 irq = IRQ_PF0; 547 irq = IRQ_PF0;
@@ -984,7 +989,7 @@ int __init init_arch_irq(void)
984 int irq; 989 int irq;
985 unsigned long ilat = 0; 990 unsigned long ilat = 0;
986 /* Disable all the peripheral intrs - page 4-29 HW Ref manual */ 991 /* Disable all the peripheral intrs - page 4-29 HW Ref manual */
987#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) 992#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) || defined(BF538_FAMILY)
988 bfin_write_SIC_IMASK0(SIC_UNMASK_ALL); 993 bfin_write_SIC_IMASK0(SIC_UNMASK_ALL);
989 bfin_write_SIC_IMASK1(SIC_UNMASK_ALL); 994 bfin_write_SIC_IMASK1(SIC_UNMASK_ALL);
990# ifdef CONFIG_BF54x 995# ifdef CONFIG_BF54x
@@ -1037,7 +1042,10 @@ int __init init_arch_irq(void)
1037 case IRQ_PROG0_INTA: 1042 case IRQ_PROG0_INTA:
1038 case IRQ_PROG1_INTA: 1043 case IRQ_PROG1_INTA:
1039 case IRQ_PROG2_INTA: 1044 case IRQ_PROG2_INTA:
1045#elif defined(CONFIG_BF538) || defined(CONFIG_BF539)
1046 case IRQ_PORTF_INTA:
1040#endif 1047#endif
1048
1041 set_irq_chained_handler(irq, 1049 set_irq_chained_handler(irq,
1042 bfin_demux_gpio_irq); 1050 bfin_demux_gpio_irq);
1043 break; 1051 break;
@@ -1085,7 +1093,7 @@ int __init init_arch_irq(void)
1085 IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 | 1093 IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 |
1086 IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW; 1094 IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW;
1087 1095
1088#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) 1096#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) || defined(BF538_FAMILY)
1089 bfin_write_SIC_IWR0(IWR_DISABLE_ALL); 1097 bfin_write_SIC_IWR0(IWR_DISABLE_ALL);
1090#if defined(CONFIG_BF52x) 1098#if defined(CONFIG_BF52x)
1091 /* BF52x system reset does not properly reset SIC_IWR1 which 1099 /* BF52x system reset does not properly reset SIC_IWR1 which
@@ -1117,7 +1125,7 @@ void do_irq(int vec, struct pt_regs *fp)
1117 } else { 1125 } else {
1118 struct ivgx *ivg = ivg7_13[vec - IVG7].ifirst; 1126 struct ivgx *ivg = ivg7_13[vec - IVG7].ifirst;
1119 struct ivgx *ivg_stop = ivg7_13[vec - IVG7].istop; 1127 struct ivgx *ivg_stop = ivg7_13[vec - IVG7].istop;
1120#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) 1128#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) || defined(BF538_FAMILY)
1121 unsigned long sic_status[3]; 1129 unsigned long sic_status[3];
1122 1130
1123 sic_status[0] = bfin_read_SIC_ISR0() & bfin_read_SIC_IMASK0(); 1131 sic_status[0] = bfin_read_SIC_ISR0() & bfin_read_SIC_IMASK0();