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authorSonic Zhang <sonic.zhang@analog.com>2009-12-28 02:29:57 -0500
committerMike Frysinger <vapier@gentoo.org>2010-03-09 00:30:47 -0500
commit0325f25a919ed09d11b16ec8eccf95618dc36601 (patch)
tree4b2fba1389d1257088bbb598354b3cbc66f0178f /arch/blackfin/mach-common/ints-priority.c
parent69e1d8a61d5aa9e03676dc21fdfb750c5a97bb34 (diff)
Blackfin: SMP: add support for IRQ affinity
Now that the Blackfin IRQ controller supports this, drivers get the normal functionality of controlling which CPU to bind IRQs to. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/mach-common/ints-priority.c')
-rw-r--r--arch/blackfin/mach-common/ints-priority.c38
1 files changed, 34 insertions, 4 deletions
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c
index 5202a6076695..a5d243409d23 100644
--- a/arch/blackfin/mach-common/ints-priority.c
+++ b/arch/blackfin/mach-common/ints-priority.c
@@ -173,7 +173,12 @@ static void bfin_internal_mask_irq(unsigned int irq)
173 local_irq_restore_hw(flags); 173 local_irq_restore_hw(flags);
174} 174}
175 175
176#ifdef CONFIG_SMP
177static void bfin_internal_unmask_irq_affinity(unsigned int irq,
178 const struct cpumask *affinity)
179#else
176static void bfin_internal_unmask_irq(unsigned int irq) 180static void bfin_internal_unmask_irq(unsigned int irq)
181#endif
177{ 182{
178 unsigned long flags; 183 unsigned long flags;
179 184
@@ -186,16 +191,38 @@ static void bfin_internal_unmask_irq(unsigned int irq)
186 local_irq_save_hw(flags); 191 local_irq_save_hw(flags);
187 mask_bank = SIC_SYSIRQ(irq) / 32; 192 mask_bank = SIC_SYSIRQ(irq) / 32;
188 mask_bit = SIC_SYSIRQ(irq) % 32; 193 mask_bit = SIC_SYSIRQ(irq) % 32;
189 bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) |
190 (1 << mask_bit));
191#ifdef CONFIG_SMP 194#ifdef CONFIG_SMP
192 bfin_write_SICB_IMASK(mask_bank, bfin_read_SICB_IMASK(mask_bank) | 195 if (cpumask_test_cpu(0, affinity))
193 (1 << mask_bit)); 196#endif
197 bfin_write_SIC_IMASK(mask_bank,
198 bfin_read_SIC_IMASK(mask_bank) |
199 (1 << mask_bit));
200#ifdef CONFIG_SMP
201 if (cpumask_test_cpu(1, affinity))
202 bfin_write_SICB_IMASK(mask_bank,
203 bfin_read_SICB_IMASK(mask_bank) |
204 (1 << mask_bit));
194#endif 205#endif
195#endif 206#endif
196 local_irq_restore_hw(flags); 207 local_irq_restore_hw(flags);
197} 208}
198 209
210#ifdef CONFIG_SMP
211static void bfin_internal_unmask_irq(unsigned int irq)
212{
213 struct irq_desc *desc = irq_to_desc(irq);
214 bfin_internal_unmask_irq_affinity(irq, desc->affinity);
215}
216
217static int bfin_internal_set_affinity(unsigned int irq, const struct cpumask *mask)
218{
219 bfin_internal_mask_irq(irq);
220 bfin_internal_unmask_irq_affinity(irq, mask);
221
222 return 0;
223}
224#endif
225
199#ifdef CONFIG_PM 226#ifdef CONFIG_PM
200int bfin_internal_set_wake(unsigned int irq, unsigned int state) 227int bfin_internal_set_wake(unsigned int irq, unsigned int state)
201{ 228{
@@ -271,6 +298,9 @@ static struct irq_chip bfin_internal_irqchip = {
271 .mask_ack = bfin_internal_mask_irq, 298 .mask_ack = bfin_internal_mask_irq,
272 .disable = bfin_internal_mask_irq, 299 .disable = bfin_internal_mask_irq,
273 .enable = bfin_internal_unmask_irq, 300 .enable = bfin_internal_unmask_irq,
301#ifdef CONFIG_SMP
302 .set_affinity = bfin_internal_set_affinity,
303#endif
274#ifdef CONFIG_PM 304#ifdef CONFIG_PM
275 .set_wake = bfin_internal_set_wake, 305 .set_wake = bfin_internal_set_wake,
276#endif 306#endif