aboutsummaryrefslogtreecommitdiffstats
path: root/arch/blackfin/mach-common/interrupt.S
diff options
context:
space:
mode:
authorRobin Getz <robin.getz@analog.com>2009-05-18 14:33:26 -0400
committerMike Frysinger <vapier@gentoo.org>2009-06-12 06:11:44 -0400
commitb9a3899d59c3f0fc074573f0eba2419b1e4c0bca (patch)
tree09d20c3b062604d615c9d224c06c5df5a5acbcec /arch/blackfin/mach-common/interrupt.S
parent97b070c8e7e82be30c8a3bf19e69b8c0c71f1fac (diff)
Blackfin: make deferred hardware errors more exact
Hardware errors on the Blackfin architecture are queued by nature of the hardware design. Things that could generate a hardware level queue up at the system interface and might not process until much later, at which point the system would send a notification back to the core. As such, it is possible for user space code to do something that would trigger a hardware error, but have it delay long enough for the process context to switch. So when the hardware error does signal, we mistakenly evaluate it as a different process or as kernel context and panic (erp!). This makes it pretty difficult to find the offending context. But wait, there is good news somewhere. By forcing a SSYNC in the interrupt entry, we force all pending queues at the system level to be processed and all hardware errors to be signaled. Then we check the current interrupt state to see if the hardware error is now signaled. If so, we re-queue the current interrupt and return thus allowing the higher priority hardware error interrupt to process properly. Since we haven't done any other context processing yet, the right context will be selected and killed. There is still the possibility that the exact offending instruction will be unknown, but at least we'll have a much better idea of where to look. The downside of course is that this causes system-wide syncs at every interrupt point which results in significant performance degradation. Since this situation should not occur in any properly configured system (as hardware errors are triggered by things like bad pointers), make it a debug configuration option and disable it by default. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/mach-common/interrupt.S')
-rw-r--r--arch/blackfin/mach-common/interrupt.S27
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/blackfin/mach-common/interrupt.S b/arch/blackfin/mach-common/interrupt.S
index 0069c2dd4625..9c46680186e4 100644
--- a/arch/blackfin/mach-common/interrupt.S
+++ b/arch/blackfin/mach-common/interrupt.S
@@ -145,6 +145,14 @@ __common_int_entry:
145 145
146/* interrupt routine for ivhw - 5 */ 146/* interrupt routine for ivhw - 5 */
147ENTRY(_evt_ivhw) 147ENTRY(_evt_ivhw)
148 /* In case a single action kicks off multiple memory transactions, (like
149 * a cache line fetch, - this can cause multiple hardware errors, let's
150 * catch them all. First - make sure all the actions are complete, and
151 * the core sees the hardware errors.
152 */
153 SSYNC;
154 SSYNC;
155
148 SAVE_ALL_SYS 156 SAVE_ALL_SYS
149#ifdef CONFIG_FRAME_POINTER 157#ifdef CONFIG_FRAME_POINTER
150 fp = 0; 158 fp = 0;
@@ -159,6 +167,25 @@ ENTRY(_evt_ivhw)
1591: 1671:
160#endif 168#endif
161 169
170 /* Handle all stacked hardware errors
171 * To make sure we don't hang forever, only do it 10 times
172 */
173 R0 = 0;
174 R2 = 10;
1751:
176 P0.L = LO(ILAT);
177 P0.H = HI(ILAT);
178 R1 = [P0];
179 CC = BITTST(R1, EVT_IVHW_P);
180 IF ! CC JUMP 2f;
181 /* OK a hardware error is pending - clear it */
182 R1 = EVT_IVHW_P;
183 [P0] = R1;
184 R0 += 1;
185 CC = R1 == R2;
186 if CC JUMP 2f;
187 JUMP 1b;
1882:
162 # We are going to dump something out, so make sure we print IPEND properly 189 # We are going to dump something out, so make sure we print IPEND properly
163 p2.l = lo(IPEND); 190 p2.l = lo(IPEND);
164 p2.h = hi(IPEND); 191 p2.h = hi(IPEND);