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authorGraf Yang <graf.yang@analog.com>2009-02-04 03:49:45 -0500
committerBryan Wu <cooloney@kernel.org>2009-02-04 03:49:45 -0500
commit9960aa6a07bc41223a3bf2df1dfd284698486eb0 (patch)
tree16710e013031c25e5972464c414cd59daa79470e /arch/blackfin/mach-common/head.S
parentbe1d8543a82d3a8f466509bbd355a5861193135f (diff)
Blackfin arch: Fix bug - 561 SMP kernel can't boot from jffs2
bss_l2 section is garbage when the data in this section is used by _bfin_relocate_l1_mem, so move the zero out function ahead. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/mach-common/head.S')
-rw-r--r--arch/blackfin/mach-common/head.S84
1 files changed, 42 insertions, 42 deletions
diff --git a/arch/blackfin/mach-common/head.S b/arch/blackfin/mach-common/head.S
index e1e42c029e15..698d4c05947e 100644
--- a/arch/blackfin/mach-common/head.S
+++ b/arch/blackfin/mach-common/head.S
@@ -17,6 +17,19 @@
17 17
18__INIT 18__INIT
19 19
20ENTRY(__init_clear_bss)
21 r2 = r2 - r1;
22 cc = r2 == 0;
23 if cc jump .L_bss_done;
24 r2 >>= 2;
25 p1 = r1;
26 p2 = r2;
27 lsetup (1f, 1f) lc0 = p2;
281: [p1++] = r0;
29.L_bss_done:
30 rts;
31ENDPROC(__init_clear_bss)
32
20#define INITIAL_STACK (L1_SCRATCH_START + L1_SCRATCH_LENGTH - 12) 33#define INITIAL_STACK (L1_SCRATCH_START + L1_SCRATCH_LENGTH - 12)
21 34
22ENTRY(__start) 35ENTRY(__start)
@@ -144,6 +157,35 @@ ENTRY(__start)
144 call _init_early_exception_vectors; 157 call _init_early_exception_vectors;
145#endif 158#endif
146 159
160 r0 = 0 (x);
161 /* Zero out all of the fun bss regions */
162#if L1_DATA_A_LENGTH > 0
163 r1.l = __sbss_l1;
164 r1.h = __sbss_l1;
165 r2.l = __ebss_l1;
166 r2.h = __ebss_l1;
167 call __init_clear_bss
168#endif
169#if L1_DATA_B_LENGTH > 0
170 r1.l = __sbss_b_l1;
171 r1.h = __sbss_b_l1;
172 r2.l = __ebss_b_l1;
173 r2.h = __ebss_b_l1;
174 call __init_clear_bss
175#endif
176#if L2_LENGTH > 0
177 r1.l = __sbss_l2;
178 r1.h = __sbss_l2;
179 r2.l = __ebss_l2;
180 r2.h = __ebss_l2;
181 call __init_clear_bss
182#endif
183 r1.l = ___bss_start;
184 r1.h = ___bss_start;
185 r2.l = ___bss_stop;
186 r2.h = ___bss_stop;
187 call __init_clear_bss
188
147 /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */ 189 /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */
148 call _bfin_relocate_l1_mem; 190 call _bfin_relocate_l1_mem;
149#ifdef CONFIG_BFIN_KERNEL_CLOCK 191#ifdef CONFIG_BFIN_KERNEL_CLOCK
@@ -185,19 +227,6 @@ ENDPROC(__start)
185# define WDOG_CTL WDOGA_CTL 227# define WDOG_CTL WDOGA_CTL
186#endif 228#endif
187 229
188ENTRY(__init_clear_bss)
189 r2 = r2 - r1;
190 cc = r2 == 0;
191 if cc jump .L_bss_done;
192 r2 >>= 2;
193 p1 = r1;
194 p2 = r2;
195 lsetup (1f, 1f) lc0 = p2;
1961: [p1++] = r0;
197.L_bss_done:
198 rts;
199ENDPROC(__init_clear_bss)
200
201ENTRY(_real_start) 230ENTRY(_real_start)
202 /* Enable nested interrupts */ 231 /* Enable nested interrupts */
203 [--sp] = reti; 232 [--sp] = reti;
@@ -209,35 +238,6 @@ ENTRY(_real_start)
209 w[p0] = r0; 238 w[p0] = r0;
210 ssync; 239 ssync;
211 240
212 r0 = 0 (x);
213 /* Zero out all of the fun bss regions */
214#if L1_DATA_A_LENGTH > 0
215 r1.l = __sbss_l1;
216 r1.h = __sbss_l1;
217 r2.l = __ebss_l1;
218 r2.h = __ebss_l1;
219 call __init_clear_bss
220#endif
221#if L1_DATA_B_LENGTH > 0
222 r1.l = __sbss_b_l1;
223 r1.h = __sbss_b_l1;
224 r2.l = __ebss_b_l1;
225 r2.h = __ebss_b_l1;
226 call __init_clear_bss
227#endif
228#if L2_LENGTH > 0
229 r1.l = __sbss_l2;
230 r1.h = __sbss_l2;
231 r2.l = __ebss_l2;
232 r2.h = __ebss_l2;
233 call __init_clear_bss
234#endif
235 r1.l = ___bss_start;
236 r1.h = ___bss_start;
237 r2.l = ___bss_stop;
238 r2.h = ___bss_stop;
239 call __init_clear_bss
240
241 /* Pass the u-boot arguments to the global value command line */ 241 /* Pass the u-boot arguments to the global value command line */
242 R0 = R7; 242 R0 = R7;
243 call _cmdline_init; 243 call _cmdline_init;