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authorSonic Zhang <sonic.zhang@analog.com>2010-11-12 00:54:32 -0500
committerMike Frysinger <vapier@gentoo.org>2011-01-10 07:18:21 -0500
commit064cc44e62283227524c8e84ff247939728dec79 (patch)
treea870fdcb5f67c912717888462eea41393808f5de /arch/blackfin/mach-bf561
parente54b673081d12c46b47fdfe1772656cb2b43721d (diff)
Blackfin: SMP: kgdb: flush core internal write buffer before flushinv
KGDB single step in SMP kernel may hang forever in flushinv without a CSYNC ahead. This is because the core internal write buffers need to be flushed before invalidating the data cache to make sure the insn fetch is not out of sync. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/mach-bf561')
-rw-r--r--arch/blackfin/mach-bf561/atomic.S5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/blackfin/mach-bf561/atomic.S b/arch/blackfin/mach-bf561/atomic.S
index f99f174b129f..52d6f73fcced 100644
--- a/arch/blackfin/mach-bf561/atomic.S
+++ b/arch/blackfin/mach-bf561/atomic.S
@@ -49,6 +49,7 @@ ENTRY(_get_core_lock)
49 jump .Lretry_corelock 49 jump .Lretry_corelock
50.Ldone_corelock: 50.Ldone_corelock:
51 p0 = r1; 51 p0 = r1;
52 /* flush core internal write buffer before invalidate dcache */
52 CSYNC(r2); 53 CSYNC(r2);
53 flushinv[p0]; 54 flushinv[p0];
54 SSYNC(r2); 55 SSYNC(r2);
@@ -685,6 +686,8 @@ ENTRY(___raw_atomic_test_asm)
685 r1 = -L1_CACHE_BYTES; 686 r1 = -L1_CACHE_BYTES;
686 r1 = r0 & r1; 687 r1 = r0 & r1;
687 p0 = r1; 688 p0 = r1;
689 /* flush core internal write buffer before invalidate dcache */
690 CSYNC(r2);
688 flushinv[p0]; 691 flushinv[p0];
689 SSYNC(r2); 692 SSYNC(r2);
690 r0 = [p1]; 693 r0 = [p1];
@@ -907,6 +910,8 @@ ENTRY(___raw_uncached_fetch_asm)
907 r1 = -L1_CACHE_BYTES; 910 r1 = -L1_CACHE_BYTES;
908 r1 = r0 & r1; 911 r1 = r0 & r1;
909 p0 = r1; 912 p0 = r1;
913 /* flush core internal write buffer before invalidate dcache */
914 CSYNC(r2);
910 flushinv[p0]; 915 flushinv[p0];
911 SSYNC(r2); 916 SSYNC(r2);
912 r0 = [p1]; 917 r0 = [p1];