aboutsummaryrefslogtreecommitdiffstats
path: root/arch/blackfin/mach-bf561
diff options
context:
space:
mode:
authorGraf Yang <graf.yang@analog.com>2009-01-07 10:14:39 -0500
committerBryan Wu <cooloney@kernel.org>2009-01-07 10:14:39 -0500
commitdbc895f95500a73ebf1ff12fe85f2e2b3790f52f (patch)
tree8b60024a7725c559767295b2b3ef143a39111f8b /arch/blackfin/mach-bf561
parentf994607a2e118aedf1116a58ecd16126dbb83d28 (diff)
Blackfin arch: smp patch cleanup from LKML review
1. Use inline get_l1_... functions instead of macro 2. Fix compile issue about smp barrier functions Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/mach-bf561')
-rw-r--r--arch/blackfin/mach-bf561/include/mach/mem_map.h42
-rw-r--r--arch/blackfin/mach-bf561/smp.c11
2 files changed, 4 insertions, 49 deletions
diff --git a/arch/blackfin/mach-bf561/include/mach/mem_map.h b/arch/blackfin/mach-bf561/include/mach/mem_map.h
index 488c3bda65bf..419dffdc96eb 100644
--- a/arch/blackfin/mach-bf561/include/mach/mem_map.h
+++ b/arch/blackfin/mach-bf561/include/mach/mem_map.h
@@ -85,47 +85,7 @@
85#define L1_SCRATCH_START COREA_L1_SCRATCH_START 85#define L1_SCRATCH_START COREA_L1_SCRATCH_START
86#define L1_SCRATCH_LENGTH 0x1000 86#define L1_SCRATCH_LENGTH 0x1000
87 87
88#ifndef __ASSEMBLY__ 88#ifdef __ASSEMBLY__
89
90#ifdef CONFIG_SMP
91
92#define get_l1_scratch_start_cpu(cpu) \
93 ({ unsigned long __addr; \
94 __addr = (cpu) ? COREB_L1_SCRATCH_START : COREA_L1_SCRATCH_START;\
95 __addr; })
96
97#define get_l1_code_start_cpu(cpu) \
98 ({ unsigned long __addr; \
99 __addr = (cpu) ? COREB_L1_CODE_START : COREA_L1_CODE_START; \
100 __addr; })
101
102#define get_l1_data_a_start_cpu(cpu) \
103 ({ unsigned long __addr; \
104 __addr = (cpu) ? COREB_L1_DATA_A_START : COREA_L1_DATA_A_START;\
105 __addr; })
106
107#define get_l1_data_b_start_cpu(cpu) \
108 ({ unsigned long __addr; \
109 __addr = (cpu) ? COREB_L1_DATA_B_START : COREA_L1_DATA_B_START;\
110 __addr; })
111
112#define get_l1_scratch_start() get_l1_scratch_start_cpu(blackfin_core_id())
113#define get_l1_code_start() get_l1_code_start_cpu(blackfin_core_id())
114#define get_l1_data_a_start() get_l1_data_a_start_cpu(blackfin_core_id())
115#define get_l1_data_b_start() get_l1_data_b_start_cpu(blackfin_core_id())
116
117#else /* !CONFIG_SMP */
118#define get_l1_scratch_start_cpu(cpu) L1_SCRATCH_START
119#define get_l1_code_start_cpu(cpu) L1_CODE_START
120#define get_l1_data_a_start_cpu(cpu) L1_DATA_A_START
121#define get_l1_data_b_start_cpu(cpu) L1_DATA_B_START
122#define get_l1_scratch_start() L1_SCRATCH_START
123#define get_l1_code_start() L1_CODE_START
124#define get_l1_data_a_start() L1_DATA_A_START
125#define get_l1_data_b_start() L1_DATA_B_START
126#endif /* !CONFIG_SMP */
127
128#else /* __ASSEMBLY__ */
129 89
130/* 90/*
131 * The following macros both return the address of the PDA for the 91 * The following macros both return the address of the PDA for the
diff --git a/arch/blackfin/mach-bf561/smp.c b/arch/blackfin/mach-bf561/smp.c
index 23fd4c13897f..9b27e698c0b2 100644
--- a/arch/blackfin/mach-bf561/smp.c
+++ b/arch/blackfin/mach-bf561/smp.c
@@ -27,11 +27,6 @@
27#include <asm/smp.h> 27#include <asm/smp.h>
28#include <asm/dma.h> 28#include <asm/dma.h>
29 29
30#define COREB_SRAM_BASE 0xff600000
31#define COREB_SRAM_SIZE 0x4000
32
33extern char coreb_trampoline_start, coreb_trampoline_end;
34
35static DEFINE_SPINLOCK(boot_lock); 30static DEFINE_SPINLOCK(boot_lock);
36 31
37static cpumask_t cpu_callin_map; 32static cpumask_t cpu_callin_map;
@@ -54,15 +49,15 @@ void __init platform_prepare_cpus(unsigned int max_cpus)
54 int len; 49 int len;
55 50
56 len = &coreb_trampoline_end - &coreb_trampoline_start + 1; 51 len = &coreb_trampoline_end - &coreb_trampoline_start + 1;
57 BUG_ON(len > COREB_SRAM_SIZE); 52 BUG_ON(len > L1_CODE_LENGTH);
58 53
59 dma_memcpy((void *)COREB_SRAM_BASE, &coreb_trampoline_start, len); 54 dma_memcpy((void *)COREB_L1_CODE_START, &coreb_trampoline_start, len);
60 55
61 /* Both cores ought to be present on a bf561! */ 56 /* Both cores ought to be present on a bf561! */
62 cpu_set(0, cpu_present_map); /* CoreA */ 57 cpu_set(0, cpu_present_map); /* CoreA */
63 cpu_set(1, cpu_present_map); /* CoreB */ 58 cpu_set(1, cpu_present_map); /* CoreB */
64 59
65 printk(KERN_INFO "CoreB bootstrap code to SRAM %p via DMA.\n", (void *)COREB_SRAM_BASE); 60 printk(KERN_INFO "CoreB bootstrap code to SRAM %p via DMA.\n", (void *)COREB_L1_CODE_START);
66} 61}
67 62
68int __init setup_profiling_timer(unsigned int multiplier) /* not supported */ 63int __init setup_profiling_timer(unsigned int multiplier) /* not supported */