diff options
author | Sonic Zhang <sonic.zhang@analog.com> | 2009-04-07 11:52:26 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-04-07 11:44:05 -0400 |
commit | d307d36adeaa70074773b3e5eab8d7e1beb008a4 (patch) | |
tree | 2a51257927be7c1a99ffb38b4752e0a4b56edc2a /arch/blackfin/mach-bf561 | |
parent | 6f95570e407d03c5140a220e054f9b18abdc7041 (diff) |
tty: Blackin CTS/RTS
Both software emulated and hardware based CTS and RTS are enabled in
serial driver.
The CTS RTS PIN connection on BF548 UART port is defined as a modem
device not as a host device. In order to test it under Linux, please
nake a cross UART cable to exchange CTS and RTS signal.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/blackfin/mach-bf561')
-rw-r--r-- | arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h index d0469e3e16d8..a1b50878553f 100644 --- a/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h +++ b/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h | |||
@@ -53,9 +53,9 @@ | |||
53 | #define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) | 53 | #define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) |
54 | #define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) | 54 | #define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) |
55 | 55 | ||
56 | #define UART_GET_CTS(x) gpio_get_value(x->cts_pin) | 56 | #define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin)) |
57 | #define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1) | 57 | #define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1) |
58 | #define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0) | 58 | #define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0) |
59 | #define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) | 59 | #define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) |
60 | #define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0) | 60 | #define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0) |
61 | 61 | ||
@@ -74,6 +74,7 @@ | |||
74 | struct bfin_serial_port { | 74 | struct bfin_serial_port { |
75 | struct uart_port port; | 75 | struct uart_port port; |
76 | unsigned int old_status; | 76 | unsigned int old_status; |
77 | int status_irq; | ||
77 | unsigned int lsr; | 78 | unsigned int lsr; |
78 | #ifdef CONFIG_SERIAL_BFIN_DMA | 79 | #ifdef CONFIG_SERIAL_BFIN_DMA |
79 | int tx_done; | 80 | int tx_done; |
@@ -116,6 +117,7 @@ static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart) | |||
116 | struct bfin_serial_res { | 117 | struct bfin_serial_res { |
117 | unsigned long uart_base_addr; | 118 | unsigned long uart_base_addr; |
118 | int uart_irq; | 119 | int uart_irq; |
120 | int uart_status_irq; | ||
119 | #ifdef CONFIG_SERIAL_BFIN_DMA | 121 | #ifdef CONFIG_SERIAL_BFIN_DMA |
120 | unsigned int uart_tx_dma_channel; | 122 | unsigned int uart_tx_dma_channel; |
121 | unsigned int uart_rx_dma_channel; | 123 | unsigned int uart_rx_dma_channel; |
@@ -130,6 +132,7 @@ struct bfin_serial_res bfin_serial_resource[] = { | |||
130 | { | 132 | { |
131 | 0xFFC00400, | 133 | 0xFFC00400, |
132 | IRQ_UART_RX, | 134 | IRQ_UART_RX, |
135 | IRQ_UART_ERROR, | ||
133 | #ifdef CONFIG_SERIAL_BFIN_DMA | 136 | #ifdef CONFIG_SERIAL_BFIN_DMA |
134 | CH_UART_TX, | 137 | CH_UART_TX, |
135 | CH_UART_RX, | 138 | CH_UART_RX, |