diff options
author | Mike Frysinger <michael.frysinger@analog.com> | 2007-06-11 03:31:30 -0400 |
---|---|---|
committer | Bryan Wu <bryan.wu@analog.com> | 2007-06-11 03:31:30 -0400 |
commit | 83a5c3e3218f138b1a99f787c76e380d6a6ecec9 (patch) | |
tree | d71fb83fb0406af38d4e3266cb2d54dabb1bb3eb /arch/blackfin/mach-bf561 | |
parent | 16983de0cec7b93cc2568f96909d4ea7c118bd8a (diff) |
Blackfin arch: unify differences between our diff head.S files -- no functional changes
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'arch/blackfin/mach-bf561')
-rw-r--r-- | arch/blackfin/mach-bf561/head.S | 20 |
1 files changed, 11 insertions, 9 deletions
diff --git a/arch/blackfin/mach-bf561/head.S b/arch/blackfin/mach-bf561/head.S index ad9187a866a5..3029e940ddcd 100644 --- a/arch/blackfin/mach-bf561/head.S +++ b/arch/blackfin/mach-bf561/head.S | |||
@@ -46,14 +46,16 @@ | |||
46 | 46 | ||
47 | ENTRY(__start) | 47 | ENTRY(__start) |
48 | ENTRY(__stext) | 48 | ENTRY(__stext) |
49 | /* R0: argument of command line string, passed from uboot, save it */ | 49 | /* R0: argument of command line string, passed from uboot, save it */ |
50 | R7 = R0; | 50 | R7 = R0; |
51 | /* Set the SYSCFG register */ | 51 | /* Set the SYSCFG register: |
52 | * Enable Cycle Counter and Nesting Of Interrupts (3rd Bit) | ||
53 | */ | ||
52 | R0 = 0x36; | 54 | R0 = 0x36; |
53 | SYSCFG = R0; /*Enable Cycle Counter and Nesting Of Interrupts(3rd Bit)*/ | 55 | SYSCFG = R0; |
54 | R0 = 0; | 56 | R0 = 0; |
55 | 57 | ||
56 | /*Clear Out All the data and pointer Registers*/ | 58 | /* Clear Out All the data and pointer Registers */ |
57 | R1 = R0; | 59 | R1 = R0; |
58 | R2 = R0; | 60 | R2 = R0; |
59 | R3 = R0; | 61 | R3 = R0; |
@@ -75,7 +77,7 @@ ENTRY(__stext) | |||
75 | L2 = r0; | 77 | L2 = r0; |
76 | L3 = r0; | 78 | L3 = r0; |
77 | 79 | ||
78 | /* Clear Out All the DAG Registers*/ | 80 | /* Clear Out All the DAG Registers */ |
79 | B0 = r0; | 81 | B0 = r0; |
80 | B1 = r0; | 82 | B1 = r0; |
81 | B2 = r0; | 83 | B2 = r0; |
@@ -238,7 +240,7 @@ ENTRY(_real_start) | |||
238 | p2.h = ___bss_stop; | 240 | p2.h = ___bss_stop; |
239 | r0 = 0; | 241 | r0 = 0; |
240 | p2 -= p1; | 242 | p2 -= p1; |
241 | lsetup (.L_clear_bss, .L_clear_bss ) lc0 = p2; | 243 | lsetup (.L_clear_bss, .L_clear_bss) lc0 = p2; |
242 | .L_clear_bss: | 244 | .L_clear_bss: |
243 | B[p1++] = r0; | 245 | B[p1++] = r0; |
244 | 246 | ||
@@ -253,11 +255,11 @@ ENTRY(_real_start) | |||
253 | r0 = r0 >> 1; | 255 | r0 = r0 >> 1; |
254 | p2 = r0; | 256 | p2 = r0; |
255 | r0 = 0; | 257 | r0 = 0; |
256 | lsetup (.L_clear_zero, .L_clear_zero ) lc0 = p2; | 258 | lsetup (.L_clear_zero, .L_clear_zero) lc0 = p2; |
257 | .L_clear_zero: | 259 | .L_clear_zero: |
258 | W[p1++] = r0; | 260 | W[p1++] = r0; |
259 | 261 | ||
260 | /* pass the uboot arguments to the global value command line */ | 262 | /* pass the uboot arguments to the global value command line */ |
261 | R0 = R7; | 263 | R0 = R7; |
262 | call _cmdline_init; | 264 | call _cmdline_init; |
263 | 265 | ||
@@ -350,7 +352,7 @@ ENTRY(_start_dma_code) | |||
350 | if ! CC jump .Lcheck_again; | 352 | if ! CC jump .Lcheck_again; |
351 | 353 | ||
352 | /* Configure SCLK & CCLK Dividers */ | 354 | /* Configure SCLK & CCLK Dividers */ |
353 | r0 = (CONFIG_CCLK_ACT_DIV | CONFIG_SCLK_DIV); | 355 | r0 = (CONFIG_CCLK_ACT_DIV | CONFIG_SCLK_DIV); |
354 | p0.h = hi(PLL_DIV); | 356 | p0.h = hi(PLL_DIV); |
355 | p0.l = lo(PLL_DIV); | 357 | p0.l = lo(PLL_DIV); |
356 | w[p0] = r0.l; | 358 | w[p0] = r0.l; |