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authorMike Frysinger <vapier@gentoo.org>2011-05-26 04:03:10 -0400
committerMike Frysinger <vapier@gentoo.org>2011-07-23 01:10:41 -0400
commit2f7d63f909900c555baf36a4c6a11e9bf8e1af18 (patch)
tree1c15e1a2f04300366cdd1d6e056e1a5f18fd55fc /arch/blackfin/mach-bf561
parent9be8631b8a7d11fa6d206fcf0a7a2005ed39f41b (diff)
Blackfin: boards: clean up redundant/dead spi resources
The default for the Blackfin SPI driver is 8 bits and dma disabled, so many of the bfin5xx_spi_chip resources are redundant. So punt those parts. Further, drivers should themselves be declaring 16 bit transfers, so for those that do, and for the ones which no longer do 16 bit transfers, drop the bfin5xx_spi_chip resources. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/mach-bf561')
-rw-r--r--arch/blackfin/mach-bf561/boards/acvilon.c9
-rw-r--r--arch/blackfin/mach-bf561/boards/cm_bf561.c36
-rw-r--r--arch/blackfin/mach-bf561/boards/ezkit.c17
3 files changed, 0 insertions, 62 deletions
diff --git a/arch/blackfin/mach-bf561/boards/acvilon.c b/arch/blackfin/mach-bf561/boards/acvilon.c
index 9231a942892b..972e1347c6bc 100644
--- a/arch/blackfin/mach-bf561/boards/acvilon.c
+++ b/arch/blackfin/mach-bf561/boards/acvilon.c
@@ -364,14 +364,6 @@ static struct flash_platform_data bfin_spi_dataflash_data = {
364/* DataFlash chip */ 364/* DataFlash chip */
365static struct bfin5xx_spi_chip data_flash_chip_info = { 365static struct bfin5xx_spi_chip data_flash_chip_info = {
366 .enable_dma = 0, /* use dma transfer with this chip */ 366 .enable_dma = 0, /* use dma transfer with this chip */
367 .bits_per_word = 8,
368};
369#endif
370
371#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
372static struct bfin5xx_spi_chip spidev_chip_info = {
373 .enable_dma = 0,
374 .bits_per_word = 8,
375}; 367};
376#endif 368#endif
377 369
@@ -420,7 +412,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
420 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 412 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
421 .bus_num = 0, 413 .bus_num = 0,
422 .chip_select = 3, 414 .chip_select = 3,
423 .controller_data = &spidev_chip_info,
424 }, 415 },
425#endif 416#endif
426#if defined(CONFIG_MTD_DATAFLASH) || defined(CONFIG_MTD_DATAFLASH_MODULE) 417#if defined(CONFIG_MTD_DATAFLASH) || defined(CONFIG_MTD_DATAFLASH_MODULE)
diff --git a/arch/blackfin/mach-bf561/boards/cm_bf561.c b/arch/blackfin/mach-bf561/boards/cm_bf561.c
index 2e481362065b..e4f397d1d65b 100644
--- a/arch/blackfin/mach-bf561/boards/cm_bf561.c
+++ b/arch/blackfin/mach-bf561/boards/cm_bf561.c
@@ -60,29 +60,6 @@ static struct flash_platform_data bfin_spi_flash_data = {
60/* SPI flash chip (m25p64) */ 60/* SPI flash chip (m25p64) */
61static struct bfin5xx_spi_chip spi_flash_chip_info = { 61static struct bfin5xx_spi_chip spi_flash_chip_info = {
62 .enable_dma = 0, /* use dma transfer with this chip*/ 62 .enable_dma = 0, /* use dma transfer with this chip*/
63 .bits_per_word = 8,
64};
65#endif
66
67#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
68/* SPI ADC chip */
69static struct bfin5xx_spi_chip spi_adc_chip_info = {
70 .enable_dma = 1, /* use dma transfer with this chip*/
71 .bits_per_word = 16,
72};
73#endif
74
75#if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
76static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
77 .enable_dma = 0,
78 .bits_per_word = 16,
79};
80#endif
81
82#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
83static struct bfin5xx_spi_chip mmc_spi_chip_info = {
84 .enable_dma = 0,
85 .bits_per_word = 8,
86}; 63};
87#endif 64#endif
88 65
@@ -100,24 +77,12 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
100 }, 77 },
101#endif 78#endif
102 79
103#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
104 {
105 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
106 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
107 .bus_num = 0, /* Framework bus number */
108 .chip_select = 1, /* Framework chip select. */
109 .platform_data = NULL, /* No spi_driver specific config */
110 .controller_data = &spi_adc_chip_info,
111 },
112#endif
113
114#if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) 80#if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
115 { 81 {
116 .modalias = "ad183x", 82 .modalias = "ad183x",
117 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 83 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
118 .bus_num = 0, 84 .bus_num = 0,
119 .chip_select = 4, 85 .chip_select = 4,
120 .controller_data = &ad1836_spi_chip_info,
121 }, 86 },
122#endif 87#endif
123#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) 88#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
@@ -126,7 +91,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
126 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ 91 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
127 .bus_num = 0, 92 .bus_num = 0,
128 .chip_select = 1, 93 .chip_select = 1,
129 .controller_data = &mmc_spi_chip_info,
130 .mode = SPI_MODE_3, 94 .mode = SPI_MODE_3,
131 }, 95 },
132#endif 96#endif
diff --git a/arch/blackfin/mach-bf561/boards/ezkit.c b/arch/blackfin/mach-bf561/boards/ezkit.c
index ba8149858714..9490dc800ca5 100644
--- a/arch/blackfin/mach-bf561/boards/ezkit.c
+++ b/arch/blackfin/mach-bf561/boards/ezkit.c
@@ -286,21 +286,6 @@ static struct platform_device ezkit_flash_device = {
286}; 286};
287#endif 287#endif
288 288
289#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
290 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
291static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
292 .enable_dma = 0,
293 .bits_per_word = 16,
294};
295#endif
296
297#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
298static struct bfin5xx_spi_chip spidev_chip_info = {
299 .enable_dma = 0,
300 .bits_per_word = 8,
301};
302#endif
303
304#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 289#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
305/* SPI (0) */ 290/* SPI (0) */
306static struct resource bfin_spi0_resource[] = { 291static struct resource bfin_spi0_resource[] = {
@@ -348,7 +333,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
348 .bus_num = 0, 333 .bus_num = 0,
349 .chip_select = 4, 334 .chip_select = 4,
350 .platform_data = "ad1836", /* only includes chip name for the moment */ 335 .platform_data = "ad1836", /* only includes chip name for the moment */
351 .controller_data = &ad1836_spi_chip_info,
352 .mode = SPI_MODE_3, 336 .mode = SPI_MODE_3,
353 }, 337 },
354#endif 338#endif
@@ -358,7 +342,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
358 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 342 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
359 .bus_num = 0, 343 .bus_num = 0,
360 .chip_select = 1, 344 .chip_select = 1,
361 .controller_data = &spidev_chip_info,
362 }, 345 },
363#endif 346#endif
364}; 347};