diff options
author | Mike Frysinger <vapier@gentoo.org> | 2010-10-27 16:32:24 -0400 |
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committer | Mike Frysinger <vapier@gentoo.org> | 2011-01-10 07:18:16 -0500 |
commit | ec5109e7ca086359c46fe5351121d0e125a2879b (patch) | |
tree | 59408b2f26ed2532fb7edbebfa8200343529677f /arch/blackfin/mach-bf561 | |
parent | 10cdc1a78a02bb1d76b28b146083cb060399d86f (diff) |
Blackfin: bf561: SMP: add multicore pll handlers
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/mach-bf561')
-rw-r--r-- | arch/blackfin/mach-bf561/include/mach/pll.h | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/arch/blackfin/mach-bf561/include/mach/pll.h b/arch/blackfin/mach-bf561/include/mach/pll.h index 94cca674d835..7977db2f1c12 100644 --- a/arch/blackfin/mach-bf561/include/mach/pll.h +++ b/arch/blackfin/mach-bf561/include/mach/pll.h | |||
@@ -1 +1,54 @@ | |||
1 | /* | ||
2 | * Copyright 2005-2010 Analog Devices Inc. | ||
3 | * | ||
4 | * Licensed under the GPL-2 or later. | ||
5 | */ | ||
6 | |||
7 | #ifndef _MACH_PLL_H | ||
8 | #define _MACH_PLL_H | ||
9 | |||
10 | #ifndef __ASSEMBLY__ | ||
11 | |||
12 | #ifdef CONFIG_SMP | ||
13 | |||
14 | #include <asm/blackfin.h> | ||
15 | #include <asm/irqflags.h> | ||
16 | #include <mach/irq.h> | ||
17 | |||
18 | #define SUPPLE_0_WAKEUP ((IRQ_SUPPLE_0 - (IRQ_CORETMR + 1)) % 32) | ||
19 | |||
20 | static inline void | ||
21 | bfin_iwr_restore(unsigned long iwr0, unsigned long iwr1, unsigned long iwr2) | ||
22 | { | ||
23 | unsigned long SICA_SICB_OFF = ((bfin_read_DSPID() & 0xff) ? 0x1000 : 0); | ||
24 | |||
25 | bfin_write32(SIC_IWR0 + SICA_SICB_OFF, iwr0); | ||
26 | bfin_write32(SIC_IWR1 + SICA_SICB_OFF, iwr1); | ||
27 | } | ||
28 | #define bfin_iwr_restore bfin_iwr_restore | ||
29 | |||
30 | static inline void | ||
31 | bfin_iwr_save(unsigned long niwr0, unsigned long niwr1, unsigned long niwr2, | ||
32 | unsigned long *iwr0, unsigned long *iwr1, unsigned long *iwr2) | ||
33 | { | ||
34 | unsigned long SICA_SICB_OFF = ((bfin_read_DSPID() & 0xff) ? 0x1000 : 0); | ||
35 | |||
36 | *iwr0 = bfin_read32(SIC_IWR0 + SICA_SICB_OFF); | ||
37 | *iwr1 = bfin_read32(SIC_IWR1 + SICA_SICB_OFF); | ||
38 | bfin_iwr_restore(niwr0, niwr1, niwr2); | ||
39 | } | ||
40 | #define bfin_iwr_save bfin_iwr_save | ||
41 | |||
42 | static inline void | ||
43 | bfin_iwr_set_sup0(unsigned long *iwr0, unsigned long *iwr1, unsigned long *iwr2) | ||
44 | { | ||
45 | bfin_iwr_save(0, IWR_ENABLE(SUPPLE_0_WAKEUP), 0, iwr0, iwr1, iwr2); | ||
46 | } | ||
47 | |||
48 | #endif | ||
49 | |||
50 | #endif | ||
51 | |||
1 | #include <mach-common/pll.h> | 52 | #include <mach-common/pll.h> |
53 | |||
54 | #endif | ||