diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-10-13 13:08:43 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-10-13 13:08:43 -0400 |
commit | 54cebc68c81eacac41a21bdfe99dc889d3882c60 (patch) | |
tree | da1d3872c6ddf208768e784bd1ea09054a81462d /arch/blackfin/mach-bf561 | |
parent | fffdedef691a0f6fa7ca1fc0a2a508cbb49def69 (diff) | |
parent | 71de1f8a6365ea65346881e526132563d93696d1 (diff) |
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6: (60 commits)
Blackfin arch: make sure we include the fix for SPORT hysteresis when reprogramming clocks
Blackfin arch: Fix bogus str_ident check in gpio code
Blackfin arch: AD7879 Touchscreen driver
Blackfin arch: introducing bfin_addr_dcachable
Blackfin arch: fix a typo in comments
Blackfin arch: Remove useless head file
Blackfin arch: make sure L2 start and length are always defined (fixes building on BF542)
Blackfin arch: use the Blackfin on-chip ROM to do software reset when possible
Blackfin arch: update anomaly headers to match the latest sheet
Blackfin arch: bfin_reset() is an internal reboot function ... everyone should go through machine_restart()
Blackfin arch: print out error/warning if you are running on the incorrect CPU type
Blackfin arch: remove non-bf54x ifdef logic since this file is only compiled on bf54x parts
Blackfin arch: update board defconfigs
Blackfin arch: Add optional verbose debug
Blackfin arch: emulate a TTY over the EMUDAT/JTAG interface
Blackfin arch: have is_user_addr_valid() check for overflows (like when address is -1)
Blackfin arch: ptrace - fix off-by-one check on end of memory regions
Blackfin arch: Enable framebuffer support for the BF526-EZkit TFT LCD display
Blackfin arch: flash memory map and dm9000 resources updating
Blackfin arch: early prink code still use uart core console functions to parse and set configure option string
...
Diffstat (limited to 'arch/blackfin/mach-bf561')
-rw-r--r-- | arch/blackfin/mach-bf561/head.S | 3 | ||||
-rw-r--r-- | arch/blackfin/mach-bf561/include/mach/anomaly.h | 2 | ||||
-rw-r--r-- | arch/blackfin/mach-bf561/include/mach/bf561.h | 8 | ||||
-rw-r--r-- | arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h | 2 | ||||
-rw-r--r-- | arch/blackfin/mach-bf561/include/mach/mem_map.h | 18 |
5 files changed, 23 insertions, 10 deletions
diff --git a/arch/blackfin/mach-bf561/head.S b/arch/blackfin/mach-bf561/head.S index 75ea6a905829..0b28137b3dea 100644 --- a/arch/blackfin/mach-bf561/head.S +++ b/arch/blackfin/mach-bf561/head.S | |||
@@ -77,6 +77,9 @@ ENTRY(_start_dma_code) | |||
77 | r1 = PLL_BYPASS; /* Bypass the PLL? */ | 77 | r1 = PLL_BYPASS; /* Bypass the PLL? */ |
78 | r1 = r1 << 8; /* Shift it over */ | 78 | r1 = r1 << 8; /* Shift it over */ |
79 | r0 = r1 | r0; /* add them all together */ | 79 | r0 = r1 | r0; /* add them all together */ |
80 | #ifdef ANOMALY_05000265 | ||
81 | r0 = BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */ | ||
82 | #endif | ||
80 | 83 | ||
81 | p0.h = hi(PLL_CTL); | 84 | p0.h = hi(PLL_CTL); |
82 | p0.l = lo(PLL_CTL); /* Load the address */ | 85 | p0.l = lo(PLL_CTL); /* Load the address */ |
diff --git a/arch/blackfin/mach-bf561/include/mach/anomaly.h b/arch/blackfin/mach-bf561/include/mach/anomaly.h index 5c5d7d7d695f..22990df04ae1 100644 --- a/arch/blackfin/mach-bf561/include/mach/anomaly.h +++ b/arch/blackfin/mach-bf561/include/mach/anomaly.h | |||
@@ -270,5 +270,7 @@ | |||
270 | #define ANOMALY_05000183 (0) | 270 | #define ANOMALY_05000183 (0) |
271 | #define ANOMALY_05000273 (0) | 271 | #define ANOMALY_05000273 (0) |
272 | #define ANOMALY_05000311 (0) | 272 | #define ANOMALY_05000311 (0) |
273 | #define ANOMALY_05000353 (1) | ||
274 | #define ANOMALY_05000386 (1) | ||
273 | 275 | ||
274 | #endif | 276 | #endif |
diff --git a/arch/blackfin/mach-bf561/include/mach/bf561.h b/arch/blackfin/mach-bf561/include/mach/bf561.h index 3ef9e5f36136..18b1b3a223ab 100644 --- a/arch/blackfin/mach-bf561/include/mach/bf561.h +++ b/arch/blackfin/mach-bf561/include/mach/bf561.h | |||
@@ -30,8 +30,6 @@ | |||
30 | #ifndef __MACH_BF561_H__ | 30 | #ifndef __MACH_BF561_H__ |
31 | #define __MACH_BF561_H__ | 31 | #define __MACH_BF561_H__ |
32 | 32 | ||
33 | #define SUPPORTED_REVID 0x3 | ||
34 | |||
35 | #define OFFSET_(x) ((x) & 0x0000FFFF) | 33 | #define OFFSET_(x) ((x) & 0x0000FFFF) |
36 | 34 | ||
37 | /*some misc defines*/ | 35 | /*some misc defines*/ |
@@ -213,11 +211,11 @@ | |||
213 | 211 | ||
214 | #ifdef CONFIG_BF561 | 212 | #ifdef CONFIG_BF561 |
215 | #define CPU "BF561" | 213 | #define CPU "BF561" |
216 | #define CPUID 0x027bb000 | 214 | #define CPUID 0x27bb |
217 | #endif | 215 | #endif |
216 | |||
218 | #ifndef CPU | 217 | #ifndef CPU |
219 | #define CPU "UNKNOWN" | 218 | #error Unknown CPU type - This kernel doesn't seem to be configured properly |
220 | #define CPUID 0x0 | ||
221 | #endif | 219 | #endif |
222 | 220 | ||
223 | #endif /* __MACH_BF561_H__ */ | 221 | #endif /* __MACH_BF561_H__ */ |
diff --git a/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h index e0ce0c1843d4..f5327264357c 100644 --- a/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h +++ b/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h | |||
@@ -85,7 +85,7 @@ struct bfin_serial_port { | |||
85 | unsigned int rx_dma_channel; | 85 | unsigned int rx_dma_channel; |
86 | struct work_struct tx_dma_workqueue; | 86 | struct work_struct tx_dma_workqueue; |
87 | #else | 87 | #else |
88 | # if ANOMALY_05000230 | 88 | # if ANOMALY_05000363 |
89 | unsigned int anomaly_threshold; | 89 | unsigned int anomaly_threshold; |
90 | # endif | 90 | # endif |
91 | #endif | 91 | #endif |
diff --git a/arch/blackfin/mach-bf561/include/mach/mem_map.h b/arch/blackfin/mach-bf561/include/mach/mem_map.h index c26d8486cc4b..f1d4c0637bd2 100644 --- a/arch/blackfin/mach-bf561/include/mach/mem_map.h +++ b/arch/blackfin/mach-bf561/include/mach/mem_map.h | |||
@@ -35,9 +35,16 @@ | |||
35 | /* Memory Map for ADSP-BF561 processors */ | 35 | /* Memory Map for ADSP-BF561 processors */ |
36 | 36 | ||
37 | #ifdef CONFIG_BF561 | 37 | #ifdef CONFIG_BF561 |
38 | #define L1_CODE_START 0xFFA00000 | 38 | #define COREA_L1_CODE_START 0xFFA00000 |
39 | #define L1_DATA_A_START 0xFF800000 | 39 | #define COREA_L1_DATA_A_START 0xFF800000 |
40 | #define L1_DATA_B_START 0xFF900000 | 40 | #define COREA_L1_DATA_B_START 0xFF900000 |
41 | #define COREB_L1_CODE_START 0xFF600000 | ||
42 | #define COREB_L1_DATA_A_START 0xFF400000 | ||
43 | #define COREB_L1_DATA_B_START 0xFF500000 | ||
44 | |||
45 | #define L1_CODE_START COREA_L1_CODE_START | ||
46 | #define L1_DATA_A_START COREA_L1_DATA_A_START | ||
47 | #define L1_DATA_B_START COREA_L1_DATA_B_START | ||
41 | 48 | ||
42 | #define L1_CODE_LENGTH 0x4000 | 49 | #define L1_CODE_LENGTH 0x4000 |
43 | 50 | ||
@@ -72,7 +79,10 @@ | |||
72 | 79 | ||
73 | /* Scratch Pad Memory */ | 80 | /* Scratch Pad Memory */ |
74 | 81 | ||
75 | #define L1_SCRATCH_START 0xFFB00000 | 82 | #define COREA_L1_SCRATCH_START 0xFFB00000 |
83 | #define COREB_L1_SCRATCH_START 0xFF700000 | ||
84 | |||
85 | #define L1_SCRATCH_START COREA_L1_SCRATCH_START | ||
76 | #define L1_SCRATCH_LENGTH 0x1000 | 86 | #define L1_SCRATCH_LENGTH 0x1000 |
77 | 87 | ||
78 | #endif /* _MEM_MAP_533_H_ */ | 88 | #endif /* _MEM_MAP_533_H_ */ |