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authorGraf Yang <graf.yang@analog.com>2009-01-07 10:14:39 -0500
committerBryan Wu <cooloney@kernel.org>2009-01-07 10:14:39 -0500
commitc51b4488cd5bff08ed5690a8f303ff7f0894da2a (patch)
tree1f6a2919e011b033ba5177efe3a612f4ebebb4b5 /arch/blackfin/mach-bf561/include/mach/defBF561.h
parent2de73e71c298842db814556379cbe25f5c14691e (diff)
Blackfin arch: SMP supporting patchset: BF561 related code
Blackfin dual core BF561 processor can support SMP like features. https://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:smp-like In this patch, we provide SMP extend to BF561 kernel code Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/mach-bf561/include/mach/defBF561.h')
-rw-r--r--arch/blackfin/mach-bf561/include/mach/defBF561.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/blackfin/mach-bf561/include/mach/defBF561.h b/arch/blackfin/mach-bf561/include/mach/defBF561.h
index 4eca2026bb92..d7c509759659 100644
--- a/arch/blackfin/mach-bf561/include/mach/defBF561.h
+++ b/arch/blackfin/mach-bf561/include/mach/defBF561.h
@@ -912,6 +912,9 @@
912#define ACTIVE_PLLDISABLED 0x0004 /* Processor In Active Mode With PLL Disabled */ 912#define ACTIVE_PLLDISABLED 0x0004 /* Processor In Active Mode With PLL Disabled */
913#define PLL_LOCKED 0x0020 /* PLL_LOCKCNT Has Been Reached */ 913#define PLL_LOCKED 0x0020 /* PLL_LOCKCNT Has Been Reached */
914 914
915/* SICA_SYSCR Masks */
916#define COREB_SRAM_INIT 0x0020
917
915/* SWRST Mask */ 918/* SWRST Mask */
916#define SYSTEM_RESET 0x0007 /* Initiates a system software reset */ 919#define SYSTEM_RESET 0x0007 /* Initiates a system software reset */
917#define DOUBLE_FAULT_A 0x0008 /* Core A Double Fault Causes Reset */ 920#define DOUBLE_FAULT_A 0x0008 /* Core A Double Fault Causes Reset */