Blackfin: simplify BF561 coreb driver greatly

Since 90% of this driver can be handled in user space, move it to the
corebld user space application.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>

1 files changed, 1 insertions, 14 deletions

diff --git a/arch/blackfin/mach-bf561/Kconfig b/arch/blackfin/mach-bf561/Kconfig
index 638ec38ca470..6965dd59af4c 100644
--- a/arch/blackfin/mach-bf561/Kconfig
+++ b/arch/blackfin/mach-bf561/Kconfig
@@ -9,22 +9,9 @@ if (!SMP)
 comment "Core B Support"
 
 config BF561_COREB
-        bool "Enable Core B support"
+        bool "Enable Core B loader"
         default y
 
-config BF561_COREB_RESET
-        bool "Enable Core B reset support"
-        default n
-        help
-          This requires code in the application that is loaded
-          into Core B. In order to reset, the application needs
-          to install an interrupt handler for Supplemental
-          Interrupt 0, that sets RETI to 0xff600000 and writes
-          bit 11 of SICB_SYSCR when bit 5 of SICA_SYSCR is 0.
-          This causes Core B to stall when Supplemental Interrupt
-          0 is set, and will reset PC to 0xff600000 when
-          COREB_SRAM_INIT is cleared.
-
 endif
 
 comment "Interrupt Priority Assignment"