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authorMike Frysinger <vapier@gentoo.org>2011-03-30 03:59:00 -0400
committerMike Frysinger <vapier@gentoo.org>2011-05-25 08:13:42 -0400
commit3dd666067d2b285724c828946e83100ea4c43d4b (patch)
treebb0e0c060013e12a7d6674f8139a5fec59cf6fbc /arch/blackfin/mach-bf548
parent6adc521e7127732512ebd7fcfd3926d7970a82e1 (diff)
Blackfin: clean up style in irq defines
These files had a lot of whitespace damage, mostly due to copying and pasting original files that had damage. The BF561 header also had a lot of unused CONFIG_DEF_xxx defines, so punt them all. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/mach-bf548')
-rw-r--r--arch/blackfin/mach-bf548/include/mach/irq.h46
1 files changed, 23 insertions, 23 deletions
diff --git a/arch/blackfin/mach-bf548/include/mach/irq.h b/arch/blackfin/mach-bf548/include/mach/irq.h
index 19f209ff4329..533b8095b540 100644
--- a/arch/blackfin/mach-bf548/include/mach/irq.h
+++ b/arch/blackfin/mach-bf548/include/mach/irq.h
@@ -9,7 +9,7 @@
9 9
10#include <mach-common/irq.h> 10#include <mach-common/irq.h>
11 11
12#define NR_PERI_INTS (32 * 3) 12#define NR_PERI_INTS (3 * 32)
13 13
14#define IRQ_PLL_WAKEUP BFIN_IRQ(0) /* PLL Wakeup Interrupt */ 14#define IRQ_PLL_WAKEUP BFIN_IRQ(0) /* PLL Wakeup Interrupt */
15#define IRQ_DMAC0_ERROR BFIN_IRQ(1) /* DMAC0 Status Interrupt */ 15#define IRQ_DMAC0_ERROR BFIN_IRQ(1) /* DMAC0 Status Interrupt */
@@ -282,35 +282,35 @@
282#define IRQ_PJ14 BFIN_PJ_IRQ(14) /* N/A */ 282#define IRQ_PJ14 BFIN_PJ_IRQ(14) /* N/A */
283#define IRQ_PJ15 BFIN_PJ_IRQ(15) /* N/A */ 283#define IRQ_PJ15 BFIN_PJ_IRQ(15) /* N/A */
284 284
285#define GPIO_IRQ_BASE IRQ_PA0 285#define GPIO_IRQ_BASE IRQ_PA0
286 286
287#define NR_MACH_IRQS (IRQ_PJ15 + 1) 287#define NR_MACH_IRQS (IRQ_PJ15 + 1)
288 288
289/* For compatibility reasons with existing code */ 289/* For compatibility reasons with existing code */
290 290
291#define IRQ_DMAC0_ERR IRQ_DMAC0_ERROR 291#define IRQ_DMAC0_ERR IRQ_DMAC0_ERROR
292#define IRQ_EPPI0_ERR IRQ_EPPI0_ERROR 292#define IRQ_EPPI0_ERR IRQ_EPPI0_ERROR
293#define IRQ_SPORT0_ERR IRQ_SPORT0_ERROR 293#define IRQ_SPORT0_ERR IRQ_SPORT0_ERROR
294#define IRQ_SPORT1_ERR IRQ_SPORT1_ERROR 294#define IRQ_SPORT1_ERR IRQ_SPORT1_ERROR
295#define IRQ_SPI0_ERR IRQ_SPI0_ERROR 295#define IRQ_SPI0_ERR IRQ_SPI0_ERROR
296#define IRQ_UART0_ERR IRQ_UART0_ERROR 296#define IRQ_UART0_ERR IRQ_UART0_ERROR
297#define IRQ_DMAC1_ERR IRQ_DMAC1_ERROR 297#define IRQ_DMAC1_ERR IRQ_DMAC1_ERROR
298#define IRQ_SPORT2_ERR IRQ_SPORT2_ERROR 298#define IRQ_SPORT2_ERR IRQ_SPORT2_ERROR
299#define IRQ_SPORT3_ERR IRQ_SPORT3_ERROR 299#define IRQ_SPORT3_ERR IRQ_SPORT3_ERROR
300#define IRQ_SPI1_ERR IRQ_SPI1_ERROR 300#define IRQ_SPI1_ERR IRQ_SPI1_ERROR
301#define IRQ_SPI2_ERR IRQ_SPI2_ERROR 301#define IRQ_SPI2_ERR IRQ_SPI2_ERROR
302#define IRQ_UART1_ERR IRQ_UART1_ERROR 302#define IRQ_UART1_ERR IRQ_UART1_ERROR
303#define IRQ_UART2_ERR IRQ_UART2_ERROR 303#define IRQ_UART2_ERR IRQ_UART2_ERROR
304#define IRQ_CAN0_ERR IRQ_CAN0_ERROR 304#define IRQ_CAN0_ERR IRQ_CAN0_ERROR
305#define IRQ_MXVR_ERR IRQ_MXVR_ERROR 305#define IRQ_MXVR_ERR IRQ_MXVR_ERROR
306#define IRQ_EPPI1_ERR IRQ_EPPI1_ERROR 306#define IRQ_EPPI1_ERR IRQ_EPPI1_ERROR
307#define IRQ_EPPI2_ERR IRQ_EPPI2_ERROR 307#define IRQ_EPPI2_ERR IRQ_EPPI2_ERROR
308#define IRQ_UART3_ERR IRQ_UART3_ERROR 308#define IRQ_UART3_ERR IRQ_UART3_ERROR
309#define IRQ_HOST_ERR IRQ_HOST_ERROR 309#define IRQ_HOST_ERR IRQ_HOST_ERROR
310#define IRQ_PIXC_ERR IRQ_PIXC_ERROR 310#define IRQ_PIXC_ERR IRQ_PIXC_ERROR
311#define IRQ_NFC_ERR IRQ_NFC_ERROR 311#define IRQ_NFC_ERR IRQ_NFC_ERROR
312#define IRQ_ATAPI_ERR IRQ_ATAPI_ERROR 312#define IRQ_ATAPI_ERR IRQ_ATAPI_ERROR
313#define IRQ_CAN1_ERR IRQ_CAN1_ERROR 313#define IRQ_CAN1_ERR IRQ_CAN1_ERROR
314#define IRQ_HS_DMA_ERR IRQ_HS_DMA_ERROR 314#define IRQ_HS_DMA_ERR IRQ_HS_DMA_ERROR
315 315
316/* IAR0 BIT FIELDS */ 316/* IAR0 BIT FIELDS */
@@ -451,4 +451,4 @@ struct bfin_pint_regs {
451 451
452#endif 452#endif
453 453
454#endif /* _BF548_IRQ_H_ */ 454#endif