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author | Robin Getz <rgetz@blackfin.uclinux.org> | 2008-10-12 23:37:34 -0400 |
---|---|---|
committer | Bryan Wu <cooloney@kernel.org> | 2008-10-12 23:37:34 -0400 |
commit | 71de1f8a6365ea65346881e526132563d93696d1 (patch) | |
tree | c15705934dbbece64b6c570123d38cce3c57091b /arch/blackfin/mach-bf548 | |
parent | e9fae189caae7c1cf306e30f5b67c6d226ed69cf (diff) |
Blackfin arch: make sure we include the fix for SPORT hysteresis when reprogramming clocks
As pointed out by Appalayagari Sreedhar, make sure we include the fix
for SPORT hysteresis when reprogramming clocks.
Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/mach-bf548')
-rw-r--r-- | arch/blackfin/mach-bf548/head.S | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/blackfin/mach-bf548/head.S b/arch/blackfin/mach-bf548/head.S index b0628164e5d9..051b05c88027 100644 --- a/arch/blackfin/mach-bf548/head.S +++ b/arch/blackfin/mach-bf548/head.S | |||
@@ -94,6 +94,9 @@ ENTRY(_start_dma_code) | |||
94 | r1 = PLL_BYPASS; /* Bypass the PLL? */ | 94 | r1 = PLL_BYPASS; /* Bypass the PLL? */ |
95 | r1 = r1 << 8; /* Shift it over */ | 95 | r1 = r1 << 8; /* Shift it over */ |
96 | r0 = r1 | r0; /* add them all together */ | 96 | r0 = r1 | r0; /* add them all together */ |
97 | #ifdef ANOMALY_05000265 | ||
98 | r0 = BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */ | ||
99 | #endif | ||
97 | 100 | ||
98 | p0.h = hi(PLL_CTL); | 101 | p0.h = hi(PLL_CTL); |
99 | p0.l = lo(PLL_CTL); /* Load the address */ | 102 | p0.l = lo(PLL_CTL); /* Load the address */ |