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authorMike Frysinger <vapier@gentoo.org>2009-07-26 20:44:25 -0400
committerMike Frysinger <vapier@gentoo.org>2009-09-16 22:09:55 -0400
commit8d71e075966e29232cd38d8ca6335047a164c1dc (patch)
tree8e958abca578238c383ab99d8b2b170d8648c12a /arch/blackfin/mach-bf548/include/mach/blackfin.h
parent61f09b5a09fb3962bbd3990a9a5a8470197955bb (diff)
Blackfin: drop unused MMR defines that only cause bad code to be written
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/mach-bf548/include/mach/blackfin.h')
-rw-r--r--arch/blackfin/mach-bf548/include/mach/blackfin.h89
1 files changed, 0 insertions, 89 deletions
diff --git a/arch/blackfin/mach-bf548/include/mach/blackfin.h b/arch/blackfin/mach-bf548/include/mach/blackfin.h
index 6b97396d817f..318667b2f036 100644
--- a/arch/blackfin/mach-bf548/include/mach/blackfin.h
+++ b/arch/blackfin/mach-bf548/include/mach/blackfin.h
@@ -72,97 +72,8 @@
72#include "cdefBF549.h" 72#include "cdefBF549.h"
73#endif 73#endif
74 74
75/* UART 1*/
76#define bfin_read_UART_THR() bfin_read_UART1_THR()
77#define bfin_write_UART_THR(val) bfin_write_UART1_THR(val)
78#define bfin_read_UART_RBR() bfin_read_UART1_RBR()
79#define bfin_write_UART_RBR(val) bfin_write_UART1_RBR(val)
80#define bfin_read_UART_DLL() bfin_read_UART1_DLL()
81#define bfin_write_UART_DLL(val) bfin_write_UART1_DLL(val)
82#define bfin_read_UART_IER() bfin_read_UART1_IER()
83#define bfin_write_UART_IER(val) bfin_write_UART1_IER(val)
84#define bfin_read_UART_DLH() bfin_read_UART1_DLH()
85#define bfin_write_UART_DLH(val) bfin_write_UART1_DLH(val)
86#define bfin_read_UART_IIR() bfin_read_UART1_IIR()
87#define bfin_write_UART_IIR(val) bfin_write_UART1_IIR(val)
88#define bfin_read_UART_LCR() bfin_read_UART1_LCR()
89#define bfin_write_UART_LCR(val) bfin_write_UART1_LCR(val)
90#define bfin_read_UART_MCR() bfin_read_UART1_MCR()
91#define bfin_write_UART_MCR(val) bfin_write_UART1_MCR(val)
92#define bfin_read_UART_LSR() bfin_read_UART1_LSR()
93#define bfin_write_UART_LSR(val) bfin_write_UART1_LSR(val)
94#define bfin_read_UART_SCR() bfin_read_UART1_SCR()
95#define bfin_write_UART_SCR(val) bfin_write_UART1_SCR(val)
96#define bfin_read_UART_GCTL() bfin_read_UART1_GCTL()
97#define bfin_write_UART_GCTL(val) bfin_write_UART1_GCTL(val)
98
99#endif 75#endif
100 76
101/* MAP used DEFINES from BF533 to BF54x - so we don't need to change
102 * them in the driver, kernel, etc. */
103
104/* UART_IIR Register */
105#define STATUS(x) ((x << 1) & 0x06)
106#define STATUS_P1 0x02
107#define STATUS_P0 0x01
108
109/* UART 0*/
110
111/* DMA Channel */
112#define bfin_read_CH_UART_RX() bfin_read_CH_UART1_RX()
113#define bfin_write_CH_UART_RX(val) bfin_write_CH_UART1_RX(val)
114#define bfin_read_CH_UART_TX() bfin_read_CH_UART1_TX()
115#define bfin_write_CH_UART_TX(val) bfin_write_CH_UART1_TX(val)
116#define CH_UART_RX CH_UART1_RX
117#define CH_UART_TX CH_UART1_TX
118
119/* System Interrupt Controller */
120#define bfin_read_IRQ_UART_RX() bfin_read_IRQ_UART1_RX()
121#define bfin_write_IRQ_UART_RX(val) bfin_write_IRQ_UART1_RX(val)
122#define bfin_read_IRQ_UART_TX() bfin_read_IRQ_UART1_TX()
123#define bfin_write_IRQ_UART_TX(val) bfin_write_IRQ_UART1_TX(val)
124#define bfin_read_IRQ_UART_ERROR() bfin_read_IRQ_UART1_ERROR()
125#define bfin_write_IRQ_UART_ERROR(val) bfin_write_IRQ_UART1_ERROR(val)
126#define IRQ_UART_RX IRQ_UART1_RX
127#define IRQ_UART_TX IRQ_UART1_TX
128#define IRQ_UART_ERROR IRQ_UART1_ERROR
129
130/* MMR Registers*/
131#define bfin_read_UART_THR() bfin_read_UART1_THR()
132#define bfin_write_UART_THR(val) bfin_write_UART1_THR(val)
133#define bfin_read_UART_RBR() bfin_read_UART1_RBR()
134#define bfin_write_UART_RBR(val) bfin_write_UART1_RBR(val)
135#define bfin_read_UART_DLL() bfin_read_UART1_DLL()
136#define bfin_write_UART_DLL(val) bfin_write_UART1_DLL(val)
137#define bfin_read_UART_IER() bfin_read_UART1_IER()
138#define bfin_write_UART_IER(val) bfin_write_UART1_IER(val)
139#define bfin_read_UART_DLH() bfin_read_UART1_DLH()
140#define bfin_write_UART_DLH(val) bfin_write_UART1_DLH(val)
141#define bfin_read_UART_IIR() bfin_read_UART1_IIR()
142#define bfin_write_UART_IIR(val) bfin_write_UART1_IIR(val)
143#define bfin_read_UART_LCR() bfin_read_UART1_LCR()
144#define bfin_write_UART_LCR(val) bfin_write_UART1_LCR(val)
145#define bfin_read_UART_MCR() bfin_read_UART1_MCR()
146#define bfin_write_UART_MCR(val) bfin_write_UART1_MCR(val)
147#define bfin_read_UART_LSR() bfin_read_UART1_LSR()
148#define bfin_write_UART_LSR(val) bfin_write_UART1_LSR(val)
149#define bfin_read_UART_SCR() bfin_read_UART1_SCR()
150#define bfin_write_UART_SCR(val) bfin_write_UART1_SCR(val)
151#define bfin_read_UART_GCTL() bfin_read_UART1_GCTL()
152#define bfin_write_UART_GCTL(val) bfin_write_UART1_GCTL(val)
153
154#define BFIN_UART_THR UART1_THR
155#define BFIN_UART_RBR UART1_RBR
156#define BFIN_UART_DLL UART1_DLL
157#define BFIN_UART_IER UART1_IER
158#define BFIN_UART_DLH UART1_DLH
159#define BFIN_UART_IIR UART1_IIR
160#define BFIN_UART_LCR UART1_LCR
161#define BFIN_UART_MCR UART1_MCR
162#define BFIN_UART_LSR UART1_LSR
163#define BFIN_UART_SCR UART1_SCR
164#define BFIN_UART_GCTL UART1_GCTL
165
166#define BFIN_UART_NR_PORTS 4 77#define BFIN_UART_NR_PORTS 4
167 78
168#define OFFSET_DLL 0x00 /* Divisor Latch (Low-Byte) */ 79#define OFFSET_DLL 0x00 /* Divisor Latch (Low-Byte) */