Blackfin arch: rewrite our reboot code in C

rewrite our reboot code in C rather than assembly to be like
other architectures and to allow board maintainers to define
custom behavior

Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>

1 files changed, 0 insertions, 125 deletions

diff --git a/arch/blackfin/mach-bf548/head.S b/arch/blackfin/mach-bf548/head.S
index 937fbef26a51..532ed0930b5e 100644
--- a/arch/blackfin/mach-bf548/head.S
+++ b/arch/blackfin/mach-bf548/head.S
@@ -378,131 +378,6 @@ ENTRY(_start_dma_code)
         RTS;
 #endif /* CONFIG_BFIN_KERNEL_CLOCK */
 
-ENTRY(_bfin_reset)
-        /* No more interrupts to be handled*/
-        CLI R6;
-        SSYNC;
-
-#if 0 /* Need to determine later if this is here necessary for BF54x */
-#if defined(CONFIG_MTD_M25P80)
-/*
- * The following code fix the SPI flash reboot issue,
- * /CS signal of the chip which is using PF10 return to GPIO mode
- */
-        p0.h = hi(PORTF_FER);
-        p0.l = lo(PORTF_FER);
-        r0.l = 0x0000;
-        w[p0] = r0.l;
-        SSYNC;
-
-/* /CS return to high */
-        p0.h = hi(PORTFIO);
-        p0.l = lo(PORTFIO);
-        r0.l = 0xFFFF;
-        w[p0] = r0.l;
-        SSYNC;
-
-/* Delay some time, This is necessary */
-        r1.h = 0;
-        r1.l = 0x400;
-        p1   = r1;
-        lsetup (_delay_lab1,_delay_lab1_end ) lc1 = p1;
-_delay_lab1:
-        r0.h = 0;
-        r0.l = 0x8000;
-        p0   = r0;
-        lsetup (_delay_lab0,_delay_lab0_end ) lc0 = p0;
-_delay_lab0:
-        nop;
-_delay_lab0_end:
-        nop;
-_delay_lab1_end:
-        nop;
-#endif
-#endif
-
-        /* Clear the bits 13-15 in SWRST if they werent cleared */
-        p0.h = hi(SWRST);
-        p0.l = lo(SWRST);
-        csync;
-        r0.l = w[p0];
-
-        /* Clear the IMASK register */
-        p0.h = hi(IMASK);
-        p0.l = lo(IMASK);
-        r0 = 0x0;
-        [p0] = r0;
-
-        /* Clear the ILAT register */
-        p0.h = hi(ILAT);
-        p0.l = lo(ILAT);
-        r0 = [p0];
-        [p0] = r0;
-        SSYNC;
-
-        /* Disable the WDOG TIMER */
-        p0.h = hi(WDOG_CTL);
-        p0.l = lo(WDOG_CTL);
-        r0.l = 0xAD6;
-        w[p0] = r0.l;
-        SSYNC;
-
-        /* Clear the sticky bit incase it is already set */
-        p0.h = hi(WDOG_CTL);
-        p0.l = lo(WDOG_CTL);
-        r0.l = 0x8AD6;
-        w[p0] = r0.l;
-        SSYNC;
-
-        /* Program the count value */
-        R0.l = 0x100;
-        R0.h = 0x0;
-        P0.h = hi(WDOG_CNT);
-        P0.l = lo(WDOG_CNT);
-        [P0] = R0;
-        SSYNC;
-
-        /* Program WDOG_STAT if necessary */
-        P0.h = hi(WDOG_CTL);
-        P0.l = lo(WDOG_CTL);
-        R0 = W[P0](Z);
-        CC = BITTST(R0,1);
-        if !CC JUMP .LWRITESTAT;
-        CC = BITTST(R0,2);
-        if !CC JUMP .LWRITESTAT;
-        JUMP .LSKIP_WRITE;
-
-.LWRITESTAT:
-        /* When watch dog timer is enabled,
-         * a write to STAT will load the contents of CNT to STAT
-         */
-        R0 = 0x0000(z);
-        P0.h = hi(WDOG_STAT);
-        P0.l = lo(WDOG_STAT)
-        [P0] = R0;
-        SSYNC;
-
-.LSKIP_WRITE:
-        /* Enable the reset event */
-        P0.h = hi(WDOG_CTL);
-        P0.l = lo(WDOG_CTL);
-        R0 = W[P0](Z);
-        BITCLR(R0,1);
-        BITCLR(R0,2);
-        W[P0] = R0.L;
-        SSYNC;
-        NOP;
-
-        /* Enable the wdog counter */
-        R0 = W[P0](Z);
-        BITCLR(R0,4);
-        W[P0] = R0.L;
-        SSYNC;
-
-        IDLE;
-
-        RTS;
-
 .data
 
 /*