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authorMike Frysinger <vapier@gentoo.org>2009-10-14 23:14:09 -0400
committerMike Frysinger <vapier@gentoo.org>2009-12-15 00:14:36 -0500
commit341a1fc0d1efbb202a77aa69f4c7d97a507b1056 (patch)
tree3e18e04c41240b9a523177c4f517b018b209b52b /arch/blackfin/mach-bf538
parent1915b6c0aedbba3bc5042e2b9bdbf7734579352d (diff)
Blackfin: scrub unused watchdog mmr masks
The watchdog code doesn't need these, and the other parts had these punted, so keep the global namespace clean. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/mach-bf538')
-rw-r--r--arch/blackfin/mach-bf538/include/mach/defBF539.h35
1 files changed, 0 insertions, 35 deletions
diff --git a/arch/blackfin/mach-bf538/include/mach/defBF539.h b/arch/blackfin/mach-bf538/include/mach/defBF539.h
index bfe94dd8340c..5a9d0d56ea75 100644
--- a/arch/blackfin/mach-bf538/include/mach/defBF539.h
+++ b/arch/blackfin/mach-bf538/include/mach/defBF539.h
@@ -1609,41 +1609,6 @@
1609#endif /* _MISRA_RULES */ 1609#endif /* _MISRA_RULES */
1610 1610
1611 1611
1612/* ********* WATCHDOG TIMER MASKS ******************** */
1613/* Watchdog Timer WDOG_CTL Register Masks */
1614#ifdef _MISRA_RULES
1615#define WDEV(x) (((x)<<1) & 0x0006u) /* event generated on roll over */
1616#else
1617#define WDEV(x) (((x)<<1) & 0x0006) /* event generated on roll over */
1618#endif /* _MISRA_RULES */
1619#define WDEV_RESET 0x0000 /* generate reset event on roll over */
1620#define WDEV_NMI 0x0002 /* generate NMI event on roll over */
1621#define WDEV_GPI 0x0004 /* generate GP IRQ on roll over */
1622#define WDEV_NONE 0x0006 /* no event on roll over */
1623#define WDEN 0x0FF0 /* enable watchdog */
1624#define WDDIS 0x0AD0 /* disable watchdog */
1625#define WDRO 0x8000 /* watchdog rolled over latch */
1626
1627/* deprecated WDOG_CTL Register Masks for legacy code */
1628#define ICTL WDEV
1629#define ENABLE_RESET WDEV_RESET
1630#define WDOG_RESET WDEV_RESET
1631#define ENABLE_NMI WDEV_NMI
1632#define WDOG_NMI WDEV_NMI
1633#define ENABLE_GPI WDEV_GPI
1634#define WDOG_GPI WDEV_GPI
1635#define DISABLE_EVT WDEV_NONE
1636#define WDOG_NONE WDEV_NONE
1637
1638#define TMR_EN WDEN
1639#define WDOG_DISABLE WDDIS
1640#define TRO WDRO
1641
1642#define ICTL_P0 0x01
1643#define ICTL_P1 0x02
1644#define TRO_P 0x0F
1645
1646
1647/* ***************************** UART CONTROLLER MASKS ********************** */ 1612/* ***************************** UART CONTROLLER MASKS ********************** */
1648/* UARTx_LCR Register */ 1613/* UARTx_LCR Register */
1649#ifdef _MISRA_RULES 1614#ifdef _MISRA_RULES